1 #include "../vidhrdw/macross.c"
2
3 /********************************************************************
4
5 Macross 2
6
7 driver by Mirko Buffoni
8
9
10 Memory layout:
11
12 000000-07FFFF 68k rom
13 088000-0885FF 15 bit palette ram (RRRRGGGGBBBBRGBx)
14 4321^^^^^^^^0^^
15 4321|||| 0|
16 4321 0
17
18 09C000-09C7FF VideoRam (8x8 tiles, 256x256)
19 0F0000-0FFFFF Work ram
20
21 ----
22
23 Audio system: 2 x OKI M6295
24
25
26 ********************************************************************/
27
28
29 #include "driver.h"
30
31 extern unsigned char *macross_workram;
32 extern unsigned char *macross_spriteram;
33 extern unsigned char *macross_txvideoram;
34 extern unsigned char *macross_videocontrol;
35 extern size_t macross_txvideoram_size;
36
37
38 READ_HANDLER( macross_txvideoram_r );
39 WRITE_HANDLER( macross_txvideoram_w );
40 WRITE_HANDLER( macross_paletteram_w );
41
42
43
44
45
46 int macross_vh_start(void);
47 void macross_vh_stop(void);
48 void macross_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
49
50
51
52
53 static int respcount = 0;
54 static int resp[] = { 0x82, 0xc7, 0x00,
55 0x2c, 0x6c, 0x00,
56 0x9f, 0xc7, 0x00,
57 0x29, 0x69, 0x00,
58 0x8b, 0xc7, 0x00 };
59
60
READ_HANDLER(macross_protection_r)61 READ_HANDLER( macross_protection_r )
62 {
63 int res = resp[ respcount++ ];
64 if (respcount >= 15) respcount = 0;
65
66 return res;
67 }
68
WRITE_HANDLER(macross_paletteram_w)69 WRITE_HANDLER( macross_paletteram_w )
70 {
71 int r,g,b;
72 int oldword = READ_WORD(&paletteram[offset]);
73 int newword = COMBINE_WORD(oldword,data);
74
75
76 WRITE_WORD(&paletteram[offset],newword);
77
78 r = ((newword >> 11) & 0x1e) | ((newword >> 3) & 0x01);
79 g = ((newword >> 7) & 0x1e) | ((newword >> 2) & 0x01);
80 b = ((newword >> 3) & 0x1e) | ((newword >> 1) & 0x01);
81
82 r = (r << 3) | (r >> 2);
83 g = (g << 3) | (g >> 2);
84 b = (b << 3) | (b >> 2);
85
86 palette_change_color(offset / 2,r,g,b);
87 }
88
89
WRITE_HANDLER(macross_oki6295_bankswitch_w)90 WRITE_HANDLER( macross_oki6295_bankswitch_w )
91 {
92 if ((data & 0x00ff0000) == 0)
93 {
94 switch (offset)
95 {
96 case 0x00: OKIM6295_set_bank_base(0, 0, (data & 0x0f) * 0x10000); break;
97 case 0x02: OKIM6295_set_bank_base(0, 1, (data & 0x0f) * 0x10000); break;
98 case 0x04: OKIM6295_set_bank_base(0, 2, (data & 0x0f) * 0x10000); break;
99 case 0x06: OKIM6295_set_bank_base(0, 3, (data & 0x0f) * 0x10000); break;
100 case 0x08: OKIM6295_set_bank_base(1, 0, (data & 0x0f) * 0x10000); break;
101 case 0x0a: OKIM6295_set_bank_base(1, 1, (data & 0x0f) * 0x10000); break;
102 case 0x0c: OKIM6295_set_bank_base(1, 2, (data & 0x0f) * 0x10000); break;
103 case 0x0e: OKIM6295_set_bank_base(1, 3, (data & 0x0f) * 0x10000); break;
104 }
105 }
106 }
107
108
109 static struct MemoryReadAddress readmem[] =
110 {
111 { 0x000000, 0x07ffff, MRA_ROM },
112 { 0x080000, 0x080001, input_port_0_r },
113 { 0x080002, 0x080003, input_port_1_r },
114 { 0x080008, 0x080009, input_port_2_r },
115 { 0x08000a, 0x08000b, input_port_3_r },
116 { 0x08000e, 0x08000f, macross_protection_r },
117 { 0x088000, 0x0885ff, paletteram_word_r },
118 { 0x090000, 0x093fff, MRA_BANK2 }, /* BG RAM */
119 { 0x09c000, 0x09c7ff, macross_txvideoram_r },
120 { 0x0f0000, 0x0fffff, MRA_BANK1 }, /* Work RAM */
121 { -1 }
122 };
123
124 static struct MemoryWriteAddress writemem[] =
125 {
126 { 0x000000, 0x07ffff, MWA_ROM },
127 { 0x080014, 0x080015, MWA_NOP },
128 // { 0x08001e, 0x08001f, MWA_NOP }, // Protection chip, not emulated
129 { 0x088000, 0x0885ff, macross_paletteram_w, &paletteram },
130 { 0x08c000, 0x08c00f, macross_oki6295_bankswitch_w },
131 { 0x090000, 0x093fff, MWA_BANK2, ¯oss_videocontrol }, /* BG RAM */
132 { 0x09c000, 0x09c7ff, macross_txvideoram_w, ¯oss_txvideoram, ¯oss_txvideoram_size },
133 { 0x0f0000, 0x0fffff, MWA_BANK1, ¯oss_workram }, /* Work RAM */
134 { -1 }
135 };
136
137
138 INPUT_PORTS_START( macross )
139
140 PORT_START /* IN0 */
141 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
142 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
143 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_START3 ) /* Service */
144 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START1 )
145 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START2 )
146 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Maybe unused */
147 PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Maybe unused */
148 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Maybe unused */
149
150 PORT_START /* IN1 */
151 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
152 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
153 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
154 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
155 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
156 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
157 PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNKNOWN )
158 PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNKNOWN )
159 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
160 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
161 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
162 PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
163 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
164 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
165 PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
166 PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
167
168 PORT_START /* DSW A */
169 PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
170 PORT_DIPNAME( 0x02, 0x02, "Unknown 2" )
171 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
172 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
173 PORT_DIPNAME( 0x04, 0x04, "Unknown 3" )
174 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
175 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
176 PORT_DIPNAME( 0x08, 0x08, "Language" )
177 PORT_DIPSETTING( 0x08, "Japanese" )
178 PORT_DIPSETTING( 0x00, "English" )
179 PORT_DIPNAME( 0x10, 0x10, "Unknown 5" )
180 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
181 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
182 PORT_DIPNAME( 0x20, 0x20, "Unknown 6" )
183 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
184 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
185 PORT_DIPNAME( 0x40, 0x40, "Unknown 7" )
186 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
187 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
188 PORT_DIPNAME( 0x80, 0x80, "Unknown 8" )
189 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
190 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
191
192 PORT_START /* DSW B */
193 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
194 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
195 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
196 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Demo_Sounds ) )
197 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
198 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
199 PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Coin_B ) )
200 PORT_DIPSETTING( 0x10, DEF_STR( 4C_1C ) )
201 PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
202 PORT_DIPSETTING( 0x18, DEF_STR( 2C_1C ) )
203 PORT_DIPSETTING( 0x1c, DEF_STR( 1C_1C ) )
204 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_2C ) )
205 PORT_DIPSETTING( 0x14, DEF_STR( 1C_3C ) )
206 PORT_DIPSETTING( 0x04, DEF_STR( 1C_4C ) )
207 PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
208 PORT_DIPNAME( 0xe0, 0xe0, DEF_STR( Coin_A ) )
209 PORT_DIPSETTING( 0x80, DEF_STR( 4C_1C ) )
210 PORT_DIPSETTING( 0x40, DEF_STR( 3C_1C ) )
211 PORT_DIPSETTING( 0xc0, DEF_STR( 2C_1C ) )
212 PORT_DIPSETTING( 0xe0, DEF_STR( 1C_1C ) )
213 PORT_DIPSETTING( 0x60, DEF_STR( 1C_2C ) )
214 PORT_DIPSETTING( 0xa0, DEF_STR( 1C_3C ) )
215 PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
216 PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
217
218 INPUT_PORTS_END
219
220
221
222 static struct GfxLayout charlayout =
223 {
224 8,8, /* 8*8 characters */
225 4096, /* 2048 characters */
226 4, /* 4 bits per pixel */
227 { 0, 1, 2, 3 }, /* the bitplanes are packed in one nibble */
228 { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 },
229 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
230 32*8 /* every char takes 32 consecutive bytes */
231 };
232
233 static struct GfxLayout tilelayout =
234 {
235 8,8, /* 8*8 characters */
236 65536, /* 65536 characters */
237 4, /* 4 bits per pixel */
238 { 0, 1, 2, 3 }, /* the bitplanes are packed in one nibble */
239 { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 },
240 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
241 32*8 /* every char takes 32 consecutive bytes */
242 };
243
244 static struct GfxLayout spritelayout =
245 {
246 16,16, /* 16*16 sprites */
247 16384, /* 16384 sprites */
248 4, /* 4 bits per pixel */
249 { 0, 1, 2, 3 }, /* the bitplanes are packed in one nibble */
250 { 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4,
251 16*32+2*4, 16*32+3*4, 16*32+0*4, 16*32+1*4, 16*32+6*4, 16*32+7*4, 16*32+4*4, 16*32+5*4 },
252 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
253 8*32, 9*32, 10*32, 11*32, 12*32, 13*32, 14*32, 15*32 },
254 4*32*8 /* every sprites takes 256 consecutive bytes */
255 };
256
257 static struct GfxDecodeInfo macross_gfxdecodeinfo[] =
258 {
259 { REGION_GFX1, 0, &charlayout, 512, 16 }, /* Chars */
260 { REGION_GFX2, 0, &tilelayout, 0, 16 }, /* Tiles */
261 { REGION_GFX3, 0, &spritelayout, 256, 16 }, /* Sprites */
262 { -1 } /* end of array */
263 };
264
265
266 static struct OKIM6295interface okim6295_interface =
267 {
268 2, /* 2 chip */
269 { 22050, 22050 }, /* 22050Hz frequency? */
270 { REGION_SOUND1, REGION_SOUND2 }, /* memory region 2,3 */
271 { 50,50 }
272 };
273
274
275
276 static struct MachineDriver machine_driver_macross =
277 {
278 /* basic machine hardware */
279 {
280 {
281 CPU_M68000,
282 10000000, /* 10.0 MHz ? */
283 readmem,writemem,0,0,
284 m68_level4_irq,1,
285 m68_level1_irq,102
286 },
287 },
288 60, DEFAULT_REAL_60HZ_VBLANK_DURATION,
289 1,
290 0,
291
292 /* video hardware */
293 256, 256, { 0*8, 32*8-1, 2*8, 30*8-1 },
294 macross_gfxdecodeinfo,
295 1024, 1024,
296 0,
297
298 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
299 0,
300 macross_vh_start,
301 macross_vh_stop,
302 macross_vh_screenrefresh,
303
304 0,0,0,0,
305 {
306 {
307 SOUND_OKIM6295,
308 &okim6295_interface
309 }
310 }
311 };
312
313
314
315
316 ROM_START( macross )
317 ROM_REGION( 0x80000, REGION_CPU1 ) /* 68000 code */
318 ROM_LOAD( "921a03", 0x00000, 0x80000, 0x33318d55 ) /* 68000 code */
319
320 ROM_REGION( 0x020000, REGION_GFX1 | REGIONFLAG_DISPOSE )
321 ROM_LOAD( "921a01", 0x000000, 0x20000, 0xbbd8242d ) /* 8x8 tiles */
322
323 ROM_REGION( 0x200000, REGION_GFX2 | REGIONFLAG_DISPOSE )
324 ROM_LOAD( "921a04", 0x000000, 0x200000, 0x4002e4bb ) /* 16x16 tiles */
325
326 ROM_REGION( 0x200000, REGION_GFX3 | REGIONFLAG_DISPOSE )
327 ROM_LOAD( "921a07", 0x000000, 0x200000, 0x7d2bf112 ) /* Sprites */
328
329 ROM_REGION( 0x80000, REGION_SOUND1 ) /* 512Kb for ADPCM sounds - sound chip is OKIM6295 */
330 ROM_LOAD( "921a05", 0x000000, 0x80000, 0xd5a1eddd )
331
332 ROM_REGION( 0x80000, REGION_SOUND2 ) /* 512Kb for ADPCM sounds - sound chip is OKIM6295 */
333 ROM_LOAD( "921a06", 0x000000, 0x80000, 0x89461d0f )
334 ROM_END
335
336
337
338
339
340
decode_byte(unsigned char src,unsigned char * bitp)341 static unsigned char decode_byte(unsigned char src, unsigned char *bitp)
342 {
343 unsigned char ret, i;
344
345 ret = 0;
346 for (i=0; i<8; i++)
347 ret |= (((src >> bitp[i]) & 1) << (7-i));
348
349 return ret;
350 }
351
macross_address_map_bg0(unsigned long addr)352 unsigned long macross_address_map_bg0(unsigned long addr)
353 {
354 return ((addr&0x00004)>> 2) | ((addr&0x00800)>> 10) | ((addr&0x40000)>>16);
355 }
356
357
decode_word(unsigned short src,unsigned char * bitp)358 static unsigned short decode_word(unsigned short src, unsigned char *bitp)
359 {
360 unsigned short ret, i;
361
362 ret=0;
363 for (i=0; i<16; i++)
364 ret |= (((src >> bitp[i]) & 1) << (15-i));
365
366 return ret;
367 }
368
369
macross_address_map_sprites(unsigned long addr)370 unsigned long macross_address_map_sprites(unsigned long addr)
371 {
372 return ((addr&0x00010)>> 4) | ((addr&0x20000)>>16) | ((addr&0x100000)>>18);
373 }
374
375
init_macross(void)376 void init_macross(void)
377 {
378 /* GFX are scrambled. We decode them here. (BIG Thanks to Antiriad for descrambling info) */
379 unsigned char *rom;
380
381 static unsigned char decode_data_bg[8][8] =
382 {
383 {0x3,0x0,0x7,0x2,0x5,0x1,0x4,0x6},
384 {0x1,0x2,0x6,0x5,0x4,0x0,0x3,0x7},
385 {0x7,0x6,0x5,0x4,0x3,0x2,0x1,0x0},
386 {0x7,0x6,0x5,0x0,0x1,0x4,0x3,0x2},
387 {0x2,0x0,0x1,0x4,0x3,0x5,0x7,0x6},
388 {0x5,0x3,0x7,0x0,0x4,0x6,0x2,0x1},
389 {0x2,0x7,0x0,0x6,0x5,0x3,0x1,0x4},
390 {0x3,0x4,0x7,0x6,0x2,0x0,0x5,0x1},
391 };
392
393 static unsigned char decode_data_sprite[8][16] =
394 {
395 {0x9,0x3,0x4,0x5,0x7,0x1,0xB,0x8,0x0,0xD,0x2,0xC,0xE,0x6,0xF,0xA},
396 {0x1,0x3,0xC,0x4,0x0,0xF,0xB,0xA,0x8,0x5,0xE,0x6,0xD,0x2,0x7,0x9},
397 {0xF,0xE,0xD,0xC,0xB,0xA,0x9,0x8,0x7,0x6,0x5,0x4,0x3,0x2,0x1,0x0},
398 {0xF,0xE,0xC,0x6,0xA,0xB,0x7,0x8,0x9,0x2,0x3,0x4,0x5,0xD,0x1,0x0},
399
400 {0x1,0x6,0x2,0x5,0xF,0x7,0xB,0x9,0xA,0x3,0xD,0xE,0xC,0x4,0x0,0x8}, /* Haze 20/07/00 */
401 {0x7,0x5,0xD,0xE,0xB,0xA,0x0,0x1,0x9,0x6,0xC,0x2,0x3,0x4,0x8,0xF}, /* Haze 20/07/00 */
402 {0x0,0x5,0x6,0x3,0x9,0xB,0xA,0x7,0x1,0xD,0x2,0xE,0x4,0xC,0x8,0xF}, /* Antiriad, Corrected by Haze 20/07/00 */
403 {0x9,0xC,0x4,0x2,0xF,0x0,0xB,0x8,0xA,0xD,0x3,0x6,0x5,0xE,0x1,0x7}, /* Antiriad, Corrected by Haze 20/07/00 */
404 };
405
406
407 int A;
408
409
410 /* background */
411 rom = memory_region(REGION_GFX2);
412 for (A = 0;A < memory_region_length(REGION_GFX2);A++)
413 {
414 rom[A] = decode_byte( rom[A], decode_data_bg[macross_address_map_bg0(A)]);
415 }
416
417 /* sprites */
418 rom = memory_region(REGION_GFX3);
419 for (A = 0;A < memory_region_length(REGION_GFX3);A += 2)
420 {
421 unsigned short tmp = decode_word( rom[A]*256 + rom[A+1], decode_data_sprite[macross_address_map_sprites(A)]);
422 rom[A] = tmp >> 8;
423 rom[A+1] = tmp & 0xff;
424 }
425 }
426
427
428
429
430 GAME( 1992, macross, 0, macross, macross, macross, ROT270, "NMK + Big West", "Macross" )
431