1 #include "../machine/phozon.c" 2 #include "../vidhrdw/phozon.c" 3 4 /*************************************************************************** 5 6 Phozon (Namco 1983) 7 8 Manuel Abadia (emumanu@hotmail.com) 9 10 Phozon Memory Map (preliminary) 11 12 CPU #1: (MAIN CPU) 13 0000-03ff video RAM 14 0400-07ff color RAM 15 0800-1fff shared RAM with CPU #2 16 4040-43ff shared RAM with CPU #3 17 4800-480f custom IO chip #1 18 4810-481f custom IO chip #2 19 5000-5009 ??? 20 500a-500b CPU #3 enable 21 500c-500d CPU #2 enable 22 500e-500f ??? 23 7000 watchdog reset 24 8000-9fff ROM 25 a000-bfff ROM 26 c000-dfff ROM 27 e000-ffff ROM 28 29 CPU #2: (SUB CPU) 30 0000-03ff video RAM (shared with CPU #1) 31 0400-07ff color RAM (shared with CPU #1) 32 0800-1fff shared RAM with CPU #1 33 a000-a7ff RAM 34 e000-ffff ROM 35 36 CPU #3: (SOUND CPU) 37 0000-0040 sound registers 38 0040-03ff shared RAM with CPU #1 39 e000-ffff ROM 40 41 TODO: cocktail mode 42 43 ***************************************************************************/ 44 45 #include "driver.h" 46 #include "vidhrdw/generic.h" 47 48 extern unsigned char *phozon_snd_sharedram; 49 extern unsigned char *phozon_spriteram; 50 extern unsigned char *phozon_customio_1, *phozon_customio_2; 51 extern unsigned char *mappy_soundregs; 52 53 /* memory functions */ 54 READ_HANDLER( phozon_spriteram_r ); 55 READ_HANDLER( phozon_snd_sharedram_r ); 56 WRITE_HANDLER( phozon_spriteram_w ); 57 WRITE_HANDLER( phozon_snd_sharedram_w ); 58 59 /* custom IO chips & CPU functions */ 60 READ_HANDLER( phozon_customio_1_r ); 61 READ_HANDLER( phozon_customio_2_r ); 62 WRITE_HANDLER( phozon_customio_1_w ); 63 WRITE_HANDLER( phozon_customio_2_w ); 64 WRITE_HANDLER( phozon_cpu2_enable_w ); 65 WRITE_HANDLER( phozon_cpu3_enable_w ); 66 WRITE_HANDLER( phozon_cpu3_reset_w ); 67 extern void phozon_init_machine(void); 68 69 /* video functions */ 70 extern int phozon_vh_start( void ); 71 extern void phozon_vh_stop( void ); 72 extern void phozon_vh_convert_color_prom(unsigned char *palette, unsigned short *colortable,const unsigned char *color_prom); 73 extern void phozon_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh); 74 75 /* CPU 1 (MAIN CPU) read addresses */ 76 static struct MemoryReadAddress readmem_cpu1[] = 77 { 78 { 0x0000, 0x03ff, videoram_r }, /* video RAM */ 79 { 0x0400, 0x07ff, colorram_r }, /* color RAM */ 80 { 0x0800, 0x1fff, phozon_spriteram_r }, /* shared RAM with CPU #2/sprite RAM*/ 81 { 0x4040, 0x43ff, phozon_snd_sharedram_r }, /* shared RAM with CPU #3 */ 82 { 0x4800, 0x480f, phozon_customio_1_r }, /* custom I/O chip #1 interface */ 83 { 0x4810, 0x481f, phozon_customio_2_r }, /* custom I/O chip #2 interface */ 84 { 0x8000, 0xffff, MRA_ROM }, /* ROM */ 85 { -1 } /* end of table */ 86 }; 87 88 /* CPU 1 (MAIN CPU) write addresses */ 89 static struct MemoryWriteAddress writemem_cpu1[] = 90 { 91 { 0x0000, 0x03ff, videoram_w, &videoram, &videoram_size }, /* video RAM */ 92 { 0x0400, 0x07ff, colorram_w, &colorram }, /* color RAM */ 93 { 0x0800, 0x1fff, phozon_spriteram_w, &phozon_spriteram }, /* shared RAM with CPU #2/sprite RAM*/ 94 { 0x4000, 0x403f, MWA_RAM }, /* initialized but probably unused */ 95 { 0x4040, 0x43ff, phozon_snd_sharedram_w, &phozon_snd_sharedram }, /* shared RAM with CPU #3 */ 96 { 0x4800, 0x480f, phozon_customio_1_w, &phozon_customio_1 }, /* custom I/O chip #1 interface */ 97 { 0x4810, 0x481f, phozon_customio_2_w, &phozon_customio_2 }, /* custom I/O chip #2 interface */ 98 { 0x4820, 0x483f, MWA_RAM }, /* initialized but probably unused */ 99 { 0x5000, 0x5007, MWA_NOP }, /* ??? */ 100 { 0x5008, 0x5008, phozon_cpu3_reset_w }, /* reset SOUND CPU? */ 101 { 0x5009, 0x5009, MWA_NOP }, /* ??? */ 102 { 0x500a, 0x500b, phozon_cpu3_enable_w }, /* SOUND CPU enable */ 103 { 0x500c, 0x500d, phozon_cpu2_enable_w }, /* SUB CPU enable */ 104 { 0x500e, 0x500f, MWA_NOP }, /* ??? */ 105 { 0x7000, 0x7000, watchdog_reset_w }, /* watchdog reset */ 106 { 0x8000, 0xffff, MWA_ROM }, /* ROM */ 107 { -1 } /* end of table */ 108 }; 109 110 /* CPU 2 (SUB CPU) read addresses */ 111 static struct MemoryReadAddress readmem_cpu2[] = 112 { 113 { 0x0000, 0x03ff, videoram_r }, /* video RAM */ 114 { 0x0400, 0x07ff, colorram_r }, /* color RAM */ 115 { 0x0800, 0x1fff, phozon_spriteram_r }, /* shared RAM with CPU #1/sprite RAM*/ 116 { 0xa000, 0xa7ff, MRA_RAM }, /* RAM */ 117 { 0xe000, 0xffff, MRA_ROM }, /* ROM */ 118 { -1 } /* end of table */ 119 }; 120 121 /* CPU 2 (SUB CPU) write addresses */ 122 static struct MemoryWriteAddress writemem_cpu2[] = 123 { 124 { 0x0000, 0x03ff, videoram_w }, /* video RAM */ 125 { 0x0400, 0x07ff, colorram_w }, /* color RAM */ 126 { 0x0800, 0x1fff, phozon_spriteram_w }, /* shared RAM with CPU #1/sprite RAM*/ 127 { 0xa000, 0xa7ff, MWA_RAM }, /* RAM */ 128 { 0xe000, 0xffff, MWA_ROM }, /* ROM */ 129 { -1 } /* end of table */ 130 }; 131 132 /* CPU 3 (SOUND CPU) read addresses */ 133 static struct MemoryReadAddress readmem_cpu3[] = 134 { 135 { 0x0000, 0x003f, MRA_RAM }, /* sound registers */ 136 { 0x0040, 0x03ff, phozon_snd_sharedram_r }, /* shared RAM with CPU #1 */ 137 { 0xe000, 0xffff, MRA_ROM }, /* ROM */ 138 { -1 } /* end of table */ 139 }; 140 141 /* CPU 3 (SOUND CPU) write addresses */ 142 static struct MemoryWriteAddress writemem_cpu3[] = 143 { 144 { 0x0000, 0x003f, mappy_sound_w, &mappy_soundregs },/* sound registers */ 145 { 0x0040, 0x03ff, phozon_snd_sharedram_w }, /* shared RAM with the main CPU */ 146 { 0xe000, 0xffff, MWA_ROM }, /* ROM */ 147 { -1 } /* end of table */ 148 }; 149 150 /* The dipswitches and player inputs are not memory mapped, they are handled by an I/O chip. */ 151 INPUT_PORTS_START( phozon ) 152 PORT_START /* DSW0 */ 153 PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_A ) ) 154 PORT_DIPSETTING( 0x07, DEF_STR( 3C_1C ) ) 155 PORT_DIPSETTING( 0x05, DEF_STR( 2C_1C ) ) 156 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) 157 PORT_DIPSETTING( 0x06, DEF_STR( 2C_3C ) ) 158 PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) ) 159 PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) ) 160 PORT_DIPSETTING( 0x03, DEF_STR( 1C_6C ) ) 161 PORT_DIPSETTING( 0x04, DEF_STR( 1C_7C ) ) 162 PORT_DIPNAME( 0x18, 0x00, DEF_STR( Lives ) ) 163 PORT_DIPSETTING( 0x10, "1" ) 164 PORT_DIPSETTING( 0x00, "3" ) 165 PORT_DIPSETTING( 0x08, "4" ) 166 PORT_DIPSETTING( 0x18, "5" ) 167 PORT_DIPNAME( 0x60, 0x00, DEF_STR( Coin_B ) ) 168 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) ) 169 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) 170 PORT_DIPSETTING( 0x60, DEF_STR( 2C_3C ) ) 171 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) ) 172 173 PORT_START /* DSW1 */ 174 PORT_DIPNAME( 0x07, 0x00, DEF_STR( Difficulty ) ) 175 PORT_DIPSETTING( 0x00, "0" ) 176 PORT_DIPSETTING( 0x01, "1" ) 177 PORT_DIPSETTING( 0x02, "2" ) 178 PORT_DIPSETTING( 0x03, "3" ) 179 PORT_DIPSETTING( 0x04, "4" ) 180 PORT_DIPSETTING( 0x05, "5" ) 181 PORT_DIPSETTING( 0x06, "6" ) 182 PORT_DIPSETTING( 0x07, "7" ) 183 PORT_SERVICE( 0x08, IP_ACTIVE_HIGH ) 184 /* Todo: those are different for 4 and 5 lives */ 185 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Bonus_Life ) ) 186 PORT_DIPSETTING( 0xc0, "20k 80k" ) 187 PORT_DIPSETTING( 0x40, "30k 60k" ) 188 PORT_DIPSETTING( 0x80, "30k 120k and every 120k" ) 189 PORT_DIPSETTING( 0x00, "30k 100k" ) 190 191 PORT_START /* IN0 */ 192 PORT_BIT_IMPULSE( 0x01, IP_ACTIVE_HIGH, IPT_START1, 1 ) 193 PORT_BIT_IMPULSE( 0x02, IP_ACTIVE_HIGH, IPT_START2, 1 ) 194 PORT_BIT_IMPULSE( 0x10, IP_ACTIVE_HIGH, IPT_COIN1, 1 ) 195 PORT_BIT_IMPULSE( 0x20, IP_ACTIVE_HIGH, IPT_COIN2, 1 ) 196 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) 197 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) 198 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) ) 199 PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) ) 200 201 PORT_START /* IN1 */ 202 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_8WAY ) 203 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_8WAY ) 204 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_8WAY ) 205 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_8WAY ) 206 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 ) 207 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 ) 208 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 ) 209 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 ) 210 211 PORT_START /* IN2 */ 212 PORT_BIT_IMPULSE( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1, 1 ) 213 PORT_BITX( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1, 0, IP_KEY_PREVIOUS, IP_JOY_PREVIOUS ) 214 PORT_BIT_IMPULSE( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 | IPF_PLAYER2, 1 ) 215 PORT_BITX( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON1 | IPF_PLAYER2, 0, IP_KEY_PREVIOUS, IP_JOY_PREVIOUS ) 216 INPUT_PORTS_END 217 218 static struct GfxLayout charlayout = 219 { 220 8,8, /* 8*8 characters */ 221 256, /* 256 characters */ 222 2, /* 2 bits per pixel */ 223 { 0, 4 }, 224 { 8*8+0, 8*8+1, 8*8+2, 8*8+3, 0, 1, 2, 3 }, /* bits are packed in groups of four */ 225 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, /* characters are rotated 90 degrees */ 226 16*8 /* every char takes 16 bytes */ 227 }; 228 229 static struct GfxLayout spritelayout = 230 { 231 16,16, /* 16*16 sprites */ 232 128, /* 128 sprites */ 233 2, /* 2 bits per pixel */ 234 { 0, 4 }, 235 { 0, 1, 2, 3, 8*8, 8*8+1, 8*8+2, 8*8+3, 236 16*8+0, 16*8+1, 16*8+2, 16*8+3, 24*8+0, 24*8+1, 24*8+2, 24*8+3 }, 237 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 238 32*8, 33*8, 34*8, 35*8, 36*8, 37*8, 38*8, 39*8 }, 239 64*8 /* every sprite takes 64 bytes */ 240 }; 241 242 static struct GfxLayout spritelayout8 = 243 { 244 8,8, /* 16*16 sprites */ 245 512, /* 128 sprites */ 246 2, /* 2 bits per pixel */ 247 { 0, 4 }, 248 { 0, 1, 2, 3, 8*8, 8*8+1, 8*8+2, 8*8+3 }, 249 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, 250 16*8 /* every sprite takes 64 bytes */ 251 }; 252 253 static struct GfxDecodeInfo gfxdecodeinfo[] = 254 { 255 { REGION_GFX1, 0, &charlayout, 0, 64 }, 256 { REGION_GFX2, 0, &charlayout, 0, 64 }, 257 { REGION_GFX3, 0, &spritelayout, 64*4, 64 }, 258 { REGION_GFX3, 0, &spritelayout8, 64*4, 64 }, 259 { -1 } /* end of table */ 260 }; 261 262 static struct namco_interface namco_interface = 263 { 264 23920, /* sample rate (approximate value) */ 265 8, /* number of voices */ 266 100, /* playback volume */ 267 REGION_SOUND1 /* memory region */ 268 }; 269 270 static struct MachineDriver machine_driver_phozon = 271 { 272 /* basic machine hardware */ 273 { 274 { 275 CPU_M6809, /* MAIN CPU */ 276 1536000, /* same as Gaplus? */ 277 readmem_cpu1,writemem_cpu1,0,0, 278 interrupt,1 279 }, 280 { 281 CPU_M6809, /* SUB CPU */ 282 1536000, /* same as Gaplus? */ 283 readmem_cpu2,writemem_cpu2,0,0, 284 interrupt,1 285 }, 286 { 287 CPU_M6809, /* SOUND CPU */ 288 1536000, /* same as Gaplus? */ 289 readmem_cpu3,writemem_cpu3,0,0, 290 interrupt,1 291 }, 292 }, 293 60, DEFAULT_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */ 294 100, /* a high value to ensure proper synchronization of the CPUs */ 295 phozon_init_machine, /* init machine routine */ 296 297 /* video hardware */ 298 36*8, 28*8, { 0*8, 36*8-1, 0*8, 28*8-1 }, 299 gfxdecodeinfo, 300 256, 301 64*4+64*8, 302 phozon_vh_convert_color_prom, 303 VIDEO_TYPE_RASTER, 304 0, 305 phozon_vh_start, 306 phozon_vh_stop, 307 phozon_vh_screenrefresh, 308 309 /* sound hardware */ 310 0,0,0,0, 311 { 312 { 313 SOUND_NAMCO, 314 &namco_interface 315 } 316 } 317 }; 318 319 320 321 ROM_START( phozon ) 322 ROM_REGION( 0x10000, REGION_CPU1 ) /* 64k for code for the MAIN CPU */ 323 ROM_LOAD( "6e.rom", 0x8000, 0x2000, 0xa6686af1 ) 324 ROM_LOAD( "6h.rom", 0xa000, 0x2000, 0x72a65ba0 ) 325 ROM_LOAD( "6c.rom", 0xc000, 0x2000, 0xf1fda22e ) 326 ROM_LOAD( "6d.rom", 0xe000, 0x2000, 0xf40e6df0 ) 327 328 ROM_REGION( 0x10000, REGION_CPU2 ) /* 64k for the SUB CPU */ 329 ROM_LOAD( "9r.rom", 0xe000, 0x2000, 0x5d9f0a28 ) 330 331 ROM_REGION( 0x10000, REGION_CPU3 ) /* 64k for the SOUND CPU */ 332 ROM_LOAD( "3b.rom", 0xe000, 0x2000, 0x5a4b3a79 ) 333 334 ROM_REGION( 0x1000, REGION_GFX1 | REGIONFLAG_DISPOSE ) 335 ROM_LOAD( "7j.rom", 0x0000, 0x1000, 0x27f9db5b ) /* characters (set 1) */ 336 337 ROM_REGION( 0x1000, REGION_GFX2 | REGIONFLAG_DISPOSE ) 338 ROM_LOAD( "8j.rom", 0x0000, 0x1000, 0x15b12ef8 ) /* characters (set 2) */ 339 340 ROM_REGION( 0x2000, REGION_GFX3 | REGIONFLAG_DISPOSE ) 341 ROM_LOAD( "5t.rom", 0x0000, 0x2000, 0xd50f08f8 ) /* sprites */ 342 343 ROM_REGION( 0x0520, REGION_PROMS ) 344 ROM_LOAD( "red.prm", 0x0000, 0x0100, 0xa2880667 ) /* red palette ROM (4 bits) */ 345 ROM_LOAD( "green.prm", 0x0100, 0x0100, 0xd6e08bef ) /* green palette ROM (4 bits) */ 346 ROM_LOAD( "blue.prm", 0x0200, 0x0100, 0xb2d69c72 ) /* blue palette ROM (4 bits) */ 347 ROM_LOAD( "chr.prm", 0x0300, 0x0100, 0x429e8fee ) /* characters */ 348 ROM_LOAD( "sprite.prm", 0x0400, 0x0100, 0x9061db07 ) /* sprites */ 349 ROM_LOAD( "palette.prm", 0x0500, 0x0020, 0x60e856ed ) /* palette (unused?) */ 350 351 ROM_REGION( 0x0100, REGION_SOUND1 ) /* sound PROMs */ 352 ROM_LOAD( "sound.prm", 0x0000, 0x0100, 0xad43688f ) 353 ROM_END 354 355 356 357 GAMEX( 1983, phozon, 0, phozon, phozon, 0, ROT90, "Namco", "Phozon", GAME_NO_COCKTAIL ) 358