1 #include "../vidhrdw/stadhero.c"
2
3 /***************************************************************************
4
5 Stadium Hero (Japan) (c) 1988 Data East Corporation
6
7 Emulation by Bryan McPhail, mish@tendril.co.uk
8
9 ***************************************************************************/
10
11 #include "driver.h"
12 #include "vidhrdw/generic.h"
13 #include "cpu/m6502/m6502.h"
14
15 /* Video emulation definitions */
16 int stadhero_vh_start(void);
17 void stadhero_vh_stop(void);
18 void stadhero_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
19
20 extern unsigned char *stadhero_pf1_data,*stadhero_pf2_data;
21
22 WRITE_HANDLER( stadhero_pf1_data_w );
23 READ_HANDLER( stadhero_pf1_data_r );
24 WRITE_HANDLER( stadhero_pf2_control_0_w );
25 WRITE_HANDLER( stadhero_pf2_control_1_w );
26 WRITE_HANDLER( stadhero_pf2_data_w );
27 READ_HANDLER( stadhero_pf2_data_r );
28
29 /******************************************************************************/
30
READ_HANDLER(stadhero_control_r)31 static READ_HANDLER( stadhero_control_r )
32 {
33 switch (offset)
34 {
35 case 0: /* Player 1 & 2 joystick & buttons */
36 return (readinputport(0) + (readinputport(1) << 8));
37
38 case 2: /* Credits, start buttons */
39 return readinputport(2) | (readinputport(2)<<8);
40
41 case 4: /* Byte 4: Dipswitch bank 2, Byte 5: Dipswitch Bank 1 */
42 return (readinputport(3) + (readinputport(4) << 8));
43 }
44
45 //logerror("CPU #0 PC %06x: warning - read unmapped memory address %06x\n",cpu_get_pc(),0x30c000+offset);
46 return 0xffff;
47 }
48
WRITE_HANDLER(stadhero_control_w)49 static WRITE_HANDLER( stadhero_control_w )
50 {
51 switch (offset)
52 {
53 case 4: /* Interrupt ack (VBL - IRQ 5) */
54 break;
55 case 6: /* 6502 sound cpu */
56 soundlatch_w(0,data & 0xff);
57 cpu_cause_interrupt(1,M6502_INT_NMI);
58 break;
59 default:
60 //logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(),data,0x30c010+offset);
61 break;
62 }
63 }
64
WRITE_HANDLER(spriteram_mirror_w)65 static WRITE_HANDLER( spriteram_mirror_w )
66 {
67 WRITE_WORD(&spriteram[offset],data);
68 }
69
70 /******************************************************************************/
71
72 static struct MemoryReadAddress stadhero_readmem[] =
73 {
74 { 0x000000, 0x01ffff, MRA_ROM },
75 { 0x200000, 0x2007ff, stadhero_pf1_data_r },
76 { 0x260000, 0x261fff, stadhero_pf2_data_r },
77 { 0x30c000, 0x30c00b, stadhero_control_r },
78 { 0x310000, 0x3107ff, paletteram_word_r },
79 { 0xff8000, 0xffbfff, MRA_BANK1 }, /* Main ram */
80 { 0xffc000, 0xffc7ff, MRA_BANK2 }, /* Sprites */
81 { -1 } /* end of table */
82 };
83
84 static struct MemoryWriteAddress stadhero_writemem[] =
85 {
86 { 0x000000, 0x01ffff, MWA_ROM },
87 { 0x200000, 0x2007ff, stadhero_pf1_data_w, &stadhero_pf1_data },
88 { 0x240000, 0x240007, stadhero_pf2_control_0_w },
89 { 0x240010, 0x240017, stadhero_pf2_control_1_w },
90 { 0x260000, 0x261fff, stadhero_pf2_data_w, &stadhero_pf2_data },
91 { 0x30c000, 0x30c00b, stadhero_control_w },
92 { 0x310000, 0x3107ff, paletteram_xxxxBBBBGGGGRRRR_word_w, &paletteram },
93 { 0xff8000, 0xffbfff, MWA_BANK1 },
94 { 0xffc000, 0xffc7ff, MWA_BANK2, &spriteram },
95 { 0xffc800, 0xffcfff, spriteram_mirror_w },
96 { -1 } /* end of table */
97 };
98
99 /******************************************************************************/
100
WRITE_HANDLER(YM3812_w)101 static WRITE_HANDLER( YM3812_w )
102 {
103 switch (offset) {
104 case 0:
105 YM3812_control_port_0_w(0,data);
106 break;
107 case 1:
108 YM3812_write_port_0_w(0,data);
109 break;
110 }
111 }
112
WRITE_HANDLER(YM2203_w)113 static WRITE_HANDLER( YM2203_w )
114 {
115 switch (offset) {
116 case 0:
117 YM2203_control_port_0_w(0,data);
118 break;
119 case 1:
120 YM2203_write_port_0_w(0,data);
121 break;
122 }
123 }
124
125 static struct MemoryReadAddress stadhero_s_readmem[] =
126 {
127 { 0x0000, 0x05ff, MRA_RAM },
128 { 0x3000, 0x3000, soundlatch_r },
129 { 0x3800, 0x3800, OKIM6295_status_0_r },
130 { 0x8000, 0xffff, MRA_ROM },
131 { -1 } /* end of table */
132 };
133
134 static struct MemoryWriteAddress stadhero_s_writemem[] =
135 {
136 { 0x0000, 0x05ff, MWA_RAM },
137 { 0x0800, 0x0801, YM2203_w },
138 { 0x1000, 0x1001, YM3812_w },
139 { 0x3800, 0x3800, OKIM6295_data_0_w },
140 { 0x8000, 0xffff, MWA_ROM },
141 { -1 } /* end of table */
142 };
143
144 /******************************************************************************/
145
146 INPUT_PORTS_START( stadhero )
147 PORT_START /* Player 1 controls */
148 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
149 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
150 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
151 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
152 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
153 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
154 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 )
155 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
156
157 PORT_START /* Player 2 controls */
158 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
159 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
160 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
161 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
162 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
163 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
164 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2 )
165 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
166
167 PORT_START /* Credits, start buttons */
168 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
169 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
170 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
171 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
172 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
173 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
174 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN3 ) /* Service */
175 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
176
177 PORT_START /* Dip switch bank 1 */
178 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) )
179 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
180 PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
181 PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
182 PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
183 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) )
184 PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
185 PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
186 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
187 PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
188 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
189 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
190 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
191 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
192 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
193 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
194 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
195 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
196 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
197 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
198 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
199 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
200
201 PORT_START /* Dip switch bank 2 */
202 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
203 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
204 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
205 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
206 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
207 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
208 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
209 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
210 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
211 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
212 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
213 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
214 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
215 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
216 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
217 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
218 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
219 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
220 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
221 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
222 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
223 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
224 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
225 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
226 INPUT_PORTS_END
227
228 /******************************************************************************/
229
230 static struct GfxLayout charlayout =
231 {
232 8,8, /* 8*8 chars */
233 4096,
234 3, /* 4 bits per pixel */
235 { 0x00000*8,0x8000*8,0x10000*8 },
236 { 0, 1, 2, 3, 4, 5, 6, 7 },
237 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
238 8*8 /* every char takes 8 consecutive bytes */
239 };
240
241 static struct GfxLayout tile_3bpp =
242 {
243 16,16,
244 2048,
245 3,
246 { 0x20000*8, 0x10000*8, 0x00000*8 },
247 { 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7,
248 0, 1, 2, 3, 4, 5, 6, 7 },
249 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
250 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
251 16*16
252 };
253
254 static struct GfxLayout spritelayout =
255 {
256 16,16,
257 4096,
258 4,
259 { 0x60000*8,0x40000*8,0x20000*8,0x00000*8 },
260 { 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7,
261 0, 1, 2, 3, 4, 5, 6, 7 },
262 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
263 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
264 16*16
265 };
266
267 static struct GfxDecodeInfo gfxdecodeinfo[] =
268 {
269 { REGION_GFX1, 0, &charlayout, 0, 16 }, /* Characters 8x8 */
270 { REGION_GFX2, 0, &tile_3bpp, 512, 16 }, /* Tiles 16x16 */
271 { REGION_GFX3, 0, &spritelayout, 256, 16 }, /* Sprites 16x16 */
272 { -1 } /* end of array */
273 };
274
275 /******************************************************************************/
276
irqhandler(int linestate)277 static void irqhandler(int linestate)
278 {
279 cpu_set_irq_line(1,0,linestate);
280 }
281
282 static struct YM2203interface ym2203_interface =
283 {
284 1,
285 1500000, /* 12MHz clock divided by 8 = 1.50 MHz */
286 { YM2203_VOL(40,95) },
287 { 0 },
288 { 0 },
289 { 0 },
290 { 0 }
291 };
292
293 static struct YM3812interface ym3812_interface =
294 {
295 1, /* 1 chip */
296 3000000, /* 3 MHz (12MHz/4) */
297 { 40 },
298 { irqhandler },
299 };
300
301 static struct OKIM6295interface okim6295_interface =
302 {
303 1, /* 1 chip */
304 { 7757 }, /* 8000Hz frequency */
305 { REGION_SOUND1 }, /* memory region 3 */
306 { 80 }
307 };
308
309 /******************************************************************************/
310
311 static struct MachineDriver machine_driver_stadhero =
312 {
313 /* basic machine hardware */
314 {
315 {
316 CPU_M68000,
317 10000000,
318 stadhero_readmem,stadhero_writemem,0,0,
319 m68_level5_irq,1 /* VBL */
320 },
321 {
322 CPU_M6502 | CPU_AUDIO_CPU,
323 1500000,
324 stadhero_s_readmem,stadhero_s_writemem,0,0,
325 ignore_interrupt,0
326 }
327 },
328 58, 529,
329 1, /* 1 CPU slice per frame - interleaving is forced when a sound command is written */
330 0,
331
332 /* video hardware */
333 32*8, 32*8, { 0*8, 32*8-1, 1*8, 31*8-1 },
334
335 gfxdecodeinfo,
336 1024, 1024,
337 0,
338
339 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE,
340 0,
341 stadhero_vh_start,
342 stadhero_vh_stop,
343 stadhero_vh_screenrefresh,
344
345 /* sound hardware */
346 0,0,0,0,
347 {
348 {
349 SOUND_YM2203,
350 &ym2203_interface
351 },
352 {
353 SOUND_YM3812,
354 &ym3812_interface
355 },
356 {
357 SOUND_OKIM6295,
358 &okim6295_interface
359 }
360 }
361 };
362
363 /******************************************************************************/
364
365 ROM_START( stadhero )
366 ROM_REGION( 0x20000, REGION_CPU1 ) /* 6*64k for 68000 code */
367 ROM_LOAD_EVEN( "ef15.bin", 0x00000, 0x10000, 0xbbba364e )
368 ROM_LOAD_ODD ( "ef13.bin", 0x00000, 0x10000, 0x97c6717a )
369
370 ROM_REGION( 0x10000, REGION_CPU2 ) /* 6502 Sound */
371 ROM_LOAD( "ef18.bin", 0x8000, 0x8000, 0x20fd9668 )
372
373 ROM_REGION( 0x18000, REGION_GFX1 | REGIONFLAG_DISPOSE )
374 ROM_LOAD( "ef08.bin", 0x000000, 0x10000, 0xe84752fe ) /* chars */
375 ROM_LOAD( "ef09.bin", 0x010000, 0x08000, 0x2ade874d )
376
377 ROM_REGION( 0x30000, REGION_GFX2 | REGIONFLAG_DISPOSE )
378 ROM_LOAD( "ef10.bin", 0x000000, 0x10000, 0xdca3d599 ) /* tiles */
379 ROM_LOAD( "ef11.bin", 0x010000, 0x10000, 0xaf563e96 )
380 ROM_LOAD( "ef12.bin", 0x020000, 0x10000, 0x9a1bf51c )
381
382 ROM_REGION( 0x80000, REGION_GFX3 | REGIONFLAG_DISPOSE )
383 ROM_LOAD( "ef00.bin", 0x000000, 0x10000, 0x94ed257c ) /* sprites */
384 ROM_LOAD( "ef01.bin", 0x010000, 0x10000, 0x6eb9a721 )
385 ROM_LOAD( "ef02.bin", 0x020000, 0x10000, 0x850cb771 )
386 ROM_LOAD( "ef03.bin", 0x030000, 0x10000, 0x24338b96 )
387 ROM_LOAD( "ef04.bin", 0x040000, 0x10000, 0x9e3d97a7 )
388 ROM_LOAD( "ef05.bin", 0x050000, 0x10000, 0x88631005 )
389 ROM_LOAD( "ef06.bin", 0x060000, 0x10000, 0x9f47848f )
390 ROM_LOAD( "ef07.bin", 0x070000, 0x10000, 0x8859f655 )
391
392 ROM_REGION( 0x10000, REGION_SOUND1 ) /* ADPCM samples */
393 ROM_LOAD( "ef17.bin", 0x0000, 0x10000, 0x07c78358 )
394 ROM_END
395
396 /******************************************************************************/
397
398 GAME( 1988, stadhero, 0, stadhero, stadhero, 0, ROT0, "Data East Corporation", "Stadium Hero (Japan)" )
399