1 #include "../vidhrdw/tutankhm.c"
2
3 /***************************************************************************
4
5 Tutankham : memory map (preliminary)
6
7 driver by Mirko Buffoni
8
9 I include here the document based on Rob Jarrett's research because it's
10 really exaustive.
11
12
13
14 Tutankham Emu Info
15 ------------------
16
17 By Rob Jarrett
18 robj@astound.com (until June 20, 1997)
19 or robncait@inforamp.net
20
21 Special thanks go to Pete Custerson for the schematics!!
22
23
24 I've recently been working on an emulator for Tutankham. Unfortunately,
25 time and resources are not on my side so I'd like to provide anyone with
26 the technical information I've gathered so far, that way someone can
27 finish the project.
28
29 First of all, I'd like to say that I've had no prior experience in
30 writing an emulator, and my hardware knowledge is weak. I've managed to
31 find out a fair amount by looking at the schematics of the game and the
32 disassembled ROMs. Using the USim C++ 6809 core I have the game sort of
33 up and running, albeit in a pathetic state. It's not playable, and
34 crashes after a short amount of time. I don't feel the source code is
35 worth releasing because of the bad design; I was using it as a testing
36 bed and anticipated rewriting everything in the future.
37
38 Here's all the info I know about Tutankham:
39
40 Processor: 6809
41 Sound: Z80 slave w/2 AY3910 sound chips
42 Graphics: Bitmapped display, no sprites (!)
43 Memory Map:
44
45 Address R/W Bits Function
46 ------------------------------------------------------------------------------------------------------
47 $0000-$7fff Video RAM
48 - Screen is stored sideways, 256x256 pixels
49 - 1 byte=2 pixels
50 R/W aaaaxxxx - leftmost pixel palette index
51 R/W xxxxbbbb - rightmost pixel palette index
52 - **** not correct **** Looks like some of this memory is for I/O state, (I think < $0100)
53 so you might want to blit from $0100-$7fff
54
55 $8000-$800f R/W aaaaaaaa Palette colors
56 - Don't know how to decode them into RGB values
57
58 $8100 W Not sure
59 - Video chip function of some sort
60 ( split screen y pan position -- TT )
61
62 $8120 R Not sure
63 - Read from quite frequently
64 - Some sort of video or interrupt thing?
65 - Or a random number seed?
66 ( watchdog reset -- NS )
67
68 $8160 Dip Switch 2
69 - Inverted bits (ie. 1=off)
70 R xxxxxxxa DSWI1
71 R
72 R .
73 R .
74 R .
75 R
76 R
77 R axxxxxxx DSWI8
78
79 $8180 I/O: Coin slots, service, 1P/2P buttons
80 R
81
82 $81a0 Player 1 I/O
83 R
84
85 $81c0 Player 2 I/O
86 R
87
88 $81e0 Dip Switch 1
89 - Inverted bits
90 R xxxxxxxa DSWI1
91 R
92 R .
93 R .
94 R .
95 R
96 R
97 R axxxxxxx DSWI8
98
99 $8200 IST on schematics
100 - Enable/disable IRQ
101 R/W xxxxxxxa - a=1 IRQ can be fired, a=0 IRQ can't be fired
102
103 $8202 OUT2 (Coin counter)
104 W xxxxxxxa - Increment coin counter
105
106 $8203 OUT1 (Coin counter)
107 W xxxxxxxa - Increment coin counter
108
109 $8204 Not sure - 401 on schematics
110 W
111
112 $8205 MUT on schematics
113 R/W xxxxxxxa - Sound amplification on/off?
114
115 $8206 HFF on schematics
116 W - Don't know what it does
117 ( horizontal screen flip -- NS )
118
119 $8207 Not sure - can't resolve on schematics
120 W
121 ( vertical screen flip -- NS )
122
123 $8300 Graphics bank select
124 W xxxxxaaa - Selects graphics ROM 0-11 that appears at $9000-9fff
125 - But wait! There's only 9 ROMs not 12! I think the PCB allows 12
126 ROMs for patches/mods to the game. Just make 9-11 return 0's
127
128 $8600 W SON on schematics
129 ( trigger interrupt on audio CPU -- NS )
130 $8608 R/W SON on schematics
131 - Sound on/off? i.e. Run/halt Z80 sound CPU?
132
133 $8700 W aaaaaaaa SDA on schematics
134 - Sound data? Maybe Z80 polls here and plays the appropriate sound?
135 - If so, easy to trigger samples here
136
137 $8800-$8fff RAM
138 R/W - Memory for the program ROMs
139
140 $9000-$9fff Graphics ROMs ra1_1i.cpu - ra1_9i.cpu
141 R aaaaaaaa - See address $8300 for usage
142
143 $a000-$afff ROM ra1_1h.cpu
144 R aaaaaaaa - 6809 Code
145
146 $b000-$bfff ROM ra1_2h.cpu
147 R aaaaaaaa - 6809 Code
148
149 $c000-$cfff ROM ra1_3h.cpu
150 R aaaaaaaa - 6809 Code
151
152 $d000-$dfff ROM ra1_4h.cpu
153 R aaaaaaaa - 6809 Code
154
155 $e000-$efff ROM ra1_5h.cpu
156 R aaaaaaaa - 6809 Code
157
158 $f000-$ffff ROM ra1_6h.cpu
159 R aaaaaaaa - 6809 Code
160
161 Programming notes:
162
163 I found that generating an IRQ every 4096 instructions seemed to kinda work. Again, I know
164 little about emu writing and I think some fooling with this number might be needed.
165
166 Sorry I didn't supply the DSW and I/O bits, this info is available elsewhere on the net, I
167 think at tant or something. I just couldn't remember what they were at this writing!!
168
169 If there are any questions at all, please feel free to email me at robj@astound.com (until
170 June 20, 1997) or robncait@inforamp.net.
171
172
173 BTW, this information is completely free - do as you wish with it. I'm not even sure if it's
174 correct! (Most of it seems to be). Giving me some credit if credit is due would be nice,
175 and please let me know about your emulator if you release it.
176
177
178 Sound board: uses the same board as Pooyan.
179
180 ***************************************************************************/
181
182 #include "driver.h"
183 #include "vidhrdw/generic.h"
184 #include "cpu/m6809/m6809.h"
185
186
187
188 extern unsigned char *tutankhm_scrollx;
189
190 WRITE_HANDLER( tutankhm_videoram_w );
191 WRITE_HANDLER( tutankhm_flipscreen_w );
192 void tutankhm_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
193
194 /* defined in sndhrdw/timeplt.c */
195 extern struct MemoryReadAddress timeplt_sound_readmem[];
196 extern struct MemoryWriteAddress timeplt_sound_writemem[];
197 extern struct AY8910interface timeplt_ay8910_interface;
198 WRITE_HANDLER( timeplt_sh_irqtrigger_w );
199
200
WRITE_HANDLER(tutankhm_bankselect_w)201 WRITE_HANDLER( tutankhm_bankselect_w )
202 {
203 int bankaddress;
204 unsigned char *RAM = memory_region(REGION_CPU1);
205
206
207 bankaddress = 0x10000 + (data & 0x0f) * 0x1000;
208 cpu_setbank(1,&RAM[bankaddress]);
209 }
210
211
212 static struct MemoryReadAddress readmem[] =
213 {
214 { 0x0000, 0x7fff, MRA_RAM },
215 { 0x8120, 0x8120, watchdog_reset_r },
216 { 0x8160, 0x8160, input_port_0_r }, /* DSW2 (inverted bits) */
217 { 0x8180, 0x8180, input_port_1_r }, /* IN0 I/O: Coin slots, service, 1P/2P buttons */
218 { 0x81a0, 0x81a0, input_port_2_r }, /* IN1: Player 1 I/O */
219 { 0x81c0, 0x81c0, input_port_3_r }, /* IN2: Player 2 I/O */
220 { 0x81e0, 0x81e0, input_port_4_r }, /* DSW1 (inverted bits) */
221 { 0x8800, 0x8fff, MRA_RAM },
222 { 0x9000, 0x9fff, MRA_BANK1 },
223 { 0xa000, 0xffff, MRA_ROM },
224 { -1 } /* end of table */
225 };
226
227 static struct MemoryWriteAddress writemem[] =
228 {
229 { 0x0000, 0x7fff, tutankhm_videoram_w, &videoram, &videoram_size },
230 { 0x8000, 0x800f, paletteram_BBGGGRRR_w, &paletteram },
231 { 0x8100, 0x8100, MWA_RAM, &tutankhm_scrollx },
232 { 0x8200, 0x8200, interrupt_enable_w },
233 { 0x8202, 0x8203, MWA_RAM }, /* coin counters */
234 { 0x8205, 0x8205, MWA_NOP }, /* ??? */
235 { 0x8206, 0x8207, tutankhm_flipscreen_w },
236 { 0x8300, 0x8300, tutankhm_bankselect_w },
237 { 0x8600, 0x8600, timeplt_sh_irqtrigger_w },
238 { 0x8700, 0x8700, soundlatch_w },
239 { 0x8800, 0x8fff, MWA_RAM },
240 { 0xa000, 0xffff, MWA_ROM },
241 { -1 } /* end of table */
242 };
243
244
245 INPUT_PORTS_START( tutankhm )
246 PORT_START /* DSW2 */
247 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
248 PORT_DIPSETTING( 0x03, "3" )
249 PORT_DIPSETTING( 0x01, "4" )
250 PORT_DIPSETTING( 0x02, "5" )
251 PORT_BITX( 0, 0x00, IPT_DIPSWITCH_SETTING | IPF_CHEAT, "256", IP_KEY_NONE, IP_JOY_NONE )
252 PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) )
253 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
254 PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
255 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Bonus_Life ) )
256 PORT_DIPSETTING( 0x08, "30000" )
257 PORT_DIPSETTING( 0x00, "40000" )
258 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) )
259 PORT_DIPSETTING( 0x30, "Easy" )
260 PORT_DIPSETTING( 0x10, "Normal" )
261 PORT_DIPSETTING( 0x20, "Hard" )
262 PORT_DIPSETTING( 0x00, "Hardest" )
263 PORT_DIPNAME( 0x40, 0x40, "Flash Bomb" )
264 PORT_DIPSETTING( 0x40, "1 per Life" )
265 PORT_DIPSETTING( 0x00, "1 per Game" )
266 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
267 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
268 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
269
270 PORT_START /* IN0 */
271 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
272 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
273 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
274 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
275 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
276 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
277 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
278 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
279
280 PORT_START /* IN1 */
281 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
282 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
283 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
284 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
285 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
286 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
287 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 )
288 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
289
290 PORT_START /* IN2 */
291 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_COCKTAIL )
292 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_COCKTAIL )
293 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY | IPF_COCKTAIL )
294 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_COCKTAIL )
295 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
296 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
297 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_COCKTAIL )
298 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
299
300 PORT_START /* DSW1 */
301 PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
302 PORT_DIPSETTING( 0x02, DEF_STR( 4C_1C ) )
303 PORT_DIPSETTING( 0x05, DEF_STR( 3C_1C ) )
304 PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
305 PORT_DIPSETTING( 0x04, DEF_STR( 3C_2C ) )
306 PORT_DIPSETTING( 0x01, DEF_STR( 4C_3C ) )
307 PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) )
308 PORT_DIPSETTING( 0x03, DEF_STR( 3C_4C ) )
309 PORT_DIPSETTING( 0x07, DEF_STR( 2C_3C ) )
310 PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ) )
311 PORT_DIPSETTING( 0x06, DEF_STR( 2C_5C ) )
312 PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ) )
313 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
314 PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ) )
315 PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
316 PORT_DIPSETTING( 0x09, DEF_STR( 1C_7C ) )
317 PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
318 PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
319 PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
320 PORT_DIPSETTING( 0x50, DEF_STR( 3C_1C ) )
321 PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
322 PORT_DIPSETTING( 0x40, DEF_STR( 3C_2C ) )
323 PORT_DIPSETTING( 0x10, DEF_STR( 4C_3C ) )
324 PORT_DIPSETTING( 0xf0, DEF_STR( 1C_1C ) )
325 PORT_DIPSETTING( 0x30, DEF_STR( 3C_4C ) )
326 PORT_DIPSETTING( 0x70, DEF_STR( 2C_3C ) )
327 PORT_DIPSETTING( 0xe0, DEF_STR( 1C_2C ) )
328 PORT_DIPSETTING( 0x60, DEF_STR( 2C_5C ) )
329 PORT_DIPSETTING( 0xd0, DEF_STR( 1C_3C ) )
330 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
331 PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
332 PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
333 PORT_DIPSETTING( 0x90, DEF_STR( 1C_7C ) )
334 PORT_DIPSETTING( 0x00, "Disabled" )
335 /* 0x00 not commented out since the game makes the usual sound if you insert the coin */
336 INPUT_PORTS_END
337
338
339
340 static struct MachineDriver machine_driver_tutankhm =
341 {
342 /* basic machine hardware */
343 {
344 {
345 CPU_M6809,
346 1500000, /* 1.5 Mhz ??? */
347 readmem,writemem,0,0,
348 interrupt,1
349 },
350 {
351 CPU_Z80 | CPU_AUDIO_CPU,
352 14318180/8, /* 1.789772727 MHz */ \
353 timeplt_sound_readmem,timeplt_sound_writemem,0,0,
354 ignore_interrupt,1 /* interrupts are triggered by the main CPU */
355 }
356 },
357 30, DEFAULT_30HZ_VBLANK_DURATION, /* frames per second, vblank duration */
358 1, /* 1 CPU slice per frame - interleaving is forced when a sound command is written */
359 0,
360
361 /* video hardware */
362 32*8, 32*8, { 0*8, 32*8-1, 2*8, 30*8-1 }, /* not sure about the visible area */
363 0, /* GfxDecodeInfo * */
364 16, 0,
365 0,
366
367 VIDEO_TYPE_RASTER|VIDEO_MODIFIES_PALETTE,
368 0, /* vh_init routine */
369 generic_vh_start, /* vh_start routine */
370 generic_vh_stop, /* vh_stop routine */
371 tutankhm_vh_screenrefresh, /* vh_update routine */
372
373 /* sound hardware */
374 0,0,0,0,
375 {
376 {
377 SOUND_AY8910,
378 &timeplt_ay8910_interface
379 }
380 }
381 };
382
383
384 ROM_START( tutankhm )
385 ROM_REGION( 0x20000, REGION_CPU1 ) /* 64k for M6809 CPU code + 64k for ROM banks */
386 ROM_LOAD( "h1.bin", 0x0a000, 0x1000, 0xda18679f ) /* program ROMs */
387 ROM_LOAD( "h2.bin", 0x0b000, 0x1000, 0xa0f02c85 )
388 ROM_LOAD( "h3.bin", 0x0c000, 0x1000, 0xea03a1ab )
389 ROM_LOAD( "h4.bin", 0x0d000, 0x1000, 0xbd06fad0 )
390 ROM_LOAD( "h5.bin", 0x0e000, 0x1000, 0xbf9fd9b0 )
391 ROM_LOAD( "h6.bin", 0x0f000, 0x1000, 0xfe079c5b )
392 ROM_LOAD( "j1.bin", 0x10000, 0x1000, 0x7eb59b21 ) /* graphic ROMs (banked) -- only 9 of 12 are filled */
393 ROM_LOAD( "j2.bin", 0x11000, 0x1000, 0x6615eff3 )
394 ROM_LOAD( "j3.bin", 0x12000, 0x1000, 0xa10d4444 )
395 ROM_LOAD( "j4.bin", 0x13000, 0x1000, 0x58cd143c )
396 ROM_LOAD( "j5.bin", 0x14000, 0x1000, 0xd7e7ae95 )
397 ROM_LOAD( "j6.bin", 0x15000, 0x1000, 0x91f62b82 )
398 ROM_LOAD( "j7.bin", 0x16000, 0x1000, 0xafd0a81f )
399 ROM_LOAD( "j8.bin", 0x17000, 0x1000, 0xdabb609b )
400 ROM_LOAD( "j9.bin", 0x18000, 0x1000, 0x8ea9c6a6 )
401 /* the other banks (1900-1fff) are empty */
402
403 ROM_REGION( 0x10000 , REGION_CPU2 ) /* 64k for Z80 sound CPU code */
404 ROM_LOAD( "11-7a.bin", 0x0000, 0x1000, 0xb52d01fa )
405 ROM_LOAD( "10-8a.bin", 0x1000, 0x1000, 0x9db5c0ce )
406 ROM_END
407
408
409 ROM_START( tutankst )
410 ROM_REGION( 0x20000, REGION_CPU1 ) /* 64k for M6809 CPU code + 64k for ROM banks */
411 ROM_LOAD( "h1.bin", 0x0a000, 0x1000, 0xda18679f ) /* program ROMs */
412 ROM_LOAD( "h2.bin", 0x0b000, 0x1000, 0xa0f02c85 )
413 ROM_LOAD( "ra1_3h.cpu", 0x0c000, 0x1000, 0x2d62d7b1 )
414 ROM_LOAD( "h4.bin", 0x0d000, 0x1000, 0xbd06fad0 )
415 ROM_LOAD( "h5.bin", 0x0e000, 0x1000, 0xbf9fd9b0 )
416 ROM_LOAD( "ra1_6h.cpu", 0x0f000, 0x1000, 0xc43b3865 )
417 ROM_LOAD( "j1.bin", 0x10000, 0x1000, 0x7eb59b21 ) /* graphic ROMs (banked) -- only 9 of 12 are filled */
418 ROM_LOAD( "j2.bin", 0x11000, 0x1000, 0x6615eff3 )
419 ROM_LOAD( "j3.bin", 0x12000, 0x1000, 0xa10d4444 )
420 ROM_LOAD( "j4.bin", 0x13000, 0x1000, 0x58cd143c )
421 ROM_LOAD( "j5.bin", 0x14000, 0x1000, 0xd7e7ae95 )
422 ROM_LOAD( "j6.bin", 0x15000, 0x1000, 0x91f62b82 )
423 ROM_LOAD( "j7.bin", 0x16000, 0x1000, 0xafd0a81f )
424 ROM_LOAD( "j8.bin", 0x17000, 0x1000, 0xdabb609b )
425 ROM_LOAD( "j9.bin", 0x18000, 0x1000, 0x8ea9c6a6 )
426 /* the other banks (1900-1fff) are empty */
427
428 ROM_REGION( 0x10000 , REGION_CPU2 ) /* 64k for Z80 sound CPU code */
429 ROM_LOAD( "11-7a.bin", 0x0000, 0x1000, 0xb52d01fa )
430 ROM_LOAD( "10-8a.bin", 0x1000, 0x1000, 0x9db5c0ce )
431 ROM_END
432
433
434
435 GAME( 1982, tutankhm, 0, tutankhm, tutankhm, 0, ROT90, "Konami", "Tutankham" )
436 GAME( 1982, tutankst, tutankhm, tutankhm, tutankhm, 0, ROT90, "[Konami] (Stern license)", "Tutankham (Stern)" )
437