1 /*##########################################################################
2
3 atarigen.c
4
5 General functions for Atari raster games.
6
7 ##########################################################################*/
8
9
10 #include "driver.h"
11 #include "atarigen.h"
12 #include "slapstic.h"
13 #include "cpu/m6502/m6502.h"
14
15
16
17 /*##########################################################################
18 CONSTANTS
19 ##########################################################################*/
20
21 #define SOUND_INTERLEAVE_RATE TIME_IN_USEC(50)
22 #define SOUND_INTERLEAVE_REPEAT 20
23
24
25
26 /*##########################################################################
27 GLOBAL VARIABLES
28 ##########################################################################*/
29
30 UINT8 atarigen_scanline_int_state;
31 UINT8 atarigen_sound_int_state;
32 UINT8 atarigen_video_int_state;
33
34 const data16_t * atarigen_eeprom_default;
35 data16_t * atarigen_eeprom;
36 size_t atarigen_eeprom_size;
37
38 UINT8 atarigen_cpu_to_sound_ready;
39 UINT8 atarigen_sound_to_cpu_ready;
40
41 data16_t * atarigen_playfield;
42 data16_t * atarigen_playfield2;
43 data16_t * atarigen_playfield_upper;
44 data16_t * atarigen_alpha;
45 data16_t * atarigen_alpha2;
46 data16_t * atarigen_xscroll;
47 data16_t * atarigen_yscroll;
48
49 data32_t * atarigen_playfield32;
50 data32_t * atarigen_alpha32;
51
52 struct tilemap * atarigen_playfield_tilemap;
53 struct tilemap * atarigen_playfield2_tilemap;
54 struct tilemap * atarigen_alpha_tilemap;
55 struct tilemap * atarigen_alpha2_tilemap;
56
57 data16_t * atarivc_data;
58 data16_t * atarivc_eof_data;
59 struct atarivc_state_desc atarivc_state;
60
61
62
63 /*##########################################################################
64 STATIC VARIABLES
65 ##########################################################################*/
66
67 static atarigen_int_callback update_int_callback;
68 static void * scanline_interrupt_timer;
69
70 static UINT8 eeprom_unlocked;
71
72 static UINT8 atarigen_slapstic_num;
73 static data16_t * atarigen_slapstic;
74 static int atarigen_slapstic_bank;
75 static void * atarigen_slapstic_bank0;
76
77 static UINT8 sound_cpu_num;
78 static UINT8 atarigen_cpu_to_sound;
79 static UINT8 atarigen_sound_to_cpu;
80 static UINT8 timed_int;
81 static UINT8 ym2151_int;
82
83 static UINT8 * speed_a, *speed_b;
84 static UINT32 speed_pc;
85
86 static atarigen_scanline_callback scanline_callback;
87 static int scanlines_per_callback;
88 static double scanline_callback_period;
89 static int last_scanline;
90
91 static int actual_vc_latch0;
92 static int actual_vc_latch1;
93 static UINT8 atarivc_playfields;
94
95 static int playfield_latch;
96 static int playfield2_latch;
97
98
99
100 /*##########################################################################
101 STATIC FUNCTION DECLARATIONS
102 ##########################################################################*/
103
104 static void scanline_interrupt_callback(int param);
105
106 static void decompress_eeprom_word(const data16_t *data);
107 static void decompress_eeprom_byte(const data16_t *data);
108
109 static void update_6502_irq(void);
110 static void sound_comm_timer(int reps_left);
111 static void delayed_sound_reset(int param);
112 static void delayed_sound_w(int param);
113 static void delayed_6502_sound_w(int param);
114
115 static READ_HANDLER( m6502_speedup_r );
116 static void atarigen_set_vol(int volume, const char *string);
117
118 static void vblank_timer(int param);
119 static void scanline_timer(int scanline);
120
121 static void atarivc_common_w(offs_t offset, data16_t newword);
122
123 static void unhalt_cpu(int param);
124
125
126
127 /*##########################################################################
128 INTERRUPT HANDLING
129 ##########################################################################*/
130
131 /*---------------------------------------------------------------
132 atarigen_interrupt_reset: Initializes the state of all
133 the interrupt sources.
134 ---------------------------------------------------------------*/
135
atarigen_interrupt_reset(atarigen_int_callback update_int)136 void atarigen_interrupt_reset(atarigen_int_callback update_int)
137 {
138 /* set the callback */
139 update_int_callback = update_int;
140
141 /* reset the interrupt states */
142 atarigen_video_int_state = atarigen_sound_int_state = atarigen_scanline_int_state = 0;
143 scanline_interrupt_timer = NULL;
144
145 /* create a timer for scanlines */
146 scanline_interrupt_timer = timer_alloc(scanline_interrupt_callback);
147 }
148
149
150 /*---------------------------------------------------------------
151 atarigen_update_interrupts: Forces the interrupt callback
152 to be called with the current VBLANK and sound interrupt
153 states.
154 ---------------------------------------------------------------*/
155
atarigen_update_interrupts(void)156 void atarigen_update_interrupts(void)
157 {
158 (*update_int_callback)();
159 }
160
161
162
163 /*---------------------------------------------------------------
164 atarigen_scanline_int_set: Sets the scanline when the next
165 scanline interrupt should be generated.
166 ---------------------------------------------------------------*/
167
atarigen_scanline_int_set(int scanline)168 void atarigen_scanline_int_set(int scanline)
169 {
170 timer_adjust(scanline_interrupt_timer, cpu_getscanlinetime(scanline), 0, 0);
171 }
172
173
174 /*---------------------------------------------------------------
175 atarigen_scanline_int_gen: Standard interrupt routine
176 which sets the scanline interrupt state.
177 ---------------------------------------------------------------*/
178
INTERRUPT_GEN(atarigen_scanline_int_gen)179 INTERRUPT_GEN( atarigen_scanline_int_gen )
180 {
181 atarigen_scanline_int_state = 1;
182 (*update_int_callback)();
183 }
184
185
186 /*---------------------------------------------------------------
187 atarigen_scanline_int_ack_w: Resets the state of the
188 scanline interrupt.
189 ---------------------------------------------------------------*/
190
WRITE16_HANDLER(atarigen_scanline_int_ack_w)191 WRITE16_HANDLER( atarigen_scanline_int_ack_w )
192 {
193 atarigen_scanline_int_state = 0;
194 (*update_int_callback)();
195 }
196
WRITE32_HANDLER(atarigen_scanline_int_ack32_w)197 WRITE32_HANDLER( atarigen_scanline_int_ack32_w )
198 {
199 atarigen_scanline_int_state = 0;
200 (*update_int_callback)();
201 }
202
203
204 /*---------------------------------------------------------------
205 atarigen_sound_int_gen: Standard interrupt routine which
206 sets the sound interrupt state.
207 ---------------------------------------------------------------*/
208
INTERRUPT_GEN(atarigen_sound_int_gen)209 INTERRUPT_GEN( atarigen_sound_int_gen )
210 {
211 atarigen_sound_int_state = 1;
212 (*update_int_callback)();
213 }
214
215
216 /*---------------------------------------------------------------
217 atarigen_sound_int_ack_w: Resets the state of the sound
218 interrupt.
219 ---------------------------------------------------------------*/
220
WRITE16_HANDLER(atarigen_sound_int_ack_w)221 WRITE16_HANDLER( atarigen_sound_int_ack_w )
222 {
223 atarigen_sound_int_state = 0;
224 (*update_int_callback)();
225 }
226
WRITE32_HANDLER(atarigen_sound_int_ack32_w)227 WRITE32_HANDLER( atarigen_sound_int_ack32_w )
228 {
229 atarigen_sound_int_state = 0;
230 (*update_int_callback)();
231 }
232
233
234 /*---------------------------------------------------------------
235 atarigen_video_int_gen: Standard interrupt routine which
236 sets the video interrupt state.
237 ---------------------------------------------------------------*/
238
INTERRUPT_GEN(atarigen_video_int_gen)239 INTERRUPT_GEN( atarigen_video_int_gen )
240 {
241 atarigen_video_int_state = 1;
242 (*update_int_callback)();
243 }
244
245
246 /*---------------------------------------------------------------
247 atarigen_video_int_ack_w: Resets the state of the video
248 interrupt.
249 ---------------------------------------------------------------*/
250
WRITE16_HANDLER(atarigen_video_int_ack_w)251 WRITE16_HANDLER( atarigen_video_int_ack_w )
252 {
253 atarigen_video_int_state = 0;
254 (*update_int_callback)();
255 }
256
WRITE32_HANDLER(atarigen_video_int_ack32_w)257 WRITE32_HANDLER( atarigen_video_int_ack32_w )
258 {
259 atarigen_video_int_state = 0;
260 (*update_int_callback)();
261 }
262
263
264 /*---------------------------------------------------------------
265 scanline_interrupt_callback: Signals an interrupt.
266 ---------------------------------------------------------------*/
267
scanline_interrupt_callback(int param)268 static void scanline_interrupt_callback(int param)
269 {
270 /* generate the interrupt */
271 atarigen_scanline_int_gen();
272
273 /* set a new timer to go off at the same scan line next frame */
274 timer_adjust(scanline_interrupt_timer, TIME_IN_HZ(Machine->drv->frames_per_second), 0, 0);
275 }
276
277
278
279 /*##########################################################################
280 EEPROM HANDLING
281 ##########################################################################*/
282
283 /*---------------------------------------------------------------
284 atarigen_eeprom_reset: Makes sure that the unlocked state
285 is cleared when we reset.
286 ---------------------------------------------------------------*/
287
atarigen_eeprom_reset(void)288 void atarigen_eeprom_reset(void)
289 {
290 eeprom_unlocked = 0;
291 }
292
293
294 /*---------------------------------------------------------------
295 atarigen_eeprom_enable_w: Any write to this handler will
296 allow one byte to be written to the EEPROM data area the
297 next time.
298 ---------------------------------------------------------------*/
299
WRITE16_HANDLER(atarigen_eeprom_enable_w)300 WRITE16_HANDLER( atarigen_eeprom_enable_w )
301 {
302 eeprom_unlocked = 1;
303 }
304
WRITE32_HANDLER(atarigen_eeprom_enable32_w)305 WRITE32_HANDLER( atarigen_eeprom_enable32_w )
306 {
307 eeprom_unlocked = 1;
308 }
309
310
311 /*---------------------------------------------------------------
312 atarigen_eeprom_w: Writes a "word" to the EEPROM, which is
313 almost always accessed via the low byte of the word only.
314 If the EEPROM hasn't been unlocked, the write attempt is
315 ignored.
316 ---------------------------------------------------------------*/
317
WRITE16_HANDLER(atarigen_eeprom_w)318 WRITE16_HANDLER( atarigen_eeprom_w )
319 {
320 if (!eeprom_unlocked)
321 return;
322
323 COMBINE_DATA(&atarigen_eeprom[offset]);
324 eeprom_unlocked = 0;
325 }
326
WRITE32_HANDLER(atarigen_eeprom32_w)327 WRITE32_HANDLER( atarigen_eeprom32_w )
328 {
329 if (!eeprom_unlocked)
330 return;
331
332 COMBINE_DATA(&atarigen_eeprom[offset * 2 + 1]);
333 data >>= 16;
334 mem_mask >>= 16;
335 COMBINE_DATA(&atarigen_eeprom[offset * 2]);
336 eeprom_unlocked = 0;
337 }
338
339
340 /*---------------------------------------------------------------
341 atarigen_eeprom_r: Reads a "word" from the EEPROM, which is
342 almost always accessed via the low byte of the word only.
343 ---------------------------------------------------------------*/
344
READ16_HANDLER(atarigen_eeprom_r)345 READ16_HANDLER( atarigen_eeprom_r )
346 {
347 return atarigen_eeprom[offset] | 0xff00;
348 }
349
READ16_HANDLER(atarigen_eeprom_upper_r)350 READ16_HANDLER( atarigen_eeprom_upper_r )
351 {
352 return atarigen_eeprom[offset] | 0x00ff;
353 }
354
READ32_HANDLER(atarigen_eeprom_upper32_r)355 READ32_HANDLER( atarigen_eeprom_upper32_r )
356 {
357 return (atarigen_eeprom[offset * 2] << 16) | atarigen_eeprom[offset * 2 + 1] | 0x00ff00ff;
358 }
359
360
361 /*---------------------------------------------------------------
362 nvram_handler_atarigen: Loads the EEPROM data.
363 ---------------------------------------------------------------*/
364
NVRAM_HANDLER(atarigen)365 NVRAM_HANDLER( atarigen )
366 {
367 if (read_or_write)
368 mame_fwrite(file, atarigen_eeprom, atarigen_eeprom_size);
369 else if (file)
370 mame_fread(file, atarigen_eeprom, atarigen_eeprom_size);
371 else
372 {
373 /* all 0xff's work for most games */
374 memset(atarigen_eeprom, 0xff, atarigen_eeprom_size);
375
376 /* anything else must be decompressed */
377 if (atarigen_eeprom_default)
378 {
379 if (atarigen_eeprom_default[0] == 0)
380 decompress_eeprom_byte(atarigen_eeprom_default + 1);
381 else
382 decompress_eeprom_word(atarigen_eeprom_default + 1);
383 }
384 }
385 }
386
387
388 /*---------------------------------------------------------------
389 decompress_eeprom_word: Used for decompressing EEPROM data
390 that has every other byte invalid.
391 ---------------------------------------------------------------*/
392
decompress_eeprom_word(const data16_t * data)393 void decompress_eeprom_word(const data16_t *data)
394 {
395 data16_t *dest = (data16_t *)atarigen_eeprom;
396 data16_t value;
397
398 while ((value = *data++) != 0)
399 {
400 int count = (value >> 8);
401 value = (value << 8) | (value & 0xff);
402
403 while (count--)
404 *dest++ = value;
405 }
406 }
407
408
409 /*---------------------------------------------------------------
410 decompress_eeprom_byte: Used for decompressing EEPROM data
411 that is byte-packed.
412 ---------------------------------------------------------------*/
413
decompress_eeprom_byte(const data16_t * data)414 void decompress_eeprom_byte(const data16_t *data)
415 {
416 UINT8 *dest = (UINT8 *)atarigen_eeprom;
417 data16_t value;
418
419 while ((value = *data++) != 0)
420 {
421 int count = (value >> 8);
422 value = (value << 8) | (value & 0xff);
423
424 while (count--)
425 *dest++ = value;
426 }
427 }
428
429
430
431 /*##########################################################################
432 SLAPSTIC HANDLING
433 ##########################################################################*/
434
update_bank(int bank)435 static INLINE void update_bank(int bank)
436 {
437 /* if the bank has changed, copy the memory; Pit Fighter needs this */
438 if (bank != atarigen_slapstic_bank)
439 {
440 /* bank 0 comes from the copy we made earlier */
441 if (bank == 0)
442 memcpy(atarigen_slapstic, atarigen_slapstic_bank0, 0x2000);
443 else
444 memcpy(atarigen_slapstic, &atarigen_slapstic[bank * 0x1000], 0x2000);
445
446 /* remember the current bank */
447 atarigen_slapstic_bank = bank;
448 }
449 }
450
451
452 /*---------------------------------------------------------------
453 atarigen_slapstic_init: Installs memory handlers for the
454 slapstic and sets the chip number.
455 ---------------------------------------------------------------*/
456
atarigen_slapstic_init(int cpunum,int base,int chipnum)457 void atarigen_slapstic_init(int cpunum, int base, int chipnum)
458 {
459 atarigen_slapstic_num = chipnum;
460 atarigen_slapstic = NULL;
461
462 /* if we have a chip, install it */
463 if (chipnum)
464 {
465 /* initialize the slapstic */
466 slapstic_init(chipnum);
467
468 /* install the memory handlers */
469 atarigen_slapstic = install_mem_read16_handler(cpunum, base, base + 0x7fff, atarigen_slapstic_r);
470 atarigen_slapstic = install_mem_write16_handler(cpunum, base, base + 0x7fff, atarigen_slapstic_w);
471
472 /* allocate memory for a copy of bank 0 */
473 atarigen_slapstic_bank0 = auto_malloc(0x2000);
474 if (atarigen_slapstic_bank0)
475 memcpy(atarigen_slapstic_bank0, atarigen_slapstic, 0x2000);
476 }
477 }
478
479
480 /*---------------------------------------------------------------
481 atarigen_slapstic_reset: Makes the selected slapstic number
482 active and resets its state.
483 ---------------------------------------------------------------*/
484
atarigen_slapstic_reset(void)485 void atarigen_slapstic_reset(void)
486 {
487 if (atarigen_slapstic_num)
488 {
489 slapstic_reset();
490 update_bank(slapstic_bank());
491 }
492 }
493
494
495 /*---------------------------------------------------------------
496 atarigen_slapstic_w: Assuming that the slapstic sits in
497 ROM memory space, we just simply tweak the slapstic at this
498 address and do nothing more.
499 ---------------------------------------------------------------*/
500
WRITE16_HANDLER(atarigen_slapstic_w)501 WRITE16_HANDLER( atarigen_slapstic_w )
502 {
503 update_bank(slapstic_tweak(offset));
504 }
505
506
507 /*---------------------------------------------------------------
508 atarigen_slapstic_r: Tweaks the slapstic at the appropriate
509 address and then reads a word from the underlying memory.
510 ---------------------------------------------------------------*/
511
READ16_HANDLER(atarigen_slapstic_r)512 READ16_HANDLER( atarigen_slapstic_r )
513 {
514 /* fetch the result from the current bank first */
515 int result = atarigen_slapstic[offset & 0xfff];
516
517 /* then determine the new one */
518 update_bank(slapstic_tweak(offset));
519 return result;
520 }
521
522
523
524 /*##########################################################################
525 SOUND I/O
526 ##########################################################################*/
527
528 /*---------------------------------------------------------------
529 atarigen_sound_io_reset: Resets the state of the sound I/O.
530 ---------------------------------------------------------------*/
531
atarigen_sound_io_reset(int cpu_num)532 void atarigen_sound_io_reset(int cpu_num)
533 {
534 /* remember which CPU is the sound CPU */
535 sound_cpu_num = cpu_num;
536
537 /* reset the internal interrupts states */
538 timed_int = ym2151_int = 0;
539
540 /* reset the sound I/O states */
541 atarigen_cpu_to_sound = atarigen_sound_to_cpu = 0;
542 atarigen_cpu_to_sound_ready = atarigen_sound_to_cpu_ready = 0;
543 }
544
545
546 /*---------------------------------------------------------------
547 atarigen_6502_irq_gen: Generates an IRQ signal to the 6502
548 sound processor.
549 ---------------------------------------------------------------*/
550
INTERRUPT_GEN(atarigen_6502_irq_gen)551 INTERRUPT_GEN( atarigen_6502_irq_gen )
552 {
553 timed_int = 1;
554 update_6502_irq();
555 }
556
557
558 /*---------------------------------------------------------------
559 atarigen_6502_irq_ack_r: Resets the IRQ signal to the 6502
560 sound processor. Both reads and writes can be used.
561 ---------------------------------------------------------------*/
562
READ_HANDLER(atarigen_6502_irq_ack_r)563 READ_HANDLER( atarigen_6502_irq_ack_r )
564 {
565 timed_int = 0;
566 update_6502_irq();
567 return 0;
568 }
569
WRITE_HANDLER(atarigen_6502_irq_ack_w)570 WRITE_HANDLER( atarigen_6502_irq_ack_w )
571 {
572 timed_int = 0;
573 update_6502_irq();
574 }
575
576
577 /*---------------------------------------------------------------
578 atarigen_ym2151_irq_gen: Sets the state of the YM2151's
579 IRQ line.
580 ---------------------------------------------------------------*/
581
atarigen_ym2151_irq_gen(int irq)582 void atarigen_ym2151_irq_gen(int irq)
583 {
584 ym2151_int = irq;
585 update_6502_irq();
586 }
587
588
589 /*---------------------------------------------------------------
590 atarigen_sound_reset_w: Write handler which resets the
591 sound CPU in response.
592 ---------------------------------------------------------------*/
593
WRITE16_HANDLER(atarigen_sound_reset_w)594 WRITE16_HANDLER( atarigen_sound_reset_w )
595 {
596 timer_set(TIME_NOW, 0, delayed_sound_reset);
597 }
598
599
600 /*---------------------------------------------------------------
601 atarigen_sound_reset: Resets the state of the sound CPU
602 manually.
603 ---------------------------------------------------------------*/
604
atarigen_sound_reset(void)605 void atarigen_sound_reset(void)
606 {
607 timer_set(TIME_NOW, 1, delayed_sound_reset);
608 }
609
610
611 /*---------------------------------------------------------------
612 atarigen_sound_w: Handles communication from the main CPU
613 to the sound CPU. Two versions are provided, one with the
614 data byte in the low 8 bits, and one with the data byte in
615 the upper 8 bits.
616 ---------------------------------------------------------------*/
617
WRITE16_HANDLER(atarigen_sound_w)618 WRITE16_HANDLER( atarigen_sound_w )
619 {
620 if (ACCESSING_LSB)
621 timer_set(TIME_NOW, data & 0xff, delayed_sound_w);
622 }
623
WRITE16_HANDLER(atarigen_sound_upper_w)624 WRITE16_HANDLER( atarigen_sound_upper_w )
625 {
626 if (ACCESSING_MSB)
627 timer_set(TIME_NOW, (data >> 8) & 0xff, delayed_sound_w);
628 }
629
WRITE32_HANDLER(atarigen_sound_upper32_w)630 WRITE32_HANDLER( atarigen_sound_upper32_w )
631 {
632 if (ACCESSING_MSB32)
633 timer_set(TIME_NOW, (data >> 24) & 0xff, delayed_sound_w);
634 }
635
636
637 /*---------------------------------------------------------------
638 atarigen_sound_r: Handles reading data communicated from the
639 sound CPU to the main CPU. Two versions are provided, one
640 with the data byte in the low 8 bits, and one with the data
641 byte in the upper 8 bits.
642 ---------------------------------------------------------------*/
643
READ16_HANDLER(atarigen_sound_r)644 READ16_HANDLER( atarigen_sound_r )
645 {
646 atarigen_sound_to_cpu_ready = 0;
647 atarigen_sound_int_ack_w(0, 0, 0);
648 return atarigen_sound_to_cpu | 0xff00;
649 }
650
READ16_HANDLER(atarigen_sound_upper_r)651 READ16_HANDLER( atarigen_sound_upper_r )
652 {
653 atarigen_sound_to_cpu_ready = 0;
654 atarigen_sound_int_ack_w(0, 0, 0);
655 return (atarigen_sound_to_cpu << 8) | 0x00ff;
656 }
657
READ32_HANDLER(atarigen_sound_upper32_r)658 READ32_HANDLER( atarigen_sound_upper32_r )
659 {
660 atarigen_sound_to_cpu_ready = 0;
661 atarigen_sound_int_ack32_w(0, 0, 0);
662 return (atarigen_sound_to_cpu << 24) | 0x00ffffff;
663 }
664
665
666 /*---------------------------------------------------------------
667 atarigen_6502_sound_w: Handles communication from the sound
668 CPU to the main CPU.
669 ---------------------------------------------------------------*/
670
WRITE_HANDLER(atarigen_6502_sound_w)671 WRITE_HANDLER( atarigen_6502_sound_w )
672 {
673 timer_set(TIME_NOW, data, delayed_6502_sound_w);
674 }
675
676
677 /*---------------------------------------------------------------
678 atarigen_6502_sound_r: Handles reading data communicated
679 from the main CPU to the sound CPU.
680 ---------------------------------------------------------------*/
681
READ_HANDLER(atarigen_6502_sound_r)682 READ_HANDLER( atarigen_6502_sound_r )
683 {
684 atarigen_cpu_to_sound_ready = 0;
685 cpu_set_nmi_line(sound_cpu_num, CLEAR_LINE);
686 return atarigen_cpu_to_sound;
687 }
688
689
690 /*---------------------------------------------------------------
691 update_6502_irq: Called whenever the IRQ state changes. An
692 interrupt is generated if either atarigen_6502_irq_gen()
693 was called, or if the YM2151 generated an interrupt via
694 the atarigen_ym2151_irq_gen() callback.
695 ---------------------------------------------------------------*/
696
update_6502_irq(void)697 void update_6502_irq(void)
698 {
699 if (timed_int || ym2151_int)
700 cpu_set_irq_line(sound_cpu_num, M6502_IRQ_LINE, ASSERT_LINE);
701 else
702 cpu_set_irq_line(sound_cpu_num, M6502_IRQ_LINE, CLEAR_LINE);
703 }
704
705
706 /*---------------------------------------------------------------
707 sound_comm_timer: Set whenever a command is written from
708 the main CPU to the sound CPU, in order to temporarily bump
709 up the interleave rate. This helps ensure that communications
710 between the two CPUs works properly.
711 ---------------------------------------------------------------*/
712
sound_comm_timer(int reps_left)713 static void sound_comm_timer(int reps_left)
714 {
715 if (--reps_left)
716 timer_set(SOUND_INTERLEAVE_RATE, reps_left, sound_comm_timer);
717 }
718
719
720 /*---------------------------------------------------------------
721 delayed_sound_reset: Synchronizes the sound reset command
722 between the two CPUs.
723 ---------------------------------------------------------------*/
724
delayed_sound_reset(int param)725 static void delayed_sound_reset(int param)
726 {
727 /* unhalt and reset the sound CPU */
728 if (param == 0)
729 {
730 cpu_set_halt_line(sound_cpu_num, CLEAR_LINE);
731 cpu_set_reset_line(sound_cpu_num, PULSE_LINE);
732 }
733
734 /* reset the sound write state */
735 atarigen_sound_to_cpu_ready = 0;
736 atarigen_sound_int_ack_w(0, 0, 0);
737 }
738
739
740 /*---------------------------------------------------------------
741 delayed_sound_w: Synchronizes a data write from the main
742 CPU to the sound CPU.
743 ---------------------------------------------------------------*/
744
delayed_sound_w(int param)745 static void delayed_sound_w(int param)
746 {
747 /* warn if we missed something */
748 if (atarigen_cpu_to_sound_ready)
749 logerror("Missed command from 68010\n");
750
751 /* set up the states and signal an NMI to the sound CPU */
752 atarigen_cpu_to_sound = param;
753 atarigen_cpu_to_sound_ready = 1;
754 cpu_set_nmi_line(sound_cpu_num, ASSERT_LINE);
755
756 /* allocate a high frequency timer until a response is generated */
757 /* the main CPU is *very* sensistive to the timing of the response */
758 timer_set(SOUND_INTERLEAVE_RATE, SOUND_INTERLEAVE_REPEAT, sound_comm_timer);
759 }
760
761
762 /*---------------------------------------------------------------
763 delayed_6502_sound_w: Synchronizes a data write from the
764 sound CPU to the main CPU.
765 ---------------------------------------------------------------*/
766
delayed_6502_sound_w(int param)767 static void delayed_6502_sound_w(int param)
768 {
769 /* warn if we missed something */
770 if (atarigen_sound_to_cpu_ready)
771 logerror("Missed result from 6502\n");
772
773 /* set up the states and signal the sound interrupt to the main CPU */
774 atarigen_sound_to_cpu = param;
775 atarigen_sound_to_cpu_ready = 1;
776 atarigen_sound_int_gen();
777 }
778
779
780
781 /*##########################################################################
782 SOUND HELPERS
783 ##########################################################################*/
784
785 /*---------------------------------------------------------------
786 atarigen_init_6502_speedup: Installs a special read handler
787 to catch the main spin loop in the 6502 sound code. The
788 addresses accessed seem to be the same across a large
789 number of games, though the PC shifts.
790 ---------------------------------------------------------------*/
791
atarigen_init_6502_speedup(int cpunum,int compare_pc1,int compare_pc2)792 void atarigen_init_6502_speedup(int cpunum, int compare_pc1, int compare_pc2)
793 {
794 UINT8 *memory = memory_region(REGION_CPU1+cpunum);
795 int address_low, address_high;
796
797 /* determine the pointer to the first speed check location */
798 address_low = memory[compare_pc1 + 1] | (memory[compare_pc1 + 2] << 8);
799 address_high = memory[compare_pc1 + 4] | (memory[compare_pc1 + 5] << 8);
800 if (address_low != address_high - 1)
801 logerror("Error: address %04X does not point to a speedup location!", compare_pc1);
802 speed_a = &memory[address_low];
803
804 /* determine the pointer to the second speed check location */
805 address_low = memory[compare_pc2 + 1] | (memory[compare_pc2 + 2] << 8);
806 address_high = memory[compare_pc2 + 4] | (memory[compare_pc2 + 5] << 8);
807 if (address_low != address_high - 1)
808 logerror("Error: address %04X does not point to a speedup location!", compare_pc2);
809 speed_b = &memory[address_low];
810
811 /* install a handler on the second address */
812 speed_pc = compare_pc2;
813 install_mem_read_handler(cpunum, address_low, address_low, m6502_speedup_r);
814 }
815
816
817 /*---------------------------------------------------------------
818 atarigen_set_vol: Scans for a particular sound chip and
819 changes the volume on all channels associated with it.
820 ---------------------------------------------------------------*/
821
atarigen_set_vol(int volume,const char * string)822 void atarigen_set_vol(int volume, const char *string)
823 {
824 int ch;
825
826 for (ch = 0; ch < MIXER_MAX_CHANNELS; ch++)
827 {
828 const char *name = mixer_get_name(ch);
829 if (name && strstr(name, string))
830 mixer_set_volume(ch, volume);
831 }
832 }
833
834
835 /*---------------------------------------------------------------
836 atarigen_set_XXXXX_vol: Sets the volume for a given type
837 of chip.
838 ---------------------------------------------------------------*/
839
atarigen_set_ym2151_vol(int volume)840 void atarigen_set_ym2151_vol(int volume)
841 {
842 atarigen_set_vol(volume, "2151");
843 }
844
atarigen_set_ym2413_vol(int volume)845 void atarigen_set_ym2413_vol(int volume)
846 {
847 atarigen_set_vol(volume, "2413");
848 }
849
atarigen_set_pokey_vol(int volume)850 void atarigen_set_pokey_vol(int volume)
851 {
852 atarigen_set_vol(volume, "POKEY");
853 }
854
atarigen_set_tms5220_vol(int volume)855 void atarigen_set_tms5220_vol(int volume)
856 {
857 atarigen_set_vol(volume, "5220");
858 }
859
atarigen_set_oki6295_vol(int volume)860 void atarigen_set_oki6295_vol(int volume)
861 {
862 atarigen_set_vol(volume, "6295");
863 }
864
865
866 /*---------------------------------------------------------------
867 m6502_speedup_r: Handles speeding up the 6502.
868 ---------------------------------------------------------------*/
869
READ_HANDLER(m6502_speedup_r)870 static READ_HANDLER( m6502_speedup_r )
871 {
872 int result = speed_b[0];
873
874 if (activecpu_get_previouspc() == speed_pc && speed_a[0] == speed_a[1] && result == speed_b[1])
875 cpu_spinuntil_int();
876
877 return result;
878 }
879
880
881
882 /*##########################################################################
883 SCANLINE TIMING
884 ##########################################################################*/
885
886 /*---------------------------------------------------------------
887 atarigen_scanline_timer_reset: Sets up the scanline timer.
888 ---------------------------------------------------------------*/
889
atarigen_scanline_timer_reset(atarigen_scanline_callback update_graphics,int frequency)890 void atarigen_scanline_timer_reset(atarigen_scanline_callback update_graphics, int frequency)
891 {
892 /* set the scanline callback */
893 scanline_callback = update_graphics;
894 scanline_callback_period = (double)frequency * cpu_getscanlineperiod();
895 scanlines_per_callback = frequency;
896
897 /* compute the last scanline */
898 last_scanline = (int)(TIME_IN_HZ(Machine->drv->frames_per_second) / cpu_getscanlineperiod());
899
900 /* set a timer to go off on the next VBLANK */
901 timer_set(cpu_getscanlinetime(Machine->drv->screen_height), 0, vblank_timer);
902 }
903
904
905 /*---------------------------------------------------------------
906 vblank_timer: Called once every VBLANK to prime the scanline
907 timers.
908 ---------------------------------------------------------------*/
909
vblank_timer(int param)910 static void vblank_timer(int param)
911 {
912 /* set a timer to go off at scanline 0 */
913 timer_set(TIME_IN_USEC(Machine->drv->vblank_duration), 0, scanline_timer);
914
915 /* set a timer to go off on the next VBLANK */
916 timer_set(cpu_getscanlinetime(Machine->drv->screen_height), 1, vblank_timer);
917 }
918
919
920 /*---------------------------------------------------------------
921 scanline_timer: Called once every n scanlines to generate
922 the periodic callback to the main system.
923 ---------------------------------------------------------------*/
924
scanline_timer(int scanline)925 static void scanline_timer(int scanline)
926 {
927 /* callback */
928 if (scanline_callback)
929 {
930 (*scanline_callback)(scanline);
931
932 /* generate another? */
933 scanline += scanlines_per_callback;
934 if (scanline < last_scanline && scanlines_per_callback)
935 timer_set(scanline_callback_period, scanline, scanline_timer);
936 }
937 }
938
939
940
941 /*##########################################################################
942 VIDEO CONTROLLER
943 ##########################################################################*/
944
945 /*---------------------------------------------------------------
946 atarivc_eof_update: Callback that slurps up data and feeds
947 it into the video controller registers every refresh.
948 ---------------------------------------------------------------*/
949
atarivc_eof_update(int param)950 static void atarivc_eof_update(int param)
951 {
952 atarivc_update(atarivc_eof_data);
953 timer_set(cpu_getscanlinetime(0), 0, atarivc_eof_update);
954 }
955
956
957 /*---------------------------------------------------------------
958 atarivc_reset: Initializes the video controller.
959 ---------------------------------------------------------------*/
960
atarivc_reset(data16_t * eof_data,int playfields)961 void atarivc_reset(data16_t *eof_data, int playfields)
962 {
963 /* this allows us to manually reset eof_data to NULL if it's not used */
964 atarivc_eof_data = eof_data;
965 atarivc_playfields = playfields;
966
967 /* clear the RAM we use */
968 memset(atarivc_data, 0, 0x40);
969 memset(&atarivc_state, 0, sizeof(atarivc_state));
970
971 /* reset the latches */
972 atarivc_state.latch1 = atarivc_state.latch2 = -1;
973 actual_vc_latch0 = actual_vc_latch1 = -1;
974
975 /* start a timer to go off a little before scanline 0 */
976 if (atarivc_eof_data)
977 timer_set(cpu_getscanlinetime(0), 0, atarivc_eof_update);
978 }
979
980
981 /*---------------------------------------------------------------
982 atarivc_update: Copies the data from the specified location
983 once/frame into the video controller registers.
984 ---------------------------------------------------------------*/
985
atarivc_update(const data16_t * data)986 void atarivc_update(const data16_t *data)
987 {
988 int i;
989
990 /* echo all the commands to the video controller */
991 for (i = 0; i < 0x1c; i++)
992 if (data[i])
993 atarivc_common_w(i, data[i]);
994
995 /* update the scroll positions */
996 atarimo_set_xscroll(0, atarivc_state.mo_xscroll);
997 atarimo_set_yscroll(0, atarivc_state.mo_yscroll);
998
999 tilemap_set_scrollx(atarigen_playfield_tilemap, 0, atarivc_state.pf0_xscroll);
1000 tilemap_set_scrolly(atarigen_playfield_tilemap, 0, atarivc_state.pf0_yscroll);
1001
1002 if (atarivc_playfields > 1)
1003 {
1004 tilemap_set_scrollx(atarigen_playfield2_tilemap, 0, atarivc_state.pf1_xscroll);
1005 tilemap_set_scrolly(atarigen_playfield2_tilemap, 0, atarivc_state.pf1_yscroll);
1006 }
1007
1008 /* use this for debugging the video controller values */
1009 #if 0
1010 if (keyboard_pressed(KEYCODE_8))
1011 {
1012 static FILE *out;
1013 if (!out) out = fopen("scroll.log", "w");
1014 if (out)
1015 {
1016 for (i = 0; i < 64; i++)
1017 fprintf(out, "%04X ", data[i]);
1018 fprintf(out, "\n");
1019 }
1020 }
1021 #endif
1022 }
1023
1024
1025 /*---------------------------------------------------------------
1026 atarivc_w: Handles an I/O write to the video controller.
1027 ---------------------------------------------------------------*/
1028
WRITE16_HANDLER(atarivc_w)1029 WRITE16_HANDLER( atarivc_w )
1030 {
1031 int oldword = atarivc_data[offset];
1032 int newword = oldword;
1033
1034 COMBINE_DATA(&newword);
1035 atarivc_common_w(offset, newword);
1036 }
1037
1038
1039
1040 /*---------------------------------------------------------------
1041 atarivc_common_w: Does the bulk of the word for an I/O
1042 write.
1043 ---------------------------------------------------------------*/
1044
atarivc_common_w(offs_t offset,data16_t newword)1045 static void atarivc_common_w(offs_t offset, data16_t newword)
1046 {
1047 int oldword = atarivc_data[offset];
1048 atarivc_data[offset] = newword;
1049
1050 /* switch off the offset */
1051 switch (offset)
1052 {
1053 /*
1054 additional registers:
1055
1056 01 = vertical start (for centering)
1057 04 = horizontal start (for centering)
1058 */
1059
1060 /* set the scanline interrupt here */
1061 case 0x03:
1062 if (oldword != newword)
1063 atarigen_scanline_int_set(newword & 0x1ff);
1064 break;
1065
1066 /* latch enable */
1067 case 0x0a:
1068
1069 /* reset the latches when disabled */
1070 atarigen_set_playfield_latch((newword & 0x0080) ? actual_vc_latch0 : -1);
1071 atarigen_set_playfield2_latch((newword & 0x0080) ? actual_vc_latch1 : -1);
1072
1073 /* check for rowscroll enable */
1074 atarivc_state.rowscroll_enable = (newword & 0x2000) >> 13;
1075
1076 /* check for palette banking */
1077 if (atarivc_state.palette_bank != (((newword & 0x0400) >> 10) ^ 1))
1078 {
1079 force_partial_update(cpu_getscanline());
1080 atarivc_state.palette_bank = ((newword & 0x0400) >> 10) ^ 1;
1081 }
1082 break;
1083
1084 /* indexed parameters */
1085 case 0x10: case 0x11: case 0x12: case 0x13:
1086 case 0x14: case 0x15: case 0x16: case 0x17:
1087 case 0x18: case 0x19: case 0x1a: case 0x1b:
1088 switch (newword & 15)
1089 {
1090 case 9:
1091 atarivc_state.mo_xscroll = (newword >> 7) & 0x1ff;
1092 break;
1093
1094 case 10:
1095 atarivc_state.pf1_xscroll_raw = (newword >> 7) & 0x1ff;
1096 atarivc_update_pf_xscrolls();
1097 break;
1098
1099 case 11:
1100 atarivc_state.pf0_xscroll_raw = (newword >> 7) & 0x1ff;
1101 atarivc_update_pf_xscrolls();
1102 break;
1103
1104 case 13:
1105 atarivc_state.mo_yscroll = (newword >> 7) & 0x1ff;
1106 break;
1107
1108 case 14:
1109 atarivc_state.pf1_yscroll = (newword >> 7) & 0x1ff;
1110 break;
1111
1112 case 15:
1113 atarivc_state.pf0_yscroll = (newword >> 7) & 0x1ff;
1114 break;
1115 }
1116 break;
1117
1118 /* latch 1 value */
1119 case 0x1c:
1120 actual_vc_latch0 = -1;
1121 actual_vc_latch1 = newword;
1122 atarigen_set_playfield_latch((atarivc_data[0x0a] & 0x80) ? actual_vc_latch0 : -1);
1123 atarigen_set_playfield2_latch((atarivc_data[0x0a] & 0x80) ? actual_vc_latch1 : -1);
1124 break;
1125
1126 /* latch 2 value */
1127 case 0x1d:
1128 actual_vc_latch0 = newword;
1129 actual_vc_latch1 = -1;
1130 atarigen_set_playfield_latch((atarivc_data[0x0a] & 0x80) ? actual_vc_latch0 : -1);
1131 atarigen_set_playfield2_latch((atarivc_data[0x0a] & 0x80) ? actual_vc_latch1 : -1);
1132 break;
1133
1134 /* scanline IRQ ack here */
1135 case 0x1e:
1136 atarigen_scanline_int_ack_w(0, 0, 0);
1137 break;
1138
1139 /* log anything else */
1140 case 0x00:
1141 default:
1142 if (oldword != newword)
1143 logerror("vc_w(%02X, %04X) ** [prev=%04X]\n", offset, newword, oldword);
1144 break;
1145 }
1146 }
1147
1148
1149 /*---------------------------------------------------------------
1150 atarivc_r: Handles an I/O read from the video controller.
1151 ---------------------------------------------------------------*/
1152
READ16_HANDLER(atarivc_r)1153 READ16_HANDLER( atarivc_r )
1154 {
1155 logerror("vc_r(%02X)\n", offset);
1156
1157 /* a read from offset 0 returns the current scanline */
1158 /* also sets bit 0x4000 if we're in VBLANK */
1159 if (offset == 0)
1160 {
1161 int result = cpu_getscanline();
1162
1163 if (result > 255)
1164 result = 255;
1165 if (result > Machine->visible_area.max_y)
1166 result |= 0x4000;
1167
1168 return result;
1169 }
1170 else
1171 return atarivc_data[offset];
1172 }
1173
1174
1175
1176 /*##########################################################################
1177 PLAYFIELD/ALPHA MAP HELPERS
1178 ##########################################################################*/
1179
1180 /*---------------------------------------------------------------
1181 atarigen_alpha_w: Generic write handler for alpha RAM.
1182 ---------------------------------------------------------------*/
1183
WRITE16_HANDLER(atarigen_alpha_w)1184 WRITE16_HANDLER( atarigen_alpha_w )
1185 {
1186 COMBINE_DATA(&atarigen_alpha[offset]);
1187 tilemap_mark_tile_dirty(atarigen_alpha_tilemap, offset);
1188 }
1189
WRITE32_HANDLER(atarigen_alpha32_w)1190 WRITE32_HANDLER( atarigen_alpha32_w )
1191 {
1192 COMBINE_DATA(&atarigen_alpha32[offset]);
1193 if ((mem_mask & 0xffff0000) != 0xffff0000)
1194 tilemap_mark_tile_dirty(atarigen_alpha_tilemap, offset * 2);
1195 if ((mem_mask & 0x0000ffff) != 0x0000ffff)
1196 tilemap_mark_tile_dirty(atarigen_alpha_tilemap, offset * 2 + 1);
1197 }
1198
WRITE16_HANDLER(atarigen_alpha2_w)1199 WRITE16_HANDLER( atarigen_alpha2_w )
1200 {
1201 COMBINE_DATA(&atarigen_alpha2[offset]);
1202 tilemap_mark_tile_dirty(atarigen_alpha2_tilemap, offset);
1203 }
1204
1205
1206
1207 /*---------------------------------------------------------------
1208 atarigen_set_playfield_latch: Sets the latch for the latched
1209 playfield handlers below.
1210 ---------------------------------------------------------------*/
1211
atarigen_set_playfield_latch(int data)1212 void atarigen_set_playfield_latch(int data)
1213 {
1214 playfield_latch = data;
1215 }
1216
atarigen_set_playfield2_latch(int data)1217 void atarigen_set_playfield2_latch(int data)
1218 {
1219 playfield2_latch = data;
1220 }
1221
1222
1223
1224 /*---------------------------------------------------------------
1225 atarigen_playfield_w: Generic write handler for PF RAM.
1226 ---------------------------------------------------------------*/
1227
WRITE16_HANDLER(atarigen_playfield_w)1228 WRITE16_HANDLER( atarigen_playfield_w )
1229 {
1230 COMBINE_DATA(&atarigen_playfield[offset]);
1231 tilemap_mark_tile_dirty(atarigen_playfield_tilemap, offset);
1232 }
1233
WRITE32_HANDLER(atarigen_playfield32_w)1234 WRITE32_HANDLER( atarigen_playfield32_w )
1235 {
1236 COMBINE_DATA(&atarigen_playfield32[offset]);
1237 if ((mem_mask & 0xffff0000) != 0xffff0000)
1238 tilemap_mark_tile_dirty(atarigen_playfield_tilemap, offset * 2);
1239 if ((mem_mask & 0x0000ffff) != 0x0000ffff)
1240 tilemap_mark_tile_dirty(atarigen_playfield_tilemap, offset * 2 + 1);
1241 }
1242
WRITE16_HANDLER(atarigen_playfield2_w)1243 WRITE16_HANDLER( atarigen_playfield2_w )
1244 {
1245 COMBINE_DATA(&atarigen_playfield2[offset]);
1246 tilemap_mark_tile_dirty(atarigen_playfield2_tilemap, offset);
1247 }
1248
1249
1250
1251 /*---------------------------------------------------------------
1252 atarigen_playfield_large_w: Generic write handler for
1253 large (2-word) playfield RAM.
1254 ---------------------------------------------------------------*/
1255
WRITE16_HANDLER(atarigen_playfield_large_w)1256 WRITE16_HANDLER( atarigen_playfield_large_w )
1257 {
1258 COMBINE_DATA(&atarigen_playfield[offset]);
1259 tilemap_mark_tile_dirty(atarigen_playfield_tilemap, offset / 2);
1260 }
1261
1262
1263
1264 /*---------------------------------------------------------------
1265 atarigen_playfield_upper_w: Generic write handler for
1266 upper word of split playfield RAM.
1267 ---------------------------------------------------------------*/
1268
WRITE16_HANDLER(atarigen_playfield_upper_w)1269 WRITE16_HANDLER( atarigen_playfield_upper_w )
1270 {
1271 COMBINE_DATA(&atarigen_playfield_upper[offset]);
1272 tilemap_mark_tile_dirty(atarigen_playfield_tilemap, offset);
1273 }
1274
1275
1276
1277 /*---------------------------------------------------------------
1278 atarigen_playfield_dual_upper_w: Generic write handler for
1279 upper word of split dual playfield RAM.
1280 ---------------------------------------------------------------*/
1281
WRITE16_HANDLER(atarigen_playfield_dual_upper_w)1282 WRITE16_HANDLER( atarigen_playfield_dual_upper_w )
1283 {
1284 COMBINE_DATA(&atarigen_playfield_upper[offset]);
1285 tilemap_mark_tile_dirty(atarigen_playfield_tilemap, offset);
1286 tilemap_mark_tile_dirty(atarigen_playfield2_tilemap, offset);
1287 }
1288
1289
1290
1291 /*---------------------------------------------------------------
1292 atarigen_playfield_latched_lsb_w: Generic write handler for
1293 lower word of playfield RAM with a latch in the LSB of the
1294 upper word.
1295 ---------------------------------------------------------------*/
1296
WRITE16_HANDLER(atarigen_playfield_latched_lsb_w)1297 WRITE16_HANDLER( atarigen_playfield_latched_lsb_w )
1298 {
1299 COMBINE_DATA(&atarigen_playfield[offset]);
1300 tilemap_mark_tile_dirty(atarigen_playfield_tilemap, offset);
1301
1302 if (playfield_latch != -1)
1303 atarigen_playfield_upper[offset] = (atarigen_playfield_upper[offset] & ~0x00ff) | (playfield_latch & 0x00ff);
1304 }
1305
1306
1307
1308 /*---------------------------------------------------------------
1309 atarigen_playfield_latched_lsb_w: Generic write handler for
1310 lower word of playfield RAM with a latch in the MSB of the
1311 upper word.
1312 ---------------------------------------------------------------*/
1313
WRITE16_HANDLER(atarigen_playfield_latched_msb_w)1314 WRITE16_HANDLER( atarigen_playfield_latched_msb_w )
1315 {
1316 COMBINE_DATA(&atarigen_playfield[offset]);
1317 tilemap_mark_tile_dirty(atarigen_playfield_tilemap, offset);
1318
1319 if (playfield_latch != -1)
1320 atarigen_playfield_upper[offset] = (atarigen_playfield_upper[offset] & ~0xff00) | (playfield_latch & 0xff00);
1321 }
1322
1323
1324
1325 /*---------------------------------------------------------------
1326 atarigen_playfield_latched_lsb_w: Generic write handler for
1327 lower word of second playfield RAM with a latch in the MSB
1328 of the upper word.
1329 ---------------------------------------------------------------*/
1330
WRITE16_HANDLER(atarigen_playfield2_latched_msb_w)1331 WRITE16_HANDLER( atarigen_playfield2_latched_msb_w )
1332 {
1333 COMBINE_DATA(&atarigen_playfield2[offset]);
1334 tilemap_mark_tile_dirty(atarigen_playfield2_tilemap, offset);
1335
1336 if (playfield2_latch != -1)
1337 atarigen_playfield_upper[offset] = (atarigen_playfield_upper[offset] & ~0xff00) | (playfield2_latch & 0xff00);
1338 }
1339
1340
1341
1342
1343 /*##########################################################################
1344 VIDEO HELPERS
1345 ##########################################################################*/
1346
1347 /*---------------------------------------------------------------
1348 atarigen_get_hblank: Returns a guesstimate about the current
1349 HBLANK state, based on the assumption that HBLANK represents
1350 10% of the scanline period.
1351 ---------------------------------------------------------------*/
1352
atarigen_get_hblank(void)1353 int atarigen_get_hblank(void)
1354 {
1355 return (cpu_gethorzbeampos() > (Machine->drv->screen_width * 9 / 10));
1356 }
1357
1358
1359 /*---------------------------------------------------------------
1360 atarigen_halt_until_hblank_0_w: Halts CPU 0 until the
1361 next HBLANK.
1362 ---------------------------------------------------------------*/
1363
WRITE16_HANDLER(atarigen_halt_until_hblank_0_w)1364 WRITE16_HANDLER( atarigen_halt_until_hblank_0_w )
1365 {
1366 /* halt the CPU until the next HBLANK */
1367 int hpos = cpu_gethorzbeampos();
1368 int hblank = Machine->drv->screen_width * 9 / 10;
1369 double fraction;
1370
1371 /* if we're in hblank, set up for the next one */
1372 if (hpos >= hblank)
1373 hblank += Machine->drv->screen_width;
1374
1375 /* halt and set a timer to wake up */
1376 fraction = (double)(hblank - hpos) / (double)Machine->drv->screen_width;
1377 timer_set(cpu_getscanlineperiod() * fraction, 0, unhalt_cpu);
1378 cpu_set_halt_line(0, ASSERT_LINE);
1379 }
1380
1381
1382 /*---------------------------------------------------------------
1383 atarigen_666_paletteram_w: 6-6-6 RGB palette RAM handler.
1384 ---------------------------------------------------------------*/
1385
WRITE16_HANDLER(atarigen_666_paletteram_w)1386 WRITE16_HANDLER( atarigen_666_paletteram_w )
1387 {
1388 int newword, r, g, b;
1389
1390 COMBINE_DATA(&paletteram16[offset]);
1391 newword = paletteram16[offset];
1392
1393 r = ((newword >> 9) & 0x3e) | ((newword >> 15) & 1);
1394 g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 1);
1395 b = ((newword << 1) & 0x3e) | ((newword >> 15) & 1);
1396
1397 r = (r << 2) | (r >> 4);
1398 g = (g << 2) | (g >> 4);
1399 b = (b << 2) | (b >> 4);
1400
1401 palette_set_color(offset, r, g, b);
1402 }
1403
1404
1405 /*---------------------------------------------------------------
1406 atarigen_expanded_666_paletteram_w: 6-6-6 RGB expanded
1407 palette RAM handler.
1408 ---------------------------------------------------------------*/
1409
WRITE16_HANDLER(atarigen_expanded_666_paletteram_w)1410 WRITE16_HANDLER( atarigen_expanded_666_paletteram_w )
1411 {
1412 COMBINE_DATA(&paletteram16[offset]);
1413
1414 if (ACCESSING_MSB)
1415 {
1416 int palentry = offset / 2;
1417 int newword = (paletteram16[palentry * 2] & 0xff00) | (paletteram16[palentry * 2 + 1] >> 8);
1418
1419 int r, g, b;
1420
1421 r = ((newword >> 9) & 0x3e) | ((newword >> 15) & 1);
1422 g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 1);
1423 b = ((newword << 1) & 0x3e) | ((newword >> 15) & 1);
1424
1425 r = (r << 2) | (r >> 4);
1426 g = (g << 2) | (g >> 4);
1427 b = (b << 2) | (b >> 4);
1428
1429 palette_set_color(palentry & 0x1ff, r, g, b);
1430 }
1431 }
1432
1433
1434 /*---------------------------------------------------------------
1435 atarigen_666_paletteram32_w: 6-6-6 RGB palette RAM handler.
1436 ---------------------------------------------------------------*/
1437
WRITE32_HANDLER(atarigen_666_paletteram32_w)1438 WRITE32_HANDLER( atarigen_666_paletteram32_w )
1439 {
1440 int newword, r, g, b;
1441
1442 COMBINE_DATA(&paletteram32[offset]);
1443
1444 if (ACCESSING_MSW32)
1445 {
1446 newword = paletteram32[offset] >> 16;
1447
1448 r = ((newword >> 9) & 0x3e) | ((newword >> 15) & 1);
1449 g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 1);
1450 b = ((newword << 1) & 0x3e) | ((newword >> 15) & 1);
1451
1452 r = (r << 2) | (r >> 4);
1453 g = (g << 2) | (g >> 4);
1454 b = (b << 2) | (b >> 4);
1455
1456 palette_set_color(offset * 2, r, g, b);
1457 }
1458
1459 if (ACCESSING_LSW32)
1460 {
1461 newword = paletteram32[offset] & 0xffff;
1462
1463 r = ((newword >> 9) & 0x3e) | ((newword >> 15) & 1);
1464 g = ((newword >> 4) & 0x3e) | ((newword >> 15) & 1);
1465 b = ((newword << 1) & 0x3e) | ((newword >> 15) & 1);
1466
1467 r = (r << 2) | (r >> 4);
1468 g = (g << 2) | (g >> 4);
1469 b = (b << 2) | (b >> 4);
1470
1471 palette_set_color(offset * 2 + 1, r, g, b);
1472 }
1473 }
1474
1475
1476 /*---------------------------------------------------------------
1477 unhalt_cpu: Timer callback to release the CPU from a halted state.
1478 ---------------------------------------------------------------*/
1479
unhalt_cpu(int param)1480 static void unhalt_cpu(int param)
1481 {
1482 cpu_set_halt_line(param, CLEAR_LINE);
1483 }
1484
1485
1486
1487 /*##########################################################################
1488 MISC HELPERS
1489 ##########################################################################*/
1490
1491 /*---------------------------------------------------------------
1492 atarigen_swap_mem: Inverts the bits in a region.
1493 ---------------------------------------------------------------*/
1494
atarigen_swap_mem(void * ptr1,void * ptr2,int bytes)1495 void atarigen_swap_mem(void *ptr1, void *ptr2, int bytes)
1496 {
1497 UINT8 *p1 = ptr1;
1498 UINT8 *p2 = ptr2;
1499 while (bytes--)
1500 {
1501 int temp = *p1;
1502 *p1++ = *p2;
1503 *p2++ = temp;
1504 }
1505 }
1506
1507
1508 /*---------------------------------------------------------------
1509 atarigen_blend_gfx: Takes two GFXElements and blends their
1510 data together to form one. Then frees the second.
1511 ---------------------------------------------------------------*/
1512
atarigen_blend_gfx(int gfx0,int gfx1,int mask0,int mask1)1513 void atarigen_blend_gfx(int gfx0, int gfx1, int mask0, int mask1)
1514 {
1515 struct GfxElement *gx0 = Machine->gfx[gfx0];
1516 struct GfxElement *gx1 = Machine->gfx[gfx1];
1517 int c, x, y;
1518
1519 /* loop over elements */
1520 for (c = 0; c < gx0->total_elements; c++)
1521 {
1522 UINT8 *c0base = gx0->gfxdata + gx0->char_modulo * c;
1523 UINT8 *c1base = gx1->gfxdata + gx1->char_modulo * c;
1524 UINT32 usage = 0;
1525
1526 /* loop over height */
1527 for (y = 0; y < gx0->height; y++)
1528 {
1529 UINT8 *c0 = c0base, *c1 = c1base;
1530
1531 for (x = 0; x < gx0->width; x++, c0++, c1++)
1532 {
1533 *c0 = (*c0 & mask0) | (*c1 & mask1);
1534 usage |= 1 << *c0;
1535 }
1536 c0base += gx0->line_modulo;
1537 c1base += gx1->line_modulo;
1538 if (gx0->pen_usage)
1539 gx0->pen_usage[c] = usage;
1540 }
1541 }
1542
1543 /* free the second graphics element */
1544 freegfx(gx1);
1545 Machine->gfx[gfx1] = NULL;
1546 }
1547
1548
1549