1 /*****************************************************************************
2 *
3 * Portable uPD7810/11, 7810H/11H, 78C10/C11/C14 emulator V0.2
4 * Copyright (c) 2001 Juergen Buchmueller, all rights reserved.
5 *
6 * 7810ops.c - opcode functions
7 *
8 *****************************************************************************/
9
illegal(void)10 static void illegal(void)
11 {
12 log_cb(RETRO_LOG_DEBUG, LOGPRE "uPD7810 #%d: illegal opcode %02x at PC:%04x\n", cpu_getactivecpu(), OP, PC);
13 }
14
illegal2(void)15 static void illegal2(void)
16 {
17 log_cb(RETRO_LOG_DEBUG, LOGPRE "uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, OP2, PC);
18 }
19
20 /* prefix 48 */
21
22 /* 48 01: 0100 1000 0000 0001 */
SLRC_A(void)23 static void SLRC_A(void)
24 {
25 PSW = (PSW & ~CY) | (A & CY);
26 A >>= 1;
27 SKIP_CY;
28 }
29
30 /* 48 02: 0100 1000 0000 0010 */
SLRC_B(void)31 static void SLRC_B(void)
32 {
33 PSW = (PSW & ~CY) | (B & CY);
34 B >>= 1;
35 SKIP_CY;
36 }
37
38 /* 48 03: 0100 1000 0000 0011 */
SLRC_C(void)39 static void SLRC_C(void)
40 {
41 PSW = (PSW & ~CY) | (C & CY);
42 C >>= 1;
43 SKIP_CY;
44 }
45
46
47 /* 48 05: 0100 1000 0000 0101 */
SLLC_A(void)48 static void SLLC_A(void)
49 {
50 PSW = (PSW & ~CY) | ((A >> 7) & CY);
51 A <<= 1;
52 SKIP_CY;
53 }
54
55 /* 48 06: 0100 1000 0000 0110 */
SLLC_B(void)56 static void SLLC_B(void)
57 {
58 PSW = (PSW & ~CY) | ((B >> 7) & CY);
59 B <<= 1;
60 SKIP_CY;
61 }
62
63 /* 48 07: 0100 1000 0000 0111 */
SLLC_C(void)64 static void SLLC_C(void)
65 {
66 PSW = (PSW & ~CY) | ((C >> 7) & CY);
67 C <<= 1;
68 SKIP_CY;
69 }
70
71 /* 48 08: 0100 1000 0000 1000 */
SK_NV(void)72 static void SK_NV(void)
73 {
74 /* 48 skip never */
75 }
76
77 /* 48 0a: 0100 1000 0000 1010 */
SK_CY(void)78 static void SK_CY(void)
79 {
80 if (CY == (PSW & CY))
81 PSW |= SK;
82 }
83
84 /* 48 0b: 0100 1000 0000 1011 */
SK_HC(void)85 static void SK_HC(void)
86 {
87 if (HC == (PSW & HC))
88 PSW |= SK;
89 }
90
91 /* 48 0c: 0100 1000 0000 1100 */
SK_Z(void)92 static void SK_Z(void)
93 {
94 if (Z == (PSW & Z))
95 PSW |= SK;
96 }
97
98 /* 48 18: 0100 1000 0001 1000 */
SKN_NV(void)99 static void SKN_NV(void)
100 {
101 /* skip not never -> skip always ;-) */
102 PSW |= SK;
103 }
104
105 /* 48 1a: 0100 1000 0001 1010 */
SKN_CY(void)106 static void SKN_CY(void)
107 {
108 if (0 == (PSW & CY))
109 PSW |= SK;
110 }
111
112 /* 48 1b: 0100 1000 0001 1011 */
SKN_HC(void)113 static void SKN_HC(void)
114 {
115 if (0 == (PSW & HC))
116 PSW |= SK;
117 }
118
119 /* 48 1c: 0100 1000 0001 1100 */
SKN_Z(void)120 static void SKN_Z(void)
121 {
122 if (0 == (PSW & Z))
123 PSW |= SK;
124 }
125
126 /* 48 21: 0100 1000 0010 0001 */
SLR_A(void)127 static void SLR_A(void)
128 {
129 PSW = (PSW & ~CY) | (A & CY);
130 A >>= 1;
131 }
132
133 /* 48 22: 0100 1000 0010 0010 */
SLR_B(void)134 static void SLR_B(void)
135 {
136 PSW = (PSW & ~CY) | (B & CY);
137 B >>= 1;
138 }
139
140 /* 48 23: 0100 1000 0010 0011 */
SLR_C(void)141 static void SLR_C(void)
142 {
143 PSW = (PSW & ~CY) | (C & CY);
144 C >>= 1;
145 }
146
147 /* 48 25: 0100 1000 0010 0101 */
SLL_A(void)148 static void SLL_A(void)
149 {
150 PSW = (PSW & ~CY) | ((A >> 7) & CY);
151 A <<= 1;
152 }
153
154 /* 48 26: 0100 1000 0010 0110 */
SLL_B(void)155 static void SLL_B(void)
156 {
157 PSW = (PSW & ~CY) | ((B >> 7) & CY);
158 B <<= 1;
159 }
160
161 /* 48 27: 0100 1000 0010 0111 */
SLL_C(void)162 static void SLL_C(void)
163 {
164 PSW = (PSW & ~CY) | ((C >> 7) & CY);
165 C <<= 1;
166 }
167
168 /* 48 28: 0100 1000 0010 1000 */
JEA(void)169 static void JEA(void)
170 {
171 PC = EA;
172 change_pc16( PCD );
173 }
174
175 /* 48 29: 0100 1000 0010 1001 */
CALB(void)176 static void CALB(void)
177 {
178 SP--;
179 WM( SPD, PCH );
180 SP--;
181 WM( SPD, PCL );
182
183 PC = BC;
184 change_pc16( PCD );
185 }
186
187 /* 48 2a: 0100 1000 0010 1010 */
CLC(void)188 static void CLC(void)
189 {
190 PSW &= ~CY;
191 }
192
193 /* 48 2b: 0100 1000 0010 1011 */
STC(void)194 static void STC(void)
195 {
196 PSW |= CY;
197 }
198
199 /* 48 2d: 0100 1000 0010 1101 */
MUL_A(void)200 static void MUL_A(void)
201 {
202 EA = A * A;
203 }
204
205 /* 48 2e: 0100 1000 0010 1110 */
MUL_B(void)206 static void MUL_B(void)
207 {
208 EA = A * B;
209 }
210
211 /* 48 2f: 0100 1000 0010 1111 */
MUL_C(void)212 static void MUL_C(void)
213 {
214 EA = A * C;
215 }
216
217 /* 48 31: 0100 1000 0011 0001 */
RLR_A(void)218 static void RLR_A(void)
219 {
220 UINT8 carry=(PSW&CY)<<7;
221 PSW = (PSW & ~CY) | (A & CY);
222 A = (A >> 1) | carry;
223 }
224
225 /* 48 32: 0100 1000 0011 0010 */
RLR_B(void)226 static void RLR_B(void)
227 {
228 UINT8 carry=(PSW&CY)<<7;
229 PSW = (PSW & ~CY) | (B & CY);
230 B = (B >> 1) | carry;
231 }
232
233 /* 48 33: 0100 1000 0011 0011 */
RLR_C(void)234 static void RLR_C(void)
235 {
236 UINT8 carry=(PSW&CY)<<7;
237 PSW = (PSW & ~CY) | (C & CY);
238 C = (C >> 1) | carry;
239 }
240
241 /* 48 35: 0100 1000 0011 0101 */
RLL_A(void)242 static void RLL_A(void)
243 {
244 UINT8 carry=PSW&CY;
245 PSW = (PSW & ~CY) | ((A >> 7) & CY);
246 A = (A << 1) | carry;
247 }
248
249 /* 48 36: 0100 1000 0011 0110 */
RLL_B(void)250 static void RLL_B(void)
251 {
252 UINT8 carry=PSW&CY;
253 PSW = (PSW & ~CY) | ((B >> 7) & CY);
254 B = (B << 1) | carry;
255 }
256
257 /* 48 37: 0100 1000 0011 0111 */
RLL_C(void)258 static void RLL_C(void)
259 {
260 UINT8 carry=PSW&CY;
261 PSW = (PSW & ~CY) | ((C >> 7) & CY);
262 C = (C << 1) | carry;
263 }
264
265 /* 48 38: 0100 1000 0011 1000 */
RLD(void)266 static void RLD(void)
267 {
268 UINT8 m = RM( HL ), tmp;
269 tmp = (m << 4) | (A & 0x0f);
270 A = (A & 0xf0) | (m >> 4);
271 WM( HL, tmp );
272 }
273
274 /* 48 39: 0100 1000 0011 1001 */
RRD(void)275 static void RRD(void)
276 {
277 UINT8 m = RM( HL ), tmp;
278 tmp = (A << 4) | (m >> 4);
279 A = (A & 0xf0) | (m & 0x0f);
280 WM( HL, tmp );
281 }
282
283 /* 48 3a: 0100 1000 0011 1010 */
NEGA(void)284 static void NEGA(void)
285 {
286 A = ~A + 1;
287 }
288
289 /* 48 3b: 0100 1000 0011 1011 */
HALT(void)290 static void HALT(void)
291 {
292 int cycles = (upd7810_icount / 4) * 4;
293 upd7810_icount -= cycles;
294 upd7810_timers(cycles);
295 PC -= 1; /* continue executing HALT */
296 }
297
298 /* 48 3d: 0100 1000 0011 1101 */
DIV_A(void)299 static void DIV_A(void)
300 {
301 if (A)
302 {
303 UINT8 remainder;
304 remainder = EA % A;
305 EA /= A;
306 A = remainder;
307 }
308 else
309 EA = 0xffff; /* guess */
310 }
311
312 /* 48 3e: 0100 1000 0011 1110 */
DIV_B(void)313 static void DIV_B(void)
314 {
315 if (B)
316 {
317 UINT8 remainder;
318 remainder = EA % B;
319 EA /= B;
320 B = remainder;
321 }
322 else
323 EA = 0xffff; /* guess */
324 }
325
326 /* 48 3f: 0100 1000 0011 1111 */
DIV_C(void)327 static void DIV_C(void)
328 {
329 if (C)
330 {
331 UINT8 remainder;
332 remainder = EA % C;
333 EA /= C;
334 C = remainder;
335 }
336 else
337 EA = 0xffff; /* guess */
338 }
339
340 /* 48 40: 0100 1000 0100 0000 */
SKIT_NMI(void)341 static void SKIT_NMI(void)
342 {
343 if (IRR & INTNMI)
344 PSW |= SK;
345 IRR &= ~INTNMI;
346 }
347
348 /* 48 41: 0100 1000 0100 0001 */
SKIT_FT0(void)349 static void SKIT_FT0(void)
350 {
351 if (IRR & INTFT0)
352 PSW |= SK;
353 IRR &= ~INTFT0;
354 }
355
356 /* 48 42: 0100 1000 0100 0010 */
SKIT_FT1(void)357 static void SKIT_FT1(void)
358 {
359 if (IRR & INTFT1)
360 PSW |= SK;
361 IRR &= ~INTFT1;
362 }
363
364 /* 48 43: 0100 1000 0100 0011 */
SKIT_F1(void)365 static void SKIT_F1(void)
366 {
367 if (IRR & INTF1)
368 PSW |= SK;
369 IRR &= ~INTF1;
370 }
371
372 /* 48 44: 0100 1000 0100 0100 */
SKIT_F2(void)373 static void SKIT_F2(void)
374 {
375 if (IRR & INTF2)
376 PSW |= SK;
377 IRR &= ~INTF2;
378 }
379
380 /* 48 45: 0100 1000 0100 0101 */
SKIT_FE0(void)381 static void SKIT_FE0(void)
382 {
383 if (IRR & INTFE0)
384 PSW |= SK;
385 IRR &= ~INTFE0;
386 }
387
388 /* 48 46: 0100 1000 0100 0110 */
SKIT_FE1(void)389 static void SKIT_FE1(void)
390 {
391 if (IRR & INTFE1)
392 PSW |= SK;
393 IRR &= ~INTFE1;
394 }
395
396 /* 48 47: 0100 1000 0100 0111 */
SKIT_FEIN(void)397 static void SKIT_FEIN(void)
398 {
399 if (IRR & INTFEIN)
400 PSW |= SK;
401 IRR &= ~INTFEIN;
402 }
403
404 /* 48 48: 0100 1000 0100 1000 */
SKIT_FAD(void)405 static void SKIT_FAD(void)
406 {
407 if (IRR & INTFAD)
408 PSW |= SK;
409 IRR &= ~INTFAD;
410 }
411
412 /* 48 49: 0100 1000 0100 1001 */
SKIT_FSR(void)413 static void SKIT_FSR(void)
414 {
415 if (IRR & INTFSR)
416 PSW |= SK;
417 IRR &= ~INTFSR;
418 }
419
420 /* 48 4a: 0100 1000 0100 1010 */
SKIT_FST(void)421 static void SKIT_FST(void)
422 {
423 if (IRR & INTFST)
424 PSW |= SK;
425 IRR &= ~INTFST;
426 }
427
428 /* 48 4b: 0100 1000 0100 1011 */
SKIT_ER(void)429 static void SKIT_ER(void)
430 {
431 if (IRR & INTER)
432 PSW |= SK;
433 IRR &= ~INTER;
434 }
435
436 /* 48 4c: 0100 1000 0100 1100 */
SKIT_OV(void)437 static void SKIT_OV(void)
438 {
439 if (IRR & INTOV)
440 PSW |= SK;
441 IRR &= ~INTOV;
442 }
443
444 /* 48 50: 0100 1000 0101 0000 */
SKIT_AN4(void)445 static void SKIT_AN4(void)
446 {
447 if (ITF & INTAN4)
448 PSW |= SK;
449 ITF &= ~INTAN4;
450 }
451
452 /* 48 51: 0100 1000 0101 0001 */
SKIT_AN5(void)453 static void SKIT_AN5(void)
454 {
455 if (ITF & INTAN5)
456 PSW |= SK;
457 ITF &= ~INTAN5;
458 }
459
460 /* 48 52: 0100 1000 0101 0010 */
SKIT_AN6(void)461 static void SKIT_AN6(void)
462 {
463 if (ITF & INTAN6)
464 PSW |= SK;
465 ITF &= ~INTAN6;
466 }
467
468 /* 48 53: 0100 1000 0101 0011 */
SKIT_AN7(void)469 static void SKIT_AN7(void)
470 {
471 if (ITF & INTAN7)
472 PSW |= SK;
473 ITF &= ~INTAN7;
474 }
475
476 /* 48 54: 0100 1000 0101 0100 */
SKIT_SB(void)477 static void SKIT_SB(void)
478 {
479 if (ITF & INTSB)
480 PSW |= SK;
481 ITF &= ~INTSB;
482 }
483
484 /* 48 60: 0100 1000 0110 0000 */
SKNIT_NMI(void)485 static void SKNIT_NMI(void)
486 {
487 if (0 == (IRR & INTNMI))
488 PSW |= SK;
489 IRR &= ~INTNMI;
490 }
491
492 /* 48 61: 0100 1000 0110 0001 */
SKNIT_FT0(void)493 static void SKNIT_FT0(void)
494 {
495 if (0 == (IRR & INTFT0))
496 PSW |= SK;
497 IRR &= ~INTFT0;
498 }
499
500 /* 48 62: 0100 1000 0110 0010 */
SKNIT_FT1(void)501 static void SKNIT_FT1(void)
502 {
503 if (0 == (IRR & INTFT1))
504 PSW |= SK;
505 IRR &= ~INTFT1;
506 }
507
508 /* 48 63: 0100 1000 0110 0011 */
SKNIT_F1(void)509 static void SKNIT_F1(void)
510 {
511 if (0 == (IRR & INTF1))
512 PSW |= SK;
513 IRR &= ~INTF1;
514 }
515
516 /* 48 64: 0100 1000 0110 0100 */
SKNIT_F2(void)517 static void SKNIT_F2(void)
518 {
519 if (0 == (IRR & INTF2))
520 PSW |= SK;
521 IRR &= ~INTF2;
522 }
523
524 /* 48 65: 0100 1000 0110 0101 */
SKNIT_FE0(void)525 static void SKNIT_FE0(void)
526 {
527 if (0 == (IRR & INTFE0))
528 PSW |= SK;
529 IRR &= ~INTFE0;
530 }
531
532 /* 48 66: 0100 1000 0110 0110 */
SKNIT_FE1(void)533 static void SKNIT_FE1(void)
534 {
535 if (0 == (IRR & INTFE1))
536 PSW |= SK;
537 IRR &= ~INTFE1;
538 }
539
540 /* 48 67: 0100 1000 0110 0111 */
SKNIT_FEIN(void)541 static void SKNIT_FEIN(void)
542 {
543 if (0 == (IRR & INTFEIN))
544 PSW |= SK;
545 IRR &= ~INTFEIN;
546 }
547
548 /* 48 68: 0100 1000 0110 1000 */
SKNIT_FAD(void)549 static void SKNIT_FAD(void)
550 {
551 if (0 == (IRR & INTFAD))
552 PSW |= SK;
553 IRR &= ~INTFAD;
554 }
555
556 /* 48 69: 0100 1000 0110 1001 */
SKNIT_FSR(void)557 static void SKNIT_FSR(void)
558 {
559 if (0 == (IRR & INTFSR))
560 PSW |= SK;
561 IRR &= ~INTFSR;
562 }
563
564 /* 48 6a: 0100 1000 0110 1010 */
SKNIT_FST(void)565 static void SKNIT_FST(void)
566 {
567 if (0 == (IRR & INTFST))
568 PSW |= SK;
569 IRR &= ~INTFST;
570 }
571
572 /* 48 6b: 0100 1000 0110 1011 */
SKNIT_ER(void)573 static void SKNIT_ER(void)
574 {
575 if (0 == (IRR & INTER))
576 PSW |= SK;
577 IRR &= ~INTER;
578 }
579
580 /* 48 6c: 0100 1000 0110 1100 */
SKNIT_OV(void)581 static void SKNIT_OV(void)
582 {
583 if (0 == (IRR & INTOV))
584 PSW |= SK;
585 IRR &= ~INTOV;
586 }
587
588 /* 48 70: 0100 1000 0111 0000 */
SKNIT_AN4(void)589 static void SKNIT_AN4(void)
590 {
591 if (0 == (ITF & INTAN4))
592 PSW |= SK;
593 ITF &= ~INTAN4;
594 }
595
596 /* 48 71: 0100 1000 0111 0001 */
SKNIT_AN5(void)597 static void SKNIT_AN5(void)
598 {
599 if (0 == (ITF & INTAN5))
600 PSW |= SK;
601 ITF &= ~INTAN5;
602 }
603
604 /* 48 72: 0100 1000 0111 0010 */
SKNIT_AN6(void)605 static void SKNIT_AN6(void)
606 {
607 if (0 == (ITF & INTAN6))
608 PSW |= SK;
609 ITF &= ~INTAN6;
610 }
611
612 /* 48 73: 0100 1000 0111 0011 */
SKNIT_AN7(void)613 static void SKNIT_AN7(void)
614 {
615 if (0 == (ITF & INTAN7))
616 PSW |= SK;
617 ITF &= ~INTAN7;
618 }
619
620 /* 48 74: 0100 1000 0111 0100 */
SKNIT_SB(void)621 static void SKNIT_SB(void)
622 {
623 if (0 == (ITF & INTSB))
624 PSW |= SK;
625 ITF &= ~INTSB;
626 }
627
628 /* 48 82: 0100 1000 1000 0010 */
LDEAX_D(void)629 static void LDEAX_D(void)
630 {
631 EAL = RM( DE );
632 EAH = RM( DE + 1 );
633 }
634
635 /* 48 83: 0100 1000 1000 0011 */
LDEAX_H(void)636 static void LDEAX_H(void)
637 {
638 EAL = RM( HL );
639 EAH = RM( HL + 1 );
640 }
641
642 /* 48 84: 0100 1000 1000 0100 */
LDEAX_Dp(void)643 static void LDEAX_Dp(void)
644 {
645 EAL = RM( DE );
646 EAH = RM( DE + 1 );
647 DE += 2;
648 }
649
650 /* 48 85: 0100 1000 1000 0101 */
LDEAX_Hp(void)651 static void LDEAX_Hp(void)
652 {
653 EAL = RM( HL );
654 EAH = RM( HL + 1 );
655 HL += 2;
656 }
657
658 /* 48 8b: 0100 1000 1000 1011 xxxx xxxx */
LDEAX_D_xx(void)659 static void LDEAX_D_xx(void)
660 {
661 UINT16 ea;
662 RDOPARG( ea );
663 ea += DE;
664 EAL = RM( ea );
665 EAH = RM( ea + 1 );
666 }
667
668 /* 48 8c: 0100 1000 1000 1100 */
LDEAX_H_A(void)669 static void LDEAX_H_A(void)
670 {
671 UINT16 ea = HL + A;
672 EAL = RM( ea );
673 EAH = RM( ea + 1 );
674 }
675
676 /* 48 8d: 0100 1000 1000 1101 */
LDEAX_H_B(void)677 static void LDEAX_H_B(void)
678 {
679 UINT16 ea = HL + B;
680 EAL = RM( ea );
681 EAH = RM( ea + 1 );
682 }
683
684 /* 48 8e: 0100 1000 1000 1110 */
LDEAX_H_EA(void)685 static void LDEAX_H_EA(void)
686 {
687 UINT16 ea = HL + EA;
688 EAL = RM( ea );
689 EAH = RM( ea + 1 );
690 }
691
692 /* 48 8f: 0100 1000 1000 1111 xxxx xxxx */
LDEAX_H_xx(void)693 static void LDEAX_H_xx(void)
694 {
695 UINT16 ea;
696 RDOPARG( ea );
697 ea += HL;
698 EAL = RM( ea );
699 EAH = RM( ea + 1 );
700 }
701
702 /* 48 92: 0100 1000 1000 0010 */
STEAX_D(void)703 static void STEAX_D(void)
704 {
705 WM( DE, EAL );
706 WM( DE + 1, EAH );
707 }
708
709 /* 48 93: 0100 1000 1000 0011 */
STEAX_H(void)710 static void STEAX_H(void)
711 {
712 WM( HL, EAL );
713 WM( HL + 1, EAH );
714 }
715
716 /* 48 94: 0100 1000 1000 0100 */
STEAX_Dp(void)717 static void STEAX_Dp(void)
718 {
719 WM( DE, EAL );
720 WM( DE + 1, EAH );
721 DE += 2;
722 }
723
724 /* 48 95: 0100 1000 1000 0101 */
STEAX_Hp(void)725 static void STEAX_Hp(void)
726 {
727 WM( HL, EAL );
728 WM( HL + 1, EAH );
729 HL += 2;
730 }
731
732 /* 48 9b: 0100 1000 1000 1011 xxxx xxxx */
STEAX_D_xx(void)733 static void STEAX_D_xx(void)
734 {
735 UINT16 ea;
736 RDOPARG( ea );
737 ea += DE;
738 WM( ea, EAL );
739 WM( ea + 1, EAH );
740 }
741
742 /* 48 9c: 0100 1000 1000 1100 */
STEAX_H_A(void)743 static void STEAX_H_A(void)
744 {
745 UINT16 ea = HL + A;
746 WM( ea, EAL );
747 WM( ea + 1, EAH );
748 }
749
750 /* 48 9d: 0100 1000 1000 1101 */
STEAX_H_B(void)751 static void STEAX_H_B(void)
752 {
753 UINT16 ea = HL + B;
754 WM( ea, EAL );
755 WM( ea + 1, EAH );
756 }
757
758 /* 48 9e: 0100 1000 1000 1110 */
STEAX_H_EA(void)759 static void STEAX_H_EA(void)
760 {
761 UINT16 ea = HL + EA;
762 WM( ea, EAL );
763 WM( ea + 1, EAH );
764 }
765
766 /* 48 9f: 0100 1000 1000 1111 xxxx xxxx */
STEAX_H_xx(void)767 static void STEAX_H_xx(void)
768 {
769 UINT16 ea;
770 RDOPARG( ea );
771 ea += HL;
772 WM( ea, EAL );
773 WM( ea + 1, EAH );
774 }
775
776 /* 48 a0: 0100 1000 1010 0000 */
DSLR_EA(void)777 static void DSLR_EA(void)
778 {
779 PSW = (PSW & ~CY) | (EA & CY);
780 EA >>= 1;
781 }
782
783 /* 48 a4: 0100 1000 1010 0100 */
DSLL_EA(void)784 static void DSLL_EA(void)
785 {
786 PSW = (PSW & ~CY) | ((EA >> 15) & CY);
787 EA <<= 1;
788 }
789
790 /* 48 a8: 0100 1000 1010 1000 */
TABLE(void)791 static void TABLE(void)
792 {
793 UINT16 ea = PC + A + 1;
794 C = RM( ea );
795 B = RM( ea + 1 );
796 }
797
798 /* 48 b0: 0100 1000 1011 0000 */
DRLR_EA(void)799 static void DRLR_EA(void)
800 {
801 UINT8 carry=PSW&CY;
802 PSW = (PSW & ~CY) | (EA & CY);
803 EA = (EA >> 1) | (carry << 15);
804 }
805
806 /* 48 b4: 0100 1000 1011 0100 */
DRLL_EA(void)807 static void DRLL_EA(void)
808 {
809 UINT8 carry=PSW&CY;
810 PSW = (PSW & ~CY) | ((EA >> 15) & CY);
811 EA = (EA << 1) | carry;
812 }
813
814 /* 48 bb: 0100 1000 1011 1011 */
STOP(void)815 static void STOP(void)
816 {
817 int cycles = (upd7810_icount / 4) * 4;
818 upd7810_icount -= cycles;
819 upd7810_timers(cycles);
820 PC -= 1;
821 }
822
823 /* 48 c0: 0100 1000 1100 0000 */
DMOV_EA_ECNT(void)824 static void DMOV_EA_ECNT(void)
825 {
826 EA = ECNT;
827 }
828
829 /* 48 c1: 0100 1000 1100 0001 */
DMOV_EA_ECPT(void)830 static void DMOV_EA_ECPT(void)
831 {
832 EA = ECPT;
833 }
834
835 /* 48 d2: 0100 1000 1101 0010 */
DMOV_ETM0_EA(void)836 static void DMOV_ETM0_EA(void)
837 {
838 ETM0 = EA;
839 }
840
841 /* 48 d3: 0100 1000 1101 0011 */
DMOV_ETM1_EA(void)842 static void DMOV_ETM1_EA(void)
843 {
844 ETM1 = EA;
845 }
846
847 /* prefix 4C */
848 /* 4c c0: 0100 1100 1100 0000 */
MOV_A_PA(void)849 static void MOV_A_PA(void)
850 {
851 A = RP( UPD7810_PORTA );
852 }
853
854 /* 4c c1: 0100 1100 1100 0001 */
MOV_A_PB(void)855 static void MOV_A_PB(void)
856 {
857 A = RP( UPD7810_PORTB );
858 }
859
860 /* 4c c2: 0100 1100 1100 0010 */
MOV_A_PC(void)861 static void MOV_A_PC(void)
862 {
863 A = RP( UPD7810_PORTC );
864 }
865
866 /* 4c c3: 0100 1100 1100 0011 */
MOV_A_PD(void)867 static void MOV_A_PD(void)
868 {
869 A = RP( UPD7810_PORTD );
870 }
871
872 /* 4c c5: 0100 1100 1100 0101 */
MOV_A_PF(void)873 static void MOV_A_PF(void)
874 {
875 A = RP( UPD7810_PORTF );
876 }
877
878 /* 4c c6: 0100 1100 1100 0110 */
MOV_A_MKH(void)879 static void MOV_A_MKH(void)
880 {
881 A = MKH;
882 }
883
884 /* 4c c7: 0100 1100 1100 0111 */
MOV_A_MKL(void)885 static void MOV_A_MKL(void)
886 {
887 A = MKL;
888 }
889
890 /* 4c c8: 0100 1100 1100 1000 */
MOV_A_ANM(void)891 static void MOV_A_ANM(void)
892 {
893 A = ANM;
894 }
895
896 /* 4c c9: 0100 1100 1100 1001 */
MOV_A_SMH(void)897 static void MOV_A_SMH(void)
898 {
899 A = SMH;
900 }
901
902 /* 4c cb: 0100 1100 1100 1011 */
MOV_A_EOM(void)903 static void MOV_A_EOM(void)
904 {
905 /* only bits #1 and #5 can be read */
906 UINT8 eom = EOM & 0x22;
907 A = eom;
908 }
909
910 /* 4c cd: 0100 1100 1100 1101 */
MOV_A_TMM(void)911 static void MOV_A_TMM(void)
912 {
913 A = TMM;
914 }
915
916 /* 4c ce: 0100 1100 1110 0000 (7807 only) */
MOV_A_PT(void)917 static void MOV_A_PT(void)
918 {
919 A = RP( UPD7807_PORTT );
920 }
921
922 /* 4c d9: 0100 1100 1101 1001 */
MOV_A_RXB(void)923 static void MOV_A_RXB(void)
924 {
925 A = RXB;
926 }
927
928 /* 4c e0: 0100 1100 1110 0000 */
MOV_A_CR0(void)929 static void MOV_A_CR0(void)
930 {
931 A = CR0;
932 }
933
934 /* 4c e1: 0100 1100 1110 0001 */
MOV_A_CR1(void)935 static void MOV_A_CR1(void)
936 {
937 A = CR1;
938 }
939
940 /* 4c e2: 0100 1100 1110 0010 */
MOV_A_CR2(void)941 static void MOV_A_CR2(void)
942 {
943 A = CR2;
944 }
945
946 /* 4c e3: 0100 1100 1110 0011 */
MOV_A_CR3(void)947 static void MOV_A_CR3(void)
948 {
949 A = CR3;
950 }
951
952 /* prefix 4D */
953 /* 4d c0: 0100 1101 1100 0000 */
MOV_PA_A(void)954 static void MOV_PA_A(void)
955 {
956 WP( UPD7810_PORTA, A );
957 }
958
959 /* 4d c1: 0100 1101 1100 0001 */
MOV_PB_A(void)960 static void MOV_PB_A(void)
961 {
962 WP( UPD7810_PORTB, A );
963 }
964
965 /* 4d c2: 0100 1101 1100 0010 */
MOV_PC_A(void)966 static void MOV_PC_A(void)
967 {
968 WP( UPD7810_PORTC, A );
969 }
970
971 /* 4d c3: 0100 1101 1100 0011 */
MOV_PD_A(void)972 static void MOV_PD_A(void)
973 {
974 WP( UPD7810_PORTD, A );
975 }
976
977 /* 4d c5: 0100 1101 1100 0101 */
MOV_PF_A(void)978 static void MOV_PF_A(void)
979 {
980 WP( UPD7810_PORTF, A );
981 }
982
983 /* 4d c6: 0100 1101 1100 0110 */
MOV_MKH_A(void)984 static void MOV_MKH_A(void)
985 {
986 MKH = A;
987 }
988
989 /* 4d c7: 0100 1101 1100 0111 */
MOV_MKL_A(void)990 static void MOV_MKL_A(void)
991 {
992 MKL = A;
993 }
994
995 /* 4d c8: 0100 1101 1100 1000 */
MOV_ANM_A(void)996 static void MOV_ANM_A(void)
997 {
998 ANM = A;
999 }
1000
1001 /* 4d c9: 0100 1101 1100 1001 */
MOV_SMH_A(void)1002 static void MOV_SMH_A(void)
1003 {
1004 SMH = A;
1005 }
1006
1007 /* 4d ca: 0100 1101 1100 1010 */
MOV_SML_A(void)1008 static void MOV_SML_A(void)
1009 {
1010 SML = A;
1011 }
1012
1013 /* 4d cb: 0100 1101 1100 1011 */
MOV_EOM_A(void)1014 static void MOV_EOM_A(void)
1015 {
1016 EOM = A;
1017 upd7810_write_EOM();
1018 }
1019
1020 /* 4d cc: 0100 1101 1100 1100 */
MOV_ETMM_A(void)1021 static void MOV_ETMM_A(void)
1022 {
1023 ETMM = A;
1024 }
1025
1026 /* 4d cd: 0100 1101 1100 1101 */
MOV_TMM_A(void)1027 static void MOV_TMM_A(void)
1028 {
1029 TMM = A;
1030 }
1031
1032 /* 4d d0: 0100 1101 1101 0000 */
MOV_MM_A(void)1033 static void MOV_MM_A(void)
1034 {
1035 MM = A;
1036 }
1037
1038 /* 4d d1: 0100 1101 1101 0001 */
MOV_MCC_A(void)1039 static void MOV_MCC_A(void)
1040 {
1041 MCC = A;
1042 }
1043
1044 /* 4d d2: 0100 1101 1101 0010 */
MOV_MA_A(void)1045 static void MOV_MA_A(void)
1046 {
1047 MA = A;
1048 }
1049
1050 /* 4d d3: 0100 1101 1101 0011 */
MOV_MB_A(void)1051 static void MOV_MB_A(void)
1052 {
1053 MB = A;
1054 }
1055
1056 /* 4d d4: 0100 1101 1101 0100 */
MOV_MC_A(void)1057 static void MOV_MC_A(void)
1058 {
1059 MC = A;
1060 }
1061
1062 /* 4d d7: 0100 1101 1101 0111 */
MOV_MF_A(void)1063 static void MOV_MF_A(void)
1064 {
1065 MF = A;
1066 }
1067
1068 /* 4d d8: 0100 1101 1101 1000 */
MOV_TXB_A(void)1069 static void MOV_TXB_A(void)
1070 {
1071 TXB = A;
1072 upd7810_write_TXB();
1073 }
1074
1075 /* 4d da: 0100 1101 1101 1010 */
MOV_TM0_A(void)1076 static void MOV_TM0_A(void)
1077 {
1078 TM0 = A;
1079 }
1080
1081 /* 4d db: 0100 1101 1101 1011 */
MOV_TM1_A(void)1082 static void MOV_TM1_A(void)
1083 {
1084 TM1 = A;
1085 }
1086
1087 /* 4d e8: 0100 1101 1110 1000 */
MOV_ZCM_A(void)1088 static void MOV_ZCM_A(void)
1089 {
1090 ZCM = A;
1091 }
1092
1093 /* prefix 60 */
1094 /* 60 08: 0110 0000 0000 1000 */
ANA_V_A(void)1095 static void ANA_V_A(void)
1096 {
1097 V &= A;
1098 SET_Z(V);
1099 }
1100
1101 /* 60 09: 0110 0000 0000 1001 */
ANA_A_A(void)1102 static void ANA_A_A(void)
1103 {
1104 A &= A;
1105 SET_Z(A);
1106 }
1107
1108 /* 60 0a: 0110 0000 0000 1010 */
ANA_B_A(void)1109 static void ANA_B_A(void)
1110 {
1111 B &= A;
1112 SET_Z(B);
1113 }
1114
1115 /* 60 0b: 0110 0000 0000 1011 */
ANA_C_A(void)1116 static void ANA_C_A(void)
1117 {
1118 C &= A;
1119 SET_Z(C);
1120 }
1121
1122 /* 60 0c: 0110 0000 0000 1100 */
ANA_D_A(void)1123 static void ANA_D_A(void)
1124 {
1125 D &= A;
1126 SET_Z(D);
1127 }
1128
1129 /* 60 0d: 0110 0000 0000 1101 */
ANA_E_A(void)1130 static void ANA_E_A(void)
1131 {
1132 E &= A;
1133 SET_Z(E);
1134 }
1135
1136 /* 60 0e: 0110 0000 0000 1110 */
ANA_H_A(void)1137 static void ANA_H_A(void)
1138 {
1139 H &= A;
1140 SET_Z(H);
1141 }
1142
1143 /* 60 0f: 0110 0000 0000 1111 */
ANA_L_A(void)1144 static void ANA_L_A(void)
1145 {
1146 L &= A;
1147 SET_Z(L);
1148 }
1149
1150 /* 60 10: 0110 0000 0001 0000 */
XRA_V_A(void)1151 static void XRA_V_A(void)
1152 {
1153 V ^= A;
1154 SET_Z(V);
1155 }
1156
1157 /* 60 11: 0110 0000 0001 0001 */
XRA_A_A(void)1158 static void XRA_A_A(void)
1159 {
1160 A ^= A;
1161 SET_Z(A);
1162 }
1163
1164 /* 60 12: 0110 0000 0001 0010 */
XRA_B_A(void)1165 static void XRA_B_A(void)
1166 {
1167 B ^= A;
1168 SET_Z(B);
1169 }
1170
1171 /* 60 13: 0110 0000 0001 0011 */
XRA_C_A(void)1172 static void XRA_C_A(void)
1173 {
1174 C ^= A;
1175 SET_Z(C);
1176 }
1177
1178 /* 60 14: 0110 0000 0001 0100 */
XRA_D_A(void)1179 static void XRA_D_A(void)
1180 {
1181 D ^= A;
1182 SET_Z(D);
1183 }
1184
1185 /* 60 15: 0110 0000 0001 0101 */
XRA_E_A(void)1186 static void XRA_E_A(void)
1187 {
1188 E ^= A;
1189 SET_Z(E);
1190 }
1191
1192 /* 60 16: 0110 0000 0001 0110 */
XRA_H_A(void)1193 static void XRA_H_A(void)
1194 {
1195 H ^= A;
1196 SET_Z(H);
1197 }
1198
1199 /* 60 17: 0110 0000 0001 0111 */
XRA_L_A(void)1200 static void XRA_L_A(void)
1201 {
1202 L ^= A;
1203 SET_Z(L);
1204 }
1205
1206 /* 60 18: 0110 0000 0001 1000 */
ORA_V_A(void)1207 static void ORA_V_A(void)
1208 {
1209 V |= A;
1210 SET_Z(V);
1211 }
1212
1213 /* 60 19: 0110 0000 0001 1001 */
ORA_A_A(void)1214 static void ORA_A_A(void)
1215 {
1216 A |= A;
1217 SET_Z(A);
1218 }
1219
1220 /* 60 1a: 0110 0000 0001 1010 */
ORA_B_A(void)1221 static void ORA_B_A(void)
1222 {
1223 B |= A;
1224 SET_Z(B);
1225 }
1226
1227 /* 60 1b: 0110 0000 0001 1011 */
ORA_C_A(void)1228 static void ORA_C_A(void)
1229 {
1230 C |= A;
1231 SET_Z(C);
1232 }
1233
1234 /* 60 1c: 0110 0000 0001 1100 */
ORA_D_A(void)1235 static void ORA_D_A(void)
1236 {
1237 D |= A;
1238 SET_Z(D);
1239 }
1240
1241 /* 60 1d: 0110 0000 0001 1101 */
ORA_E_A(void)1242 static void ORA_E_A(void)
1243 {
1244 E |= A;
1245 SET_Z(E);
1246 }
1247
1248 /* 60 1e: 0110 0000 0001 1110 */
ORA_H_A(void)1249 static void ORA_H_A(void)
1250 {
1251 H |= A;
1252 SET_Z(H);
1253 }
1254
1255 /* 60 1f: 0110 0000 0001 1111 */
ORA_L_A(void)1256 static void ORA_L_A(void)
1257 {
1258 L |= A;
1259 SET_Z(L);
1260 }
1261
1262 /* 60 20: 0110 0000 0010 0000 */
ADDNC_V_A(void)1263 static void ADDNC_V_A(void)
1264 {
1265 UINT8 tmp = V + A;
1266 ZHC_ADD( tmp, V, 0 );
1267 V = tmp;
1268 SKIP_NC;
1269 }
1270
1271 /* 60 21: 0110 0000 0010 0001 */
ADDNC_A_A(void)1272 static void ADDNC_A_A(void)
1273 {
1274 UINT8 tmp = A + A;
1275 ZHC_ADD( tmp, A, 0 );
1276 A = tmp;
1277 SKIP_NC;
1278 }
1279
1280 /* 60 22: 0110 0000 0010 0010 */
ADDNC_B_A(void)1281 static void ADDNC_B_A(void)
1282 {
1283 UINT8 tmp = B + A;
1284 ZHC_ADD( tmp, B, 0 );
1285 B = tmp;
1286 SKIP_NC;
1287 }
1288
1289 /* 60 23: 0110 0000 0010 0011 */
ADDNC_C_A(void)1290 static void ADDNC_C_A(void)
1291 {
1292 UINT8 tmp = C + A;
1293 ZHC_ADD( tmp, C, 0 );
1294 C = tmp;
1295 SKIP_NC;
1296 }
1297
1298 /* 60 24: 0110 0000 0010 0100 */
ADDNC_D_A(void)1299 static void ADDNC_D_A(void)
1300 {
1301 UINT8 tmp = D + A;
1302 ZHC_ADD( tmp, D, 0 );
1303 D = tmp;
1304 SKIP_NC;
1305 }
1306
1307 /* 60 25: 0110 0000 0010 0101 */
ADDNC_E_A(void)1308 static void ADDNC_E_A(void)
1309 {
1310 UINT8 tmp = E + A;
1311 ZHC_ADD( tmp, E, 0 );
1312 E = tmp;
1313 SKIP_NC;
1314 }
1315
1316 /* 60 26: 0110 0000 0010 0110 */
ADDNC_H_A(void)1317 static void ADDNC_H_A(void)
1318 {
1319 UINT8 tmp = H + A;
1320 ZHC_ADD( tmp, H, 0 );
1321 H = tmp;
1322 SKIP_NC;
1323 }
1324
1325 /* 60 27: 0110 0000 0010 0111 */
ADDNC_L_A(void)1326 static void ADDNC_L_A(void)
1327 {
1328 UINT8 tmp = L + A;
1329 ZHC_ADD( tmp, L, 0 );
1330 L = tmp;
1331 SKIP_NC;
1332 }
1333
1334 /* 60 28: 0110 0000 0010 1000 */
GTA_V_A(void)1335 static void GTA_V_A(void)
1336 {
1337 UINT16 tmp = V - A - 1;
1338 ZHC_SUB( tmp, V, 0 );
1339 SKIP_NC;
1340 }
1341
1342 /* 60 29: 0110 0000 0010 1001 */
GTA_A_A(void)1343 static void GTA_A_A(void)
1344 {
1345 UINT16 tmp = A - A - 1;
1346 ZHC_SUB( tmp, A, 0 );
1347 SKIP_NC;
1348 }
1349
1350 /* 60 2a: 0110 0000 0010 1010 */
GTA_B_A(void)1351 static void GTA_B_A(void)
1352 {
1353 UINT16 tmp = B - A - 1;
1354 ZHC_SUB( tmp, B, 0 );
1355 SKIP_NC;
1356 }
1357
1358 /* 60 2b: 0110 0000 0010 1011 */
GTA_C_A(void)1359 static void GTA_C_A(void)
1360 {
1361 UINT16 tmp = C - A - 1;
1362 ZHC_SUB( tmp, C, 0 );
1363 SKIP_NC;
1364 }
1365
1366 /* 60 2c: 0110 0000 0010 1100 */
GTA_D_A(void)1367 static void GTA_D_A(void)
1368 {
1369 UINT16 tmp = D - A - 1;
1370 ZHC_SUB( tmp, D, 0 );
1371 SKIP_NC;
1372 }
1373
1374 /* 60 2d: 0110 0000 0010 1101 */
GTA_E_A(void)1375 static void GTA_E_A(void)
1376 {
1377 UINT16 tmp = E - A - 1;
1378 ZHC_SUB( tmp, E, 0 );
1379 SKIP_NC;
1380 }
1381
1382 /* 60 2e: 0110 0000 0010 1110 */
GTA_H_A(void)1383 static void GTA_H_A(void)
1384 {
1385 UINT16 tmp = H - A - 1;
1386 ZHC_SUB( tmp, H, 0 );
1387 SKIP_NC;
1388 }
1389
1390 /* 60 2f: 0110 0000 0010 1111 */
GTA_L_A(void)1391 static void GTA_L_A(void)
1392 {
1393 UINT16 tmp = L - A - 1;
1394 ZHC_SUB( tmp, L, 0 );
1395 SKIP_NC;
1396 }
1397
1398 /* 60 30: 0110 0000 0011 0000 */
SUBNB_V_A(void)1399 static void SUBNB_V_A(void)
1400 {
1401 UINT8 tmp = V - A;
1402 ZHC_SUB( tmp, V, 0 );
1403 V = tmp;
1404 SKIP_NC;
1405 }
1406
1407 /* 60 31: 0110 0000 0011 0001 */
SUBNB_A_A(void)1408 static void SUBNB_A_A(void)
1409 {
1410 UINT8 tmp = A - A;
1411 ZHC_SUB( tmp, A, 0 );
1412 A = tmp;
1413 SKIP_NC;
1414 }
1415
1416 /* 60 32: 0110 0000 0011 0010 */
SUBNB_B_A(void)1417 static void SUBNB_B_A(void)
1418 {
1419 UINT8 tmp = B - A;
1420 ZHC_SUB( tmp, B, 0 );
1421 B = tmp;
1422 SKIP_NC;
1423 }
1424
1425 /* 60 33: 0110 0000 0011 0011 */
SUBNB_C_A(void)1426 static void SUBNB_C_A(void)
1427 {
1428 UINT8 tmp = C - A;
1429 ZHC_SUB( tmp, C, 0 );
1430 C = tmp;
1431 SKIP_NC;
1432 }
1433
1434 /* 60 34: 0110 0000 0011 0100 */
SUBNB_D_A(void)1435 static void SUBNB_D_A(void)
1436 {
1437 UINT8 tmp = D - A;
1438 ZHC_SUB( tmp, D, 0 );
1439 D = tmp;
1440 SKIP_NC;
1441 }
1442
1443 /* 60 35: 0110 0000 0011 0101 */
SUBNB_E_A(void)1444 static void SUBNB_E_A(void)
1445 {
1446 UINT8 tmp = E - A;
1447 ZHC_SUB( tmp, E, 0 );
1448 E = tmp;
1449 SKIP_NC;
1450 }
1451
1452 /* 60 36: 0110 0000 0011 0110 */
SUBNB_H_A(void)1453 static void SUBNB_H_A(void)
1454 {
1455 UINT8 tmp = H - A;
1456 ZHC_SUB( tmp, H, 0 );
1457 H = tmp;
1458 SKIP_NC;
1459 }
1460
1461 /* 60 37: 0110 0000 0011 0111 */
SUBNB_L_A(void)1462 static void SUBNB_L_A(void)
1463 {
1464 UINT8 tmp = L - A;
1465 ZHC_SUB( tmp, L, 0 );
1466 L = tmp;
1467 SKIP_NC;
1468 }
1469
1470 /* 60 38: 0110 0000 0011 1000 */
LTA_V_A(void)1471 static void LTA_V_A(void)
1472 {
1473 UINT8 tmp = V - A;
1474 ZHC_SUB( tmp, V, 0 );
1475 SKIP_CY;
1476 }
1477
1478 /* 60 39: 0110 0000 0011 1001 */
LTA_A_A(void)1479 static void LTA_A_A(void)
1480 {
1481 UINT8 tmp = A - A;
1482 ZHC_SUB( tmp, A, 0 );
1483 SKIP_CY;
1484 }
1485
1486 /* 60 3a: 0110 0000 0011 1010 */
LTA_B_A(void)1487 static void LTA_B_A(void)
1488 {
1489 UINT8 tmp = B - A;
1490 ZHC_SUB( tmp, B, 0 );
1491 SKIP_CY;
1492 }
1493
1494 /* 60 3b: 0110 0000 0011 1011 */
LTA_C_A(void)1495 static void LTA_C_A(void)
1496 {
1497 UINT8 tmp = C - A;
1498 ZHC_SUB( tmp, C, 0 );
1499 SKIP_CY;
1500 }
1501
1502 /* 60 3c: 0110 0000 0011 1100 */
LTA_D_A(void)1503 static void LTA_D_A(void)
1504 {
1505 UINT8 tmp = D - A;
1506 ZHC_SUB( tmp, D, 0 );
1507 SKIP_CY;
1508 }
1509
1510 /* 60 3d: 0110 0000 0011 1101 */
LTA_E_A(void)1511 static void LTA_E_A(void)
1512 {
1513 UINT8 tmp = E - A;
1514 ZHC_SUB( tmp, E, 0 );
1515 SKIP_CY;
1516 }
1517
1518 /* 60 3e: 0110 0000 0011 1110 */
LTA_H_A(void)1519 static void LTA_H_A(void)
1520 {
1521 UINT8 tmp = H - A;
1522 ZHC_SUB( tmp, H, 0 );
1523 SKIP_CY;
1524 }
1525
1526 /* 60 3f: 0110 0000 0011 1111 */
LTA_L_A(void)1527 static void LTA_L_A(void)
1528 {
1529 UINT8 tmp = L - A;
1530 ZHC_SUB( tmp, L, 0 );
1531 SKIP_CY;
1532 }
1533
1534 /* 60 40: 0110 0000 0100 0000 */
ADD_V_A(void)1535 static void ADD_V_A(void)
1536 {
1537 UINT8 tmp = V + A;
1538 ZHC_ADD( tmp, V, 0 );
1539 V = tmp;
1540 }
1541
1542 /* 60 41: 0110 0000 0100 0001 */
ADD_A_A(void)1543 static void ADD_A_A(void)
1544 {
1545 UINT8 tmp = A + A;
1546 ZHC_ADD( tmp, A, 0 );
1547 A = tmp;
1548 }
1549
1550 /* 60 42: 0110 0000 0100 0010 */
ADD_B_A(void)1551 static void ADD_B_A(void)
1552 {
1553 UINT8 tmp = B + A;
1554 ZHC_ADD( tmp, B, 0 );
1555 B = tmp;
1556 }
1557
1558 /* 60 43: 0110 0000 0100 0011 */
ADD_C_A(void)1559 static void ADD_C_A(void)
1560 {
1561 UINT8 tmp = C + A;
1562 ZHC_ADD( tmp, C, 0 );
1563 C = tmp;
1564 }
1565
1566 /* 60 44: 0110 0000 0100 0100 */
ADD_D_A(void)1567 static void ADD_D_A(void)
1568 {
1569 UINT8 tmp = D + A;
1570 ZHC_ADD( tmp, D, 0 );
1571 D = tmp;
1572 }
1573
1574 /* 60 45: 0110 0000 0100 0101 */
ADD_E_A(void)1575 static void ADD_E_A(void)
1576 {
1577 UINT8 tmp = E + A;
1578 ZHC_ADD( tmp, E, 0 );
1579 E = tmp;
1580 }
1581
1582 /* 60 46: 0110 0000 0100 0110 */
ADD_H_A(void)1583 static void ADD_H_A(void)
1584 {
1585 UINT8 tmp = H + A;
1586 ZHC_ADD( tmp, H, 0 );
1587 H = tmp;
1588 }
1589
1590 /* 60 47: 0110 0000 0100 0111 */
ADD_L_A(void)1591 static void ADD_L_A(void)
1592 {
1593 UINT8 tmp = L + A;
1594 ZHC_ADD( tmp, L, 0 );
1595 L = tmp;
1596 }
1597
1598 /* 60 50: 0110 0000 0101 0000 */
ADC_V_A(void)1599 static void ADC_V_A(void)
1600 {
1601 UINT8 tmp = V + A + (PSW & CY);
1602 ZHC_ADD( tmp, V, (PSW & CY) );
1603 V = tmp;
1604 }
1605
1606 /* 60 51: 0110 0000 0101 0001 */
ADC_A_A(void)1607 static void ADC_A_A(void)
1608 {
1609 UINT8 tmp = A + A + (PSW & CY);
1610 ZHC_ADD( tmp, A, (PSW & CY) );
1611 A = tmp;
1612 }
1613
1614 /* 60 52: 0110 0000 0101 0010 */
ADC_B_A(void)1615 static void ADC_B_A(void)
1616 {
1617 UINT8 tmp = B + A + (PSW & CY);
1618 ZHC_ADD( tmp, B, (PSW & CY) );
1619 B = tmp;
1620 }
1621
1622 /* 60 53: 0110 0000 0101 0011 */
ADC_C_A(void)1623 static void ADC_C_A(void)
1624 {
1625 UINT8 tmp = C + A + (PSW & CY);
1626 ZHC_ADD( tmp, C, (PSW & CY) );
1627 C = tmp;
1628 }
1629
1630 /* 60 54: 0110 0000 0101 0100 */
ADC_D_A(void)1631 static void ADC_D_A(void)
1632 {
1633 UINT8 tmp = D + A + (PSW & CY);
1634 ZHC_ADD( tmp, D, (PSW & CY) );
1635 D = tmp;
1636 }
1637
1638 /* 60 55: 0110 0000 0101 0101 */
ADC_E_A(void)1639 static void ADC_E_A(void)
1640 {
1641 UINT8 tmp = E + A + (PSW & CY);
1642 ZHC_ADD( tmp, E, (PSW & CY) );
1643 E = tmp;
1644 }
1645
1646 /* 60 56: 0110 0000 0101 0110 */
ADC_H_A(void)1647 static void ADC_H_A(void)
1648 {
1649 UINT8 tmp = H + A + (PSW & CY);
1650 ZHC_ADD( tmp, H, (PSW & CY) );
1651 H = tmp;
1652 }
1653
1654 /* 60 57: 0110 0000 0101 0111 */
ADC_L_A(void)1655 static void ADC_L_A(void)
1656 {
1657 UINT8 tmp = L + A + (PSW & CY);
1658 ZHC_ADD( tmp, L, (PSW & CY) );
1659 L = tmp;
1660 }
1661
1662 /* 60 60: 0110 0000 0110 0000 */
SUB_V_A(void)1663 static void SUB_V_A(void)
1664 {
1665 UINT8 tmp = V - A;
1666 ZHC_SUB( tmp, V, 0 );
1667 V = tmp;
1668 }
1669
1670 /* 60 61: 0110 0000 0110 0001 */
SUB_A_A(void)1671 static void SUB_A_A(void)
1672 {
1673 UINT8 tmp = A - A;
1674 ZHC_SUB( tmp, A, 0 );
1675 A = tmp;
1676 }
1677
1678 /* 60 62: 0110 0000 0110 0010 */
SUB_B_A(void)1679 static void SUB_B_A(void)
1680 {
1681 UINT8 tmp = B - A;
1682 ZHC_SUB( tmp, B, 0 );
1683 B = tmp;
1684 }
1685
1686 /* 60 63: 0110 0000 0110 0011 */
SUB_C_A(void)1687 static void SUB_C_A(void)
1688 {
1689 UINT8 tmp = C - A;
1690 ZHC_SUB( tmp, C, 0 );
1691 C = tmp;
1692 }
1693
1694 /* 60 64: 0110 0000 0110 0100 */
SUB_D_A(void)1695 static void SUB_D_A(void)
1696 {
1697 UINT8 tmp = D - A;
1698 ZHC_SUB( tmp, D, 0 );
1699 D = tmp;
1700 }
1701
1702 /* 60 65: 0110 0000 0110 0101 */
SUB_E_A(void)1703 static void SUB_E_A(void)
1704 {
1705 UINT8 tmp = E - A;
1706 ZHC_SUB( tmp, E, 0 );
1707 E = tmp;
1708 }
1709
1710 /* 60 66: 0110 0000 0110 0110 */
SUB_H_A(void)1711 static void SUB_H_A(void)
1712 {
1713 UINT8 tmp = H - A;
1714 ZHC_SUB( tmp, H, 0 );
1715 H = tmp;
1716 }
1717
1718 /* 60 67: 0110 0000 0110 0111 */
SUB_L_A(void)1719 static void SUB_L_A(void)
1720 {
1721 UINT8 tmp = L - A;
1722 ZHC_SUB( tmp, L, 0 );
1723 L = tmp;
1724 }
1725
1726 /* 60 68: 0110 0000 0110 1000 */
NEA_V_A(void)1727 static void NEA_V_A(void)
1728 {
1729 UINT8 tmp = V - A;
1730 ZHC_SUB( tmp, V, 0 );
1731 SKIP_NZ;
1732 }
1733
1734 /* 60 69: 0110 0000 0110 1001 */
NEA_A_A(void)1735 static void NEA_A_A(void)
1736 {
1737 UINT8 tmp = A - A;
1738 ZHC_SUB( tmp, A, 0 );
1739 SKIP_NZ;
1740 }
1741
1742 /* 60 6a: 0110 0000 0110 1010 */
NEA_B_A(void)1743 static void NEA_B_A(void)
1744 {
1745 UINT8 tmp = B - A;
1746 ZHC_SUB( tmp, B, 0 );
1747 SKIP_NZ;
1748 }
1749
1750 /* 60 6b: 0110 0000 0110 1011 */
NEA_C_A(void)1751 static void NEA_C_A(void)
1752 {
1753 UINT8 tmp = C - A;
1754 ZHC_SUB( tmp, C, 0 );
1755 SKIP_NZ;
1756 }
1757
1758 /* 60 6c: 0110 0000 0110 1100 */
NEA_D_A(void)1759 static void NEA_D_A(void)
1760 {
1761 UINT8 tmp = D - A;
1762 ZHC_SUB( tmp, D, 0 );
1763 SKIP_NZ;
1764 }
1765
1766 /* 60 6d: 0110 0000 0110 1101 */
NEA_E_A(void)1767 static void NEA_E_A(void)
1768 {
1769 UINT8 tmp = E - A;
1770 ZHC_SUB( tmp, E, 0 );
1771 SKIP_NZ;
1772 }
1773
1774 /* 60 6e: 0110 0000 0110 1110 */
NEA_H_A(void)1775 static void NEA_H_A(void)
1776 {
1777 UINT8 tmp = H - A;
1778 ZHC_SUB( tmp, H, 0 );
1779 SKIP_NZ;
1780 }
1781
1782 /* 60 6f: 0110 0000 0110 1111 */
NEA_L_A(void)1783 static void NEA_L_A(void)
1784 {
1785 UINT8 tmp = L - A;
1786 ZHC_SUB( tmp, L, 0 );
1787 SKIP_NZ;
1788 }
1789
1790 /* 60 70: 0110 0000 0111 0000 */
SBB_V_A(void)1791 static void SBB_V_A(void)
1792 {
1793 UINT8 tmp = V - A - (PSW & CY);
1794 ZHC_SUB( tmp, V, (PSW & CY) );
1795 V = tmp;
1796 }
1797
1798 /* 60 71: 0110 0000 0111 0001 */
SBB_A_A(void)1799 static void SBB_A_A(void)
1800 {
1801 UINT8 tmp = A - A - (PSW & CY);
1802 ZHC_SUB( tmp, A, (PSW & CY) );
1803 A = tmp;
1804 }
1805
1806 /* 60 72: 0110 0000 0111 0010 */
SBB_B_A(void)1807 static void SBB_B_A(void)
1808 {
1809 UINT8 tmp = B - A - (PSW & CY);
1810 ZHC_SUB( tmp, B, (PSW & CY) );
1811 B = tmp;
1812 }
1813
1814 /* 60 73: 0110 0000 0111 0011 */
SBB_C_A(void)1815 static void SBB_C_A(void)
1816 {
1817 UINT8 tmp = C - A - (PSW & CY);
1818 ZHC_SUB( tmp, C, (PSW & CY) );
1819 C = tmp;
1820 }
1821
1822 /* 60 74: 0110 0000 0111 0100 */
SBB_D_A(void)1823 static void SBB_D_A(void)
1824 {
1825 UINT8 tmp = D - A - (PSW & CY);
1826 ZHC_SUB( tmp, D, (PSW & CY) );
1827 D = tmp;
1828 }
1829
1830 /* 60 75: 0110 0000 0111 0101 */
SBB_E_A(void)1831 static void SBB_E_A(void)
1832 {
1833 UINT8 tmp = E - A - (PSW & CY);
1834 ZHC_SUB( tmp, E, (PSW & CY) );
1835 E = tmp;
1836 }
1837
1838 /* 60 76: 0110 0000 0111 0110 */
SBB_H_A(void)1839 static void SBB_H_A(void)
1840 {
1841 UINT8 tmp = H - A - (PSW & CY);
1842 ZHC_SUB( tmp, H, (PSW & CY) );
1843 H = tmp;
1844 }
1845
1846 /* 60 77: 0110 0000 0111 0111 */
SBB_L_A(void)1847 static void SBB_L_A(void)
1848 {
1849 UINT8 tmp = L - A - (PSW & CY);
1850 ZHC_SUB( tmp, L, (PSW & CY) );
1851 L = tmp;
1852 }
1853
1854 /* 60 78: 0110 0000 0111 1000 */
EQA_V_A(void)1855 static void EQA_V_A(void)
1856 {
1857 UINT8 tmp = V - A;
1858 ZHC_SUB( tmp, V, 0 );
1859 SKIP_Z;
1860 }
1861
1862 /* 60 79: 0110 0000 0111 1001 */
EQA_A_A(void)1863 static void EQA_A_A(void)
1864 {
1865 UINT8 tmp = A - A;
1866 ZHC_SUB( tmp, A, 0 );
1867 SKIP_Z;
1868 }
1869
1870 /* 60 7a: 0110 0000 0111 1010 */
EQA_B_A(void)1871 static void EQA_B_A(void)
1872 {
1873 UINT8 tmp = B - A;
1874 ZHC_SUB( tmp, B, 0 );
1875 SKIP_Z;
1876 }
1877
1878 /* 60 7b: 0110 0000 0111 1011 */
EQA_C_A(void)1879 static void EQA_C_A(void)
1880 {
1881 UINT8 tmp = C - A;
1882 ZHC_SUB( tmp, C, 0 );
1883 SKIP_Z;
1884 }
1885
1886 /* 60 7c: 0110 0000 0111 1100 */
EQA_D_A(void)1887 static void EQA_D_A(void)
1888 {
1889 UINT8 tmp = D - A;
1890 ZHC_SUB( tmp, D, 0 );
1891 SKIP_Z;
1892 }
1893
1894 /* 60 7d: 0110 0000 0111 1101 */
EQA_E_A(void)1895 static void EQA_E_A(void)
1896 {
1897 UINT8 tmp = E - A;
1898 ZHC_SUB( tmp, E, 0 );
1899 SKIP_Z;
1900 }
1901
1902 /* 60 7e: 0110 0000 0111 1110 */
EQA_H_A(void)1903 static void EQA_H_A(void)
1904 {
1905 UINT8 tmp = H - A;
1906 ZHC_SUB( tmp, H, 0 );
1907 SKIP_Z;
1908 }
1909
1910 /* 60 7f: 0110 0000 0111 1111 */
EQA_L_A(void)1911 static void EQA_L_A(void)
1912 {
1913 UINT8 tmp = L - A;
1914 ZHC_SUB( tmp, L, 0 );
1915 SKIP_Z;
1916 }
1917
1918 /* 60 88: 0110 0000 1000 1000 */
ANA_A_V(void)1919 static void ANA_A_V(void)
1920 {
1921 A &= V;
1922 SET_Z(A);
1923 }
1924
1925 /* 60 89: 0110 0000 1000 1001 */
1926 /* ANA_A_A already defined */
1927
1928 /* 60 8a: 0110 0000 1000 1010 */
ANA_A_B(void)1929 static void ANA_A_B(void)
1930 {
1931 A &= B;
1932 SET_Z(A);
1933 }
1934
1935 /* 60 8b: 0110 0000 1000 1011 */
ANA_A_C(void)1936 static void ANA_A_C(void)
1937 {
1938 A &= C;
1939 SET_Z(A);
1940 }
1941
1942 /* 60 8c: 0110 0000 1000 1100 */
ANA_A_D(void)1943 static void ANA_A_D(void)
1944 {
1945 A &= D;
1946 SET_Z(A);
1947 }
1948
1949 /* 60 8d: 0110 0000 1000 1101 */
ANA_A_E(void)1950 static void ANA_A_E(void)
1951 {
1952 A &= E;
1953 SET_Z(A);
1954 }
1955
1956 /* 60 8e: 0110 0000 1000 1110 */
ANA_A_H(void)1957 static void ANA_A_H(void)
1958 {
1959 A &= H;
1960 SET_Z(A);
1961 }
1962
1963 /* 60 8f: 0110 0000 1000 1111 */
ANA_A_L(void)1964 static void ANA_A_L(void)
1965 {
1966 A &= L;
1967 SET_Z(A);
1968 }
1969
1970 /* 60 90: 0110 0000 1001 0000 */
XRA_A_V(void)1971 static void XRA_A_V(void)
1972 {
1973 A ^= V;
1974 SET_Z(A);
1975 }
1976
1977 /* 60 91: 0110 0000 1001 0001 */
1978 /* XRA_A_A already defined */
1979
1980 /* 60 92: 0110 0000 1001 0010 */
XRA_A_B(void)1981 static void XRA_A_B(void)
1982 {
1983 A ^= B;
1984 SET_Z(A);
1985 }
1986
1987 /* 60 93: 0110 0000 1001 0011 */
XRA_A_C(void)1988 static void XRA_A_C(void)
1989 {
1990 A ^= C;
1991 SET_Z(A);
1992 }
1993
1994 /* 60 94: 0110 0000 1001 0100 */
XRA_A_D(void)1995 static void XRA_A_D(void)
1996 {
1997 A ^= D;
1998 SET_Z(A);
1999 }
2000
2001 /* 60 95: 0110 0000 1001 0101 */
XRA_A_E(void)2002 static void XRA_A_E(void)
2003 {
2004 A ^= E;
2005 SET_Z(A);
2006 }
2007
2008 /* 60 96: 0110 0000 1001 0110 */
XRA_A_H(void)2009 static void XRA_A_H(void)
2010 {
2011 A ^= H;
2012 SET_Z(A);
2013 }
2014
2015 /* 60 97: 0110 0000 1001 0111 */
XRA_A_L(void)2016 static void XRA_A_L(void)
2017 {
2018 A ^= L;
2019 SET_Z(A);
2020 }
2021
2022 /* 60 98: 0110 0000 1001 1000 */
ORA_A_V(void)2023 static void ORA_A_V(void)
2024 {
2025 A |= V;
2026 SET_Z(A);
2027 }
2028
2029 /* 60 99: 0110 0000 1001 1001 */
2030 /* ORA_A_A already defined */
2031
2032 /* 60 9a: 0110 0000 1001 1010 */
ORA_A_B(void)2033 static void ORA_A_B(void)
2034 {
2035 A |= B;
2036 SET_Z(A);
2037 }
2038
2039 /* 60 9b: 0110 0000 1001 1011 */
ORA_A_C(void)2040 static void ORA_A_C(void)
2041 {
2042 A |= C;
2043 SET_Z(A);
2044 }
2045
2046 /* 60 9c: 0110 0000 1001 1100 */
ORA_A_D(void)2047 static void ORA_A_D(void)
2048 {
2049 A |= D;
2050 SET_Z(A);
2051 }
2052
2053 /* 60 9d: 0110 0000 1001 1101 */
ORA_A_E(void)2054 static void ORA_A_E(void)
2055 {
2056 A |= E;
2057 SET_Z(A);
2058 }
2059
2060 /* 60 9e: 0110 0000 1001 1110 */
ORA_A_H(void)2061 static void ORA_A_H(void)
2062 {
2063 A |= H;
2064 SET_Z(A);
2065 }
2066
2067 /* 60 9f: 0110 0000 1001 1111 */
ORA_A_L(void)2068 static void ORA_A_L(void)
2069 {
2070 A |= L;
2071 SET_Z(A);
2072 }
2073
2074 /* 60 a0: 0110 0000 1010 0000 */
ADDNC_A_V(void)2075 static void ADDNC_A_V(void)
2076 {
2077 UINT8 tmp = A + V;
2078 ZHC_ADD( tmp, A, 0 );
2079 A = tmp;
2080 SKIP_NC;
2081 }
2082
2083 /* 60 a1: 0110 0000 1010 0001 */
2084 /* ADDNC_A_A already defined */
2085
2086 /* 60 a2: 0110 0000 1010 0010 */
ADDNC_A_B(void)2087 static void ADDNC_A_B(void)
2088 {
2089 UINT8 tmp = A + B;
2090 ZHC_ADD( tmp, A, 0 );
2091 A = tmp;
2092 SKIP_NC;
2093 }
2094
2095 /* 60 a3: 0110 0000 1010 0011 */
ADDNC_A_C(void)2096 static void ADDNC_A_C(void)
2097 {
2098 UINT8 tmp = A + C;
2099 ZHC_ADD( tmp, A, 0 );
2100 A = tmp;
2101 SKIP_NC;
2102 }
2103
2104 /* 60 a4: 0110 0000 1010 0100 */
ADDNC_A_D(void)2105 static void ADDNC_A_D(void)
2106 {
2107 UINT8 tmp = A + D;
2108 ZHC_ADD( tmp, A, 0 );
2109 A = tmp;
2110 SKIP_NC;
2111 }
2112
2113 /* 60 a5: 0110 0000 1010 0101 */
ADDNC_A_E(void)2114 static void ADDNC_A_E(void)
2115 {
2116 UINT8 tmp = A + E;
2117 ZHC_ADD( tmp, A, 0 );
2118 A = tmp;
2119 SKIP_NC;
2120 }
2121
2122 /* 60 a6: 0110 0000 1010 0110 */
ADDNC_A_H(void)2123 static void ADDNC_A_H(void)
2124 {
2125 UINT8 tmp = A + H;
2126 ZHC_ADD( tmp, A, 0 );
2127 A = tmp;
2128 SKIP_NC;
2129 }
2130
2131 /* 60 a7: 0110 0000 1010 0111 */
ADDNC_A_L(void)2132 static void ADDNC_A_L(void)
2133 {
2134 UINT8 tmp = A + L;
2135 ZHC_ADD( tmp, A, 0 );
2136 A = tmp;
2137 SKIP_NC;
2138 }
2139
2140 /* 60 a8: 0110 0000 1010 1000 */
GTA_A_V(void)2141 static void GTA_A_V(void)
2142 {
2143 UINT16 tmp = A - V - 1;
2144 ZHC_SUB( tmp, A, 0 );
2145 SKIP_NC;
2146 }
2147
2148 /* 60 a9: 0110 0000 1010 1001 */
2149 /* GTA_A_A already defined */
2150
2151 /* 60 aa: 0110 0000 1010 1010 */
GTA_A_B(void)2152 static void GTA_A_B(void)
2153 {
2154 UINT16 tmp = A - B - 1;
2155 ZHC_SUB( tmp, A, 0 );
2156 SKIP_NC;
2157 }
2158
2159 /* 60 ab: 0110 0000 1010 1011 */
GTA_A_C(void)2160 static void GTA_A_C(void)
2161 {
2162 UINT16 tmp = A - C - 1;
2163 ZHC_SUB( tmp, A, 0 );
2164 SKIP_NC;
2165 }
2166
2167 /* 60 ac: 0110 0000 1010 1100 */
GTA_A_D(void)2168 static void GTA_A_D(void)
2169 {
2170 UINT16 tmp = A - D - 1;
2171 ZHC_SUB( tmp, A, 0 );
2172 SKIP_NC;
2173 }
2174
2175 /* 60 ad: 0110 0000 1010 1101 */
GTA_A_E(void)2176 static void GTA_A_E(void)
2177 {
2178 UINT16 tmp = A - E - 1;
2179 ZHC_SUB( tmp, A, 0 );
2180 SKIP_NC;
2181 }
2182
2183 /* 60 ae: 0110 0000 1010 1110 */
GTA_A_H(void)2184 static void GTA_A_H(void)
2185 {
2186 UINT16 tmp = A - H - 1;
2187 ZHC_SUB( tmp, A, 0 );
2188 SKIP_NC;
2189 }
2190
2191 /* 60 af: 0110 0000 1010 1111 */
GTA_A_L(void)2192 static void GTA_A_L(void)
2193 {
2194 UINT16 tmp = A - L - 1;
2195 ZHC_SUB( tmp, A, 0 );
2196 SKIP_NC;
2197 }
2198
2199 /* 60 b0: 0110 0000 1011 0000 */
SUBNB_A_V(void)2200 static void SUBNB_A_V(void)
2201 {
2202 UINT8 tmp = A - V;
2203 ZHC_SUB( tmp, A, 0 );
2204 A = tmp;
2205 SKIP_NC;
2206 }
2207
2208 /* 60 b1: 0110 0000 1011 0001 */
2209 /* SUBNB_A_A already defined */
2210
2211 /* 60 b2: 0110 0000 1011 0010 */
SUBNB_A_B(void)2212 static void SUBNB_A_B(void)
2213 {
2214 UINT8 tmp = A - B;
2215 ZHC_SUB( tmp, A, 0 );
2216 A = tmp;
2217 SKIP_NC;
2218 }
2219
2220 /* 60 b3: 0110 0000 1011 0011 */
SUBNB_A_C(void)2221 static void SUBNB_A_C(void)
2222 {
2223 UINT8 tmp = A - C;
2224 ZHC_SUB( tmp, A, 0 );
2225 A = tmp;
2226 SKIP_NC;
2227 }
2228
2229 /* 60 b4: 0110 0000 1011 0100 */
SUBNB_A_D(void)2230 static void SUBNB_A_D(void)
2231 {
2232 UINT8 tmp = A - D;
2233 ZHC_SUB( tmp, A, 0 );
2234 A = tmp;
2235 SKIP_NC;
2236 }
2237
2238 /* 60 b5: 0110 0000 1011 0101 */
SUBNB_A_E(void)2239 static void SUBNB_A_E(void)
2240 {
2241 UINT8 tmp = A - E;
2242 ZHC_SUB( tmp, A, 0 );
2243 A = tmp;
2244 SKIP_NC;
2245 }
2246
2247 /* 60 b6: 0110 0000 1011 0110 */
SUBNB_A_H(void)2248 static void SUBNB_A_H(void)
2249 {
2250 UINT8 tmp = A - H;
2251 ZHC_SUB( tmp, A, 0 );
2252 A = tmp;
2253 SKIP_NC;
2254 }
2255
2256 /* 60 b7: 0110 0000 1011 0111 */
SUBNB_A_L(void)2257 static void SUBNB_A_L(void)
2258 {
2259 UINT8 tmp = A - L;
2260 ZHC_SUB( tmp, A, 0 );
2261 A = tmp;
2262 SKIP_NC;
2263 }
2264
2265 /* 60 b8: 0110 0000 1011 1000 */
LTA_A_V(void)2266 static void LTA_A_V(void)
2267 {
2268 UINT8 tmp = A - V;
2269 ZHC_SUB( tmp, A, 0 );
2270 SKIP_CY;
2271 }
2272
2273 /* 60 b9: 0110 0000 1011 1001 */
2274 /* LTA_A_A already defined */
2275
2276 /* 60 ba: 0110 0000 1011 1010 */
LTA_A_B(void)2277 static void LTA_A_B(void)
2278 {
2279 UINT8 tmp = A - B;
2280 ZHC_SUB( tmp, A, 0 );
2281 SKIP_CY;
2282 }
2283
2284 /* 60 bb: 0110 0000 1011 1011 */
LTA_A_C(void)2285 static void LTA_A_C(void)
2286 {
2287 UINT8 tmp = A - C;
2288 ZHC_SUB( tmp, A, 0 );
2289 SKIP_CY;
2290 }
2291
2292 /* 60 bc: 0110 0000 1011 1100 */
LTA_A_D(void)2293 static void LTA_A_D(void)
2294 {
2295 UINT8 tmp = A - D;
2296 ZHC_SUB( tmp, A, 0 );
2297 SKIP_CY;
2298 }
2299
2300 /* 60 bd: 0110 0000 1011 1101 */
LTA_A_E(void)2301 static void LTA_A_E(void)
2302 {
2303 UINT8 tmp = A - E;
2304 ZHC_SUB( tmp, A, 0 );
2305 SKIP_CY;
2306 }
2307
2308 /* 60 be: 0110 0000 1011 1110 */
LTA_A_H(void)2309 static void LTA_A_H(void)
2310 {
2311 UINT8 tmp = A - H;
2312 ZHC_SUB( tmp, A, 0 );
2313 SKIP_CY;
2314 }
2315
2316 /* 60 bf: 0110 0000 1011 1111 */
LTA_A_L(void)2317 static void LTA_A_L(void)
2318 {
2319 UINT8 tmp = A - L;
2320 ZHC_SUB( tmp, A, 0 );
2321 SKIP_CY;
2322 }
2323
2324 /* 60 c0: 0110 0000 1100 0000 */
ADD_A_V(void)2325 static void ADD_A_V(void)
2326 {
2327 UINT8 tmp = A + V;
2328 ZHC_ADD( tmp, A, 0 );
2329 A = tmp;
2330 }
2331
2332 /* 60 c1: 0110 0000 1100 0001 */
2333 /* ADD_A_A already defined */
2334
2335 /* 60 c2: 0110 0000 1100 0010 */
ADD_A_B(void)2336 static void ADD_A_B(void)
2337 {
2338 UINT8 tmp = A + B;
2339 ZHC_ADD( tmp, A, 0 );
2340 A = tmp;
2341 }
2342
2343 /* 60 c3: 0110 0000 1100 0011 */
ADD_A_C(void)2344 static void ADD_A_C(void)
2345 {
2346 UINT8 tmp = A + C;
2347 ZHC_ADD( tmp, A, 0 );
2348 A = tmp;
2349 }
2350
2351 /* 60 c4: 0110 0000 1100 0100 */
ADD_A_D(void)2352 static void ADD_A_D(void)
2353 {
2354 UINT8 tmp = A + D;
2355 ZHC_ADD( tmp, A, 0 );
2356 A = tmp;
2357 }
2358
2359 /* 60 c5: 0110 0000 1100 0101 */
ADD_A_E(void)2360 static void ADD_A_E(void)
2361 {
2362 UINT8 tmp = A + E;
2363 ZHC_ADD( tmp, A, 0 );
2364 A = tmp;
2365 }
2366
2367 /* 60 c6: 0110 0000 1100 0110 */
ADD_A_H(void)2368 static void ADD_A_H(void)
2369 {
2370 UINT8 tmp = A + H;
2371 ZHC_ADD( tmp, A, 0 );
2372 A = tmp;
2373 }
2374
2375 /* 60 c7: 0110 0000 1100 0111 */
ADD_A_L(void)2376 static void ADD_A_L(void)
2377 {
2378 UINT8 tmp = A + L;
2379 ZHC_ADD( tmp, A, 0 );
2380 A = tmp;
2381 }
2382
2383 /* 60 c8: 0110 0000 1100 1000 */
ONA_A_V(void)2384 static void ONA_A_V(void)
2385 {
2386 if (A & V)
2387 PSW = (PSW & ~Z) | SK;
2388 else
2389 PSW |= Z;
2390 }
2391
2392 /* 60 c9: 0110 0000 1100 1001 */
ONA_A_A(void)2393 static void ONA_A_A(void)
2394 {
2395 if (A & A)
2396 PSW = (PSW & ~Z) | SK;
2397 else
2398 PSW |= Z;
2399 }
2400
2401 /* 60 ca: 0110 0000 1100 1010 */
ONA_A_B(void)2402 static void ONA_A_B(void)
2403 {
2404 if (A & B)
2405 PSW = (PSW & ~Z) | SK;
2406 else
2407 PSW |= Z;
2408 }
2409
2410 /* 60 cb: 0110 0000 1100 1011 */
ONA_A_C(void)2411 static void ONA_A_C(void)
2412 {
2413 if (A & C)
2414 PSW = (PSW & ~Z) | SK;
2415 else
2416 PSW |= Z;
2417 }
2418
2419 /* 60 cc: 0110 0000 1100 1100 */
ONA_A_D(void)2420 static void ONA_A_D(void)
2421 {
2422 if (A & D)
2423 PSW = (PSW & ~Z) | SK;
2424 else
2425 PSW |= Z;
2426 }
2427
2428 /* 60 cd: 0110 0000 1100 1101 */
ONA_A_E(void)2429 static void ONA_A_E(void)
2430 {
2431 if (A & E)
2432 PSW = (PSW & ~Z) | SK;
2433 else
2434 PSW |= Z;
2435 }
2436
2437 /* 60 ce: 0110 0000 1100 1110 */
ONA_A_H(void)2438 static void ONA_A_H(void)
2439 {
2440 if (A & H)
2441 PSW = (PSW & ~Z) | SK;
2442 else
2443 PSW |= Z;
2444 }
2445
2446 /* 60 cf: 0110 0000 1100 1111 */
ONA_A_L(void)2447 static void ONA_A_L(void)
2448 {
2449 if (A & L)
2450 PSW = (PSW & ~Z) | SK;
2451 else
2452 PSW |= Z;
2453 }
2454
2455 /* 60 d0: 0110 0000 1101 0000 */
ADC_A_V(void)2456 static void ADC_A_V(void)
2457 {
2458 UINT8 tmp = A + V + (PSW & CY);
2459 ZHC_ADD( tmp, A, (PSW & CY) );
2460 A = tmp;
2461 }
2462
2463 /* 60 d1: 0110 0000 1101 0001 */
2464 /* ADC_A_A already defined */
2465
2466 /* 60 d2: 0110 0000 1101 0010 */
ADC_A_B(void)2467 static void ADC_A_B(void)
2468 {
2469 UINT8 tmp = A + B + (PSW & CY);
2470 ZHC_ADD( tmp, A, (PSW & CY) );
2471 A = tmp;
2472 }
2473
2474 /* 60 d3: 0110 0000 1101 0011 */
ADC_A_C(void)2475 static void ADC_A_C(void)
2476 {
2477 UINT8 tmp = A + C + (PSW & CY);
2478 ZHC_ADD( tmp, A, (PSW & CY) );
2479 A = tmp;
2480 }
2481
2482 /* 60 d4: 0110 0000 1101 0100 */
ADC_A_D(void)2483 static void ADC_A_D(void)
2484 {
2485 UINT8 tmp = A + D + (PSW & CY);
2486 ZHC_ADD( tmp, A, (PSW & CY) );
2487 A = tmp;
2488 }
2489
2490 /* 60 d5: 0110 0000 1101 0101 */
ADC_A_E(void)2491 static void ADC_A_E(void)
2492 {
2493 UINT8 tmp = A + E + (PSW & CY);
2494 ZHC_ADD( tmp, A, (PSW & CY) );
2495 A = tmp;
2496 }
2497
2498 /* 60 d6: 0110 0000 1101 0110 */
ADC_A_H(void)2499 static void ADC_A_H(void)
2500 {
2501 UINT8 tmp = A + H + (PSW & CY);
2502 ZHC_ADD( tmp, A, (PSW & CY) );
2503 A = tmp;
2504 }
2505
2506 /* 60 d7: 0110 0000 1101 0111 */
ADC_A_L(void)2507 static void ADC_A_L(void)
2508 {
2509 UINT8 tmp = A + L + (PSW & CY);
2510 ZHC_ADD( tmp, A, (PSW & CY) );
2511 A = tmp;
2512 }
2513
2514 /* 60 d8: 0110 0000 1101 1000 */
OFFA_A_V(void)2515 static void OFFA_A_V(void)
2516 {
2517 if ( A & V )
2518 PSW &= ~Z;
2519 else
2520 PSW = PSW | Z | SK;
2521 }
2522
2523 /* 60 d9: 0110 0000 1101 1001 */
OFFA_A_A(void)2524 static void OFFA_A_A(void)
2525 {
2526 if ( A & A )
2527 PSW &= ~Z;
2528 else
2529 PSW = PSW | Z | SK;
2530 }
2531
2532 /* 60 da: 0110 0000 1101 1010 */
OFFA_A_B(void)2533 static void OFFA_A_B(void)
2534 {
2535 if ( A & B )
2536 PSW &= ~Z;
2537 else
2538 PSW = PSW | Z | SK;
2539 }
2540
2541 /* 60 db: 0110 0000 1101 1011 */
OFFA_A_C(void)2542 static void OFFA_A_C(void)
2543 {
2544 if ( A & C )
2545 PSW &= ~Z;
2546 else
2547 PSW = PSW | Z | SK;
2548 }
2549
2550 /* 60 dc: 0110 0000 1101 1100 */
OFFA_A_D(void)2551 static void OFFA_A_D(void)
2552 {
2553 if ( A & D )
2554 PSW &= ~Z;
2555 else
2556 PSW = PSW | Z | SK;
2557 }
2558
2559 /* 60 dd: 0110 0000 1101 1101 */
OFFA_A_E(void)2560 static void OFFA_A_E(void)
2561 {
2562 if ( A & E )
2563 PSW &= ~Z;
2564 else
2565 PSW = PSW | Z | SK;
2566 }
2567
2568 /* 60 de: 0110 0000 1101 1110 */
OFFA_A_H(void)2569 static void OFFA_A_H(void)
2570 {
2571 if ( A & H )
2572 PSW &= ~Z;
2573 else
2574 PSW = PSW | Z | SK;
2575 }
2576
2577 /* 60 df: 0110 0000 1101 1111 */
OFFA_A_L(void)2578 static void OFFA_A_L(void)
2579 {
2580 if ( A & L )
2581 PSW &= ~Z;
2582 else
2583 PSW = PSW | Z | SK;
2584 }
2585
2586 /* 60 e0: 0110 0000 1110 0000 */
SUB_A_V(void)2587 static void SUB_A_V(void)
2588 {
2589 UINT8 tmp = A - V;
2590 ZHC_SUB( tmp, A, 0 );
2591 A = tmp;
2592 }
2593
2594 /* 60 e1: 0110 0000 1110 0001 */
2595 /* SUB_A_A already defined */
2596
2597 /* 60 e2: 0110 0000 1110 0010 */
SUB_A_B(void)2598 static void SUB_A_B(void)
2599 {
2600 UINT8 tmp = A - B;
2601 ZHC_SUB( tmp, A, 0 );
2602 A = tmp;
2603 }
2604
2605 /* 60 e3: 0110 0000 1110 0011 */
SUB_A_C(void)2606 static void SUB_A_C(void)
2607 {
2608 UINT8 tmp = A - C;
2609 ZHC_SUB( tmp, A, 0 );
2610 A = tmp;
2611 }
2612
2613 /* 60 e4: 0110 0000 1110 0100 */
SUB_A_D(void)2614 static void SUB_A_D(void)
2615 {
2616 UINT8 tmp = A - D;
2617 ZHC_SUB( tmp, A, 0 );
2618 A = tmp;
2619 }
2620
2621 /* 60 e5: 0110 0000 1110 0101 */
SUB_A_E(void)2622 static void SUB_A_E(void)
2623 {
2624 UINT8 tmp = A - E;
2625 ZHC_SUB( tmp, A, 0 );
2626 A = tmp;
2627 }
2628
2629 /* 60 e6: 0110 0000 1110 0110 */
SUB_A_H(void)2630 static void SUB_A_H(void)
2631 {
2632 UINT8 tmp = A - H;
2633 ZHC_SUB( tmp, A, 0 );
2634 A = tmp;
2635 }
2636
2637 /* 60 e7: 0110 0000 1110 0111 */
SUB_A_L(void)2638 static void SUB_A_L(void)
2639 {
2640 UINT8 tmp = A - L;
2641 ZHC_SUB( tmp, A, 0 );
2642 A = tmp;
2643 }
2644
2645 /* 60 e8: 0110 0000 1110 1000 */
NEA_A_V(void)2646 static void NEA_A_V(void)
2647 {
2648 UINT8 tmp = A - V;
2649 ZHC_SUB( tmp, A, 0 );
2650 SKIP_NZ;
2651 }
2652
2653 /* 60 e9: 0110 0000 1110 1001 */
2654 /* NEA_A_A already defined */
2655
2656 /* 60 ea: 0110 0000 1110 1010 */
NEA_A_B(void)2657 static void NEA_A_B(void)
2658 {
2659 UINT8 tmp = A - B;
2660 ZHC_SUB( tmp, A, 0 );
2661 SKIP_NZ;
2662 }
2663
2664 /* 60 eb: 0110 0000 1110 1011 */
NEA_A_C(void)2665 static void NEA_A_C(void)
2666 {
2667 UINT8 tmp = A - C;
2668 ZHC_SUB( tmp, A, 0 );
2669 SKIP_NZ;
2670 }
2671
2672 /* 60 ec: 0110 0000 1110 1100 */
NEA_A_D(void)2673 static void NEA_A_D(void)
2674 {
2675 UINT8 tmp = A - D;
2676 ZHC_SUB( tmp, A, 0 );
2677 SKIP_NZ;
2678 }
2679
2680 /* 60 ed: 0110 0000 1110 1101 */
NEA_A_E(void)2681 static void NEA_A_E(void)
2682 {
2683 UINT8 tmp = A - E;
2684 ZHC_SUB( tmp, A, 0 );
2685 SKIP_NZ;
2686 }
2687
2688 /* 60 ee: 0110 0000 1110 1110 */
NEA_A_H(void)2689 static void NEA_A_H(void)
2690 {
2691 UINT8 tmp = A - H;
2692 ZHC_SUB( tmp, A, 0 );
2693 SKIP_NZ;
2694 }
2695
2696 /* 60 ef: 0110 0000 1110 1111 */
NEA_A_L(void)2697 static void NEA_A_L(void)
2698 {
2699 UINT8 tmp = A - L;
2700 ZHC_SUB( tmp, A, 0 );
2701 SKIP_NZ;
2702 }
2703
2704 /* 60 f0: 0110 0000 1111 0000 */
SBB_A_V(void)2705 static void SBB_A_V(void)
2706 {
2707 UINT8 tmp = A - V - (PSW & CY);
2708 ZHC_SUB( tmp, A, (PSW & CY) );
2709 A = tmp;
2710 }
2711
2712 /* 60 f1: 0110 0000 1111 0001 */
2713 /* SBB_A_A already defined */
2714
2715 /* 60 f2: 0110 0000 1111 0010 */
SBB_A_B(void)2716 static void SBB_A_B(void)
2717 {
2718 UINT8 tmp = A - B - (PSW & CY);
2719 ZHC_SUB( tmp, A, (PSW & CY) );
2720 A = tmp;
2721 }
2722
2723 /* 60 f3: 0110 0000 1111 0011 */
SBB_A_C(void)2724 static void SBB_A_C(void)
2725 {
2726 UINT8 tmp = A - C - (PSW & CY);
2727 ZHC_SUB( tmp, A, (PSW & CY) );
2728 A = tmp;
2729 }
2730
2731 /* 60 f4: 0110 0000 1111 0100 */
SBB_A_D(void)2732 static void SBB_A_D(void)
2733 {
2734 UINT8 tmp = A - D - (PSW & CY);
2735 ZHC_SUB( tmp, A, (PSW & CY) );
2736 A = tmp;
2737 }
2738
2739 /* 60 f5: 0110 0000 1111 0101 */
SBB_A_E(void)2740 static void SBB_A_E(void)
2741 {
2742 UINT8 tmp = A - E - (PSW & CY);
2743 ZHC_SUB( tmp, A, (PSW & CY) );
2744 A = tmp;
2745 }
2746
2747 /* 60 f6: 0110 0000 1111 0110 */
SBB_A_H(void)2748 static void SBB_A_H(void)
2749 {
2750 UINT8 tmp = A - H - (PSW & CY);
2751 ZHC_SUB( tmp, A, (PSW & CY) );
2752 A = tmp;
2753 }
2754
2755 /* 60 f7: 0110 0000 1111 0111 */
SBB_A_L(void)2756 static void SBB_A_L(void)
2757 {
2758 UINT8 tmp = A - L - (PSW & CY);
2759 ZHC_SUB( tmp, A, (PSW & CY) );
2760 A = tmp;
2761 }
2762
2763 /* 60 f8: 0110 0000 1111 1000 */
EQA_A_V(void)2764 static void EQA_A_V(void)
2765 {
2766 UINT8 tmp = A - V;
2767 ZHC_SUB( tmp, A, 0 );
2768 SKIP_Z;
2769 }
2770
2771 /* 60 f9: 0110 0000 1111 1001 */
2772 /* EQA_A_A already defined */
2773
2774 /* 60 fa: 0110 0000 1111 1010 */
EQA_A_B(void)2775 static void EQA_A_B(void)
2776 {
2777 UINT8 tmp = A - B;
2778 ZHC_SUB( tmp, A, 0 );
2779 SKIP_Z;
2780 }
2781
2782 /* 60 fb: 0110 0000 1111 1011 */
EQA_A_C(void)2783 static void EQA_A_C(void)
2784 {
2785 UINT8 tmp = A - C;
2786 ZHC_SUB( tmp, A, 0 );
2787 SKIP_Z;
2788 }
2789
2790 /* 60 fc: 0110 0000 1111 1100 */
EQA_A_D(void)2791 static void EQA_A_D(void)
2792 {
2793 UINT8 tmp = A - D;
2794 ZHC_SUB( tmp, A, 0 );
2795 SKIP_Z;
2796 }
2797
2798 /* 60 fd: 0110 0000 1111 1101 */
EQA_A_E(void)2799 static void EQA_A_E(void)
2800 {
2801 UINT8 tmp = A - E;
2802 ZHC_SUB( tmp, A, 0 );
2803 SKIP_Z;
2804 }
2805
2806 /* 60 fe: 0110 0000 1111 1110 */
EQA_A_H(void)2807 static void EQA_A_H(void)
2808 {
2809 UINT8 tmp = A - H;
2810 ZHC_SUB( tmp, A, 0 );
2811 SKIP_Z;
2812 }
2813
2814 /* 60 ff: 0110 0000 1111 1111 */
EQA_A_L(void)2815 static void EQA_A_L(void)
2816 {
2817 UINT8 tmp = A - L;
2818 ZHC_SUB( tmp, A, 0 );
2819 SKIP_Z;
2820 }
2821
2822 /* prefix 64 */
2823 /* 64 00: 0110 0100 0000 0000 xxxx xxxx */
MVI_PA_xx(void)2824 static void MVI_PA_xx(void)
2825 {
2826 UINT8 imm;
2827 RDOPARG( imm );
2828 WP( UPD7810_PORTA, imm );
2829 }
2830
2831 /* 64 01: 0110 0100 0000 0001 xxxx xxxx */
MVI_PB_xx(void)2832 static void MVI_PB_xx(void)
2833 {
2834 UINT8 imm;
2835 RDOPARG( imm );
2836 WP( UPD7810_PORTB, imm );
2837 }
2838
2839 /* 64 02: 0110 0100 0000 0010 xxxx xxxx */
MVI_PC_xx(void)2840 static void MVI_PC_xx(void)
2841 {
2842 UINT8 imm;
2843 RDOPARG( imm );
2844 WP( UPD7810_PORTC, imm );
2845 }
2846
2847 /* 64 03: 0110 0100 0000 0011 xxxx xxxx */
MVI_PD_xx(void)2848 static void MVI_PD_xx(void)
2849 {
2850 UINT8 imm;
2851 RDOPARG( imm );
2852 WP( UPD7810_PORTD, imm );
2853 }
2854
2855 /* 64 05: 0110 0100 0000 0101 xxxx xxxx */
MVI_PF_xx(void)2856 static void MVI_PF_xx(void)
2857 {
2858 UINT8 imm;
2859 RDOPARG( imm );
2860 WP( UPD7810_PORTF, imm );
2861 }
2862
2863 /* 64 06: 0110 0100 0000 0110 xxxx xxxx */
MVI_MKH_xx(void)2864 static void MVI_MKH_xx(void)
2865 {
2866 RDOPARG( MKH );
2867 }
2868
2869 /* 64 07: 0110 0100 0000 0111 xxxx xxxx */
MVI_MKL_xx(void)2870 static void MVI_MKL_xx(void)
2871 {
2872 RDOPARG( MKL );
2873 }
2874
2875 /* 64 08: 0110 0100 0000 1000 xxxx xxxx */
ANI_PA_xx(void)2876 static void ANI_PA_xx(void)
2877 {
2878 UINT8 pa = RP( UPD7810_PORTA), imm;
2879 RDOPARG( imm );
2880 pa &= imm;
2881 WP( UPD7810_PORTA, pa );
2882 SET_Z(pa);
2883 }
2884
2885 /* 64 09: 0110 0100 0000 1001 xxxx xxxx */
ANI_PB_xx(void)2886 static void ANI_PB_xx(void)
2887 {
2888 UINT8 pb = RP( UPD7810_PORTB), imm;
2889 RDOPARG( imm );
2890 pb &= imm;
2891 WP( UPD7810_PORTB, pb );
2892 SET_Z(pb);
2893 }
2894
2895 /* 64 0a: 0110 0100 0000 1010 xxxx xxxx */
ANI_PC_xx(void)2896 static void ANI_PC_xx(void)
2897 {
2898 UINT8 pc = RP( UPD7810_PORTC), imm;
2899 RDOPARG( imm );
2900 pc &= imm;
2901 WP( UPD7810_PORTC, pc );
2902 SET_Z(pc);
2903 }
2904
2905 /* 64 0b: 0110 0100 0000 1011 xxxx xxxx */
ANI_PD_xx(void)2906 static void ANI_PD_xx(void)
2907 {
2908 UINT8 pd = RP( UPD7810_PORTD ), imm;
2909 RDOPARG( imm );
2910 pd &= imm;
2911 WP( UPD7810_PORTD, pd );
2912 SET_Z(pd);
2913 }
2914
2915 /* 64 0d: 0110 0100 0000 1101 xxxx xxxx */
ANI_PF_xx(void)2916 static void ANI_PF_xx(void)
2917 {
2918 UINT8 pf = RP( UPD7810_PORTF ), imm;
2919 RDOPARG( imm );
2920 pf &= imm;
2921 WP( UPD7810_PORTF, pf );
2922 SET_Z(pf);
2923 }
2924
2925 /* 64 0e: 0110 0100 0000 1110 xxxx xxxx */
ANI_MKH_xx(void)2926 static void ANI_MKH_xx(void)
2927 {
2928 UINT8 imm;
2929 RDOPARG( imm );
2930 MKH &= imm;
2931 SET_Z(MKH);
2932 }
2933
2934 /* 64 0f: 0110 0100 0000 1111 xxxx xxxx */
ANI_MKL_xx(void)2935 static void ANI_MKL_xx(void)
2936 {
2937 UINT8 imm;
2938 RDOPARG( imm );
2939 MKL &= imm;
2940 SET_Z(MKL);
2941 }
2942
2943 /* 64 10: 0110 0100 0001 0000 xxxx xxxx */
XRI_PA_xx(void)2944 static void XRI_PA_xx(void)
2945 {
2946 UINT8 pa = RP( UPD7810_PORTA ), imm;
2947 RDOPARG( imm );
2948 pa ^= imm;
2949 WP( UPD7810_PORTA, pa );
2950 SET_Z(pa);
2951 }
2952
2953 /* 64 11: 0110 0100 0001 0001 xxxx xxxx */
XRI_PB_xx(void)2954 static void XRI_PB_xx(void)
2955 {
2956 UINT8 pb = RP( UPD7810_PORTB ), imm;
2957 RDOPARG( imm );
2958 pb ^= imm;
2959 WP( UPD7810_PORTB, pb );
2960 SET_Z(pb);
2961 }
2962
2963 /* 64 12: 0110 0100 0001 0010 xxxx xxxx */
XRI_PC_xx(void)2964 static void XRI_PC_xx(void)
2965 {
2966 UINT8 pc = RP( UPD7810_PORTC ), imm;
2967 RDOPARG( imm );
2968 pc ^= imm;
2969 WP( UPD7810_PORTC, pc );
2970 SET_Z(pc);
2971 }
2972
2973 /* 64 13: 0110 0100 0001 0011 xxxx xxxx */
XRI_PD_xx(void)2974 static void XRI_PD_xx(void)
2975 {
2976 UINT8 pd = RP( UPD7810_PORTD ), imm;
2977 RDOPARG( imm );
2978 pd ^= imm;
2979 WP( UPD7810_PORTD, pd );
2980 SET_Z(pd);
2981 }
2982
2983 /* 64 15: 0110 0100 0001 0101 xxxx xxxx */
XRI_PF_xx(void)2984 static void XRI_PF_xx(void)
2985 {
2986 UINT8 pf = RP( UPD7810_PORTF ), imm;
2987 RDOPARG( imm );
2988 pf ^= imm;
2989 WP( UPD7810_PORTF, pf );
2990 SET_Z(pf);
2991 }
2992
2993 /* 64 16: 0110 0100 0001 0110 xxxx xxxx */
XRI_MKH_xx(void)2994 static void XRI_MKH_xx(void)
2995 {
2996 UINT8 imm;
2997 RDOPARG( imm );
2998 MKH ^= imm;
2999 SET_Z(MKH);
3000 }
3001
3002 /* 64 17: 0110 0100 0001 0111 xxxx xxxx */
XRI_MKL_xx(void)3003 static void XRI_MKL_xx(void)
3004 {
3005 UINT8 imm;
3006 RDOPARG( imm );
3007 MKL ^= imm;
3008 SET_Z(MKL);
3009 }
3010
3011 /* 64 18: 0110 0100 0001 1000 xxxx xxxx */
ORI_PA_xx(void)3012 static void ORI_PA_xx(void)
3013 {
3014 UINT8 pa = RP( UPD7810_PORTA ), imm;
3015 RDOPARG( imm );
3016 pa |= imm;
3017 WP( UPD7810_PORTA, pa );
3018 SET_Z(pa);
3019 }
3020
3021 /* 64 19: 0110 0100 0001 1001 xxxx xxxx */
ORI_PB_xx(void)3022 static void ORI_PB_xx(void)
3023 {
3024 UINT8 pb = RP( UPD7810_PORTB ), imm;
3025 RDOPARG( imm );
3026 pb |= imm;
3027 WP( UPD7810_PORTB, pb );
3028 SET_Z(pb);
3029 }
3030
3031 /* 64 1a: 0110 0100 0001 1010 xxxx xxxx */
ORI_PC_xx(void)3032 static void ORI_PC_xx(void)
3033 {
3034 UINT8 pc = RP( UPD7810_PORTC ), imm;
3035 RDOPARG( imm );
3036 pc |= imm;
3037 WP( UPD7810_PORTC, pc );
3038 SET_Z(pc);
3039 }
3040
3041 /* 64 1b: 0110 0100 0001 1011 xxxx xxxx */
ORI_PD_xx(void)3042 static void ORI_PD_xx(void)
3043 {
3044 UINT8 pd = RP( UPD7810_PORTD ), imm;
3045 RDOPARG( imm );
3046 pd |= imm;
3047 WP( UPD7810_PORTD, pd );
3048 SET_Z(pd);
3049 }
3050
3051 /* 64 1d: 0110 0100 0001 1101 xxxx xxxx */
ORI_PF_xx(void)3052 static void ORI_PF_xx(void)
3053 {
3054 UINT8 pf = RP( UPD7810_PORTF ), imm;
3055 RDOPARG( imm );
3056 pf |= imm;
3057 WP( UPD7810_PORTF, pf );
3058 SET_Z(pf);
3059 }
3060
3061 /* 64 1e: 0110 0100 0001 1110 xxxx xxxx */
ORI_MKH_xx(void)3062 static void ORI_MKH_xx(void)
3063 {
3064 UINT8 imm;
3065 RDOPARG( imm );
3066 MKH |= imm;
3067 SET_Z(MKH);
3068 }
3069
3070 /* 64 1f: 0110 0100 0001 1111 xxxx xxxx */
ORI_MKL_xx(void)3071 static void ORI_MKL_xx(void)
3072 {
3073 UINT8 imm;
3074 RDOPARG( imm );
3075 MKL |= imm;
3076 SET_Z(MKL);
3077 }
3078
3079 /* 64 20: 0110 0100 0010 0000 xxxx xxxx */
ADINC_PA_xx(void)3080 static void ADINC_PA_xx(void)
3081 {
3082 UINT8 pa = RP( UPD7810_PORTA );
3083 UINT8 tmp, imm;
3084
3085 RDOPARG( imm );
3086 tmp = pa + imm;
3087
3088 ZHC_ADD( tmp, pa, 0 );
3089 WP( UPD7810_PORTA , tmp );
3090 SKIP_NC;
3091 }
3092
3093 /* 64 21: 0110 0100 0010 0001 xxxx xxxx */
ADINC_PB_xx(void)3094 static void ADINC_PB_xx(void)
3095 {
3096 UINT8 pb = RP( UPD7810_PORTB );
3097 UINT8 tmp, imm;
3098
3099 RDOPARG( imm );
3100 tmp = pb + imm;
3101
3102 ZHC_ADD( tmp, pb, 0 );
3103 WP( UPD7810_PORTB, tmp );
3104 SKIP_NC;
3105 }
3106
3107 /* 64 22: 0110 0100 0010 0010 xxxx xxxx */
ADINC_PC_xx(void)3108 static void ADINC_PC_xx(void)
3109 {
3110 UINT8 pc = RP( UPD7810_PORTC );
3111 UINT8 tmp, imm;
3112
3113 RDOPARG( imm );
3114 tmp = pc + imm;
3115
3116 ZHC_ADD( tmp, pc, 0 );
3117 WP( UPD7810_PORTC, tmp );
3118 SKIP_NC;
3119 }
3120
3121 /* 64 23: 0110 0100 0010 0011 xxxx xxxx */
ADINC_PD_xx(void)3122 static void ADINC_PD_xx(void)
3123 {
3124 UINT8 pd = RP( UPD7810_PORTD );
3125 UINT8 tmp, imm;
3126
3127 RDOPARG( imm );
3128 tmp = pd + imm;
3129
3130 ZHC_ADD( tmp, pd, 0 );
3131 WP( UPD7810_PORTD, tmp );
3132 SKIP_NC;
3133 }
3134
3135 /* 64 25: 0110 0100 0010 0101 xxxx xxxx */
ADINC_PF_xx(void)3136 static void ADINC_PF_xx(void)
3137 {
3138 UINT8 pf = RP( UPD7810_PORTF );
3139 UINT8 tmp, imm;
3140
3141 RDOPARG( imm );
3142 tmp = pf + imm;
3143
3144 ZHC_ADD( tmp, pf, 0 );
3145 WP( UPD7810_PORTF, tmp );
3146 SKIP_NC;
3147 }
3148
3149 /* 64 26: 0110 0100 0010 0110 xxxx xxxx */
ADINC_MKH_xx(void)3150 static void ADINC_MKH_xx(void)
3151 {
3152 UINT8 tmp, imm;
3153
3154 RDOPARG( imm );
3155 tmp = MKH + imm;
3156
3157 ZHC_ADD( tmp, MKH, 0 );
3158 MKH = tmp;
3159 SKIP_NC;
3160 }
3161
3162 /* 64 27: 0110 0100 0010 0111 xxxx xxxx */
ADINC_MKL_xx(void)3163 static void ADINC_MKL_xx(void)
3164 {
3165 UINT8 tmp, imm;
3166
3167 RDOPARG( imm );
3168 tmp = MKL + imm;
3169
3170 ZHC_ADD( tmp, MKL, 0 );
3171 MKL = tmp;
3172 SKIP_NC;
3173 }
3174
3175 /* 64 28: 0110 0100 0010 1000 xxxx xxxx */
GTI_PA_xx(void)3176 static void GTI_PA_xx(void)
3177 {
3178 UINT8 pa = RP( UPD7810_PORTA ), imm;
3179 UINT16 tmp;
3180
3181 RDOPARG( imm );
3182 tmp = pa - imm - 1;
3183 ZHC_SUB( tmp, pa, 0 );
3184
3185 SKIP_NC;
3186 }
3187
3188 /* 64 29: 0110 0100 0010 1001 xxxx xxxx */
GTI_PB_xx(void)3189 static void GTI_PB_xx(void)
3190 {
3191 UINT8 pb = RP( UPD7810_PORTB ), imm;
3192 UINT16 tmp;
3193
3194 RDOPARG( imm );
3195 tmp = pb - imm - 1;
3196 ZHC_SUB( tmp, pb, 0 );
3197
3198 SKIP_NC;
3199 }
3200
3201 /* 64 2a: 0110 0100 0010 1010 xxxx xxxx */
GTI_PC_xx(void)3202 static void GTI_PC_xx(void)
3203 {
3204 UINT8 pc = RP( UPD7810_PORTC ), imm;
3205 UINT16 tmp;
3206
3207 RDOPARG( imm );
3208 tmp = pc - imm - 1;
3209 ZHC_SUB( tmp, pc, 0 );
3210
3211 SKIP_NC;
3212 }
3213
3214 /* 64 2b: 0110 0100 0010 1011 xxxx xxxx */
GTI_PD_xx(void)3215 static void GTI_PD_xx(void)
3216 {
3217 UINT8 pd = RP( UPD7810_PORTD ), imm;
3218 UINT16 tmp;
3219
3220 RDOPARG( imm );
3221 tmp = pd - imm - 1;
3222 ZHC_SUB( tmp, pd, 0 );
3223
3224 SKIP_NC;
3225 }
3226
3227 /* 64 2d: 0110 0100 0010 1101 xxxx xxxx */
GTI_PF_xx(void)3228 static void GTI_PF_xx(void)
3229 {
3230 UINT8 pf = RP( UPD7810_PORTF ), imm;
3231 UINT16 tmp;
3232
3233 RDOPARG( imm );
3234 tmp = pf - imm - 1;
3235 ZHC_SUB( tmp, pf, 0 );
3236
3237 SKIP_NC;
3238 }
3239
3240 /* 64 2e: 0110 0100 0010 1110 xxxx xxxx */
GTI_MKH_xx(void)3241 static void GTI_MKH_xx(void)
3242 {
3243 UINT8 imm;
3244 UINT16 tmp;
3245
3246 RDOPARG( imm );
3247 tmp = MKH - imm - 1;
3248 ZHC_SUB( tmp, MKH, 0 );
3249
3250 SKIP_NC;
3251 }
3252
3253 /* 64 2f: 0110 0100 0010 1111 xxxx xxxx */
GTI_MKL_xx(void)3254 static void GTI_MKL_xx(void)
3255 {
3256 UINT8 imm;
3257 UINT16 tmp;
3258
3259 RDOPARG( imm );
3260 tmp = MKL - imm - 1;
3261 ZHC_SUB( tmp, MKL, 0 );
3262
3263 SKIP_NC;
3264 }
3265
3266 /* 64 30: 0110 0100 0011 0000 xxxx xxxx */
SUINB_PA_xx(void)3267 static void SUINB_PA_xx(void)
3268 {
3269 UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
3270
3271 RDOPARG( imm );
3272 tmp = pa - imm;
3273 ZHC_SUB( tmp, pa, 0 );
3274 pa = tmp;
3275 WP( UPD7810_PORTA, pa );
3276 SKIP_NC;
3277 }
3278
3279 /* 64 31: 0110 0100 0011 0001 xxxx xxxx */
SUINB_PB_xx(void)3280 static void SUINB_PB_xx(void)
3281 {
3282 UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
3283
3284 RDOPARG( imm );
3285 tmp = pb - imm;
3286 ZHC_SUB( tmp, pb, 0 );
3287 pb = tmp;
3288 WP( UPD7810_PORTB, pb );
3289 SKIP_NC;
3290 }
3291
3292 /* 64 32: 0110 0100 0011 0010 xxxx xxxx */
SUINB_PC_xx(void)3293 static void SUINB_PC_xx(void)
3294 {
3295 UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
3296
3297 RDOPARG( imm );
3298 tmp = pc - imm;
3299 ZHC_SUB( tmp, pc, 0 );
3300 pc = tmp;
3301 WP( UPD7810_PORTC, pc );
3302 SKIP_NC;
3303 }
3304
3305 /* 64 33: 0110 0100 0011 0011 xxxx xxxx */
SUINB_PD_xx(void)3306 static void SUINB_PD_xx(void)
3307 {
3308 UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
3309
3310 RDOPARG( imm );
3311 tmp = pd - imm;
3312 ZHC_SUB( tmp, pd, 0 );
3313 pd = tmp;
3314 WP( UPD7810_PORTD, pd );
3315 SKIP_NC;
3316 }
3317
3318 /* 64 35: 0110 0100 0011 0101 xxxx xxxx */
SUINB_PF_xx(void)3319 static void SUINB_PF_xx(void)
3320 {
3321 UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
3322
3323 RDOPARG( imm );
3324 tmp = pf - imm;
3325 ZHC_SUB( tmp, pf, 0 );
3326 pf = tmp;
3327 WP( UPD7810_PORTF, pf );
3328 SKIP_NC;
3329 }
3330
3331 /* 64 36: 0110 0100 0011 0110 xxxx xxxx */
SUINB_MKH_xx(void)3332 static void SUINB_MKH_xx(void)
3333 {
3334 UINT8 tmp, imm;
3335
3336 RDOPARG( imm );
3337 tmp = MKH - imm;
3338 ZHC_SUB( tmp, MKH, 0 );
3339 MKH = tmp;
3340 SKIP_NC;
3341 }
3342
3343 /* 64 37: 0110 0100 0011 0111 xxxx xxxx */
SUINB_MKL_xx(void)3344 static void SUINB_MKL_xx(void)
3345 {
3346 UINT8 tmp, imm;
3347
3348 RDOPARG( imm );
3349 tmp = MKL - imm;
3350 ZHC_SUB( tmp, MKL, 0 );
3351 MKL = tmp;
3352 SKIP_NC;
3353 }
3354
3355 /* 64 38: 0110 0100 0011 1000 xxxx xxxx */
LTI_PA_xx(void)3356 static void LTI_PA_xx(void)
3357 {
3358 UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
3359 RDOPARG( imm );
3360 tmp = pa - imm;
3361 ZHC_SUB( tmp, pa, 0 );
3362 SKIP_CY;
3363 }
3364
3365 /* 64 39: 0110 0100 0011 1001 xxxx xxxx */
LTI_PB_xx(void)3366 static void LTI_PB_xx(void)
3367 {
3368 UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
3369 RDOPARG( imm );
3370 tmp = pb - imm;
3371 ZHC_SUB( tmp, pb, 0 );
3372 SKIP_CY;
3373 }
3374
3375 /* 64 3a: 0110 0100 0011 1010 xxxx xxxx */
LTI_PC_xx(void)3376 static void LTI_PC_xx(void)
3377 {
3378 UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
3379 RDOPARG( imm );
3380 tmp = pc - imm;
3381 ZHC_SUB( tmp, pc, 0 );
3382 SKIP_CY;
3383 }
3384
3385 /* 64 3b: 0110 0100 0011 1011 xxxx xxxx */
LTI_PD_xx(void)3386 static void LTI_PD_xx(void)
3387 {
3388 UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
3389 RDOPARG( imm );
3390 tmp = pd - imm;
3391 ZHC_SUB( tmp, pd, 0 );
3392 SKIP_CY;
3393 }
3394
3395 /* 64 3d: 0110 0100 0011 1101 xxxx xxxx */
LTI_PF_xx(void)3396 static void LTI_PF_xx(void)
3397 {
3398 UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
3399 RDOPARG( imm );
3400 tmp = pf - imm;
3401 ZHC_SUB( tmp, pf, 0 );
3402 SKIP_CY;
3403 }
3404
3405 /* 64 3e: 0110 0100 0011 1110 xxxx xxxx */
LTI_MKH_xx(void)3406 static void LTI_MKH_xx(void)
3407 {
3408 UINT8 tmp, imm;
3409
3410 RDOPARG( imm );
3411 tmp = MKH - imm;
3412 ZHC_SUB( tmp, MKH, 0 );
3413 SKIP_CY;
3414 }
3415
3416 /* 64 3f: 0110 0100 0011 1111 xxxx xxxx */
LTI_MKL_xx(void)3417 static void LTI_MKL_xx(void)
3418 {
3419 UINT8 tmp, imm;
3420
3421 RDOPARG( imm );
3422 tmp = MKL - imm;
3423 ZHC_SUB( tmp, MKL, 0 );
3424 SKIP_CY;
3425 }
3426
3427 /* 64 40: 0110 0100 0100 0000 xxxx xxxx */
ADI_PA_xx(void)3428 static void ADI_PA_xx(void)
3429 {
3430 UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
3431
3432 RDOPARG( imm );
3433 tmp = pa + imm;
3434 ZHC_ADD( tmp, pa, 0 );
3435 pa = tmp;
3436 WP( UPD7810_PORTA, pa );
3437 }
3438
3439 /* 64 41: 0110 0100 0100 0001 xxxx xxxx */
ADI_PB_xx(void)3440 static void ADI_PB_xx(void)
3441 {
3442 UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
3443
3444 RDOPARG( imm );
3445 tmp = pb + imm;
3446 ZHC_ADD( tmp, pb, 0 );
3447 pb = tmp;
3448 WP( UPD7810_PORTB, pb );
3449 }
3450
3451 /* 64 42: 0110 0100 0100 0010 xxxx xxxx */
ADI_PC_xx(void)3452 static void ADI_PC_xx(void)
3453 {
3454 UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
3455
3456 RDOPARG( imm );
3457 tmp = pc + imm;
3458 ZHC_ADD( tmp, pc, 0 );
3459 pc = tmp;
3460 WP( UPD7810_PORTC, pc );
3461 }
3462
3463 /* 64 43: 0110 0100 0100 0011 xxxx xxxx */
ADI_PD_xx(void)3464 static void ADI_PD_xx(void)
3465 {
3466 UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
3467
3468 RDOPARG( imm );
3469 tmp = pd + imm;
3470 ZHC_ADD( tmp, pd, 0 );
3471 pd = tmp;
3472 WP( UPD7810_PORTD, pd );
3473 }
3474
3475 /* 64 45: 0110 0100 0100 0101 xxxx xxxx */
ADI_PF_xx(void)3476 static void ADI_PF_xx(void)
3477 {
3478 UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
3479
3480 RDOPARG( imm );
3481 tmp = pf + imm;
3482 ZHC_ADD( tmp, pf, 0 );
3483 pf = tmp;
3484 WP( UPD7810_PORTF, pf );
3485 }
3486
3487 /* 64 46: 0110 0100 0100 0110 xxxx xxxx */
ADI_MKH_xx(void)3488 static void ADI_MKH_xx(void)
3489 {
3490 UINT8 tmp, imm;
3491
3492 RDOPARG( imm );
3493 tmp = MKH + imm;
3494 ZHC_ADD( tmp, MKH, 0 );
3495 MKH = tmp;
3496 }
3497
3498 /* 64 47: 0110 0100 0100 0111 xxxx xxxx */
ADI_MKL_xx(void)3499 static void ADI_MKL_xx(void)
3500 {
3501 UINT8 tmp, imm;
3502
3503 RDOPARG( imm );
3504 tmp = MKL + imm;
3505 ZHC_ADD( tmp, MKL, 0 );
3506 MKL = tmp;
3507 }
3508
3509 /* 64 48: 0110 0100 0100 1000 xxxx xxxx */
ONI_PA_xx(void)3510 static void ONI_PA_xx(void)
3511 {
3512 UINT8 pa = RP( UPD7810_PORTA ), imm;
3513
3514 RDOPARG( imm );
3515 if (pa & imm)
3516 PSW |= SK;
3517 }
3518
3519 /* 64 49: 0110 0100 0100 1001 xxxx xxxx */
ONI_PB_xx(void)3520 static void ONI_PB_xx(void)
3521 {
3522 UINT8 pb = RP( UPD7810_PORTB ), imm;
3523
3524 RDOPARG( imm );
3525 if (pb & imm)
3526 PSW |= SK;
3527 }
3528
3529 /* 64 4a: 0110 0100 0100 1010 xxxx xxxx */
ONI_PC_xx(void)3530 static void ONI_PC_xx(void)
3531 {
3532 UINT8 pc = RP( UPD7810_PORTC ), imm;
3533
3534 RDOPARG( imm );
3535 if (pc & imm)
3536 PSW |= SK;
3537 }
3538
3539 /* 64 4b: 0110 0100 0100 1011 xxxx xxxx */
ONI_PD_xx(void)3540 static void ONI_PD_xx(void)
3541 {
3542 UINT8 pd = RP( UPD7810_PORTD ), imm;
3543
3544 RDOPARG( imm );
3545 if (pd & imm)
3546 PSW |= SK;
3547 }
3548
3549 /* 64 4d: 0110 0100 0100 1101 xxxx xxxx */
ONI_PF_xx(void)3550 static void ONI_PF_xx(void)
3551 {
3552 UINT8 pf = RP( UPD7810_PORTF ), imm;
3553
3554 RDOPARG( imm );
3555 if (pf & imm)
3556 PSW |= SK;
3557 }
3558
3559 /* 64 4e: 0110 0100 0100 1110 xxxx xxxx */
ONI_MKH_xx(void)3560 static void ONI_MKH_xx(void)
3561 {
3562 UINT8 imm;
3563
3564 RDOPARG( imm );
3565 if (MKH & imm)
3566 PSW |= SK;
3567 }
3568
3569 /* 64 4f: 0110 0100 0100 1111 xxxx xxxx */
ONI_MKL_xx(void)3570 static void ONI_MKL_xx(void)
3571 {
3572 UINT8 imm;
3573
3574 RDOPARG( imm );
3575 if (MKL & imm)
3576 PSW |= SK;
3577 }
3578
3579 /* 64 50: 0110 0100 0101 0000 xxxx xxxx */
ACI_PA_xx(void)3580 static void ACI_PA_xx(void)
3581 {
3582 UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
3583
3584 RDOPARG( imm );
3585 tmp = pa + imm + (PSW & CY);
3586 ZHC_ADD( tmp, pa, (PSW & CY) );
3587 pa = tmp;
3588 WP( UPD7810_PORTA, pa );
3589 }
3590
3591 /* 64 51: 0110 0100 0101 0001 xxxx xxxx */
ACI_PB_xx(void)3592 static void ACI_PB_xx(void)
3593 {
3594 UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
3595
3596 RDOPARG( imm );
3597 tmp = pb + imm + (PSW & CY);
3598 ZHC_ADD( tmp, pb, (PSW & CY) );
3599 pb = tmp;
3600 WP( UPD7810_PORTB, pb );
3601 }
3602
3603 /* 64 52: 0110 0100 0101 0010 xxxx xxxx */
ACI_PC_xx(void)3604 static void ACI_PC_xx(void)
3605 {
3606 UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
3607
3608 RDOPARG( imm );
3609 tmp = pc + imm + (PSW & CY);
3610 ZHC_ADD( tmp, pc, (PSW & CY) );
3611 pc = tmp;
3612 WP( UPD7810_PORTC, pc );
3613 }
3614
3615 /* 64 53: 0110 0100 0101 0011 xxxx xxxx */
ACI_PD_xx(void)3616 static void ACI_PD_xx(void)
3617 {
3618 UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
3619
3620 RDOPARG( imm );
3621 tmp = pd + imm + (PSW & CY);
3622 ZHC_ADD( tmp, pd, (PSW & CY) );
3623 pd = tmp;
3624 WP( UPD7810_PORTD, pd );
3625 }
3626
3627 /* 64 55: 0110 0100 0101 0101 xxxx xxxx */
ACI_PF_xx(void)3628 static void ACI_PF_xx(void)
3629 {
3630 UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
3631
3632 RDOPARG( imm );
3633 tmp = pf + imm + (PSW & CY);
3634 ZHC_ADD( tmp, pf, (PSW & CY) );
3635 pf = tmp;
3636 WP( UPD7810_PORTF, pf );
3637 }
3638
3639 /* 64 56: 0110 0100 0101 0110 xxxx xxxx */
ACI_MKH_xx(void)3640 static void ACI_MKH_xx(void)
3641 {
3642 UINT8 imm, tmp;
3643
3644 RDOPARG( imm );
3645 tmp = MKH + imm + (PSW & CY);
3646 ZHC_ADD( tmp, MKH, (PSW & CY) );
3647 MKH = tmp;
3648 }
3649
3650 /* 64 57: 0110 0100 0101 0111 xxxx xxxx */
ACI_MKL_xx(void)3651 static void ACI_MKL_xx(void)
3652 {
3653 UINT8 imm, tmp;
3654
3655 RDOPARG( imm );
3656 tmp = MKL + imm + (PSW & CY);
3657 ZHC_ADD( tmp, MKL, (PSW & CY) );
3658 MKL = tmp;
3659 }
3660
3661 /* 64 58: 0110 0100 0101 1000 xxxx xxxx */
OFFI_PA_xx(void)3662 static void OFFI_PA_xx(void)
3663 {
3664 UINT8 pa = RP( UPD7810_PORTA ), imm;
3665
3666 RDOPARG( imm );
3667 if (0 == (pa & imm))
3668 PSW |= SK;
3669 }
3670
3671 /* 64 59: 0110 0100 0101 1001 xxxx xxxx */
OFFI_PB_xx(void)3672 static void OFFI_PB_xx(void)
3673 {
3674 UINT8 pb = RP( UPD7810_PORTB ), imm;
3675
3676 RDOPARG( imm );
3677 if (0 == (pb & imm))
3678 PSW |= SK;
3679 }
3680
3681 /* 64 5a: 0110 0100 0101 1010 xxxx xxxx */
OFFI_PC_xx(void)3682 static void OFFI_PC_xx(void)
3683 {
3684 UINT8 pc = RP( UPD7810_PORTC ), imm;
3685
3686 RDOPARG( imm );
3687 if (0 == (pc & imm))
3688 PSW |= SK;
3689 }
3690
3691 /* 64 5b: 0110 0100 0101 1011 xxxx xxxx */
OFFI_PD_xx(void)3692 static void OFFI_PD_xx(void)
3693 {
3694 UINT8 pd = RP( UPD7810_PORTD ), imm;
3695
3696 RDOPARG( imm );
3697 if (0 == (pd & imm))
3698 PSW |= SK;
3699 }
3700
3701 /* 64 5d: 0110 0100 0101 1101 xxxx xxxx */
OFFI_PF_xx(void)3702 static void OFFI_PF_xx(void)
3703 {
3704 UINT8 pf = RP( UPD7810_PORTF ), imm;
3705
3706 RDOPARG( imm );
3707 if (0 == (pf & imm))
3708 PSW |= SK;
3709 }
3710
3711 /* 64 5e: 0110 0100 0101 1110 xxxx xxxx */
OFFI_MKH_xx(void)3712 static void OFFI_MKH_xx(void)
3713 {
3714 UINT8 imm;
3715
3716 RDOPARG( imm );
3717 if (0 == (MKH & imm))
3718 PSW |= SK;
3719 }
3720
3721 /* 64 5f: 0110 0100 0101 1111 xxxx xxxx */
OFFI_MKL_xx(void)3722 static void OFFI_MKL_xx(void)
3723 {
3724 UINT8 imm;
3725
3726 RDOPARG( imm );
3727 if (0 == (MKL & imm))
3728 PSW |= SK;
3729 }
3730
3731 /* 64 60: 0110 0100 0110 0000 xxxx xxxx */
SUI_PA_xx(void)3732 static void SUI_PA_xx(void)
3733 {
3734 UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
3735
3736 RDOPARG( imm );
3737 tmp = pa - imm;
3738 ZHC_SUB( tmp, pa, 0 );
3739 pa = tmp;
3740 WP( UPD7810_PORTA, pa );
3741 }
3742
3743 /* 64 61: 0110 0100 0110 0001 xxxx xxxx */
SUI_PB_xx(void)3744 static void SUI_PB_xx(void)
3745 {
3746 UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
3747
3748 RDOPARG( imm );
3749 tmp = pb - imm;
3750 ZHC_SUB( tmp, pb, 0 );
3751 pb = tmp;
3752 WP( UPD7810_PORTB, pb );
3753 }
3754
3755 /* 64 62: 0110 0100 0110 0010 xxxx xxxx */
SUI_PC_xx(void)3756 static void SUI_PC_xx(void)
3757 {
3758 UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
3759
3760 RDOPARG( imm );
3761 tmp = pc - imm;
3762 ZHC_SUB( tmp, pc, 0 );
3763 pc = tmp;
3764 WP( UPD7810_PORTC, pc );
3765 }
3766
3767 /* 64 63: 0110 0100 0110 0011 xxxx xxxx */
SUI_PD_xx(void)3768 static void SUI_PD_xx(void)
3769 {
3770 UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
3771
3772 RDOPARG( imm );
3773 tmp = pd - imm;
3774 ZHC_SUB( tmp, pd, 0 );
3775 pd = tmp;
3776 WP( UPD7810_PORTD, pd );
3777 }
3778
3779 /* 64 65: 0110 0100 0110 0101 xxxx xxxx */
SUI_PF_xx(void)3780 static void SUI_PF_xx(void)
3781 {
3782 UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
3783
3784 RDOPARG( imm );
3785 tmp = pf - imm;
3786 ZHC_SUB( tmp, pf, 0 );
3787 pf = tmp;
3788 WP( UPD7810_PORTF, pf );
3789 }
3790
3791 /* 64 66: 0110 0100 0110 0110 xxxx xxxx */
SUI_MKH_xx(void)3792 static void SUI_MKH_xx(void)
3793 {
3794 UINT8 tmp, imm;
3795
3796 RDOPARG( imm );
3797 tmp = MKH - imm;
3798 ZHC_SUB( tmp, MKH, 0 );
3799 MKH = tmp;
3800 }
3801
3802 /* 64 67: 0110 0100 0110 0111 xxxx xxxx */
SUI_MKL_xx(void)3803 static void SUI_MKL_xx(void)
3804 {
3805 UINT8 tmp, imm;
3806
3807 RDOPARG( imm );
3808 tmp = MKL - imm;
3809 ZHC_SUB( tmp, MKL, 0 );
3810 MKL = tmp;
3811 }
3812
3813 /* 64 68: 0110 0100 0110 1000 xxxx xxxx */
NEI_PA_xx(void)3814 static void NEI_PA_xx(void)
3815 {
3816 UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
3817
3818 RDOPARG( imm );
3819 tmp = pa - imm;
3820 ZHC_SUB( tmp, pa, 0 );
3821 SKIP_NZ;
3822 }
3823
3824 /* 64 69: 0110 0100 0110 1001 xxxx xxxx */
NEI_PB_xx(void)3825 static void NEI_PB_xx(void)
3826 {
3827 UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
3828
3829 RDOPARG( imm );
3830 tmp = pb - imm;
3831 ZHC_SUB( tmp, pb, 0 );
3832 SKIP_NZ;
3833 }
3834
3835 /* 64 6a: 0110 0100 0110 1010 xxxx xxxx */
NEI_PC_xx(void)3836 static void NEI_PC_xx(void)
3837 {
3838 UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
3839
3840 RDOPARG( imm );
3841 tmp = pc - imm;
3842 ZHC_SUB( tmp, pc, 0 );
3843 SKIP_NZ;
3844 }
3845
3846 /* 64 6b: 0110 0100 0110 1011 xxxx xxxx */
NEI_PD_xx(void)3847 static void NEI_PD_xx(void)
3848 {
3849 UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
3850
3851 RDOPARG( imm );
3852 tmp = pd - imm;
3853 ZHC_SUB( tmp, pd, 0 );
3854 SKIP_NZ;
3855 }
3856
3857 /* 64 6d: 0110 0100 0110 1101 xxxx xxxx */
NEI_PF_xx(void)3858 static void NEI_PF_xx(void)
3859 {
3860 UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
3861
3862 RDOPARG( imm );
3863 tmp = pf - imm;
3864 ZHC_SUB( tmp, pf, 0 );
3865 SKIP_NZ;
3866 }
3867
3868 /* 64 6e: 0110 0100 0110 1110 xxxx xxxx */
NEI_MKH_xx(void)3869 static void NEI_MKH_xx(void)
3870 {
3871 UINT8 tmp, imm;
3872
3873 RDOPARG( imm );
3874 tmp = MKH - imm;
3875 ZHC_SUB( tmp, MKH, 0 );
3876 SKIP_NZ;
3877 }
3878
3879 /* 64 6f: 0110 0100 0110 1111 xxxx xxxx */
NEI_MKL_xx(void)3880 static void NEI_MKL_xx(void)
3881 {
3882 UINT8 tmp, imm;
3883
3884 RDOPARG( imm );
3885 tmp = MKL - imm;
3886 ZHC_SUB( tmp, MKL, 0 );
3887 SKIP_NZ;
3888 }
3889
3890 /* 64 70: 0110 0100 0111 0000 xxxx xxxx */
SBI_PA_xx(void)3891 static void SBI_PA_xx(void)
3892 {
3893 UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
3894
3895 RDOPARG( imm );
3896 tmp = pa - imm - (PSW & CY);
3897 ZHC_SUB( tmp, pa, (PSW & CY) );
3898 pa = tmp;
3899 WP( UPD7810_PORTA, pa );
3900 }
3901
3902 /* 64 71: 0110 0100 0111 0001 xxxx xxxx */
SBI_PB_xx(void)3903 static void SBI_PB_xx(void)
3904 {
3905 UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
3906
3907 RDOPARG( imm );
3908 tmp = pb - imm - (PSW & CY);
3909 ZHC_SUB( tmp, pb, (PSW & CY) );
3910 pb = tmp;
3911 WP( UPD7810_PORTB, pb );
3912 }
3913
3914 /* 64 72: 0110 0100 0111 0010 xxxx xxxx */
SBI_PC_xx(void)3915 static void SBI_PC_xx(void)
3916 {
3917 UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
3918
3919 RDOPARG( imm );
3920 tmp = pc - imm - (PSW & CY);
3921 ZHC_SUB( tmp, pc, (PSW & CY) );
3922 pc = tmp;
3923 WP( UPD7810_PORTC, pc );
3924 }
3925
3926 /* 64 73: 0110 0100 0111 0011 xxxx xxxx */
SBI_PD_xx(void)3927 static void SBI_PD_xx(void)
3928 {
3929 UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
3930
3931 RDOPARG( imm );
3932 tmp = pd - imm - (PSW & CY);
3933 ZHC_SUB( tmp, pd, (PSW & CY) );
3934 pd = tmp;
3935 WP( UPD7810_PORTD, pd );
3936 }
3937
3938 /* 64 75: 0110 0100 0111 0101 xxxx xxxx */
SBI_PF_xx(void)3939 static void SBI_PF_xx(void)
3940 {
3941 UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
3942
3943 RDOPARG( imm );
3944 tmp = pf - imm - (PSW & CY);
3945 ZHC_SUB( tmp, pf, (PSW & CY) );
3946 pf = tmp;
3947 WP( UPD7810_PORTF, pf );
3948 }
3949
3950 /* 64 76: 0110 0100 0111 0110 xxxx xxxx */
SBI_MKH_xx(void)3951 static void SBI_MKH_xx(void)
3952 {
3953 UINT8 tmp, imm;
3954
3955 RDOPARG( imm );
3956 tmp = MKH - imm - (PSW & CY);
3957 ZHC_SUB( tmp, MKH, (PSW & CY) );
3958 MKH = tmp;
3959 }
3960
3961 /* 64 77: 0110 0100 0111 0111 xxxx xxxx */
SBI_MKL_xx(void)3962 static void SBI_MKL_xx(void)
3963 {
3964 UINT8 tmp, imm;
3965
3966 RDOPARG( imm );
3967 tmp = MKL - imm - (PSW & CY);
3968 ZHC_SUB( tmp, MKL, (PSW & CY) );
3969 MKL = tmp;
3970 }
3971
3972 /* 64 78: 0110 0100 0111 1000 xxxx xxxx */
EQI_PA_xx(void)3973 static void EQI_PA_xx(void)
3974 {
3975 UINT8 pa = RP( UPD7810_PORTA ), tmp, imm;
3976
3977 RDOPARG( imm );
3978 tmp = pa - imm;
3979 ZHC_SUB( tmp, pa, 0 );
3980 SKIP_Z;
3981 }
3982
3983 /* 64 79: 0110 0100 0111 1001 xxxx xxxx */
EQI_PB_xx(void)3984 static void EQI_PB_xx(void)
3985 {
3986 UINT8 pb = RP( UPD7810_PORTB ), tmp, imm;
3987
3988 RDOPARG( imm );
3989 tmp = pb - imm;
3990 ZHC_SUB( tmp, pb, 0 );
3991 SKIP_Z;
3992 }
3993
3994 /* 64 7a: 0110 0100 0111 1010 xxxx xxxx */
EQI_PC_xx(void)3995 static void EQI_PC_xx(void)
3996 {
3997 UINT8 pc = RP( UPD7810_PORTC ), tmp, imm;
3998
3999 RDOPARG( imm );
4000 tmp = pc - imm;
4001 ZHC_SUB( tmp, pc, 0 );
4002 SKIP_Z;
4003 }
4004
4005 /* 64 7b: 0110 0100 0111 1011 xxxx xxxx */
EQI_PD_xx(void)4006 static void EQI_PD_xx(void)
4007 {
4008 UINT8 pd = RP( UPD7810_PORTD ), tmp, imm;
4009
4010 RDOPARG( imm );
4011 tmp = pd - imm;
4012 ZHC_SUB( tmp, pd, 0 );
4013 SKIP_Z;
4014 }
4015
4016 /* 64 7d: 0110 0100 0111 1101 xxxx xxxx */
EQI_PF_xx(void)4017 static void EQI_PF_xx(void)
4018 {
4019 UINT8 pf = RP( UPD7810_PORTF ), tmp, imm;
4020
4021 RDOPARG( imm );
4022 tmp = pf - imm;
4023 ZHC_SUB( tmp, pf, 0 );
4024 SKIP_Z;
4025 }
4026
4027 /* 64 7e: 0110 0100 0111 1110 xxxx xxxx */
EQI_MKH_xx(void)4028 static void EQI_MKH_xx(void)
4029 {
4030 UINT8 tmp, imm;
4031
4032 RDOPARG( imm );
4033 tmp = MKH - imm;
4034 ZHC_SUB( tmp, MKH, 0 );
4035 SKIP_Z;
4036 }
4037
4038 /* 64 7f: 0110 0100 0111 1111 xxxx xxxx */
EQI_MKL_xx(void)4039 static void EQI_MKL_xx(void)
4040 {
4041 UINT8 tmp, imm;
4042
4043 RDOPARG( imm );
4044 tmp = MKL - imm;
4045 ZHC_SUB( tmp, MKL, 0 );
4046 SKIP_Z;
4047 }
4048
4049 /* 64 80: 0110 0100 1000 0000 xxxx xxxx */
MVI_ANM_xx(void)4050 static void MVI_ANM_xx(void)
4051 {
4052 RDOPARG( ANM );
4053 }
4054
4055 /* 64 81: 0110 0100 1000 0001 xxxx xxxx */
MVI_SMH_xx(void)4056 static void MVI_SMH_xx(void)
4057 {
4058 RDOPARG( SMH );
4059 }
4060
4061 /* 64 83: 0110 0100 1000 0011 xxxx xxxx */
MVI_EOM_xx(void)4062 static void MVI_EOM_xx(void)
4063 {
4064 RDOPARG( EOM );
4065 upd7810_write_EOM();
4066 }
4067
4068 /* 64 85: 0110 0100 1000 0101 xxxx xxxx */
MVI_TMM_xx(void)4069 static void MVI_TMM_xx(void)
4070 {
4071 RDOPARG( TMM );
4072 }
4073
4074 /* 64 88: 0110 0100 1000 1000 xxxx xxxx */
ANI_ANM_xx(void)4075 static void ANI_ANM_xx(void)
4076 {
4077 UINT8 imm;
4078
4079 RDOPARG( imm );
4080 ANM &= imm;
4081 SET_Z(ANM);
4082 }
4083
4084 /* 64 89: 0110 0100 1000 1001 xxxx xxxx */
ANI_SMH_xx(void)4085 static void ANI_SMH_xx(void)
4086 {
4087 UINT8 imm;
4088
4089 RDOPARG( imm );
4090 SMH &= imm;
4091 SET_Z(SMH);
4092 }
4093
4094 /* 64 8b: 0110 0100 1000 1011 xxxx xxxx */
ANI_EOM_xx(void)4095 static void ANI_EOM_xx(void)
4096 {
4097 /* only bits #1 and #5 can be read */
4098 UINT8 eom = EOM & 0x22;
4099 UINT8 imm;
4100
4101 RDOPARG( imm );
4102 /* only bits #1 and #5 can be read */
4103 EOM = eom & imm;
4104 SET_Z(EOM);
4105 upd7810_write_EOM();
4106 }
4107
4108 /* 64 8d: 0110 0100 1000 1101 xxxx xxxx */
ANI_TMM_xx(void)4109 static void ANI_TMM_xx(void)
4110 {
4111 UINT8 imm;
4112
4113 RDOPARG( imm );
4114 TMM &= imm;
4115 SET_Z(TMM);
4116 }
4117
4118 /* 64 90: 0110 0100 1001 0000 xxxx xxxx */
XRI_ANM_xx(void)4119 static void XRI_ANM_xx(void)
4120 {
4121 UINT8 imm;
4122
4123 RDOPARG( imm );
4124 ANM ^= imm;
4125 SET_Z(ANM);
4126 }
4127
4128 /* 64 91: 0110 0100 1001 0001 xxxx xxxx */
XRI_SMH_xx(void)4129 static void XRI_SMH_xx(void)
4130 {
4131 UINT8 imm;
4132
4133 RDOPARG( imm );
4134 SMH ^= imm;
4135 SET_Z(SMH);
4136 }
4137
4138 /* 64 93: 0110 0100 1001 0011 xxxx xxxx */
XRI_EOM_xx(void)4139 static void XRI_EOM_xx(void)
4140 {
4141 /* only bits #1 and #5 can be read */
4142 UINT8 eom = EOM & 0x22;
4143 UINT8 imm;
4144
4145 RDOPARG( imm );
4146 /* only bits #1 and #5 can be read */
4147 EOM = eom ^ imm;
4148 SET_Z(EOM);
4149 upd7810_write_EOM();
4150 }
4151
4152 /* 64 95: 0110 0100 1001 0101 xxxx xxxx */
XRI_TMM_xx(void)4153 static void XRI_TMM_xx(void)
4154 {
4155 UINT8 imm;
4156
4157 RDOPARG( imm );
4158 TMM ^= imm;
4159 SET_Z(TMM);
4160 }
4161
4162 /* 64 98: 0110 0100 1001 1000 xxxx xxxx */
ORI_ANM_xx(void)4163 static void ORI_ANM_xx(void)
4164 {
4165 UINT8 imm;
4166
4167 RDOPARG( imm );
4168 ANM |= imm;
4169 SET_Z(ANM);
4170 }
4171
4172 /* 64 99: 0110 0100 1001 1001 xxxx xxxx */
ORI_SMH_xx(void)4173 static void ORI_SMH_xx(void)
4174 {
4175 UINT8 imm;
4176
4177 RDOPARG( imm );
4178 SMH |= imm;
4179 SET_Z(SMH);
4180 }
4181
4182 /* 64 9b: 0110 0100 1001 1011 xxxx xxxx */
ORI_EOM_xx(void)4183 static void ORI_EOM_xx(void)
4184 {
4185 /* only bits #1 and #5 can be read */
4186 UINT8 eom = EOM & 0x22;
4187 UINT8 imm;
4188
4189 RDOPARG( imm );
4190 /* only bits #1 and #5 can be read */
4191 EOM = eom | imm;
4192 SET_Z(EOM);
4193 upd7810_write_EOM();
4194 }
4195
4196 /* 64 9d: 0110 0100 1001 1101 xxxx xxxx */
ORI_TMM_xx(void)4197 static void ORI_TMM_xx(void)
4198 {
4199 UINT8 imm;
4200
4201 RDOPARG( imm );
4202 TMM |= imm;
4203 SET_Z(TMM);
4204 }
4205
4206 /* 64 a0: 0110 0100 1010 0000 xxxx xxxx */
ADINC_ANM_xx(void)4207 static void ADINC_ANM_xx(void)
4208 {
4209 UINT8 tmp, imm;
4210
4211 RDOPARG( imm );
4212 tmp = ANM + imm;
4213
4214 ZHC_ADD( tmp, ANM, 0 );
4215 ANM = tmp;
4216 SKIP_NC;
4217 }
4218
4219 /* 64 a1: 0110 0100 1010 0001 xxxx xxxx */
ADINC_SMH_xx(void)4220 static void ADINC_SMH_xx(void)
4221 {
4222 UINT8 tmp, imm;
4223
4224 RDOPARG( imm );
4225 tmp = SMH + imm;
4226
4227 ZHC_ADD( tmp, SMH, 0 );
4228 SMH = tmp;
4229 SKIP_NC;
4230 }
4231
4232 /* 64 a3: 0110 0100 1010 0011 xxxx xxxx */
ADINC_EOM_xx(void)4233 static void ADINC_EOM_xx(void)
4234 {
4235 /* only bits #1 and #5 can be read */
4236 UINT8 eom = EOM & 0x22;
4237 UINT8 tmp, imm;
4238
4239 RDOPARG( imm );
4240 /* only bits #1 and #5 can be read */
4241 tmp = eom + imm;
4242
4243 ZHC_ADD( tmp, eom, 0 );
4244 EOM = tmp;
4245 SKIP_NC;
4246 upd7810_write_EOM();
4247 }
4248
4249 /* 64 a5: 0110 0100 1010 0101 xxxx xxxx */
ADINC_TMM_xx(void)4250 static void ADINC_TMM_xx(void)
4251 {
4252 UINT8 tmp, imm;
4253
4254 RDOPARG( imm );
4255 tmp = TMM + imm;
4256
4257 ZHC_ADD( tmp, TMM, 0 );
4258 TMM = tmp;
4259 SKIP_NC;
4260 }
4261
4262 /* 64 a8: 0110 0100 1010 1000 xxxx xxxx */
GTI_ANM_xx(void)4263 static void GTI_ANM_xx(void)
4264 {
4265 UINT8 imm;
4266 UINT16 tmp;
4267
4268 RDOPARG( imm );
4269 tmp = ANM - imm - 1;
4270 ZHC_SUB( tmp, ANM, 0 );
4271
4272 SKIP_NC;
4273 }
4274
4275 /* 64 a9: 0110 0100 1010 1001 xxxx xxxx */
GTI_SMH_xx(void)4276 static void GTI_SMH_xx(void)
4277 {
4278 UINT8 imm;
4279 UINT16 tmp;
4280
4281 RDOPARG( imm );
4282 tmp = SMH - imm - 1;
4283 ZHC_SUB( tmp, SMH, 0 );
4284
4285 SKIP_NC;
4286 }
4287
4288 /* 64 ab: 0110 0100 1010 1011 xxxx xxxx */
GTI_EOM_xx(void)4289 static void GTI_EOM_xx(void)
4290 {
4291 /* only bits #1 and #5 can be read */
4292 UINT8 eom = EOM & 0x22;
4293 UINT8 imm;
4294 UINT16 tmp;
4295
4296 RDOPARG( imm );
4297 tmp = eom - imm - 1;
4298 ZHC_SUB( tmp, eom, 0 );
4299
4300 SKIP_NC;
4301 }
4302
4303 /* 64 ad: 0110 0100 1010 1101 xxxx xxxx */
GTI_TMM_xx(void)4304 static void GTI_TMM_xx(void)
4305 {
4306 UINT8 imm;
4307 UINT16 tmp;
4308
4309 RDOPARG( imm );
4310 tmp = TMM - imm - 1;
4311 ZHC_SUB( tmp, TMM, 0 );
4312
4313 SKIP_NC;
4314 }
4315
4316 /* 64 b0: 0110 0100 1011 0000 xxxx xxxx */
SUINB_ANM_xx(void)4317 static void SUINB_ANM_xx(void)
4318 {
4319 UINT8 tmp, imm;
4320
4321 RDOPARG( imm );
4322 tmp = ANM - imm;
4323 ZHC_SUB( tmp, ANM, 0 );
4324 ANM = tmp;
4325 SKIP_NC;
4326 }
4327
4328 /* 64 b1: 0110 0100 1011 0001 xxxx xxxx */
SUINB_SMH_xx(void)4329 static void SUINB_SMH_xx(void)
4330 {
4331 UINT8 tmp, imm;
4332
4333 RDOPARG( imm );
4334 tmp = SMH - imm;
4335 ZHC_SUB( tmp, SMH, 0 );
4336 SMH = tmp;
4337 SKIP_NC;
4338 }
4339
4340 /* 64 b3: 0110 0100 1011 0011 xxxx xxxx */
SUINB_EOM_xx(void)4341 static void SUINB_EOM_xx(void)
4342 {
4343 /* only bits #1 and #5 can be read */
4344 UINT8 eom = EOM & 0x22;
4345 UINT8 tmp, imm;
4346
4347 RDOPARG( imm );
4348 tmp = eom - imm;
4349 ZHC_SUB( tmp, eom, 0 );
4350 EOM = tmp;
4351 SKIP_NC;
4352 upd7810_write_EOM();
4353 }
4354
4355 /* 64 b5: 0110 0100 1011 0101 xxxx xxxx */
SUINB_TMM_xx(void)4356 static void SUINB_TMM_xx(void)
4357 {
4358 UINT8 tmp, imm;
4359
4360 RDOPARG( imm );
4361 tmp = TMM - imm;
4362 ZHC_SUB( tmp, TMM, 0 );
4363 TMM = tmp;
4364 SKIP_NC;
4365 }
4366
4367 /* 64 b8: 0110 0100 1011 1000 xxxx xxxx */
LTI_ANM_xx(void)4368 static void LTI_ANM_xx(void)
4369 {
4370 UINT8 tmp, imm;
4371
4372 RDOPARG( imm );
4373 tmp = ANM - imm;
4374 ZHC_SUB( tmp, ANM, 0 );
4375 SKIP_CY;
4376 }
4377
4378 /* 64 b9: 0110 0100 1011 1001 xxxx xxxx */
LTI_SMH_xx(void)4379 static void LTI_SMH_xx(void)
4380 {
4381 UINT8 tmp, imm;
4382
4383 RDOPARG( imm );
4384 tmp = SMH - imm;
4385 ZHC_SUB( tmp, SMH, 0 );
4386 SKIP_CY;
4387 }
4388
4389 /* 64 bb: 0110 0100 1011 1011 xxxx xxxx */
LTI_EOM_xx(void)4390 static void LTI_EOM_xx(void)
4391 {
4392 /* only bits #1 and #5 can be read */
4393 UINT8 eom = EOM & 0x22;
4394 UINT8 tmp, imm;
4395
4396 RDOPARG( imm );
4397 tmp = eom - imm;
4398 ZHC_SUB( tmp, eom, 0 );
4399 SKIP_CY;
4400 }
4401
4402 /* 64 bd: 0110 0100 1011 1101 xxxx xxxx */
LTI_TMM_xx(void)4403 static void LTI_TMM_xx(void)
4404 {
4405 UINT8 tmp, imm;
4406
4407 RDOPARG( imm );
4408 tmp = TMM - imm;
4409 ZHC_SUB( tmp, TMM, 0 );
4410 SKIP_CY;
4411 }
4412
4413 /* 64 c0: 0110 0100 1100 0000 xxxx xxxx */
ADI_ANM_xx(void)4414 static void ADI_ANM_xx(void)
4415 {
4416 UINT8 tmp, imm;
4417
4418 RDOPARG( imm );
4419 tmp = ANM + imm;
4420
4421 ZHC_ADD( tmp, ANM, 0 );
4422 ANM = tmp;
4423 }
4424
4425 /* 64 c1: 0110 0100 1100 0001 xxxx xxxx */
ADI_SMH_xx(void)4426 static void ADI_SMH_xx(void)
4427 {
4428 UINT8 tmp, imm;
4429
4430 RDOPARG( imm );
4431 tmp = SMH + imm;
4432
4433 ZHC_ADD( tmp, SMH, 0 );
4434 SMH = tmp;
4435 }
4436
4437 /* 64 c3: 0110 0100 1100 0011 xxxx xxxx */
ADI_EOM_xx(void)4438 static void ADI_EOM_xx(void)
4439 {
4440 /* only bits #1 and #5 can be read */
4441 UINT8 eom = EOM & 0x22;
4442 UINT8 tmp, imm;
4443
4444 RDOPARG( imm );
4445 tmp = eom + imm;
4446
4447 ZHC_ADD( tmp, eom, 0 );
4448 EOM = tmp;
4449 upd7810_write_EOM();
4450 }
4451
4452 /* 64 c5: 0110 0100 1100 0101 xxxx xxxx */
ADI_TMM_xx(void)4453 static void ADI_TMM_xx(void)
4454 {
4455 UINT8 tmp, imm;
4456
4457 RDOPARG( imm );
4458 tmp = TMM + imm;
4459
4460 ZHC_ADD( tmp, TMM, 0 );
4461 TMM = tmp;
4462 }
4463
4464 /* 64 c8: 0110 0100 1100 1000 xxxx xxxx */
ONI_ANM_xx(void)4465 static void ONI_ANM_xx(void)
4466 {
4467 UINT8 imm;
4468
4469 RDOPARG( imm );
4470 if (ANM & imm)
4471 PSW |= SK;
4472 }
4473
4474 /* 64 c9: 0110 0100 1100 1001 xxxx xxxx */
ONI_SMH_xx(void)4475 static void ONI_SMH_xx(void)
4476 {
4477 UINT8 imm;
4478
4479 RDOPARG( imm );
4480 if (SMH & imm)
4481 PSW |= SK;
4482 }
4483
4484 /* 64 cb: 0110 0100 1100 1011 xxxx xxxx */
ONI_EOM_xx(void)4485 static void ONI_EOM_xx(void)
4486 {
4487 /* only bits #1 and #5 can be read */
4488 UINT8 eom = EOM & 0x22;
4489 UINT8 imm;
4490
4491 RDOPARG( imm );
4492 if (eom & imm)
4493 PSW |= SK;
4494 }
4495
4496 /* 64 cd: 0110 0100 1100 1101 xxxx xxxx */
ONI_TMM_xx(void)4497 static void ONI_TMM_xx(void)
4498 {
4499 UINT8 imm;
4500
4501 RDOPARG( imm );
4502 if (TMM & imm)
4503 PSW |= SK;
4504 }
4505
4506 /* 64 d0: 0110 0100 1101 0000 xxxx xxxx */
ACI_ANM_xx(void)4507 static void ACI_ANM_xx(void)
4508 {
4509 UINT8 tmp, imm;
4510
4511 RDOPARG( imm );
4512 tmp = ANM + imm + (PSW & CY);
4513
4514 ZHC_ADD( tmp, ANM, (PSW & CY) );
4515 ANM = tmp;
4516 }
4517
4518 /* 64 d1: 0110 0100 1101 0001 xxxx xxxx */
ACI_SMH_xx(void)4519 static void ACI_SMH_xx(void)
4520 {
4521 UINT8 tmp, imm;
4522
4523 RDOPARG( imm );
4524 tmp = SMH + imm + (PSW & CY);
4525
4526 ZHC_ADD( tmp, SMH, (PSW & CY) );
4527 SMH = tmp;
4528 }
4529
4530 /* 64 d3: 0110 0100 1101 0011 xxxx xxxx */
ACI_EOM_xx(void)4531 static void ACI_EOM_xx(void)
4532 {
4533 /* only bits #1 and #5 can be read */
4534 UINT8 eom = EOM & 0x22;
4535 UINT8 tmp, imm;
4536
4537 RDOPARG( imm );
4538 tmp = eom + imm + (PSW & CY);
4539
4540 ZHC_ADD( tmp, eom, (PSW & CY) );
4541 EOM = tmp;
4542 upd7810_write_EOM();
4543 }
4544
4545 /* 64 d5: 0110 0100 1101 0101 xxxx xxxx */
ACI_TMM_xx(void)4546 static void ACI_TMM_xx(void)
4547 {
4548 UINT8 tmp, imm;
4549
4550 RDOPARG( imm );
4551 tmp = TMM + imm + (PSW & CY);
4552
4553 ZHC_ADD( tmp, TMM, (PSW & CY) );
4554 TMM = tmp;
4555 }
4556
4557 /* 64 d8: 0110 0100 1101 1000 xxxx xxxx */
OFFI_ANM_xx(void)4558 static void OFFI_ANM_xx(void)
4559 {
4560 UINT8 imm;
4561
4562 RDOPARG( imm );
4563 if (0 == (ANM & imm))
4564 PSW |= SK;
4565 }
4566
4567 /* 64 d9: 0110 0100 1101 1001 xxxx xxxx */
OFFI_SMH_xx(void)4568 static void OFFI_SMH_xx(void)
4569 {
4570 UINT8 imm;
4571
4572 RDOPARG( imm );
4573 if (0 == (SMH & imm))
4574 PSW |= SK;
4575 }
4576
4577 /* 64 db: 0110 0100 1101 1011 xxxx xxxx */
OFFI_EOM_xx(void)4578 static void OFFI_EOM_xx(void)
4579 {
4580 /* only bits #1 and #5 can be read */
4581 UINT8 eom = EOM & 0x22;
4582 UINT8 imm;
4583
4584 RDOPARG( imm );
4585 if (0 == (eom & imm))
4586 PSW |= SK;
4587 }
4588
4589 /* 64 dd: 0110 0100 1101 1101 xxxx xxxx */
OFFI_TMM_xx(void)4590 static void OFFI_TMM_xx(void)
4591 {
4592 UINT8 imm;
4593
4594 RDOPARG( imm );
4595 if (0 == (TMM & imm))
4596 PSW |= SK;
4597 }
4598
4599 /* 64 e0: 0110 0100 1110 0000 xxxx xxxx */
SUI_ANM_xx(void)4600 static void SUI_ANM_xx(void)
4601 {
4602 UINT8 tmp, imm;
4603
4604 RDOPARG( imm );
4605 tmp = ANM - imm;
4606 ZHC_SUB( tmp, ANM, 0 );
4607 ANM = tmp;
4608 }
4609
4610 /* 64 e1: 0110 0100 1110 0001 xxxx xxxx */
SUI_SMH_xx(void)4611 static void SUI_SMH_xx(void)
4612 {
4613 UINT8 tmp, imm;
4614
4615 RDOPARG( imm );
4616 tmp = SMH - imm;
4617 ZHC_SUB( tmp, SMH, 0 );
4618 SMH = tmp;
4619 }
4620
4621 /* 64 e3: 0110 0100 1110 0011 xxxx xxxx */
SUI_EOM_xx(void)4622 static void SUI_EOM_xx(void)
4623 {
4624 /* only bits #1 and #5 can be read */
4625 UINT8 eom = EOM & 0x22;
4626 UINT8 tmp, imm;
4627
4628 RDOPARG( imm );
4629 tmp = eom - imm;
4630 ZHC_SUB( tmp, eom, 0 );
4631 EOM = tmp;
4632 upd7810_write_EOM();
4633 }
4634
4635 /* 64 e5: 0110 0100 1110 0101 xxxx xxxx */
SUI_TMM_xx(void)4636 static void SUI_TMM_xx(void)
4637 {
4638 UINT8 tmp, imm;
4639
4640 RDOPARG( imm );
4641 tmp = TMM - imm;
4642 ZHC_SUB( tmp, TMM, 0 );
4643 TMM = tmp;
4644 }
4645
4646 /* 64 e8: 0110 0100 1110 1000 xxxx xxxx */
NEI_ANM_xx(void)4647 static void NEI_ANM_xx(void)
4648 {
4649 UINT8 tmp, imm;
4650
4651 RDOPARG( imm );
4652 tmp = ANM - imm;
4653 ZHC_SUB( tmp, ANM, 0 );
4654 SKIP_NZ;
4655 }
4656
4657 /* 64 e9: 0110 0100 1110 1001 xxxx xxxx */
NEI_SMH_xx(void)4658 static void NEI_SMH_xx(void)
4659 {
4660 UINT8 tmp, imm;
4661
4662 RDOPARG( imm );
4663 tmp = SMH - imm;
4664 ZHC_SUB( tmp, SMH, 0 );
4665 SKIP_NZ;
4666 }
4667
4668 /* 64 eb: 0110 0100 1110 1011 xxxx xxxx */
NEI_EOM_xx(void)4669 static void NEI_EOM_xx(void)
4670 {
4671 /* only bits #1 and #5 can be read */
4672 UINT8 eom = EOM & 0x22;
4673 UINT8 tmp, imm;
4674
4675 RDOPARG( imm );
4676 tmp = eom - imm;
4677 ZHC_SUB( tmp, eom, 0 );
4678 SKIP_NZ;
4679 }
4680
4681 /* 64 ed: 0110 0100 1110 1101 xxxx xxxx */
NEI_TMM_xx(void)4682 static void NEI_TMM_xx(void)
4683 {
4684 UINT8 tmp, imm;
4685
4686 RDOPARG( imm );
4687 tmp = TMM - imm;
4688 ZHC_SUB( tmp, TMM, 0 );
4689 SKIP_NZ;
4690 }
4691
4692 /* 64 f0: 0110 0100 1111 0000 xxxx xxxx */
SBI_ANM_xx(void)4693 static void SBI_ANM_xx(void)
4694 {
4695 UINT8 tmp, imm;
4696
4697 RDOPARG( imm );
4698 tmp = ANM - imm - (PSW & CY);
4699 ZHC_SUB( tmp, ANM, (PSW & CY) );
4700 ANM = tmp;
4701 }
4702
4703 /* 64 f1: 0110 0100 1111 0001 xxxx xxxx */
SBI_SMH_xx(void)4704 static void SBI_SMH_xx(void)
4705 {
4706 UINT8 tmp, imm;
4707
4708 RDOPARG( imm );
4709 tmp = SMH - imm - (PSW & CY);
4710 ZHC_SUB( tmp, SMH, (PSW & CY) );
4711 SMH = tmp;
4712 }
4713
4714 /* 64 f3: 0110 0100 1111 0011 xxxx xxxx */
SBI_EOM_xx(void)4715 static void SBI_EOM_xx(void)
4716 {
4717 /* only bits #1 and #5 can be read */
4718 UINT8 eom = EOM & 0x22;
4719 UINT8 tmp, imm;
4720
4721 RDOPARG( imm );
4722 tmp = eom - imm - (PSW & CY);
4723 ZHC_SUB( tmp, eom, (PSW & CY) );
4724 EOM = tmp;
4725 upd7810_write_EOM();
4726 }
4727
4728 /* 64 f5: 0110 0100 1111 0101 xxxx xxxx */
SBI_TMM_xx(void)4729 static void SBI_TMM_xx(void)
4730 {
4731 UINT8 tmp, imm;
4732
4733 RDOPARG( imm );
4734 tmp = TMM - imm - (PSW & CY);
4735 ZHC_SUB( tmp, TMM, (PSW & CY) );
4736 TMM = tmp;
4737 }
4738
4739 /* 64 f8: 0110 0100 1111 1000 xxxx xxxx */
EQI_ANM_xx(void)4740 static void EQI_ANM_xx(void)
4741 {
4742 UINT8 tmp, imm;
4743
4744 RDOPARG( imm );
4745 tmp = ANM - imm;
4746 ZHC_SUB( tmp, ANM, 0 );
4747 SKIP_Z;
4748 }
4749
4750 /* 64 f9: 0110 0100 1111 1001 xxxx xxxx */
EQI_SMH_xx(void)4751 static void EQI_SMH_xx(void)
4752 {
4753 UINT8 tmp, imm;
4754
4755 RDOPARG( imm );
4756 tmp = SMH - imm;
4757 ZHC_SUB( tmp, SMH, 0 );
4758 SKIP_Z;
4759 }
4760
4761 /* 64 fb: 0110 0100 1111 1011 xxxx xxxx */
EQI_EOM_xx(void)4762 static void EQI_EOM_xx(void)
4763 {
4764 /* only bits #1 and #5 can be read */
4765 UINT8 eom = EOM & 0x22;
4766 UINT8 tmp, imm;
4767
4768 RDOPARG( imm );
4769 tmp = eom - imm;
4770 ZHC_SUB( tmp, eom, 0 );
4771 SKIP_Z;
4772 }
4773
4774 /* 64 fd: 0110 0100 1111 1101 xxxx xxxx */
EQI_TMM_xx(void)4775 static void EQI_TMM_xx(void)
4776 {
4777 UINT8 tmp, imm;
4778
4779 RDOPARG( imm );
4780 tmp = TMM - imm;
4781 ZHC_SUB( tmp, TMM, 0 );
4782 SKIP_Z;
4783 }
4784
4785 /* prefix 70 */
4786 /* 70 0e: 0111 0000 0000 1110 llll llll hhhh hhhh */
SSPD_w(void)4787 static void SSPD_w(void)
4788 {
4789 PAIR ea;
4790 ea.d = 0;
4791
4792 RDOPARG( ea.b.l );
4793 RDOPARG( ea.b.h );
4794 WM( ea.d, SPL );
4795 WM( ea.d + 1, SPH );
4796 }
4797
4798 /* 70 0f: 0111 0000 0000 1111 llll llll hhhh hhhh */
LSPD_w(void)4799 static void LSPD_w(void)
4800 {
4801 PAIR ea;
4802 ea.d = 0;
4803
4804 RDOPARG( ea.b.l );
4805 RDOPARG( ea.b.h );
4806 SPL = RM( ea.d );
4807 SPH = RM( ea.d + 1 );
4808 }
4809
4810 /* 70 1e: 0111 0000 0001 1110 llll llll hhhh hhhh */
SBCD_w(void)4811 static void SBCD_w(void)
4812 {
4813 PAIR ea;
4814 ea.d = 0;
4815
4816 RDOPARG( ea.b.l );
4817 RDOPARG( ea.b.h );
4818 WM( ea.d, C );
4819 WM( ea.d + 1, B );
4820 }
4821
4822 /* 70 1f: 0111 0000 0001 1111 llll llll hhhh hhhh */
LBCD_w(void)4823 static void LBCD_w(void)
4824 {
4825 PAIR ea;
4826 ea.d = 0;
4827
4828 RDOPARG( ea.b.l );
4829 RDOPARG( ea.b.h );
4830 C = RM( ea.d );
4831 B = RM( ea.d + 1 );
4832 }
4833
4834 /* 70 2e: 0111 0000 0010 1110 llll llll hhhh hhhh */
SDED_w(void)4835 static void SDED_w(void)
4836 {
4837 PAIR ea;
4838 ea.d = 0;
4839
4840 RDOPARG( ea.b.l );
4841 RDOPARG( ea.b.h );
4842 WM( ea.d, E );
4843 WM( ea.d + 1, D );
4844 }
4845
4846 /* 70 2f: 0111 0000 0010 1111 llll llll hhhh hhhh */
LDED_w(void)4847 static void LDED_w(void)
4848 {
4849 PAIR ea;
4850 ea.d = 0;
4851
4852 RDOPARG( ea.b.l );
4853 RDOPARG( ea.b.h );
4854 E = RM( ea.d );
4855 D = RM( ea.d + 1 );
4856 }
4857
4858 /* 70 3e: 0111 0000 0011 1110 llll llll hhhh hhhh */
SHLD_w(void)4859 static void SHLD_w(void)
4860 {
4861 PAIR ea;
4862 ea.d = 0;
4863
4864 RDOPARG( ea.b.l );
4865 RDOPARG( ea.b.h );
4866 WM( ea.d, L );
4867 WM( ea.d + 1, H );
4868 }
4869
4870 /* 70 3f: 0111 0000 0011 1111 llll llll hhhh hhhh */
LHLD_w(void)4871 static void LHLD_w(void)
4872 {
4873 PAIR ea;
4874 ea.d = 0;
4875
4876 RDOPARG( ea.b.l );
4877 RDOPARG( ea.b.h );
4878 L = RM( ea.d );
4879 H = RM( ea.d + 1 );
4880 }
4881
4882 /* 70 41: 0111 0000 0100 0001 */
EADD_EA_A(void)4883 static void EADD_EA_A(void)
4884 {
4885 UINT16 tmp;
4886 tmp = EA + A;
4887 ZHC_ADD( tmp, EA, 0 );
4888 EA = tmp;
4889 }
4890
4891 /* 70 42: 0111 0000 0100 0010 */
EADD_EA_B(void)4892 static void EADD_EA_B(void)
4893 {
4894 UINT16 tmp;
4895 tmp = EA + B;
4896 ZHC_ADD( tmp, EA, 0 );
4897 EA = tmp;
4898 }
4899
4900 /* 70 43: 0111 0000 0100 0011 */
EADD_EA_C(void)4901 static void EADD_EA_C(void)
4902 {
4903 UINT16 tmp;
4904 tmp = EA + C;
4905 ZHC_ADD( tmp, EA, 0 );
4906 EA = tmp;
4907 }
4908
4909 /* 70 61: 0111 0000 0110 0001 */
ESUB_EA_A(void)4910 static void ESUB_EA_A(void)
4911 {
4912 UINT16 tmp;
4913 tmp = EA - A;
4914 ZHC_SUB( tmp, EA, 0 );
4915 EA = tmp;
4916 }
4917
4918 /* 70 62: 0111 0000 0110 0010 */
ESUB_EA_B(void)4919 static void ESUB_EA_B(void)
4920 {
4921 UINT16 tmp;
4922 tmp = EA - B;
4923 ZHC_SUB( tmp, EA, 0 );
4924 EA = tmp;
4925 }
4926
4927 /* 70 63: 0111 0000 0110 0011 */
ESUB_EA_C(void)4928 static void ESUB_EA_C(void)
4929 {
4930 UINT16 tmp;
4931 tmp = EA - C;
4932 ZHC_SUB( tmp, EA, 0 );
4933 EA = tmp;
4934 }
4935
4936 /* 70 68: 0111 0000 0110 1000 llll llll hhhh hhhh */
MOV_V_w(void)4937 static void MOV_V_w(void)
4938 {
4939 PAIR ea;
4940 ea.d = 0;
4941
4942 RDOPARG( ea.b.l );
4943 RDOPARG( ea.b.h );
4944 V = RM( ea.d );
4945 }
4946
4947 /* 70 69: 0111 0000 0110 1001 llll llll hhhh hhhh */
MOV_A_w(void)4948 static void MOV_A_w(void)
4949 {
4950 PAIR ea;
4951 ea.d = 0;
4952
4953 RDOPARG( ea.b.l );
4954 RDOPARG( ea.b.h );
4955 A = RM( ea.d );
4956 }
4957
4958 /* 70 6a: 0111 0000 0110 1010 llll llll hhhh hhhh */
MOV_B_w(void)4959 static void MOV_B_w(void)
4960 {
4961 PAIR ea;
4962 ea.d = 0;
4963
4964 RDOPARG( ea.b.l );
4965 RDOPARG( ea.b.h );
4966 B = RM( ea.d );
4967 }
4968
4969 /* 70 6b: 0111 0000 0110 1011 llll llll hhhh hhhh */
MOV_C_w(void)4970 static void MOV_C_w(void)
4971 {
4972 PAIR ea;
4973 ea.d = 0;
4974
4975 RDOPARG( ea.b.l );
4976 RDOPARG( ea.b.h );
4977 C = RM( ea.d );
4978 }
4979
4980 /* 70 6c: 0111 0000 0110 1100 llll llll hhhh hhhh */
MOV_D_w(void)4981 static void MOV_D_w(void)
4982 {
4983 PAIR ea;
4984 ea.d = 0;
4985
4986 RDOPARG( ea.b.l );
4987 RDOPARG( ea.b.h );
4988 D = RM( ea.d );
4989 }
4990
4991 /* 70 6d: 0111 0000 0110 1101 llll llll hhhh hhhh */
MOV_E_w(void)4992 static void MOV_E_w(void)
4993 {
4994 PAIR ea;
4995 ea.d = 0;
4996
4997 RDOPARG( ea.b.l );
4998 RDOPARG( ea.b.h );
4999 E = RM( ea.d );
5000 }
5001
5002 /* 70 6e: 0111 0000 0110 1110 llll llll hhhh hhhh */
MOV_H_w(void)5003 static void MOV_H_w(void)
5004 {
5005 PAIR ea;
5006 ea.d = 0;
5007
5008 RDOPARG( ea.b.l );
5009 RDOPARG( ea.b.h );
5010 H = RM( ea.d );
5011 }
5012
5013 /* 70 6f: 0111 0000 0110 1111 llll llll hhhh hhhh */
MOV_L_w(void)5014 static void MOV_L_w(void)
5015 {
5016 PAIR ea;
5017 ea.d = 0;
5018
5019 RDOPARG( ea.b.l );
5020 RDOPARG( ea.b.h );
5021 L = RM( ea.d );
5022 }
5023
5024 /* 70 78: 0111 0000 0111 1000 llll llll hhhh hhhh */
MOV_w_V(void)5025 static void MOV_w_V(void)
5026 {
5027 PAIR ea;
5028 ea.d = 0;
5029
5030 RDOPARG( ea.b.l );
5031 RDOPARG( ea.b.h );
5032 WM( ea.d, V );
5033 }
5034
5035 /* 70 79: 0111 0000 0111 1001 llll llll hhhh hhhh */
MOV_w_A(void)5036 static void MOV_w_A(void)
5037 {
5038 PAIR ea;
5039 ea.d = 0;
5040
5041 RDOPARG( ea.b.l );
5042 RDOPARG( ea.b.h );
5043 WM( ea.d, A );
5044 }
5045
5046 /* 70 7a: 0111 0000 0111 1010 llll llll hhhh hhhh */
MOV_w_B(void)5047 static void MOV_w_B(void)
5048 {
5049 PAIR ea;
5050 ea.d = 0;
5051
5052 RDOPARG( ea.b.l );
5053 RDOPARG( ea.b.h );
5054 WM( ea.d, B );
5055 }
5056
5057 /* 70 7b: 0111 0000 0111 1011 llll llll hhhh hhhh */
MOV_w_C(void)5058 static void MOV_w_C(void)
5059 {
5060 PAIR ea;
5061 ea.d = 0;
5062
5063 RDOPARG( ea.b.l );
5064 RDOPARG( ea.b.h );
5065 WM( ea.d, C );
5066 }
5067
5068 /* 70 7c: 0111 0000 0111 1100 llll llll hhhh hhhh */
MOV_w_D(void)5069 static void MOV_w_D(void)
5070 {
5071 PAIR ea;
5072 ea.d = 0;
5073
5074 RDOPARG( ea.b.l );
5075 RDOPARG( ea.b.h );
5076 WM( ea.d, D );
5077 }
5078
5079 /* 70 7d: 0111 0000 0111 1101 llll llll hhhh hhhh */
MOV_w_E(void)5080 static void MOV_w_E(void)
5081 {
5082 PAIR ea;
5083 ea.d = 0;
5084
5085 RDOPARG( ea.b.l );
5086 RDOPARG( ea.b.h );
5087 WM( ea.d, E );
5088 }
5089
5090 /* 70 7e: 0111 0000 0111 1110 llll llll hhhh hhhh */
MOV_w_H(void)5091 static void MOV_w_H(void)
5092 {
5093 PAIR ea;
5094 ea.d = 0;
5095
5096 RDOPARG( ea.b.l );
5097 RDOPARG( ea.b.h );
5098 WM( ea.d, H );
5099 }
5100
5101 /* 70 7f: 0111 0000 0111 1111 llll llll hhhh hhhh */
MOV_w_L(void)5102 static void MOV_w_L(void)
5103 {
5104 PAIR ea;
5105 ea.d = 0;
5106
5107 RDOPARG( ea.b.l );
5108 RDOPARG( ea.b.h );
5109 WM( ea.d, L );
5110 }
5111
5112 /* 70 89: 0111 0000 1000 1001 */
ANAX_B(void)5113 static void ANAX_B(void)
5114 {
5115 A &= RM( BC );
5116 SET_Z(A);
5117 }
5118
5119 /* 70 8a: 0111 0000 1000 1010 */
ANAX_D(void)5120 static void ANAX_D(void)
5121 {
5122 A &= RM( DE );
5123 SET_Z(A);
5124 }
5125
5126 /* 70 8b: 0111 0000 1000 1011 */
ANAX_H(void)5127 static void ANAX_H(void)
5128 {
5129 A &= RM( HL );
5130 SET_Z(A);
5131 }
5132
5133 /* 70 8c: 0111 0000 1000 1100 */
ANAX_Dp(void)5134 static void ANAX_Dp(void)
5135 {
5136 A &= RM( DE );
5137 DE++;
5138 SET_Z(A);
5139 }
5140
5141 /* 70 8d: 0111 0000 1000 1101 */
ANAX_Hp(void)5142 static void ANAX_Hp(void)
5143 {
5144 A &= RM( HL );
5145 HL++;
5146 SET_Z(A);
5147 }
5148
5149 /* 70 8e: 0111 0000 1000 1110 */
ANAX_Dm(void)5150 static void ANAX_Dm(void)
5151 {
5152 A &= RM( DE );
5153 DE--;
5154 SET_Z(A);
5155 }
5156
5157 /* 70 8f: 0111 0000 1000 1111 */
ANAX_Hm(void)5158 static void ANAX_Hm(void)
5159 {
5160 A &= RM( HL );
5161 HL--;
5162 SET_Z(A);
5163 }
5164
5165 /* 70 91: 0111 0000 1001 0001 */
XRAX_B(void)5166 static void XRAX_B(void)
5167 {
5168 A ^= RM( BC );
5169 SET_Z(A);
5170 }
5171
5172 /* 70 92: 0111 0000 1001 0010 */
XRAX_D(void)5173 static void XRAX_D(void)
5174 {
5175 A ^= RM( DE );
5176 SET_Z(A);
5177 }
5178
5179 /* 70 93: 0111 0000 1001 0011 */
XRAX_H(void)5180 static void XRAX_H(void)
5181 {
5182 A ^= RM( HL );
5183 SET_Z(A);
5184 }
5185
5186 /* 70 94: 0111 0000 1001 0100 */
XRAX_Dp(void)5187 static void XRAX_Dp(void)
5188 {
5189 A ^= RM( DE );
5190 DE++;
5191 SET_Z(A);
5192 }
5193
5194 /* 70 95: 0111 0000 1001 0101 */
XRAX_Hp(void)5195 static void XRAX_Hp(void)
5196 {
5197 A ^= RM( HL );
5198 HL++;
5199 SET_Z(A);
5200 }
5201
5202 /* 70 96: 0111 0000 1001 0110 */
XRAX_Dm(void)5203 static void XRAX_Dm(void)
5204 {
5205 A ^= RM( DE );
5206 DE--;
5207 SET_Z(A);
5208 }
5209
5210 /* 70 97: 0111 0000 1001 0111 */
XRAX_Hm(void)5211 static void XRAX_Hm(void)
5212 {
5213 A ^= RM( HL );
5214 HL--;
5215 SET_Z(A);
5216 }
5217
5218 /* 70 99: 0111 0000 1001 1001 */
ORAX_B(void)5219 static void ORAX_B(void)
5220 {
5221 A |= RM( BC );
5222 SET_Z(A);
5223 }
5224
5225 /* 70 9a: 0111 0000 1001 1010 */
ORAX_D(void)5226 static void ORAX_D(void)
5227 {
5228 A |= RM( DE );
5229 SET_Z(A);
5230 }
5231
5232 /* 70 9b: 0111 0000 1001 1011 */
ORAX_H(void)5233 static void ORAX_H(void)
5234 {
5235 A |= RM( HL );
5236 SET_Z(A);
5237 }
5238
5239 /* 70 9c: 0111 0000 1001 0100 */
ORAX_Dp(void)5240 static void ORAX_Dp(void)
5241 {
5242 A |= RM( DE );
5243 DE++;
5244 SET_Z(A);
5245 }
5246
5247 /* 70 9d: 0111 0000 1001 1101 */
ORAX_Hp(void)5248 static void ORAX_Hp(void)
5249 {
5250 A |= RM( HL );
5251 HL++;
5252 SET_Z(A);
5253 }
5254
5255 /* 70 9e: 0111 0000 1001 1110 */
ORAX_Dm(void)5256 static void ORAX_Dm(void)
5257 {
5258 A |= RM( DE );
5259 DE--;
5260 SET_Z(A);
5261 }
5262
5263 /* 70 9f: 0111 0000 1001 1111 */
ORAX_Hm(void)5264 static void ORAX_Hm(void)
5265 {
5266 A |= RM( HL );
5267 HL--;
5268 SET_Z(A);
5269 }
5270
5271 /* 70 a1: 0111 0000 1010 0001 */
ADDNCX_B(void)5272 static void ADDNCX_B(void)
5273 {
5274 UINT8 tmp = A + RM( BC );
5275 ZHC_ADD( tmp, A, 0 );
5276 A = tmp;
5277 SKIP_NC;
5278 }
5279
5280 /* 70 a2: 0111 0000 1010 0010 */
ADDNCX_D(void)5281 static void ADDNCX_D(void)
5282 {
5283 UINT8 tmp = A + RM( DE );
5284 ZHC_ADD( tmp, A, 0 );
5285 A = tmp;
5286 SKIP_NC;
5287 }
5288
5289 /* 70 a3: 0111 0000 1010 0011 */
ADDNCX_H(void)5290 static void ADDNCX_H(void)
5291 {
5292 UINT8 tmp = A + RM( HL );
5293 ZHC_ADD( tmp, A, 0 );
5294 A = tmp;
5295 SKIP_NC;
5296 }
5297
5298 /* 70 a4: 0111 0000 1010 0100 */
ADDNCX_Dp(void)5299 static void ADDNCX_Dp(void)
5300 {
5301 UINT8 tmp = A + RM( DE );
5302 DE++;
5303 ZHC_ADD( tmp, A, 0 );
5304 A = tmp;
5305 SKIP_NC;
5306 }
5307
5308 /* 70 a5: 0111 0000 1010 0101 */
ADDNCX_Hp(void)5309 static void ADDNCX_Hp(void)
5310 {
5311 UINT8 tmp = A + RM( HL );
5312 HL++;
5313 ZHC_ADD( tmp, A, 0 );
5314 A = tmp;
5315 SKIP_NC;
5316 }
5317
5318 /* 70 a6: 0111 0000 1010 0110 */
ADDNCX_Dm(void)5319 static void ADDNCX_Dm(void)
5320 {
5321 UINT8 tmp = A + RM( DE );
5322 DE--;
5323 ZHC_ADD( tmp, A, 0 );
5324 A = tmp;
5325 SKIP_NC;
5326 }
5327
5328 /* 70 a7: 0111 0000 1010 0111 */
ADDNCX_Hm(void)5329 static void ADDNCX_Hm(void)
5330 {
5331 UINT8 tmp = A + RM( HL );
5332 HL--;
5333 ZHC_ADD( tmp, A, 0 );
5334 A = tmp;
5335 SKIP_NC;
5336 }
5337
5338 /* 70 a9: 0111 0000 1010 1001 */
GTAX_B(void)5339 static void GTAX_B(void)
5340 {
5341 UINT16 tmp = A - RM( BC ) - 1;
5342 ZHC_SUB( tmp, A, 0 );
5343 SKIP_NC;
5344 }
5345
5346 /* 70 aa: 0111 0000 1010 1010 */
GTAX_D(void)5347 static void GTAX_D(void)
5348 {
5349 UINT16 tmp = A - RM( DE ) - 1;
5350 ZHC_SUB( tmp, A, 0 );
5351 SKIP_NC;
5352 }
5353
5354 /* 70 ab: 0111 0000 1010 1011 */
GTAX_H(void)5355 static void GTAX_H(void)
5356 {
5357 UINT16 tmp = A - RM( HL ) - 1;
5358 ZHC_SUB( tmp, A, 0 );
5359 SKIP_NC;
5360 }
5361
5362 /* 70 ac: 0111 0000 1010 1100 */
GTAX_Dp(void)5363 static void GTAX_Dp(void)
5364 {
5365 UINT16 tmp = A - RM( DE ) - 1;
5366 DE++;
5367 ZHC_SUB( tmp, A, 0 );
5368 SKIP_NC;
5369 }
5370
5371 /* 70 ad: 0111 0000 1010 1101 */
GTAX_Hp(void)5372 static void GTAX_Hp(void)
5373 {
5374 UINT16 tmp = A - RM( HL ) - 1;
5375 HL++;
5376 ZHC_SUB( tmp, A, 0 );
5377 SKIP_NC;
5378 }
5379
5380 /* 70 ae: 0111 0000 1010 1110 */
GTAX_Dm(void)5381 static void GTAX_Dm(void)
5382 {
5383 UINT16 tmp = A - RM( DE ) - 1;
5384 DE--;
5385 ZHC_SUB( tmp, A, 0 );
5386 SKIP_NC;
5387 }
5388
5389 /* 70 af: 0111 0000 1010 1111 */
GTAX_Hm(void)5390 static void GTAX_Hm(void)
5391 {
5392 UINT16 tmp = A - RM( HL ) - 1;
5393 HL--;
5394 ZHC_SUB( tmp, A, 0 );
5395 SKIP_NC;
5396 }
5397
5398 /* 70 b1: 0111 0000 1011 0001 */
SUBNBX_B(void)5399 static void SUBNBX_B(void)
5400 {
5401 UINT8 tmp = A - RM( BC );
5402 ZHC_SUB( tmp, A, 0 );
5403 A = tmp;
5404 SKIP_NC;
5405 }
5406
5407 /* 70 b2: 0111 0000 1011 0010 */
SUBNBX_D(void)5408 static void SUBNBX_D(void)
5409 {
5410 UINT8 tmp = A - RM( DE );
5411 ZHC_SUB( tmp, A, 0 );
5412 A = tmp;
5413 SKIP_NC;
5414 }
5415
5416 /* 70 b3: 0111 0000 1011 0011 */
SUBNBX_H(void)5417 static void SUBNBX_H(void)
5418 {
5419 UINT8 tmp = A - RM( HL );
5420 ZHC_SUB( tmp, A, 0 );
5421 A = tmp;
5422 SKIP_NC;
5423 }
5424
5425 /* 70 b4: 0111 0000 1011 0100 */
SUBNBX_Dp(void)5426 static void SUBNBX_Dp(void)
5427 {
5428 UINT8 tmp = A - RM( DE );
5429 DE++;
5430 ZHC_SUB( tmp, A, 0 );
5431 A = tmp;
5432 SKIP_NC;
5433 }
5434
5435 /* 70 b5: 0111 0000 1011 0101 */
SUBNBX_Hp(void)5436 static void SUBNBX_Hp(void)
5437 {
5438 UINT8 tmp = A - RM( HL );
5439 HL++;
5440 ZHC_SUB( tmp, A, 0 );
5441 A = tmp;
5442 SKIP_NC;
5443 }
5444
5445 /* 70 b6: 0111 0000 1011 0110 */
SUBNBX_Dm(void)5446 static void SUBNBX_Dm(void)
5447 {
5448 UINT8 tmp = A - RM( DE );
5449 DE--;
5450 ZHC_SUB( tmp, A, 0 );
5451 A = tmp;
5452 SKIP_NC;
5453 }
5454
5455 /* 70 b7: 0111 0000 1011 0111 */
SUBNBX_Hm(void)5456 static void SUBNBX_Hm(void)
5457 {
5458 UINT8 tmp = A - RM( HL );
5459 HL--;
5460 ZHC_SUB( tmp, A, 0 );
5461 A = tmp;
5462 SKIP_NC;
5463 }
5464
5465 /* 70 b9: 0111 0000 1011 1001 */
LTAX_B(void)5466 static void LTAX_B(void)
5467 {
5468 UINT8 tmp = A - RM( BC );
5469 ZHC_SUB( tmp, A, 0 );
5470 SKIP_CY;
5471 }
5472
5473 /* 70 ba: 0111 0000 1011 1010 */
LTAX_D(void)5474 static void LTAX_D(void)
5475 {
5476 UINT8 tmp = A - RM( DE );
5477 ZHC_SUB( tmp, A, 0 );
5478 SKIP_CY;
5479 }
5480
5481 /* 70 bb: 0111 0000 1011 1011 */
LTAX_H(void)5482 static void LTAX_H(void)
5483 {
5484 UINT8 tmp = A - RM( HL );
5485 ZHC_SUB( tmp, A, 0 );
5486 SKIP_CY;
5487 }
5488
5489 /* 70 bc: 0111 0000 1011 1100 */
LTAX_Dp(void)5490 static void LTAX_Dp(void)
5491 {
5492 UINT8 tmp = A - RM( DE );
5493 DE++;
5494 ZHC_SUB( tmp, A, 0 );
5495 SKIP_CY;
5496 }
5497
5498 /* 70 bd: 0111 0000 1011 1101 */
LTAX_Hp(void)5499 static void LTAX_Hp(void)
5500 {
5501 UINT8 tmp = A - RM( HL );
5502 HL++;
5503 ZHC_SUB( tmp, A, 0 );
5504 SKIP_CY;
5505 }
5506
5507 /* 70 be: 0111 0000 1011 1110 */
LTAX_Dm(void)5508 static void LTAX_Dm(void)
5509 {
5510 UINT8 tmp = A - RM( DE );
5511 DE--;
5512 ZHC_SUB( tmp, A, 0 );
5513 SKIP_CY;
5514 }
5515
5516 /* 70 bf: 0111 0000 1011 1111 */
LTAX_Hm(void)5517 static void LTAX_Hm(void)
5518 {
5519 UINT8 tmp = A - RM( HL );
5520 HL--;
5521 ZHC_SUB( tmp, A, 0 );
5522 SKIP_CY;
5523 }
5524
5525 /* 70 c1: 0111 0000 1100 0001 */
ADDX_B(void)5526 static void ADDX_B(void)
5527 {
5528 UINT8 tmp = A + RM( BC );
5529 ZHC_ADD( tmp, A, 0 );
5530 A = tmp;
5531 }
5532
5533 /* 70 c2: 0111 0000 1100 0010 */
ADDX_D(void)5534 static void ADDX_D(void)
5535 {
5536 UINT8 tmp = A + RM( DE );
5537 ZHC_ADD( tmp, A, 0 );
5538 A = tmp;
5539 }
5540
5541 /* 70 c3: 0111 0000 1100 0011 */
ADDX_H(void)5542 static void ADDX_H(void)
5543 {
5544 UINT8 tmp = A + RM( HL );
5545 ZHC_ADD( tmp, A, 0 );
5546 A = tmp;
5547 }
5548
5549 /* 70 c4: 0111 0000 1100 0100 */
ADDX_Dp(void)5550 static void ADDX_Dp(void)
5551 {
5552 UINT8 tmp = A + RM( DE );
5553 DE++;
5554 ZHC_ADD( tmp, A, 0 );
5555 A = tmp;
5556 }
5557
5558 /* 70 c5: 0111 0000 1100 0101 */
ADDX_Hp(void)5559 static void ADDX_Hp(void)
5560 {
5561 UINT8 tmp = A + RM( HL );
5562 HL++;
5563 ZHC_ADD( tmp, A, 0 );
5564 A = tmp;
5565 }
5566
5567 /* 70 c6: 0111 0000 1100 0110 */
ADDX_Dm(void)5568 static void ADDX_Dm(void)
5569 {
5570 UINT8 tmp = A + RM( DE );
5571 DE--;
5572 ZHC_ADD( tmp, A, 0 );
5573 A = tmp;
5574 }
5575
5576 /* 70 c7: 0111 0000 1100 0111 */
ADDX_Hm(void)5577 static void ADDX_Hm(void)
5578 {
5579 UINT8 tmp = A + RM( HL );
5580 HL--;
5581 ZHC_ADD( tmp, A, 0 );
5582 A = tmp;
5583 }
5584
5585 /* 70 c9: 0111 0000 1100 1001 */
ONAX_B(void)5586 static void ONAX_B(void)
5587 {
5588 if (A & RM( BC ))
5589 PSW = (PSW & ~Z) | SK;
5590 else
5591 PSW |= Z;
5592 }
5593
5594 /* 70 ca: 0111 0000 1100 1010 */
ONAX_D(void)5595 static void ONAX_D(void)
5596 {
5597 if (A & RM( DE ))
5598 PSW = (PSW & ~Z) | SK;
5599 else
5600 PSW |= Z;
5601 }
5602
5603 /* 70 cb: 0111 0000 1100 1011 */
ONAX_H(void)5604 static void ONAX_H(void)
5605 {
5606 if (A & RM( HL ))
5607 PSW = (PSW & ~Z) | SK;
5608 else
5609 PSW |= Z;
5610 }
5611
5612 /* 70 cc: 0111 0000 1100 1100 */
ONAX_Dp(void)5613 static void ONAX_Dp(void)
5614 {
5615 if (A & RM( DE ))
5616 PSW = (PSW & ~Z) | SK;
5617 else
5618 PSW |= Z;
5619 DE++;
5620 }
5621
5622 /* 70 cd: 0111 0000 1100 1101 */
ONAX_Hp(void)5623 static void ONAX_Hp(void)
5624 {
5625 if (A & RM( HL ))
5626 PSW = (PSW & ~Z) | SK;
5627 else
5628 PSW |= Z;
5629 HL++;
5630 }
5631
5632 /* 70 ce: 0111 0000 1100 1110 */
ONAX_Dm(void)5633 static void ONAX_Dm(void)
5634 {
5635 if (A & RM( DE ))
5636 PSW = (PSW & ~Z) | SK;
5637 else
5638 PSW |= Z;
5639 DE--;
5640 }
5641
5642 /* 70 cf: 0111 0000 1100 1111 */
ONAX_Hm(void)5643 static void ONAX_Hm(void)
5644 {
5645 if (A & RM( HL ))
5646 PSW = (PSW & ~Z) | SK;
5647 else
5648 PSW |= Z;
5649 HL--;
5650 }
5651
5652 /* 70 d1: 0111 0000 1101 0001 */
ADCX_B(void)5653 static void ADCX_B(void)
5654 {
5655 UINT8 tmp = A + RM( BC ) + (PSW & CY);
5656 ZHC_ADD( tmp, A, 0 );
5657 A = tmp;
5658 }
5659
5660 /* 70 d2: 0111 0000 1101 0010 */
ADCX_D(void)5661 static void ADCX_D(void)
5662 {
5663 UINT8 tmp = A + RM( DE ) + (PSW & CY);
5664 ZHC_ADD( tmp, A, 0 );
5665 A = tmp;
5666 }
5667
5668 /* 70 d3: 0111 0000 1101 0011 */
ADCX_H(void)5669 static void ADCX_H(void)
5670 {
5671 UINT8 tmp = A + RM( HL ) + (PSW & CY);
5672 ZHC_ADD( tmp, A, 0 );
5673 A = tmp;
5674 }
5675
5676 /* 70 d4: 0111 0000 1101 0100 */
ADCX_Dp(void)5677 static void ADCX_Dp(void)
5678 {
5679 UINT8 tmp = A + RM( DE ) + (PSW & CY);
5680 DE++;
5681 ZHC_ADD( tmp, A, 0 );
5682 A = tmp;
5683 }
5684
5685 /* 70 d5: 0111 0000 1101 0101 */
ADCX_Hp(void)5686 static void ADCX_Hp(void)
5687 {
5688 UINT8 tmp = A + RM( HL ) + (PSW & CY);
5689 HL++;
5690 ZHC_ADD( tmp, A, 0 );
5691 A = tmp;
5692 }
5693
5694 /* 70 d6: 0111 0000 1101 0110 */
ADCX_Dm(void)5695 static void ADCX_Dm(void)
5696 {
5697 UINT8 tmp = A + RM( DE ) + (PSW & CY);
5698 DE--;
5699 ZHC_ADD( tmp, A, 0 );
5700 A = tmp;
5701 }
5702
5703 /* 70 d7: 0111 0000 1101 0111 */
ADCX_Hm(void)5704 static void ADCX_Hm(void)
5705 {
5706 UINT8 tmp = A + RM( HL ) + (PSW & CY);
5707 HL--;
5708 ZHC_ADD( tmp, A, 0 );
5709 A = tmp;
5710 }
5711
5712 /* 70 d9: 0111 0000 1101 1001 */
OFFAX_B(void)5713 static void OFFAX_B(void)
5714 {
5715 if ( A & RM( BC ) )
5716 PSW &= ~Z;
5717 else
5718 PSW = PSW | Z | SK;
5719 }
5720
5721 /* 70 da: 0111 0000 1101 1010 */
OFFAX_D(void)5722 static void OFFAX_D(void)
5723 {
5724 if ( A & RM( DE ) )
5725 PSW &= ~Z;
5726 else
5727 PSW = PSW | Z | SK;
5728 }
5729
5730 /* 70 db: 0111 0000 1101 1011 */
OFFAX_H(void)5731 static void OFFAX_H(void)
5732 {
5733 if ( A & RM( HL ) )
5734 PSW &= ~Z;
5735 else
5736 PSW = PSW | Z | SK;
5737 }
5738
5739 /* 70 dc: 0111 0000 1101 1100 */
OFFAX_Dp(void)5740 static void OFFAX_Dp(void)
5741 {
5742 if ( A & RM( DE ) )
5743 PSW &= ~Z;
5744 else
5745 PSW = PSW | Z | SK;
5746 DE++;
5747 }
5748
5749 /* 70 dd: 0111 0000 1101 1101 */
OFFAX_Hp(void)5750 static void OFFAX_Hp(void)
5751 {
5752 if ( A & RM( HL ) )
5753 PSW &= ~Z;
5754 else
5755 PSW = PSW | Z | SK;
5756 HL++;
5757 }
5758
5759 /* 70 de: 0111 0000 1101 1110 */
OFFAX_Dm(void)5760 static void OFFAX_Dm(void)
5761 {
5762 if ( A & RM( DE ) )
5763 PSW &= ~Z;
5764 else
5765 PSW = PSW | Z | SK;
5766 DE--;
5767 }
5768
5769 /* 70 df: 0111 0000 1101 1111 */
OFFAX_Hm(void)5770 static void OFFAX_Hm(void)
5771 {
5772 if ( A & RM( HL ) )
5773 PSW &= ~Z;
5774 else
5775 PSW = PSW | Z | SK;
5776 HL--;
5777 }
5778
5779 /* 70 e1: 0111 0000 1110 0001 */
SUBX_B(void)5780 static void SUBX_B(void)
5781 {
5782 UINT8 tmp = A - RM( BC );
5783 ZHC_SUB( tmp, A, 0 );
5784 A = tmp;
5785 }
5786
5787 /* 70 e2: 0111 0000 1110 0010 */
SUBX_D(void)5788 static void SUBX_D(void)
5789 {
5790 UINT8 tmp = A - RM( DE );
5791 ZHC_SUB( tmp, A, 0 );
5792 A = tmp;
5793 }
5794
5795 /* 70 e3: 0111 0000 1110 0011 */
SUBX_H(void)5796 static void SUBX_H(void)
5797 {
5798 UINT8 tmp = A - RM( HL );
5799 ZHC_SUB( tmp, A, 0 );
5800 A = tmp;
5801 }
5802
5803 /* 70 e4: 0111 0000 1110 0100 */
SUBX_Dp(void)5804 static void SUBX_Dp(void)
5805 {
5806 UINT8 tmp = A - RM( DE );
5807 ZHC_SUB( tmp, A, 0 );
5808 A = tmp;
5809 DE++;
5810 }
5811
5812 /* 70 e5: 0111 0000 1110 0101 */
SUBX_Hp(void)5813 static void SUBX_Hp(void)
5814 {
5815 UINT8 tmp = A - RM( HL );
5816 ZHC_SUB( tmp, A, 0 );
5817 A = tmp;
5818 HL++;
5819 }
5820
5821 /* 70 e6: 0111 0000 1110 0110 */
SUBX_Dm(void)5822 static void SUBX_Dm(void)
5823 {
5824 UINT8 tmp = A - RM( DE );
5825 ZHC_SUB( tmp, A, 0 );
5826 A = tmp;
5827 DE--;
5828 }
5829
5830 /* 70 e7: 0111 0000 1110 0111 */
SUBX_Hm(void)5831 static void SUBX_Hm(void)
5832 {
5833 UINT8 tmp = A - RM( HL );
5834 ZHC_SUB( tmp, A, 0 );
5835 A = tmp;
5836 HL--;
5837 }
5838
5839 /* 70 e9: 0111 0000 1110 1001 */
NEAX_B(void)5840 static void NEAX_B(void)
5841 {
5842 UINT8 tmp = A - RM( BC );
5843 ZHC_SUB( tmp, A, 0 );
5844 SKIP_NZ;
5845 }
5846
5847 /* 70 ea: 0111 0000 1110 1010 */
NEAX_D(void)5848 static void NEAX_D(void)
5849 {
5850 UINT8 tmp = A - RM( DE );
5851 ZHC_SUB( tmp, A, 0 );
5852 SKIP_NZ;
5853 }
5854
5855 /* 70 eb: 0111 0000 1110 1011 */
NEAX_H(void)5856 static void NEAX_H(void)
5857 {
5858 UINT8 tmp = A - RM( HL );
5859 ZHC_SUB( tmp, A, 0 );
5860 SKIP_NZ;
5861 }
5862
5863 /* 70 ec: 0111 0000 1110 1100 */
NEAX_Dp(void)5864 static void NEAX_Dp(void)
5865 {
5866 UINT8 tmp = A - RM( DE );
5867 DE++;
5868 ZHC_SUB( tmp, A, 0 );
5869 SKIP_NZ;
5870 }
5871
5872 /* 70 ed: 0111 0000 1110 1101 */
NEAX_Hp(void)5873 static void NEAX_Hp(void)
5874 {
5875 UINT8 tmp = A - RM( HL );
5876 HL++;
5877 ZHC_SUB( tmp, A, 0 );
5878 SKIP_NZ;
5879 }
5880
5881 /* 70 ee: 0111 0000 1110 1110 */
NEAX_Dm(void)5882 static void NEAX_Dm(void)
5883 {
5884 UINT8 tmp = A - RM( DE );
5885 DE--;
5886 ZHC_SUB( tmp, A, 0 );
5887 SKIP_NZ;
5888 }
5889
5890 /* 70 ef: 0111 0000 1110 1111 */
NEAX_Hm(void)5891 static void NEAX_Hm(void)
5892 {
5893 UINT8 tmp = A - RM( HL );
5894 HL--;
5895 ZHC_SUB( tmp, A, 0 );
5896 SKIP_NZ;
5897 }
5898
5899 /* 70 f1: 0111 0000 1111 0001 */
SBBX_B(void)5900 static void SBBX_B(void)
5901 {
5902 UINT8 tmp = A - RM( BC ) - (PSW & CY);
5903 ZHC_SUB( tmp, A, (PSW & CY) );
5904 A = tmp;
5905 }
5906
5907 /* 70 f2: 0111 0000 1111 0010 */
SBBX_D(void)5908 static void SBBX_D(void)
5909 {
5910 UINT8 tmp = A - RM( DE ) - (PSW & CY);
5911 ZHC_SUB( tmp, A, (PSW & CY) );
5912 A = tmp;
5913 }
5914
5915 /* 70 f3: 0111 0000 1111 0011 */
SBBX_H(void)5916 static void SBBX_H(void)
5917 {
5918 UINT8 tmp = A - RM( HL ) - (PSW & CY);
5919 ZHC_SUB( tmp, A, (PSW & CY) );
5920 A = tmp;
5921 }
5922
5923 /* 70 f4: 0111 0000 1111 0100 */
SBBX_Dp(void)5924 static void SBBX_Dp(void)
5925 {
5926 UINT8 tmp = A - RM( DE ) - (PSW & CY);
5927 DE++;
5928 ZHC_SUB( tmp, A, (PSW & CY) );
5929 A = tmp;
5930 }
5931
5932 /* 70 f5: 0111 0000 1111 0101 */
SBBX_Hp(void)5933 static void SBBX_Hp(void)
5934 {
5935 UINT8 tmp = A - RM( HL ) - (PSW & CY);
5936 HL++;
5937 ZHC_SUB( tmp, A, (PSW & CY) );
5938 A = tmp;
5939 }
5940
5941 /* 70 f6: 0111 0000 1111 0110 */
SBBX_Dm(void)5942 static void SBBX_Dm(void)
5943 {
5944 UINT8 tmp = A - RM( DE ) - (PSW & CY);
5945 DE--;
5946 ZHC_SUB( tmp, A, (PSW & CY) );
5947 A = tmp;
5948 }
5949
5950 /* 70 f7: 0111 0000 1111 0111 */
SBBX_Hm(void)5951 static void SBBX_Hm(void)
5952 {
5953 UINT8 tmp = A - RM( HL ) - (PSW & CY);
5954 HL--;
5955 ZHC_SUB( tmp, A, (PSW & CY) );
5956 A = tmp;
5957 }
5958
5959 /* 70 f9: 0111 0000 1111 1001 */
EQAX_B(void)5960 static void EQAX_B(void)
5961 {
5962 UINT8 tmp = A - RM( BC );
5963 ZHC_SUB( tmp, A, 0 );
5964 SKIP_Z;
5965 }
5966
5967 /* 70 fa: 0111 0000 1111 1010 */
EQAX_D(void)5968 static void EQAX_D(void)
5969 {
5970 UINT8 tmp = A - RM( DE );
5971 ZHC_SUB( tmp, A, 0 );
5972 SKIP_Z;
5973 }
5974
5975 /* 70 fb: 0111 0000 1111 1011 */
EQAX_H(void)5976 static void EQAX_H(void)
5977 {
5978 UINT8 tmp = A - RM( HL );
5979 ZHC_SUB( tmp, A, 0 );
5980 SKIP_Z;
5981 }
5982
5983 /* 70 fc: 0111 0000 1111 1100 */
EQAX_Dp(void)5984 static void EQAX_Dp(void)
5985 {
5986 UINT8 tmp = A - RM( DE );
5987 DE++;
5988 ZHC_SUB( tmp, A, 0 );
5989 SKIP_Z;
5990 }
5991
5992 /* 70 fd: 0111 0000 1111 1101 */
EQAX_Hp(void)5993 static void EQAX_Hp(void)
5994 {
5995 UINT8 tmp = A - RM( HL );
5996 HL++;
5997 ZHC_SUB( tmp, A, 0 );
5998 SKIP_Z;
5999 }
6000
6001 /* 70 fe: 0111 0000 1111 1110 */
EQAX_Dm(void)6002 static void EQAX_Dm(void)
6003 {
6004 UINT8 tmp = A - RM( DE );
6005 DE--;
6006 ZHC_SUB( tmp, A, 0 );
6007 SKIP_Z;
6008 }
6009
6010 /* 70 ff: 0111 0000 1111 1111 */
EQAX_Hm(void)6011 static void EQAX_Hm(void)
6012 {
6013 UINT8 tmp = A - RM( HL );
6014 HL--;
6015 ZHC_SUB( tmp, A, 0 );
6016 SKIP_Z;
6017 }
6018
6019 /* prefix 74 */
6020 /* 74 08: 0111 0100 0000 1000 xxxx xxxx */
ANI_V_xx(void)6021 static void ANI_V_xx(void)
6022 {
6023 UINT8 imm;
6024 RDOPARG( imm );
6025 V &= imm;
6026 SET_Z(V);
6027 }
6028
6029 /* 74 09: 0111 0100 0000 1001 xxxx xxxx */
ANI_A_xx(void)6030 static void ANI_A_xx(void)
6031 {
6032 UINT8 imm;
6033 RDOPARG( imm );
6034 A &= imm;
6035 SET_Z(A);
6036 }
6037
6038 /* 74 0a: 0111 0100 0000 1010 xxxx xxxx */
ANI_B_xx(void)6039 static void ANI_B_xx(void)
6040 {
6041 UINT8 imm;
6042 RDOPARG( imm );
6043 B &= imm;
6044 SET_Z(B);
6045 }
6046
6047 /* 74 0b: 0111 0100 0000 1011 xxxx xxxx */
ANI_C_xx(void)6048 static void ANI_C_xx(void)
6049 {
6050 UINT8 imm;
6051 RDOPARG( imm );
6052 C &= imm;
6053 SET_Z(C);
6054 }
6055
6056 /* 74 0c: 0111 0100 0000 1100 xxxx xxxx */
ANI_D_xx(void)6057 static void ANI_D_xx(void)
6058 {
6059 UINT8 imm;
6060 RDOPARG( imm );
6061 D &= imm;
6062 SET_Z(D);
6063 }
6064
6065 /* 74 0d: 0111 0100 0000 1101 xxxx xxxx */
ANI_E_xx(void)6066 static void ANI_E_xx(void)
6067 {
6068 UINT8 imm;
6069 RDOPARG( imm );
6070 E &= imm;
6071 SET_Z(E);
6072 }
6073
6074 /* 74 0e: 0111 0100 0000 1110 xxxx xxxx */
ANI_H_xx(void)6075 static void ANI_H_xx(void)
6076 {
6077 UINT8 imm;
6078 RDOPARG( imm );
6079 H &= imm;
6080 SET_Z(H);
6081 }
6082
6083 /* 74 0f: 0111 0100 0000 1111 xxxx xxxx */
ANI_L_xx(void)6084 static void ANI_L_xx(void)
6085 {
6086 UINT8 imm;
6087 RDOPARG( imm );
6088 L &= imm;
6089 SET_Z(L);
6090 }
6091
6092 /* 74 10: 0111 0100 0001 0000 xxxx xxxx */
XRI_V_xx(void)6093 static void XRI_V_xx(void)
6094 {
6095 UINT8 imm;
6096 RDOPARG( imm );
6097 V ^= imm;
6098 SET_Z(V);
6099 }
6100
6101 /* 74 11: 0111 0100 0001 0001 xxxx xxxx */
XRI_A_xx(void)6102 static void XRI_A_xx(void)
6103 {
6104 UINT8 imm;
6105 RDOPARG( imm );
6106 A ^= imm;
6107 SET_Z(A);
6108 }
6109
6110 /* 74 12: 0111 0100 0001 0010 xxxx xxxx */
XRI_B_xx(void)6111 static void XRI_B_xx(void)
6112 {
6113 UINT8 imm;
6114 RDOPARG( imm );
6115 B ^= imm;
6116 SET_Z(B);
6117 }
6118
6119 /* 74 13: 0111 0100 0001 0011 xxxx xxxx */
XRI_C_xx(void)6120 static void XRI_C_xx(void)
6121 {
6122 UINT8 imm;
6123 RDOPARG( imm );
6124 C ^= imm;
6125 SET_Z(C);
6126 }
6127
6128 /* 74 14: 0111 0100 0001 0100 xxxx xxxx */
XRI_D_xx(void)6129 static void XRI_D_xx(void)
6130 {
6131 UINT8 imm;
6132 RDOPARG( imm );
6133 D ^= imm;
6134 SET_Z(D);
6135 }
6136
6137 /* 74 15: 0111 0100 0001 0101 xxxx xxxx */
XRI_E_xx(void)6138 static void XRI_E_xx(void)
6139 {
6140 UINT8 imm;
6141 RDOPARG( imm );
6142 E ^= imm;
6143 SET_Z(E);
6144 }
6145
6146 /* 74 16: 0111 0100 0001 0110 xxxx xxxx */
XRI_H_xx(void)6147 static void XRI_H_xx(void)
6148 {
6149 UINT8 imm;
6150 RDOPARG( imm );
6151 H ^= imm;
6152 SET_Z(H);
6153 }
6154
6155 /* 74 17: 0111 0100 0001 0111 xxxx xxxx */
XRI_L_xx(void)6156 static void XRI_L_xx(void)
6157 {
6158 UINT8 imm;
6159 RDOPARG( imm );
6160 L ^= imm;
6161 SET_Z(L);
6162 }
6163
6164 /* 74 18: 0111 0100 0001 1000 xxxx xxxx */
ORI_V_xx(void)6165 static void ORI_V_xx(void)
6166 {
6167 UINT8 imm;
6168 RDOPARG( imm );
6169 V |= imm;
6170 SET_Z(V);
6171 }
6172
6173 /* 74 19: 0111 0100 0001 1001 xxxx xxxx */
ORI_A_xx(void)6174 static void ORI_A_xx(void)
6175 {
6176 UINT8 imm;
6177 RDOPARG( imm );
6178 A |= imm;
6179 SET_Z(A);
6180 }
6181
6182 /* 74 1a: 0111 0100 0001 1010 xxxx xxxx */
ORI_B_xx(void)6183 static void ORI_B_xx(void)
6184 {
6185 UINT8 imm;
6186 RDOPARG( imm );
6187 B |= imm;
6188 SET_Z(B);
6189 }
6190
6191 /* 74 1b: 0111 0100 0001 1011 xxxx xxxx */
ORI_C_xx(void)6192 static void ORI_C_xx(void)
6193 {
6194 UINT8 imm;
6195 RDOPARG( imm );
6196 C |= imm;
6197 SET_Z(C);
6198 }
6199
6200 /* 74 1c: 0111 0100 0001 1100 xxxx xxxx */
ORI_D_xx(void)6201 static void ORI_D_xx(void)
6202 {
6203 UINT8 imm;
6204 RDOPARG( imm );
6205 D |= imm;
6206 SET_Z(D);
6207 }
6208
6209 /* 74 1d: 0111 0100 0001 1101 xxxx xxxx */
ORI_E_xx(void)6210 static void ORI_E_xx(void)
6211 {
6212 UINT8 imm;
6213 RDOPARG( imm );
6214 E |= imm;
6215 SET_Z(E);
6216 }
6217
6218 /* 74 1e: 0111 0100 0001 1110 xxxx xxxx */
ORI_H_xx(void)6219 static void ORI_H_xx(void)
6220 {
6221 UINT8 imm;
6222 RDOPARG( imm );
6223 H |= imm;
6224 SET_Z(H);
6225 }
6226
6227 /* 74 1f: 0111 0100 0001 1111 xxxx xxxx */
ORI_L_xx(void)6228 static void ORI_L_xx(void)
6229 {
6230 UINT8 imm;
6231 RDOPARG( imm );
6232 L |= imm;
6233 SET_Z(L);
6234 }
6235
6236 /* 74 20: 0111 0100 0010 0000 xxxx xxxx */
ADINC_V_xx(void)6237 static void ADINC_V_xx(void)
6238 {
6239 UINT8 tmp, imm;
6240
6241 RDOPARG( imm );
6242 tmp = V + imm;
6243
6244 ZHC_ADD( tmp, V, 0 );
6245 V = tmp;
6246 SKIP_NC;
6247 }
6248
6249 /* 74 21: 0111 0100 0010 0001 xxxx xxxx */
ADINC_A_xx(void)6250 static void ADINC_A_xx(void)
6251 {
6252 UINT8 tmp, imm;
6253
6254 RDOPARG( imm );
6255 tmp = A + imm;
6256
6257 ZHC_ADD( tmp, A, 0 );
6258 A = tmp;
6259 SKIP_NC;
6260 }
6261
6262 /* 74 22: 0111 0100 0010 0010 xxxx xxxx */
ADINC_B_xx(void)6263 static void ADINC_B_xx(void)
6264 {
6265 UINT8 tmp, imm;
6266
6267 RDOPARG( imm );
6268 tmp = B + imm;
6269
6270 ZHC_ADD( tmp, B, 0 );
6271 B = tmp;
6272 SKIP_NC;
6273 }
6274
6275 /* 74 23: 0111 0100 0010 0011 xxxx xxxx */
ADINC_C_xx(void)6276 static void ADINC_C_xx(void)
6277 {
6278 UINT8 tmp, imm;
6279
6280 RDOPARG( imm );
6281 tmp = C + imm;
6282
6283 ZHC_ADD( tmp, C, 0 );
6284 C = tmp;
6285 SKIP_NC;
6286 }
6287
6288 /* 74 24: 0111 0100 0010 0100 xxxx xxxx */
ADINC_D_xx(void)6289 static void ADINC_D_xx(void)
6290 {
6291 UINT8 tmp, imm;
6292
6293 RDOPARG( imm );
6294 tmp = D + imm;
6295
6296 ZHC_ADD( tmp, D, 0 );
6297 D = tmp;
6298 SKIP_NC;
6299 }
6300
6301 /* 74 25: 0111 0100 0010 0101 xxxx xxxx */
ADINC_E_xx(void)6302 static void ADINC_E_xx(void)
6303 {
6304 UINT8 tmp, imm;
6305
6306 RDOPARG( imm );
6307 tmp = E + imm;
6308
6309 ZHC_ADD( tmp, E, 0 );
6310 E = tmp;
6311 SKIP_NC;
6312 }
6313
6314 /* 74 26: 0111 0100 0010 0110 xxxx xxxx */
ADINC_H_xx(void)6315 static void ADINC_H_xx(void)
6316 {
6317 UINT8 tmp, imm;
6318
6319 RDOPARG( imm );
6320 tmp = H + imm;
6321
6322 ZHC_ADD( tmp, H, 0 );
6323 H = tmp;
6324 SKIP_NC;
6325 }
6326
6327 /* 74 27: 0111 0100 0010 0111 xxxx xxxx */
ADINC_L_xx(void)6328 static void ADINC_L_xx(void)
6329 {
6330 UINT8 tmp, imm;
6331
6332 RDOPARG( imm );
6333 tmp = L + imm;
6334
6335 ZHC_ADD( tmp, L, 0 );
6336 L = tmp;
6337 SKIP_NC;
6338 }
6339
6340 /* 74 28: 0111 0100 0010 1000 xxxx xxxx */
GTI_V_xx(void)6341 static void GTI_V_xx(void)
6342 {
6343 UINT8 imm;
6344 UINT16 tmp;
6345
6346 RDOPARG( imm );
6347 tmp = V - imm - 1;
6348 ZHC_SUB( tmp, V, 0 );
6349
6350 SKIP_NC;
6351 }
6352
6353 /* 74 29: 0111 0100 0010 1001 xxxx xxxx */
GTI_A_xx(void)6354 static void GTI_A_xx(void)
6355 {
6356 UINT8 imm;
6357 UINT16 tmp;
6358
6359 RDOPARG( imm );
6360 tmp = A - imm - 1;
6361 ZHC_SUB( tmp, A, 0 );
6362
6363 SKIP_NC;
6364 }
6365
6366 /* 74 2a: 0111 0100 0010 1010 xxxx xxxx */
GTI_B_xx(void)6367 static void GTI_B_xx(void)
6368 {
6369 UINT8 imm;
6370 UINT16 tmp;
6371
6372 RDOPARG( imm );
6373 tmp = B - imm - 1;
6374 ZHC_SUB( tmp, B, 0 );
6375
6376 SKIP_NC;
6377 }
6378
6379 /* 74 2b: 0111 0100 0010 1011 xxxx xxxx */
GTI_C_xx(void)6380 static void GTI_C_xx(void)
6381 {
6382 UINT8 imm;
6383 UINT16 tmp;
6384
6385 RDOPARG( imm );
6386 tmp = C - imm - 1;
6387 ZHC_SUB( tmp, C, 0 );
6388
6389 SKIP_NC;
6390 }
6391
6392 /* 74 2c: 0111 0100 0010 1100 xxxx xxxx */
GTI_D_xx(void)6393 static void GTI_D_xx(void)
6394 {
6395 UINT8 imm;
6396 UINT16 tmp;
6397
6398 RDOPARG( imm );
6399 tmp = D - imm - 1;
6400 ZHC_SUB( tmp, D, 0 );
6401
6402 SKIP_NC;
6403 }
6404
6405 /* 74 2d: 0111 0100 0010 1101 xxxx xxxx */
GTI_E_xx(void)6406 static void GTI_E_xx(void)
6407 {
6408 UINT8 imm;
6409 UINT16 tmp;
6410
6411 RDOPARG( imm );
6412 tmp = E - imm - 1;
6413 ZHC_SUB( tmp, E, 0 );
6414
6415 SKIP_NC;
6416 }
6417
6418 /* 74 2e: 0111 0100 0010 1110 xxxx xxxx */
GTI_H_xx(void)6419 static void GTI_H_xx(void)
6420 {
6421 UINT8 imm;
6422 UINT16 tmp;
6423
6424 RDOPARG( imm );
6425 tmp = H - imm - 1;
6426 ZHC_SUB( tmp, H, 0 );
6427
6428 SKIP_NC;
6429 }
6430
6431 /* 74 2f: 0111 0100 0010 1111 xxxx xxxx */
GTI_L_xx(void)6432 static void GTI_L_xx(void)
6433 {
6434 UINT8 imm;
6435 UINT16 tmp;
6436
6437 RDOPARG( imm );
6438 tmp = L - imm - 1;
6439 ZHC_SUB( tmp, L, 0 );
6440
6441 SKIP_NC;
6442 }
6443
6444 /* 74 30: 0111 0100 0011 0000 xxxx xxxx */
SUINB_V_xx(void)6445 static void SUINB_V_xx(void)
6446 {
6447 UINT8 tmp, imm;
6448
6449 RDOPARG( imm );
6450 tmp = V - imm;
6451 ZHC_SUB( tmp, V, 0 );
6452 V = tmp;
6453 SKIP_NC;
6454 }
6455
6456 /* 74 31: 0111 0100 0011 0001 xxxx xxxx */
SUINB_A_xx(void)6457 static void SUINB_A_xx(void)
6458 {
6459 UINT8 tmp, imm;
6460
6461 RDOPARG( imm );
6462 tmp = A - imm;
6463 ZHC_SUB( tmp, A, 0 );
6464 A = tmp;
6465 SKIP_NC;
6466 }
6467
6468 /* 74 32: 0111 0100 0011 0010 xxxx xxxx */
SUINB_B_xx(void)6469 static void SUINB_B_xx(void)
6470 {
6471 UINT8 tmp, imm;
6472
6473 RDOPARG( imm );
6474 tmp = B - imm;
6475 ZHC_SUB( tmp, B, 0 );
6476 B = tmp;
6477 SKIP_NC;
6478 }
6479
6480 /* 74 33: 0111 0100 0011 0011 xxxx xxxx */
SUINB_C_xx(void)6481 static void SUINB_C_xx(void)
6482 {
6483 UINT8 tmp, imm;
6484
6485 RDOPARG( imm );
6486 tmp = C - imm;
6487 ZHC_SUB( tmp, C, 0 );
6488 C = tmp;
6489 SKIP_NC;
6490 }
6491
6492 /* 74 34: 0111 0100 0011 0100 xxxx xxxx */
SUINB_D_xx(void)6493 static void SUINB_D_xx(void)
6494 {
6495 UINT8 tmp, imm;
6496
6497 RDOPARG( imm );
6498 tmp = D - imm;
6499 ZHC_SUB( tmp, D, 0 );
6500 D = tmp;
6501 SKIP_NC;
6502 }
6503
6504 /* 74 35: 0111 0100 0011 0101 xxxx xxxx */
SUINB_E_xx(void)6505 static void SUINB_E_xx(void)
6506 {
6507 UINT8 tmp, imm;
6508
6509 RDOPARG( imm );
6510 tmp = E - imm;
6511 ZHC_SUB( tmp, E, 0 );
6512 E = tmp;
6513 SKIP_NC;
6514 }
6515
6516 /* 74 36: 0111 0100 0011 0110 xxxx xxxx */
SUINB_H_xx(void)6517 static void SUINB_H_xx(void)
6518 {
6519 UINT8 tmp, imm;
6520
6521 RDOPARG( imm );
6522 tmp = H - imm;
6523 ZHC_SUB( tmp, H, 0 );
6524 H = tmp;
6525 SKIP_NC;
6526 }
6527
6528 /* 74 37: 0111 0100 0011 0111 xxxx xxxx */
SUINB_L_xx(void)6529 static void SUINB_L_xx(void)
6530 {
6531 UINT8 tmp, imm;
6532
6533 RDOPARG( imm );
6534 tmp = L - imm;
6535 ZHC_SUB( tmp, L, 0 );
6536 L = tmp;
6537 SKIP_NC;
6538 }
6539
6540 /* 74 38: 0111 0100 0011 1000 xxxx xxxx */
LTI_V_xx(void)6541 static void LTI_V_xx(void)
6542 {
6543 UINT8 tmp, imm;
6544
6545 RDOPARG( imm );
6546 tmp = V - imm;
6547 ZHC_SUB( tmp, V, 0 );
6548 SKIP_CY;
6549 }
6550
6551 /* 74 39: 0111 0100 0011 1001 xxxx xxxx */
LTI_A_xx(void)6552 static void LTI_A_xx(void)
6553 {
6554 UINT8 tmp, imm;
6555
6556 RDOPARG( imm );
6557 tmp = A - imm;
6558 ZHC_SUB( tmp, A, 0 );
6559 SKIP_CY;
6560 }
6561
6562 /* 74 3a: 0111 0100 0011 1010 xxxx xxxx */
LTI_B_xx(void)6563 static void LTI_B_xx(void)
6564 {
6565 UINT8 tmp, imm;
6566
6567 RDOPARG( imm );
6568 tmp = B - imm;
6569 ZHC_SUB( tmp, B, 0 );
6570 SKIP_CY;
6571 }
6572
6573 /* 74 3b: 0111 0100 0011 1011 xxxx xxxx */
LTI_C_xx(void)6574 static void LTI_C_xx(void)
6575 {
6576 UINT8 tmp, imm;
6577
6578 RDOPARG( imm );
6579 tmp = C - imm;
6580 ZHC_SUB( tmp, C, 0 );
6581 SKIP_CY;
6582 }
6583
6584 /* 74 3c: 0111 0100 0011 1100 xxxx xxxx */
LTI_D_xx(void)6585 static void LTI_D_xx(void)
6586 {
6587 UINT8 tmp, imm;
6588
6589 RDOPARG( imm );
6590 tmp = D - imm;
6591 ZHC_SUB( tmp, D, 0 );
6592 SKIP_CY;
6593 }
6594
6595 /* 74 3d: 0111 0100 0011 1101 xxxx xxxx */
LTI_E_xx(void)6596 static void LTI_E_xx(void)
6597 {
6598 UINT8 tmp, imm;
6599
6600 RDOPARG( imm );
6601 tmp = E - imm;
6602 ZHC_SUB( tmp, E, 0 );
6603 SKIP_CY;
6604 }
6605
6606 /* 74 3e: 0111 0100 0011 1110 xxxx xxxx */
LTI_H_xx(void)6607 static void LTI_H_xx(void)
6608 {
6609 UINT8 tmp, imm;
6610
6611 RDOPARG( imm );
6612 tmp = H - imm;
6613 ZHC_SUB( tmp, H, 0 );
6614 SKIP_CY;
6615 }
6616
6617 /* 74 3f: 0111 0100 0011 1111 xxxx xxxx */
LTI_L_xx(void)6618 static void LTI_L_xx(void)
6619 {
6620 UINT8 tmp, imm;
6621
6622 RDOPARG( imm );
6623 tmp = L - imm;
6624 ZHC_SUB( tmp, L, 0 );
6625 SKIP_CY;
6626 }
6627
6628 /* 74 40: 0111 0100 0100 0000 xxxx xxxx */
ADI_V_xx(void)6629 static void ADI_V_xx(void)
6630 {
6631 UINT8 tmp, imm;
6632
6633 RDOPARG( imm );
6634 tmp = V + imm;
6635
6636 ZHC_ADD( tmp, V, 0 );
6637 V = tmp;
6638 }
6639
6640 /* 74 41: 0111 0100 0100 0001 xxxx xxxx */
ADI_A_xx(void)6641 static void ADI_A_xx(void)
6642 {
6643 UINT8 tmp, imm;
6644
6645 RDOPARG( imm );
6646 tmp = A + imm;
6647
6648 ZHC_ADD( tmp, A, 0 );
6649 A = tmp;
6650 }
6651
6652 /* 74 42: 0111 0100 0100 0010 xxxx xxxx */
ADI_B_xx(void)6653 static void ADI_B_xx(void)
6654 {
6655 UINT8 tmp, imm;
6656
6657 RDOPARG( imm );
6658 tmp = B + imm;
6659
6660 ZHC_ADD( tmp, B, 0 );
6661 B = tmp;
6662 }
6663
6664 /* 74 43: 0111 0100 0100 0011 xxxx xxxx */
ADI_C_xx(void)6665 static void ADI_C_xx(void)
6666 {
6667 UINT8 tmp, imm;
6668
6669 RDOPARG( imm );
6670 tmp = C + imm;
6671
6672 ZHC_ADD( tmp, C, 0 );
6673 C = tmp;
6674 }
6675
6676 /* 74 44: 0111 0100 0100 0100 xxxx xxxx */
ADI_D_xx(void)6677 static void ADI_D_xx(void)
6678 {
6679 UINT8 tmp, imm;
6680
6681 RDOPARG( imm );
6682 tmp = D + imm;
6683
6684 ZHC_ADD( tmp, D, 0 );
6685 D = tmp;
6686 }
6687
6688 /* 74 45: 0111 0100 0100 0101 xxxx xxxx */
ADI_E_xx(void)6689 static void ADI_E_xx(void)
6690 {
6691 UINT8 tmp, imm;
6692
6693 RDOPARG( imm );
6694 tmp = E + imm;
6695
6696 ZHC_ADD( tmp, E, 0 );
6697 E = tmp;
6698 }
6699
6700 /* 74 46: 0111 0100 0100 0110 xxxx xxxx */
ADI_H_xx(void)6701 static void ADI_H_xx(void)
6702 {
6703 UINT8 tmp, imm;
6704
6705 RDOPARG( imm );
6706 tmp = H + imm;
6707
6708 ZHC_ADD( tmp, H, 0 );
6709 H = tmp;
6710 }
6711
6712 /* 74 47: 0111 0100 0100 0111 xxxx xxxx */
ADI_L_xx(void)6713 static void ADI_L_xx(void)
6714 {
6715 UINT8 tmp, imm;
6716
6717 RDOPARG( imm );
6718 tmp = L + imm;
6719
6720 ZHC_ADD( tmp, L, 0 );
6721 L = tmp;
6722 }
6723
6724 /* 74 48: 0111 0100 0100 1000 xxxx xxxx */
ONI_V_xx(void)6725 static void ONI_V_xx(void)
6726 {
6727 UINT8 imm;
6728
6729 RDOPARG( imm );
6730 if (V & imm)
6731 PSW |= SK;
6732 }
6733
6734 /* 74 49: 0111 0100 0100 1001 xxxx xxxx */
ONI_A_xx(void)6735 static void ONI_A_xx(void)
6736 {
6737 UINT8 imm;
6738
6739 RDOPARG( imm );
6740 if (A & imm)
6741 PSW |= SK;
6742 }
6743
6744 /* 74 4a: 0111 0100 0100 1010 xxxx xxxx */
ONI_B_xx(void)6745 static void ONI_B_xx(void)
6746 {
6747 UINT8 imm;
6748
6749 RDOPARG( imm );
6750 if (B & imm)
6751 PSW |= SK;
6752 }
6753
6754 /* 74 4b: 0111 0100 0100 1011 xxxx xxxx */
ONI_C_xx(void)6755 static void ONI_C_xx(void)
6756 {
6757 UINT8 imm;
6758
6759 RDOPARG( imm );
6760 if (C & imm)
6761 PSW |= SK;
6762 }
6763
6764 /* 74 4c: 0111 0100 0100 1100 xxxx xxxx */
ONI_D_xx(void)6765 static void ONI_D_xx(void)
6766 {
6767 UINT8 imm;
6768
6769 RDOPARG( imm );
6770 if (D & imm)
6771 PSW |= SK;
6772 }
6773
6774 /* 74 4d: 0111 0100 0100 1101 xxxx xxxx */
ONI_E_xx(void)6775 static void ONI_E_xx(void)
6776 {
6777 UINT8 imm;
6778
6779 RDOPARG( imm );
6780 if (E & imm)
6781 PSW |= SK;
6782 }
6783
6784 /* 74 4e: 0111 0100 0100 1110 xxxx xxxx */
ONI_H_xx(void)6785 static void ONI_H_xx(void)
6786 {
6787 UINT8 imm;
6788
6789 RDOPARG( imm );
6790 if (H & imm)
6791 PSW |= SK;
6792 }
6793
6794 /* 74 4f: 0111 0100 0100 1111 xxxx xxxx */
ONI_L_xx(void)6795 static void ONI_L_xx(void)
6796 {
6797 UINT8 imm;
6798
6799 RDOPARG( imm );
6800 if (L & imm)
6801 PSW |= SK;
6802 }
6803
6804 /* 74 50: 0111 0100 0101 0000 xxxx xxxx */
ACI_V_xx(void)6805 static void ACI_V_xx(void)
6806 {
6807 UINT8 tmp, imm;
6808
6809 RDOPARG( imm );
6810 tmp = V + imm + (PSW & CY);
6811 ZHC_SUB( tmp, V, (PSW & CY) );
6812 V = tmp;
6813 }
6814
6815 /* 74 51: 0111 0100 0101 0001 xxxx xxxx */
ACI_A_xx(void)6816 static void ACI_A_xx(void)
6817 {
6818 UINT8 tmp, imm;
6819
6820 RDOPARG( imm );
6821 tmp = A + imm + (PSW & CY);
6822 ZHC_SUB( tmp, A, (PSW & CY) );
6823 A = tmp;
6824 }
6825
6826 /* 74 52: 0111 0100 0101 0010 xxxx xxxx */
ACI_B_xx(void)6827 static void ACI_B_xx(void)
6828 {
6829 UINT8 tmp, imm;
6830
6831 RDOPARG( imm );
6832 tmp = B + imm + (PSW & CY);
6833 ZHC_SUB( tmp, B, (PSW & CY) );
6834 B = tmp;
6835 }
6836
6837 /* 74 53: 0111 0100 0101 0011 xxxx xxxx */
ACI_C_xx(void)6838 static void ACI_C_xx(void)
6839 {
6840 UINT8 tmp, imm;
6841
6842 RDOPARG( imm );
6843 tmp = C + imm + (PSW & CY);
6844 ZHC_SUB( tmp, C, (PSW & CY) );
6845 C = tmp;
6846 }
6847
6848 /* 74 54: 0111 0100 0101 0100 xxxx xxxx */
ACI_D_xx(void)6849 static void ACI_D_xx(void)
6850 {
6851 UINT8 tmp, imm;
6852
6853 RDOPARG( imm );
6854 tmp = D + imm + (PSW & CY);
6855 ZHC_SUB( tmp, D, (PSW & CY) );
6856 D = tmp;
6857 }
6858
6859 /* 74 55: 0111 0100 0101 0101 xxxx xxxx */
ACI_E_xx(void)6860 static void ACI_E_xx(void)
6861 {
6862 UINT8 tmp, imm;
6863
6864 RDOPARG( imm );
6865 tmp = E + imm + (PSW & CY);
6866 ZHC_SUB( tmp, E, (PSW & CY) );
6867 E = tmp;
6868 }
6869
6870 /* 74 56: 0111 0100 0101 0110 xxxx xxxx */
ACI_H_xx(void)6871 static void ACI_H_xx(void)
6872 {
6873 UINT8 tmp, imm;
6874
6875 RDOPARG( imm );
6876 tmp = H + imm + (PSW & CY);
6877 ZHC_SUB( tmp, H, (PSW & CY) );
6878 H = tmp;
6879 }
6880
6881 /* 74 57: 0111 0100 0101 0111 xxxx xxxx */
ACI_L_xx(void)6882 static void ACI_L_xx(void)
6883 {
6884 UINT8 tmp, imm;
6885
6886 RDOPARG( imm );
6887 tmp = L + imm + (PSW & CY);
6888 ZHC_SUB( tmp, L, (PSW & CY) );
6889 L = tmp;
6890 }
6891
6892 /* 74 58: 0111 0100 0101 1000 xxxx xxxx */
OFFI_V_xx(void)6893 static void OFFI_V_xx(void)
6894 {
6895 UINT8 imm;
6896
6897 RDOPARG( imm );
6898 if (0 == (V & imm))
6899 PSW |= SK;
6900 }
6901
6902 /* 74 59: 0111 0100 0101 1001 xxxx xxxx */
OFFI_A_xx(void)6903 static void OFFI_A_xx(void)
6904 {
6905 UINT8 imm;
6906
6907 RDOPARG( imm );
6908 if (0 == (A & imm))
6909 PSW |= SK;
6910 }
6911
6912 /* 74 5a: 0111 0100 0101 1010 xxxx xxxx */
OFFI_B_xx(void)6913 static void OFFI_B_xx(void)
6914 {
6915 UINT8 imm;
6916
6917 RDOPARG( imm );
6918 if (0 == (B & imm))
6919 PSW |= SK;
6920 }
6921
6922 /* 74 5b: 0111 0100 0101 1011 xxxx xxxx */
OFFI_C_xx(void)6923 static void OFFI_C_xx(void)
6924 {
6925 UINT8 imm;
6926
6927 RDOPARG( imm );
6928 if (0 == (C & imm))
6929 PSW |= SK;
6930 }
6931
6932 /* 74 5c: 0111 0100 0101 1100 xxxx xxxx */
OFFI_D_xx(void)6933 static void OFFI_D_xx(void)
6934 {
6935 UINT8 imm;
6936
6937 RDOPARG( imm );
6938 if (0 == (D & imm))
6939 PSW |= SK;
6940 }
6941
6942 /* 74 5d: 0111 0100 0101 1101 xxxx xxxx */
OFFI_E_xx(void)6943 static void OFFI_E_xx(void)
6944 {
6945 UINT8 imm;
6946
6947 RDOPARG( imm );
6948 if (0 == (E & imm))
6949 PSW |= SK;
6950 }
6951
6952 /* 74 5e: 0111 0100 0101 1110 xxxx xxxx */
OFFI_H_xx(void)6953 static void OFFI_H_xx(void)
6954 {
6955 UINT8 imm;
6956
6957 RDOPARG( imm );
6958 if (0 == (H & imm))
6959 PSW |= SK;
6960 }
6961
6962 /* 74 5f: 0111 0100 0101 1111 xxxx xxxx */
OFFI_L_xx(void)6963 static void OFFI_L_xx(void)
6964 {
6965 UINT8 imm;
6966
6967 RDOPARG( imm );
6968 if (0 == (L & imm))
6969 PSW |= SK;
6970 }
6971
6972 /* 74 60: 0111 0100 0110 0000 xxxx xxxx */
SUI_V_xx(void)6973 static void SUI_V_xx(void)
6974 {
6975 UINT8 tmp, imm;
6976
6977 RDOPARG( imm );
6978 tmp = V - imm;
6979 ZHC_SUB( tmp, V, 0 );
6980 V = tmp;
6981 }
6982
6983 /* 74 61: 0111 0100 0110 0001 xxxx xxxx */
SUI_A_xx(void)6984 static void SUI_A_xx(void)
6985 {
6986 UINT8 tmp, imm;
6987
6988 RDOPARG( imm );
6989 tmp = A - imm;
6990 ZHC_SUB( tmp, A, 0 );
6991 A = tmp;
6992 }
6993
6994 /* 74 62: 0111 0100 0110 0010 xxxx xxxx */
SUI_B_xx(void)6995 static void SUI_B_xx(void)
6996 {
6997 UINT8 tmp, imm;
6998
6999 RDOPARG( imm );
7000 tmp = B - imm;
7001 ZHC_SUB( tmp, B, 0 );
7002 B = tmp;
7003 }
7004
7005 /* 74 63: 0111 0100 0110 0011 xxxx xxxx */
SUI_C_xx(void)7006 static void SUI_C_xx(void)
7007 {
7008 UINT8 tmp, imm;
7009
7010 RDOPARG( imm );
7011 tmp = C - imm;
7012 ZHC_SUB( tmp, C, 0 );
7013 C = tmp;
7014 }
7015
7016 /* 74 64: 0111 0100 0110 0100 xxxx xxxx */
SUI_D_xx(void)7017 static void SUI_D_xx(void)
7018 {
7019 UINT8 tmp, imm;
7020
7021 RDOPARG( imm );
7022 tmp = D - imm;
7023 ZHC_SUB( tmp, D, 0 );
7024 D = tmp;
7025 }
7026
7027 /* 74 65: 0111 0100 0110 0101 xxxx xxxx */
SUI_E_xx(void)7028 static void SUI_E_xx(void)
7029 {
7030 UINT8 tmp, imm;
7031
7032 RDOPARG( imm );
7033 tmp = E - imm;
7034 ZHC_SUB( tmp, E, 0 );
7035 E = tmp;
7036 }
7037
7038 /* 74 66: 0111 0100 0110 0110 xxxx xxxx */
SUI_H_xx(void)7039 static void SUI_H_xx(void)
7040 {
7041 UINT8 tmp, imm;
7042
7043 RDOPARG( imm );
7044 tmp = H - imm;
7045 ZHC_SUB( tmp, H, 0 );
7046 H = tmp;
7047 }
7048
7049 /* 74 67: 0111 0100 0110 0111 xxxx xxxx */
SUI_L_xx(void)7050 static void SUI_L_xx(void)
7051 {
7052 UINT8 tmp, imm;
7053
7054 RDOPARG( imm );
7055 tmp = L - imm;
7056 ZHC_SUB( tmp, L, 0 );
7057 L = tmp;
7058 }
7059
7060 /* 74 68: 0111 0100 0110 1000 xxxx xxxx */
NEI_V_xx(void)7061 static void NEI_V_xx(void)
7062 {
7063 UINT8 tmp, imm;
7064
7065 RDOPARG( imm );
7066 tmp = V - imm;
7067 ZHC_SUB( tmp, V, 0 );
7068 SKIP_NZ;
7069 }
7070
7071 /* 74 69: 0111 0100 0110 1001 xxxx xxxx */
NEI_A_xx(void)7072 static void NEI_A_xx(void)
7073 {
7074 UINT8 tmp, imm;
7075
7076 RDOPARG( imm );
7077 tmp = A - imm;
7078 ZHC_SUB( tmp, A, 0 );
7079 SKIP_NZ;
7080 }
7081
7082 /* 74 6a: 0111 0100 0110 1010 xxxx xxxx */
NEI_B_xx(void)7083 static void NEI_B_xx(void)
7084 {
7085 UINT8 tmp, imm;
7086
7087 RDOPARG( imm );
7088 tmp = B - imm;
7089 ZHC_SUB( tmp, B, 0 );
7090 SKIP_NZ;
7091 }
7092
7093 /* 74 6b: 0111 0100 0110 1011 xxxx xxxx */
NEI_C_xx(void)7094 static void NEI_C_xx(void)
7095 {
7096 UINT8 tmp, imm;
7097
7098 RDOPARG( imm );
7099 tmp = C - imm;
7100 ZHC_SUB( tmp, C, 0 );
7101 SKIP_NZ;
7102 }
7103
7104 /* 74 6c: 0111 0100 0110 1100 xxxx xxxx */
NEI_D_xx(void)7105 static void NEI_D_xx(void)
7106 {
7107 UINT8 tmp, imm;
7108
7109 RDOPARG( imm );
7110 tmp = D - imm;
7111 ZHC_SUB( tmp, D, 0 );
7112 SKIP_NZ;
7113 }
7114
7115 /* 74 6d: 0111 0100 0110 1101 xxxx xxxx */
NEI_E_xx(void)7116 static void NEI_E_xx(void)
7117 {
7118 UINT8 tmp, imm;
7119
7120 RDOPARG( imm );
7121 tmp = E - imm;
7122 ZHC_SUB( tmp, E, 0 );
7123 SKIP_NZ;
7124 }
7125
7126 /* 74 6e: 0111 0100 0110 1110 xxxx xxxx */
NEI_H_xx(void)7127 static void NEI_H_xx(void)
7128 {
7129 UINT8 tmp, imm;
7130
7131 RDOPARG( imm );
7132 tmp = H - imm;
7133 ZHC_SUB( tmp, H, 0 );
7134 SKIP_NZ;
7135 }
7136
7137 /* 74 6f: 0111 0100 0110 1111 xxxx xxxx */
NEI_L_xx(void)7138 static void NEI_L_xx(void)
7139 {
7140 UINT8 tmp, imm;
7141
7142 RDOPARG( imm );
7143 tmp = L - imm;
7144 ZHC_SUB( tmp, L, 0 );
7145 SKIP_NZ;
7146 }
7147
7148 /* 74 70: 0111 0100 0111 0000 xxxx xxxx */
SBI_V_xx(void)7149 static void SBI_V_xx(void)
7150 {
7151 UINT8 tmp, imm;
7152
7153 RDOPARG( imm );
7154 tmp = V - imm - (PSW & CY);
7155 ZHC_SUB( tmp, V, (PSW & CY) );
7156 V = tmp;
7157 }
7158
7159 /* 74 71: 0111 0100 0111 0001 xxxx xxxx */
SBI_A_xx(void)7160 static void SBI_A_xx(void)
7161 {
7162 UINT8 tmp, imm;
7163
7164 RDOPARG( imm );
7165 tmp = A - imm - (PSW & CY);
7166 ZHC_SUB( tmp, A, (PSW & CY) );
7167 A = tmp;
7168 }
7169
7170 /* 74 72: 0111 0100 0111 0010 xxxx xxxx */
SBI_B_xx(void)7171 static void SBI_B_xx(void)
7172 {
7173 UINT8 tmp, imm;
7174
7175 RDOPARG( imm );
7176 tmp = B - imm - (PSW & CY);
7177 ZHC_SUB( tmp, B, (PSW & CY) );
7178 B = tmp;
7179 }
7180
7181 /* 74 73: 0111 0100 0111 0011 xxxx xxxx */
SBI_C_xx(void)7182 static void SBI_C_xx(void)
7183 {
7184 UINT8 tmp, imm;
7185
7186 RDOPARG( imm );
7187 tmp = C - imm - (PSW & CY);
7188 ZHC_SUB( tmp, C, (PSW & CY) );
7189 C = tmp;
7190 }
7191
7192 /* 74 74: 0111 0100 0111 0100 xxxx xxxx */
SBI_D_xx(void)7193 static void SBI_D_xx(void)
7194 {
7195 UINT8 tmp, imm;
7196
7197 RDOPARG( imm );
7198 tmp = D - imm - (PSW & CY);
7199 ZHC_SUB( tmp, D, (PSW & CY) );
7200 D = tmp;
7201 }
7202
7203 /* 74 75: 0111 0100 0111 0101 xxxx xxxx */
SBI_E_xx(void)7204 static void SBI_E_xx(void)
7205 {
7206 UINT8 tmp, imm;
7207
7208 RDOPARG( imm );
7209 tmp = E - imm - (PSW & CY);
7210 ZHC_SUB( tmp, E, (PSW & CY) );
7211 E = tmp;
7212 }
7213
7214 /* 74 76: 0111 0100 0111 0110 xxxx xxxx */
SBI_H_xx(void)7215 static void SBI_H_xx(void)
7216 {
7217 UINT8 tmp, imm;
7218
7219 RDOPARG( imm );
7220 tmp = H - imm - (PSW & CY);
7221 ZHC_SUB( tmp, H, (PSW & CY) );
7222 H = tmp;
7223 }
7224
7225 /* 74 77: 0111 0100 0111 0111 xxxx xxxx */
SBI_L_xx(void)7226 static void SBI_L_xx(void)
7227 {
7228 UINT8 tmp, imm;
7229
7230 RDOPARG( imm );
7231 tmp = L - imm - (PSW & CY);
7232 ZHC_SUB( tmp, L, (PSW & CY) );
7233 L = tmp;
7234 }
7235
7236 /* 74 78: 0111 0100 0111 1000 xxxx xxxx */
EQI_V_xx(void)7237 static void EQI_V_xx(void)
7238 {
7239 UINT8 tmp, imm;
7240
7241 RDOPARG( imm );
7242 tmp = V - imm;
7243 ZHC_SUB( tmp, V, 0 );
7244 SKIP_Z;
7245 }
7246
7247 /* 74 79: 0111 0100 0111 1001 xxxx xxxx */
EQI_A_xx(void)7248 static void EQI_A_xx(void)
7249 {
7250 UINT8 tmp, imm;
7251
7252 RDOPARG( imm );
7253 tmp = A - imm;
7254 ZHC_SUB( tmp, A, 0 );
7255 SKIP_Z;
7256 }
7257
7258 /* 74 7a: 0111 0100 0111 1010 xxxx xxxx */
EQI_B_xx(void)7259 static void EQI_B_xx(void)
7260 {
7261 UINT8 tmp, imm;
7262
7263 RDOPARG( imm );
7264 tmp = B - imm;
7265 ZHC_SUB( tmp, B, 0 );
7266 SKIP_Z;
7267 }
7268
7269 /* 74 7b: 0111 0100 0111 1011 xxxx xxxx */
EQI_C_xx(void)7270 static void EQI_C_xx(void)
7271 {
7272 UINT8 tmp, imm;
7273
7274 RDOPARG( imm );
7275 tmp = C - imm;
7276 ZHC_SUB( tmp, C, 0 );
7277 SKIP_Z;
7278 }
7279
7280 /* 74 7c: 0111 0100 0111 1100 xxxx xxxx */
EQI_D_xx(void)7281 static void EQI_D_xx(void)
7282 {
7283 UINT8 tmp, imm;
7284
7285 RDOPARG( imm );
7286 tmp = D - imm;
7287 ZHC_SUB( tmp, D, 0 );
7288 SKIP_Z;
7289 }
7290
7291 /* 74 7d: 0111 0100 0111 1101 xxxx xxxx */
EQI_E_xx(void)7292 static void EQI_E_xx(void)
7293 {
7294 UINT8 tmp, imm;
7295
7296 RDOPARG( imm );
7297 tmp = E - imm;
7298 ZHC_SUB( tmp, E, 0 );
7299 SKIP_Z;
7300 }
7301
7302 /* 74 7e: 0111 0100 0111 1110 xxxx xxxx */
EQI_H_xx(void)7303 static void EQI_H_xx(void)
7304 {
7305 UINT8 tmp, imm;
7306
7307 RDOPARG( imm );
7308 tmp = H - imm;
7309 ZHC_SUB( tmp, H, 0 );
7310 SKIP_Z;
7311 }
7312
7313 /* 74 7f: 0111 0100 0111 1111 xxxx xxxx */
EQI_L_xx(void)7314 static void EQI_L_xx(void)
7315 {
7316 UINT8 tmp, imm;
7317
7318 RDOPARG( imm );
7319 tmp = L - imm;
7320 ZHC_SUB( tmp, L, 0 );
7321 SKIP_Z;
7322 }
7323
7324 /* 74 88: 0111 0100 1000 1000 oooo oooo */
ANAW_wa(void)7325 static void ANAW_wa(void)
7326 {
7327 PAIR ea = upd7810.va;
7328 RDOPARG( ea.b.l );
7329
7330 A &= RM( ea.d );
7331 SET_Z(A);
7332 }
7333
7334 /* 74 8d: 0111 0100 1000 1101 */
DAN_EA_BC(void)7335 static void DAN_EA_BC(void)
7336 {
7337 EA &= BC;
7338 SET_Z(EA);
7339 }
7340
7341 /* 74 8e: 0111 0100 1000 1110 */
DAN_EA_DE(void)7342 static void DAN_EA_DE(void)
7343 {
7344 EA &= DE;
7345 SET_Z(EA);
7346 }
7347
7348 /* 74 8f: 0111 0100 1000 1111 */
DAN_EA_HL(void)7349 static void DAN_EA_HL(void)
7350 {
7351 EA &= HL;
7352 SET_Z(EA);
7353 }
7354
7355 /* 74 90: 0111 0100 1001 0000 oooo oooo */
XRAW_wa(void)7356 static void XRAW_wa(void)
7357 {
7358 PAIR ea = upd7810.va;
7359 RDOPARG( ea.b.l );
7360
7361 A ^= RM( ea.d );
7362 SET_Z(A);
7363 }
7364
7365 /* 74 95: 0111 0100 1001 0101 */
DXR_EA_BC(void)7366 static void DXR_EA_BC(void)
7367 {
7368 EA ^= BC;
7369 SET_Z(EA);
7370 }
7371
7372 /* 74 96: 0111 0100 1001 0110 */
DXR_EA_DE(void)7373 static void DXR_EA_DE(void)
7374 {
7375 EA ^= DE;
7376 SET_Z(EA);
7377 }
7378
7379 /* 74 97: 0111 0100 1001 0111 */
DXR_EA_HL(void)7380 static void DXR_EA_HL(void)
7381 {
7382 EA ^= HL;
7383 SET_Z(EA);
7384 }
7385
7386 /* 74 98: 0111 0100 1001 1000 oooo oooo */
ORAW_wa(void)7387 static void ORAW_wa(void)
7388 {
7389 PAIR ea = upd7810.va;
7390 RDOPARG( ea.b.l );
7391
7392 A |= RM( ea.d );
7393 SET_Z(A);
7394 }
7395
7396 /* 74 9d: 0111 0100 1001 1101 */
DOR_EA_BC(void)7397 static void DOR_EA_BC(void)
7398 {
7399 EA |= BC;
7400 SET_Z(EA);
7401 }
7402
7403 /* 74 9e: 0111 0100 1001 1110 */
DOR_EA_DE(void)7404 static void DOR_EA_DE(void)
7405 {
7406 EA |= DE;
7407 SET_Z(EA);
7408 }
7409
7410 /* 74 9f: 0111 0100 1001 1111 */
DOR_EA_HL(void)7411 static void DOR_EA_HL(void)
7412 {
7413 EA |= HL;
7414 SET_Z(EA);
7415 }
7416
7417 /* 74 a0: 0111 0100 1010 0000 oooo oooo */
ADDNCW_wa(void)7418 static void ADDNCW_wa(void)
7419 {
7420 PAIR ea = upd7810.va;
7421 UINT8 tmp;
7422
7423 RDOPARG( ea.b.l );
7424
7425 tmp = A + RM( ea.d );
7426 ZHC_ADD( tmp, A, 0 );
7427 A = tmp;
7428 SKIP_NC;
7429 }
7430
7431 /* 74 a5: 0111 0100 1010 0101 */
DADDNC_EA_BC(void)7432 static void DADDNC_EA_BC(void)
7433 {
7434 UINT16 tmp = EA + BC;
7435
7436 ZHC_ADD( tmp, EA, 0 );
7437 EA = tmp;
7438 SKIP_NC;
7439 }
7440
7441 /* 74 a6: 0111 0100 1010 0110 */
DADDNC_EA_DE(void)7442 static void DADDNC_EA_DE(void)
7443 {
7444 UINT16 tmp = EA + DE;
7445
7446 ZHC_ADD( tmp, EA, 0 );
7447 EA = tmp;
7448 SKIP_NC;
7449 }
7450
7451 /* 74 a7: 0111 0100 1010 0111 */
DADDNC_EA_HL(void)7452 static void DADDNC_EA_HL(void)
7453 {
7454 UINT16 tmp = EA + HL;
7455
7456 ZHC_ADD( tmp, EA, 0 );
7457 EA = tmp;
7458 SKIP_NC;
7459 }
7460
7461 /* 74 a8: 0111 0100 1010 1000 oooo oooo */
GTAW_wa(void)7462 static void GTAW_wa(void)
7463 {
7464 PAIR ea = upd7810.va;
7465 UINT16 tmp;
7466
7467 RDOPARG( ea.b.l );
7468 tmp = A - RM( ea.d ) - 1;
7469 ZHC_SUB( tmp, A, 0 );
7470 SKIP_NC;
7471 }
7472
7473 /* 74 ad: 0111 0100 1010 1101 */
DGT_EA_BC(void)7474 static void DGT_EA_BC(void)
7475 {
7476 UINT32 tmp = EA - BC - 1;
7477 ZHC_SUB( tmp, EA, 0 );
7478 SKIP_NC;
7479 }
7480
7481 /* 74 ae: 0111 0100 1010 1110 */
DGT_EA_DE(void)7482 static void DGT_EA_DE(void)
7483 {
7484 UINT32 tmp = EA - DE - 1;
7485 ZHC_SUB( tmp, EA, 0 );
7486 SKIP_NC;
7487 }
7488
7489 /* 74 af: 0111 0100 1010 1111 */
DGT_EA_HL(void)7490 static void DGT_EA_HL(void)
7491 {
7492 UINT32 tmp = EA - HL - 1;
7493 ZHC_SUB( tmp, EA, 0 );
7494 SKIP_NC;
7495 }
7496
7497 /* 74 b0: 0111 0100 1011 0000 oooo oooo */
SUBNBW_wa(void)7498 static void SUBNBW_wa(void)
7499 {
7500 PAIR ea = upd7810.va;
7501 UINT8 tmp;
7502
7503 RDOPARG( ea.b.l );
7504 tmp = A - RM( ea.d );
7505 ZHC_SUB( tmp, A, 0 );
7506 A = tmp;
7507 SKIP_NC;
7508 }
7509
7510 /* 74 b5: 0111 0100 1011 0101 */
DSUBNB_EA_BC(void)7511 static void DSUBNB_EA_BC(void)
7512 {
7513 UINT16 tmp = EA - BC;
7514 ZHC_SUB( tmp, EA, 0 );
7515 EA = tmp;
7516 SKIP_NC;
7517 }
7518
7519 /* 74 b6: 0111 0100 1011 0110 */
DSUBNB_EA_DE(void)7520 static void DSUBNB_EA_DE(void)
7521 {
7522 UINT16 tmp = EA - DE;
7523 ZHC_SUB( tmp, EA, 0 );
7524 EA = tmp;
7525 SKIP_NC;
7526 }
7527
7528 /* 74 b7: 0111 0100 1011 0111 */
DSUBNB_EA_HL(void)7529 static void DSUBNB_EA_HL(void)
7530 {
7531 UINT16 tmp;
7532
7533 tmp = EA - HL;
7534 ZHC_SUB( tmp, EA, 0 );
7535 EA = tmp;
7536 SKIP_NC;
7537 }
7538
7539 /* 74 b8: 0111 0100 1011 1000 oooo oooo */
LTAW_wa(void)7540 static void LTAW_wa(void)
7541 {
7542 PAIR ea = upd7810.va;
7543 UINT8 tmp;
7544
7545 RDOPARG( ea.b.l );
7546 tmp = A - RM( ea.d );
7547 ZHC_SUB( tmp, A, 0 );
7548 SKIP_CY;
7549 }
7550
7551 /* 74 bd: 0111 0100 1011 1101 */
DLT_EA_BC(void)7552 static void DLT_EA_BC(void)
7553 {
7554 UINT16 tmp = EA - BC;
7555 ZHC_SUB( tmp, EA, 0 );
7556 SKIP_CY;
7557 }
7558
7559 /* 74 be: 0111 0100 1011 1110 */
DLT_EA_DE(void)7560 static void DLT_EA_DE(void)
7561 {
7562 UINT16 tmp = EA - DE;
7563 ZHC_SUB( tmp, EA, 0 );
7564 SKIP_CY;
7565 }
7566
7567 /* 74 bf: 0111 0100 1011 1111 */
DLT_EA_HL(void)7568 static void DLT_EA_HL(void)
7569 {
7570 UINT16 tmp = EA - HL;
7571 ZHC_SUB( tmp, EA, 0 );
7572 SKIP_CY;
7573 }
7574
7575 /* 74 c0: 0111 0100 1100 0000 oooo oooo */
ADDW_wa(void)7576 static void ADDW_wa(void)
7577 {
7578 PAIR ea = upd7810.va;
7579 UINT8 tmp;
7580 RDOPARG( ea.b.l );
7581 tmp = A + RM( ea.d );
7582 ZHC_ADD( tmp, A, 0 );
7583 A = tmp;
7584 }
7585
7586 /* 74 c5: 0111 0100 1100 0101 */
DADD_EA_BC(void)7587 static void DADD_EA_BC(void)
7588 {
7589 UINT16 tmp = EA + BC;
7590 ZHC_ADD( tmp, EA, 0 );
7591 EA = tmp;
7592 }
7593
7594 /* 74 c6: 0111 0100 1100 0110 */
DADD_EA_DE(void)7595 static void DADD_EA_DE(void)
7596 {
7597 UINT16 tmp = EA + DE;
7598 ZHC_ADD( tmp, EA, 0 );
7599 EA = tmp;
7600 }
7601
7602 /* 74 c7: 0111 0100 1100 0111 */
DADD_EA_HL(void)7603 static void DADD_EA_HL(void)
7604 {
7605 UINT16 tmp = EA + HL;
7606 ZHC_ADD( tmp, EA, 0 );
7607 EA = tmp;
7608 }
7609
7610 /* 74 c8: 0111 0100 1100 1000 oooo oooo */
ONAW_wa(void)7611 static void ONAW_wa(void)
7612 {
7613 PAIR ea = upd7810.va;
7614 RDOPARG( ea.b.l );
7615
7616 if (A & RM( ea.d ))
7617 PSW = (PSW & ~Z) | SK;
7618 else
7619 PSW |= Z;
7620 }
7621
7622 /* 74 cd: 0111 0100 1100 1101 */
DON_EA_BC(void)7623 static void DON_EA_BC(void)
7624 {
7625 if (EA & BC)
7626 PSW = (PSW & ~Z) | SK;
7627 else
7628 PSW |= Z;
7629 }
7630
7631 /* 74 ce: 0111 0100 1100 1110 */
DON_EA_DE(void)7632 static void DON_EA_DE(void)
7633 {
7634 if (EA & DE)
7635 PSW = (PSW & ~Z) | SK;
7636 else
7637 PSW |= Z;
7638 }
7639
7640 /* 74 cf: 0111 0100 1100 1111 */
DON_EA_HL(void)7641 static void DON_EA_HL(void)
7642 {
7643 if (EA & HL)
7644 PSW = (PSW & ~Z) | SK;
7645 else
7646 PSW |= Z;
7647 }
7648
7649 /* 74 d0: 0111 0100 1101 0000 oooo oooo */
ADCW_wa(void)7650 static void ADCW_wa(void)
7651 {
7652 PAIR ea = upd7810.va;
7653 UINT8 tmp;
7654
7655 RDOPARG( ea.b.l );
7656 tmp = A + RM( ea.d ) + (PSW & CY);
7657 ZHC_ADD( tmp, A, (PSW & CY) );
7658 A = tmp;
7659 }
7660
7661 /* 74 d5: 0111 0100 1101 0101 */
DADC_EA_BC(void)7662 static void DADC_EA_BC(void)
7663 {
7664 UINT16 tmp = EA + BC + (PSW & CY);
7665 ZHC_ADD( tmp, EA, (PSW & CY) );
7666 EA = tmp;
7667 }
7668
7669 /* 74 d6: 0111 0100 1101 0110 */
DADC_EA_DE(void)7670 static void DADC_EA_DE(void)
7671 {
7672 UINT16 tmp = EA + DE + (PSW & CY);
7673 ZHC_ADD( tmp, EA, (PSW & CY) );
7674 EA = tmp;
7675 }
7676
7677 /* 74 d7: 0111 0100 1101 0111 */
DADC_EA_HL(void)7678 static void DADC_EA_HL(void)
7679 {
7680 UINT16 tmp = EA + HL + (PSW & CY);
7681 ZHC_ADD( tmp, EA, (PSW & CY) );
7682 EA = tmp;
7683 }
7684
7685 /* 74 d8: 0111 0100 1101 1000 oooo oooo */
OFFAW_wa(void)7686 static void OFFAW_wa(void)
7687 {
7688 PAIR ea = upd7810.va;
7689 RDOPARG( ea.b.l );
7690
7691 if ( A & RM( ea.d ) )
7692 PSW &= ~Z;
7693 else
7694 PSW = PSW | Z | SK;
7695 }
7696
7697 /* 74 dd: 0111 0100 1101 1101 */
DOFF_EA_BC(void)7698 static void DOFF_EA_BC(void)
7699 {
7700 if ( EA & BC )
7701 PSW &= ~Z;
7702 else
7703 PSW = PSW | Z | SK;
7704 }
7705
7706 /* 74 de: 0111 0100 1101 1110 */
DOFF_EA_DE(void)7707 static void DOFF_EA_DE(void)
7708 {
7709 if ( EA & DE )
7710 PSW &= ~Z;
7711 else
7712 PSW = PSW | Z | SK;
7713 }
7714
7715 /* 74 df: 0111 0100 1101 1111 */
DOFF_EA_HL(void)7716 static void DOFF_EA_HL(void)
7717 {
7718 if ( EA & HL )
7719 PSW &= ~Z;
7720 else
7721 PSW = PSW | Z | SK;
7722 }
7723
7724 /* 74 e0: 0111 0100 1110 0000 oooo oooo */
SUBW_wa(void)7725 static void SUBW_wa(void)
7726 {
7727 PAIR ea = upd7810.va;
7728 UINT8 tmp;
7729
7730 RDOPARG( ea.b.l );
7731 tmp = A - RM( ea.d );
7732 ZHC_SUB( tmp, A, 0 );
7733 A = tmp;
7734 }
7735
7736 /* 74 e5: 0111 0100 1110 0101 */
DSUB_EA_BC(void)7737 static void DSUB_EA_BC(void)
7738 {
7739 UINT16 tmp = EA - BC;
7740 ZHC_SUB( tmp, EA, 0 );
7741 EA = tmp;
7742 }
7743
7744 /* 74 e6: 0111 0100 1110 0110 */
DSUB_EA_DE(void)7745 static void DSUB_EA_DE(void)
7746 {
7747 UINT16 tmp = EA - DE;
7748 ZHC_SUB( tmp, EA, 0 );
7749 EA = tmp;
7750 }
7751
7752 /* 74 e7: 0111 0100 1110 0111 */
DSUB_EA_HL(void)7753 static void DSUB_EA_HL(void)
7754 {
7755 UINT16 tmp = EA - HL;
7756 ZHC_SUB( tmp, EA, 0 );
7757 EA = tmp;
7758 }
7759
7760 /* 74 e8: 0111 0100 1110 1000 oooo oooo */
NEAW_wa(void)7761 static void NEAW_wa(void)
7762 {
7763 PAIR ea = upd7810.va;
7764 UINT8 tmp;
7765
7766 RDOPARG( ea.b.l );
7767 tmp = A - RM( ea.d );
7768 ZHC_SUB( tmp, A, 0 );
7769 SKIP_NZ;
7770 }
7771
7772 /* 74 ed: 0111 0100 1110 1101 */
DNE_EA_BC(void)7773 static void DNE_EA_BC(void)
7774 {
7775 UINT16 tmp;
7776
7777 tmp = EA - BC;
7778 ZHC_SUB( tmp, EA, 0 );
7779 SKIP_NZ;
7780 }
7781
7782 /* 74 ee: 0111 0100 1110 1110 */
DNE_EA_DE(void)7783 static void DNE_EA_DE(void)
7784 {
7785 UINT16 tmp;
7786
7787 tmp = EA - DE;
7788 ZHC_SUB( tmp, EA, 0 );
7789 SKIP_NZ;
7790 }
7791
7792 /* 74 ef: 0111 0100 1110 1111 */
DNE_EA_HL(void)7793 static void DNE_EA_HL(void)
7794 {
7795 UINT16 tmp;
7796
7797 tmp = EA - HL;
7798 ZHC_SUB( tmp, EA, 0 );
7799 SKIP_NZ;
7800 }
7801
7802 /* 74 f0: 0111 0100 1111 0000 oooo oooo */
SBBW_wa(void)7803 static void SBBW_wa(void)
7804 {
7805 PAIR ea = upd7810.va;
7806 UINT8 tmp;
7807
7808 RDOPARG( ea.b.l );
7809 tmp = A - RM( ea.d ) - (PSW & CY);
7810 ZHC_SUB( tmp, A, (PSW & CY) );
7811 A = tmp;
7812 }
7813
7814 /* 74 f5: 0111 0100 1111 0101 */
DSBB_EA_BC(void)7815 static void DSBB_EA_BC(void)
7816 {
7817 UINT16 tmp = EA - BC - (PSW & CY);
7818 ZHC_SUB( tmp, EA, (PSW & CY) );
7819 EA = tmp;
7820 }
7821
7822 /* 74 f6: 0111 0100 1111 0110 */
DSBB_EA_DE(void)7823 static void DSBB_EA_DE(void)
7824 {
7825 UINT16 tmp = EA - DE - (PSW & CY);
7826 ZHC_SUB( tmp, EA, (PSW & CY) );
7827 EA = tmp;
7828 }
7829
7830 /* 74 f7: 0111 0100 1111 0111 */
DSBB_EA_HL(void)7831 static void DSBB_EA_HL(void)
7832 {
7833 UINT16 tmp = EA - HL - (PSW & CY);
7834 ZHC_SUB( tmp, EA, (PSW & CY) );
7835 EA = tmp;
7836 }
7837
7838 /* 74 f8: 0111 0100 1111 1000 oooo oooo */
EQAW_wa(void)7839 static void EQAW_wa(void)
7840 {
7841 PAIR ea = upd7810.va;
7842 UINT8 tmp;
7843
7844 RDOPARG( ea.b.l );
7845 tmp = A - RM( ea.d );
7846 ZHC_SUB( tmp, A, 0 );
7847 SKIP_Z;
7848 }
7849
7850 /* 74 fd: 0111 0100 1111 1101 */
DEQ_EA_BC(void)7851 static void DEQ_EA_BC(void)
7852 {
7853 UINT16 tmp;
7854
7855 tmp = EA - BC;
7856 ZHC_SUB( tmp, EA, 0 );
7857 SKIP_Z;
7858 }
7859
7860 /* 74 fe: 0111 0100 1111 1110 */
DEQ_EA_DE(void)7861 static void DEQ_EA_DE(void)
7862 {
7863 UINT16 tmp;
7864
7865 tmp = EA - DE;
7866 ZHC_SUB( tmp, EA, 0 );
7867 SKIP_Z;
7868 }
7869
7870 /* 74 ff: 0111 0100 1111 1111 */
DEQ_EA_HL(void)7871 static void DEQ_EA_HL(void)
7872 {
7873 UINT16 tmp;
7874
7875 tmp = EA - HL;
7876 ZHC_SUB( tmp, EA, 0 );
7877 SKIP_Z;
7878 }
7879
7880 /************************************************
7881 * main opcodes
7882 ************************************************/
7883
7884 /* 00: 0000 0000 */
NOP(void)7885 static void NOP(void)
7886 {
7887 }
7888
7889 /* 01: 0000 0001 oooo oooo */
LDAW_wa(void)7890 static void LDAW_wa(void)
7891 {
7892 PAIR ea = upd7810.va;
7893
7894 RDOPARG( ea.b.l );
7895
7896 A = RM( ea.d );
7897 }
7898
7899 /* 02: 0000 0010 */
INX_SP(void)7900 static void INX_SP(void)
7901 {
7902 SP++;
7903 }
7904
7905 /* 03: 0000 0011 */
DCX_SP(void)7906 static void DCX_SP(void)
7907 {
7908 SP--;
7909 }
7910
7911 /* 04: 0000 0100 llll llll hhhh hhhh */
LXI_S_w(void)7912 static void LXI_S_w(void)
7913 {
7914 RDOPARG( SPL );
7915 RDOPARG( SPH );
7916 }
7917
7918 /* 05: 0000 0101 oooo oooo xxxx xxxx */
ANIW_wa_xx(void)7919 static void ANIW_wa_xx(void)
7920 {
7921 PAIR ea = upd7810.va;
7922 UINT8 m, imm;
7923
7924 RDOPARG( ea.b.l );
7925 RDOPARG( imm );
7926 m = RM( ea.d );
7927 m &= imm;
7928 WM( ea.d, m );
7929 SET_Z(m);
7930 }
7931
7932 /* 07: 0000 0111 xxxx xxxx */
7933 /* ANI_A_xx already defined (long form) */
7934
7935 /* 08: 0000 1000 */
MOV_A_EAH(void)7936 static void MOV_A_EAH(void)
7937 {
7938 A = EAH;
7939 }
7940
7941 /* 09: 0000 1001 */
MOV_A_EAL(void)7942 static void MOV_A_EAL(void)
7943 {
7944 A = EAL;
7945 }
7946
7947 /* 0a: 0000 1010 */
MOV_A_B(void)7948 static void MOV_A_B(void)
7949 {
7950 A = B;
7951 }
7952
7953 /* 0b: 0000 1011 */
MOV_A_C(void)7954 static void MOV_A_C(void)
7955 {
7956 A = C;
7957 }
7958
7959 /* 0c: 0000 1100 */
MOV_A_D(void)7960 static void MOV_A_D(void)
7961 {
7962 A = D;
7963 }
7964
7965 /* 0d: 0000 1101 */
MOV_A_E(void)7966 static void MOV_A_E(void)
7967 {
7968 A = E;
7969 }
7970
7971 /* 0e: 0000 1110 */
MOV_A_H(void)7972 static void MOV_A_H(void)
7973 {
7974 A = H;
7975 }
7976
7977 /* 0f: 0000 1111 */
MOV_A_L(void)7978 static void MOV_A_L(void)
7979 {
7980 A = L;
7981 }
7982
7983 /* 10: 0001 0000 */
EXA(void)7984 static void EXA(void)
7985 {
7986 UINT16 tmp;
7987 tmp = EA; EA = EA2; EA2 = tmp;
7988 tmp = VA; VA = VA2; VA2 = tmp;
7989 }
7990
7991 /* 11: 0001 0001 */
EXX(void)7992 static void EXX(void)
7993 {
7994 UINT16 tmp;
7995 tmp = BC; BC = BC2; BC2 = tmp;
7996 tmp = DE; DE = DE2; DE2 = tmp;
7997 tmp = HL; HL = HL2; HL2 = tmp;
7998 }
7999
8000 /* 48 AD (7807 only) */
EXR(void)8001 static void EXR(void)
8002 {
8003 UINT16 tmp;
8004 tmp = BC; BC = BC2; BC2 = tmp;
8005 tmp = DE; DE = DE2; DE2 = tmp;
8006 tmp = HL; HL = HL2; HL2 = tmp;
8007 tmp = EA; EA = EA2; EA2 = tmp;
8008 tmp = VA; VA = VA2; VA2 = tmp;
8009 }
8010
8011 /* 12: 0001 0010 */
INX_BC(void)8012 static void INX_BC(void)
8013 {
8014 BC++;
8015 }
8016
8017 /* 13: 0001 0011 */
DCX_BC(void)8018 static void DCX_BC(void)
8019 {
8020 BC--;
8021 }
8022
8023 /* 14: 0001 0100 llll llll hhhh hhhh */
LXI_B_w(void)8024 static void LXI_B_w(void)
8025 {
8026 RDOPARG( C );
8027 RDOPARG( B );
8028 }
8029
8030 /* 15: 0001 0101 oooo oooo xxxx xxxx */
ORIW_wa_xx(void)8031 static void ORIW_wa_xx(void)
8032 {
8033 PAIR ea = upd7810.va;
8034 UINT8 m, imm;
8035
8036 RDOPARG( ea.b.l );
8037 RDOPARG( imm );
8038 m = RM( ea.d );
8039 m |= imm;
8040 WM( ea.d, m );
8041 SET_Z(m);
8042 }
8043
8044 /* 16: 0001 0110 xxxx xxxx */
8045 /* XRI_A_xx already defined (long form) */
8046
8047 /* 17: 0001 0111 xxxx xxxx */
8048 /* ORI_A_xx already defined (long form) */
8049
8050 /* 18: 0001 1000 */
MOV_EAH_A(void)8051 static void MOV_EAH_A(void)
8052 {
8053 EAH = A;
8054 }
8055
8056 /* 19: 0001 1001 */
MOV_EAL_A(void)8057 static void MOV_EAL_A(void)
8058 {
8059 EAL = A;
8060 }
8061
8062 /* 1a: 0001 1010 */
MOV_B_A(void)8063 static void MOV_B_A(void)
8064 {
8065 B = A;
8066 }
8067
8068 /* 1b: 0001 1011 */
MOV_C_A(void)8069 static void MOV_C_A(void)
8070 {
8071 C = A;
8072 }
8073
8074 /* 1c: 0001 1100 */
MOV_D_A(void)8075 static void MOV_D_A(void)
8076 {
8077 D = A;
8078 }
8079
8080 /* 1d: 0001 1101 */
MOV_E_A(void)8081 static void MOV_E_A(void)
8082 {
8083 E = A;
8084 }
8085
8086 /* 1e: 0001 1110 */
MOV_H_A(void)8087 static void MOV_H_A(void)
8088 {
8089 H = A;
8090 }
8091
8092 /* 1f: 0001 1111 */
MOV_L_A(void)8093 static void MOV_L_A(void)
8094 {
8095 L = A;
8096 }
8097
8098 /* 20: 0010 0000 oooo oooo */
INRW_wa(void)8099 static void INRW_wa(void)
8100 {
8101 PAIR ea = upd7810.va;
8102 UINT8 tmp, m;
8103
8104 RDOPARG( ea.b.l );
8105 m = RM( ea.d );
8106 tmp = m + 1;
8107 ZHC_ADD( tmp, m, 0 );
8108 WM( ea.d, tmp );
8109 SKIP_CY;
8110 }
8111
8112 /* 21: 0010 0001 */
JB(void)8113 static void JB(void)
8114 {
8115 PC = BC;
8116 change_pc16( PCD );
8117 }
8118
8119 /* 22: 0010 0010 */
INX_DE(void)8120 static void INX_DE(void)
8121 {
8122 DE++;
8123 }
8124
8125 /* 23: 0010 0011 */
DCX_DE(void)8126 static void DCX_DE(void)
8127 {
8128 DE--;
8129 }
8130
8131 /* 24: 0010 0100 llll llll hhhh hhhh */
LXI_D_w(void)8132 static void LXI_D_w(void)
8133 {
8134 RDOPARG( E );
8135 RDOPARG( D );
8136 }
8137
8138 /* 25: 0010 0101 oooo oooo xxxx xxxx */
GTIW_wa_xx(void)8139 static void GTIW_wa_xx(void)
8140 {
8141 PAIR ea = upd7810.va;
8142 UINT8 m, imm;
8143 UINT16 tmp;
8144
8145 RDOPARG( ea.b.l );
8146 RDOPARG( imm );
8147 m = RM( ea.d );
8148 tmp = m - imm - 1;
8149 ZHC_SUB( tmp, m, 0 );
8150 SKIP_NC;
8151 }
8152
8153 /* 26: 0010 0110 xxxx xxxx */
8154 /* ADINC_A_xx already defined (long form) */
8155
8156 /* 27: 0010 0111 xxxx xxxx */
8157 /* GTI_A_xx already defined (long form) */
8158
8159 /* 29: 0010 1001 */
LDAX_B(void)8160 static void LDAX_B(void)
8161 {
8162 A = RM( BC );
8163 }
8164
8165 /* 2a: 0010 1010 */
LDAX_D(void)8166 static void LDAX_D(void)
8167 {
8168 A = RM( DE );
8169 }
8170
8171 /* 2b: 0010 1011 */
LDAX_H(void)8172 static void LDAX_H(void)
8173 {
8174 A = RM( HL );
8175 }
8176
8177 /* 2c: 0010 1100 */
LDAX_Dp(void)8178 static void LDAX_Dp(void)
8179 {
8180 A = RM( DE );
8181 DE++;
8182 }
8183
8184 /* 2d: 0010 1101 dddd dddd */
LDAX_Hp(void)8185 static void LDAX_Hp(void)
8186 {
8187 A = RM( HL );
8188 HL++;
8189 }
8190
8191 /* 2e: 0010 1110 dddd dddd */
LDAX_Dm(void)8192 static void LDAX_Dm(void)
8193 {
8194 A = RM( DE );
8195 DE--;
8196 }
8197
8198 /* 2f: 0010 1111 dddd dddd */
LDAX_Hm(void)8199 static void LDAX_Hm(void)
8200 {
8201 A = RM( HL );
8202 HL--;
8203 }
8204
8205 /* 30: 0011 0000 oooo oooo */
DCRW_wa(void)8206 static void DCRW_wa(void)
8207 {
8208 PAIR ea = upd7810.va;
8209 UINT8 tmp, m;
8210
8211 RDOPARG( ea.b.l );
8212 m = RM( ea.d );
8213 tmp = m - 1;
8214 ZHC_SUB( tmp, m, 0 );
8215 WM( ea.d, tmp );
8216 SKIP_CY;
8217 }
8218
8219 /* 31: 0011 0001 */
BLOCK(void)8220 static void BLOCK(void)
8221 {
8222 WM( DE, RM( HL ) );
8223 DE++;
8224 HL++;
8225 C--;
8226 if (C == 0xff)
8227 PSW |= CY;
8228 else
8229 {
8230 PSW &= ~CY;
8231 PC--;
8232 }
8233 }
8234
8235 /* 32: 0011 0010 */
INX_HL(void)8236 static void INX_HL(void)
8237 {
8238 HL++;
8239 }
8240
8241 /* 33: 0011 0011 */
DCX_HL(void)8242 static void DCX_HL(void)
8243 {
8244 HL--;
8245 }
8246
8247 /* 34: 0011 0100 llll llll hhhh hhhh */
LXI_H_w(void)8248 static void LXI_H_w(void)
8249 {
8250 if (PSW & L0) { /* overlay active? */
8251 PC+=2;
8252 return;
8253 }
8254 RDOPARG( L );
8255 RDOPARG( H );
8256 PSW |= L0;
8257 }
8258
8259 /* 35: 0011 0101 oooo oooo xxxx xxxx */
LTIW_wa_xx(void)8260 static void LTIW_wa_xx(void)
8261 {
8262 PAIR ea = upd7810.va;
8263 UINT8 tmp, m, imm;
8264
8265 RDOPARG( ea.b.l );
8266 RDOPARG( imm );
8267 m = RM( ea.d );
8268 tmp = m - imm;
8269 ZHC_SUB( tmp, m, 0 );
8270 SKIP_CY;
8271 }
8272
8273 /* 36: 0011 0110 xxxx xxxx */
8274 /* SUINB_A_xx already defined (long form) */
8275
8276 /* 37: 0011 0111 xxxx xxxx */
8277 /* LTI_A_xx already defined (long form) */
8278
8279 /* 39: 0011 1001 */
STAX_B(void)8280 static void STAX_B(void)
8281 {
8282 WM( BC, A );
8283 }
8284
8285 /* 3a: 0011 1010 */
STAX_D(void)8286 static void STAX_D(void)
8287 {
8288 WM( DE, A );
8289 }
8290
8291 /* 3b: 0011 1011 */
STAX_H(void)8292 static void STAX_H(void)
8293 {
8294 WM( HL, A );
8295 }
8296
8297 /* 3c: 0011 1100 */
STAX_Dp(void)8298 static void STAX_Dp(void)
8299 {
8300 WM( DE, A );
8301 DE++;
8302 }
8303
8304 /* 3d: 0011 1101 */
STAX_Hp(void)8305 static void STAX_Hp(void)
8306 {
8307 WM( HL, A );
8308 HL++;
8309 }
8310
8311 /* 3e: 0011 1110 */
STAX_Dm(void)8312 static void STAX_Dm(void)
8313 {
8314 WM( DE, A );
8315 DE--;
8316 }
8317
8318 /* 3f: 0011 1111 */
STAX_Hm(void)8319 static void STAX_Hm(void)
8320 {
8321 WM( HL, A );
8322 HL--;
8323 }
8324
8325 /* 40: 0100 0000 llll llll hhhh hhhh */
CALL_w(void)8326 static void CALL_w(void)
8327 {
8328 PAIR w;
8329 w.d = 0;
8330
8331 RDOPARG( w.b.l );
8332 RDOPARG( w.b.h );
8333
8334 SP--;
8335 WM( SPD, PCH );
8336 SP--;
8337 WM( SPD, PCL );
8338
8339 PC = w.w.l;
8340 change_pc16( PCD );
8341 }
8342
8343 /* 41: 0100 0001 */
INR_A(void)8344 static void INR_A(void)
8345 {
8346 UINT8 tmp = A + 1;
8347 ZHC_ADD( tmp, A, 0 );
8348 A = tmp;
8349 SKIP_CY;
8350 }
8351
8352 /* 42: 0100 0010 */
INR_B(void)8353 static void INR_B(void)
8354 {
8355 UINT8 tmp = B + 1;
8356 ZHC_ADD( tmp, B, 0 );
8357 B = tmp;
8358 SKIP_CY;
8359 }
8360
8361 /* 43: 0100 0011 */
INR_C(void)8362 static void INR_C(void)
8363 {
8364 UINT8 tmp = C + 1;
8365 ZHC_ADD( tmp, C, 0 );
8366 C = tmp;
8367 SKIP_CY;
8368 }
8369
8370 /* 44: 0100 0100 llll llll hhhh hhhh */
LXI_EA_s(void)8371 static void LXI_EA_s(void)
8372 {
8373 RDOPARG( EAL );
8374 RDOPARG( EAH );
8375 }
8376
8377 /* 45: 0100 0101 oooo oooo xxxx xxxx */
ONIW_wa_xx(void)8378 static void ONIW_wa_xx(void)
8379 {
8380 PAIR ea = upd7810.va;
8381 UINT8 imm;
8382
8383 RDOPARG( ea.b.l );
8384 RDOPARG( imm );
8385
8386 if (RM( ea.d ) & imm)
8387 PSW |= SK;
8388 }
8389
8390 /* 46: 0100 0110 xxxx xxxx */
8391 /* ADI_A_xx already defined (long form) */
8392
8393 /* 47: 0100 0111 xxxx xxxx */
8394 /* ONI_A_xx already defined (long form) */
8395
8396 /* 48: prefix */
PRE_48(void)8397 static void PRE_48(void)
8398 {
8399 RDOP(OP2);
8400 upd7810_icount -= op48[OP2].cycles;
8401 upd7810_timers(op48[OP2].cycles);
8402 (*op48[OP2].opfunc)();
8403 }
8404
8405 /* 49: 0100 1001 xxxx xxxx */
MVIX_BC_xx(void)8406 static void MVIX_BC_xx(void)
8407 {
8408 UINT8 imm;
8409 RDOPARG( imm );
8410 WM( BC, imm );
8411 }
8412
8413 /* 4a: 0100 1010 xxxx xxxx */
MVIX_DE_xx(void)8414 static void MVIX_DE_xx(void)
8415 {
8416 UINT8 imm;
8417 RDOPARG( imm );
8418 WM( DE, imm );
8419 }
8420
8421 /* 4b: 0100 1011 xxxx xxxx */
MVIX_HL_xx(void)8422 static void MVIX_HL_xx(void)
8423 {
8424 UINT8 imm;
8425 RDOPARG( imm );
8426 WM( HL, imm );
8427 }
8428
8429 /* 4c: prefix */
PRE_4C(void)8430 static void PRE_4C(void)
8431 {
8432 RDOP(OP2);
8433 upd7810_icount -= op4C[OP2].cycles;
8434 upd7810_timers(op4C[OP2].cycles);
8435 (*op4C[OP2].opfunc)();
8436 }
8437
8438 /* 4d: prefix */
PRE_4D(void)8439 static void PRE_4D(void)
8440 {
8441 RDOP(OP2);
8442 upd7810_icount -= op4D[OP2].cycles;
8443 upd7810_timers(op4D[OP2].cycles);
8444 (*op4D[OP2].opfunc)();
8445 }
8446
8447 /* 4e: 0100 111d dddd dddd */
JRE(void)8448 static void JRE(void)
8449 {
8450 UINT8 offs;
8451 RDOPARG( offs );
8452 if (OP & 0x01)
8453 PC -= 256 - offs;
8454 else
8455 PC += offs;
8456 change_pc16( PCD );
8457 }
8458
8459 /* 50: 0101 0000 */
EXH(void)8460 static void EXH(void)
8461 {
8462 UINT16 tmp;
8463 tmp = HL; HL = HL2; HL2 = tmp;
8464 }
8465
8466 /* 51: 0101 0001 */
DCR_A(void)8467 static void DCR_A(void)
8468 {
8469 UINT8 tmp = A - 1;
8470 ZHC_SUB( tmp, A, 0 );
8471 A = tmp;
8472 SKIP_CY;
8473 }
8474
8475 /* 52: 0101 0010 */
DCR_B(void)8476 static void DCR_B(void)
8477 {
8478 UINT8 tmp = B - 1;
8479 ZHC_SUB( tmp, B, 0 );
8480 B = tmp;
8481 SKIP_CY;
8482 }
8483
8484 /* 53: 0101 0011 */
DCR_C(void)8485 static void DCR_C(void)
8486 {
8487 UINT8 tmp = C - 1;
8488 ZHC_SUB( tmp, C, 0 );
8489 C = tmp;
8490 SKIP_CY;
8491 }
8492
8493 /* 54: 0101 0100 llll llll hhhh hhhh */
JMP_w(void)8494 static void JMP_w(void)
8495 {
8496 PAIR w;
8497 w.d = 0;
8498
8499 RDOPARG( w.b.l );
8500 RDOPARG( w.b.h );
8501
8502 PCD = w.d;
8503 change_pc16( PCD );
8504 }
8505
8506 /* 55: 0101 0101 oooo oooo xxxx xxxx */
OFFIW_wa_xx(void)8507 static void OFFIW_wa_xx(void)
8508 {
8509 PAIR ea = upd7810.va;
8510 UINT8 imm;
8511
8512 RDOPARG( ea.b.l );
8513 RDOPARG( imm );
8514
8515 if (0 == (RM( ea.d ) & imm))
8516 PSW |= SK;
8517 }
8518
8519 /* 56: 0101 0110 xxxx xxxx */
8520 /* ACI_A_xx already defined (long form) */
8521
8522 /* 57: 0101 0111 xxxx xxxx */
8523 /* OFFI_A_xx already defined (long form) */
8524
8525 /* 58: 0101 1000 oooo oooo (7810 only) */
BIT_0_wa(void)8526 static void BIT_0_wa(void)
8527 {
8528 PAIR ea = upd7810.va;
8529
8530 RDOPARG( ea.b.l );
8531
8532 if (RM( ea.d ) & 0x01)
8533 PSW |= SK;
8534 }
8535
8536 /* 59: 0101 1001 oooo oooo (7810 only) */
BIT_1_wa(void)8537 static void BIT_1_wa(void)
8538 {
8539 PAIR ea = upd7810.va;
8540
8541 RDOPARG( ea.b.l );
8542
8543 if (RM( ea.d ) & 0x02)
8544 PSW |= SK;
8545 }
8546
8547 /* 5a: 0101 1010 oooo oooo (7810 only) */
BIT_2_wa(void)8548 static void BIT_2_wa(void)
8549 {
8550 PAIR ea = upd7810.va;
8551
8552 RDOPARG( ea.b.l );
8553
8554 if (RM( ea.d ) & 0x04)
8555 PSW |= SK;
8556 }
8557
8558 /* 5b: 0101 1011 oooo oooo (7810 only) */
BIT_3_wa(void)8559 static void BIT_3_wa(void)
8560 {
8561 PAIR ea = upd7810.va;
8562
8563 RDOPARG( ea.b.l );
8564
8565 if (RM( ea.d ) & 0x08)
8566 PSW |= SK;
8567 }
8568
8569 /* 5c: 0101 1100 oooo oooo (7810 only) */
BIT_4_wa(void)8570 static void BIT_4_wa(void)
8571 {
8572 PAIR ea = upd7810.va;
8573
8574 RDOPARG( ea.b.l );
8575
8576 if (RM( ea.d ) & 0x10)
8577 PSW |= SK;
8578 }
8579
8580 /* 5d: 0101 1101 oooo oooo (7810 only) */
BIT_5_wa(void)8581 static void BIT_5_wa(void)
8582 {
8583 PAIR ea = upd7810.va;
8584
8585 RDOPARG( ea.b.l );
8586
8587 if (RM( ea.d ) & 0x20)
8588 PSW |= SK;
8589 }
8590
8591 /* 5e: 0101 1110 oooo oooo (7810 only) */
BIT_6_wa(void)8592 static void BIT_6_wa(void)
8593 {
8594 PAIR ea = upd7810.va;
8595
8596 RDOPARG( ea.b.l );
8597
8598 if (RM( ea.d ) & 0x40)
8599 PSW |= SK;
8600 }
8601
8602 /* 5f: 0101 1111 oooo oooo (7810 only) */
BIT_7_wa(void)8603 static void BIT_7_wa(void)
8604 {
8605 PAIR ea = upd7810.va;
8606
8607 RDOPARG( ea.b.l );
8608
8609 if (RM( ea.d ) & 0x80)
8610 PSW |= SK;
8611 }
8612
8613 /* 5d: 0101 1111 bbbb bbbb (7807 only) */
SKN_bit(void)8614 static void SKN_bit(void)
8615 {
8616 UINT8 imm;
8617 int val;
8618
8619 RDOPARG( imm );
8620
8621 switch( imm & 0x1f )
8622 {
8623 case 0x10: /* PA */
8624 val = RP( UPD7810_PORTA );
8625 break;
8626 case 0x11: /* PB */
8627 val = RP( UPD7810_PORTB );
8628 break;
8629 case 0x12: /* PC */
8630 val = RP( UPD7810_PORTC );
8631 break;
8632 case 0x13: /* PD */
8633 val = RP( UPD7810_PORTD );
8634 break;
8635 case 0x15: /* PF */
8636 val = RP( UPD7810_PORTF );
8637 break;
8638 case 0x16: /* MKH */
8639 val = MKH;
8640 break;
8641 case 0x17: /* MKL */
8642 val = MKL;
8643 break;
8644 case 0x19: /* SMH */
8645 val = SMH;
8646 break;
8647 case 0x1b: /* EOM */
8648 val = EOM;
8649 break;
8650 case 0x1d: /* TMM */
8651 val = TMM;
8652 break;
8653 case 0x1e: /* PT */
8654 val = RP( UPD7807_PORTT );
8655 break;
8656 default:
8657 log_cb(RETRO_LOG_DEBUG, LOGPRE "uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, imm, PC);
8658 val = 0;
8659 break;
8660 }
8661
8662 if (~val & (1 << (imm >> 5)))
8663 PSW |= SK;
8664 }
8665
8666 /* 58: 0101 1000 bbbb bbbb (7807 only) */
SETB(void)8667 static void SETB(void)
8668 {
8669 UINT8 imm;
8670 int bit;
8671
8672 RDOPARG( imm );
8673 bit = imm >> 5;
8674
8675 switch( imm & 0x1f )
8676 {
8677 case 0x10: /* PA */
8678 WP( UPD7810_PORTA, RP( UPD7810_PORTA ) | (1 << bit));
8679 break;
8680 case 0x11: /* PB */
8681 WP( UPD7810_PORTB, RP( UPD7810_PORTB ) | (1 << bit));
8682 break;
8683 case 0x12: /* PC */
8684 WP( UPD7810_PORTC, RP( UPD7810_PORTC ) | (1 << bit));
8685 break;
8686 case 0x13: /* PD */
8687 WP( UPD7810_PORTD, RP( UPD7810_PORTD ) | (1 << bit));
8688 break;
8689 case 0x15: /* PF */
8690 WP( UPD7810_PORTF, RP( UPD7810_PORTF ) | (1 << bit));
8691 break;
8692 case 0x16: /* MKH */
8693 MKH |= (1 << bit);
8694 break;
8695 case 0x17: /* MKL */
8696 MKL |= (1 << bit);
8697 break;
8698 case 0x19: /* SMH */
8699 SMH |= (1 << bit);
8700 break;
8701 case 0x1b: /* EOM */
8702 EOM |= (1 << bit);
8703 break;
8704 case 0x1d: /* TMM */
8705 TMM |= (1 << bit);
8706 break;
8707 /* case 0x1e: // PT */
8708 /* PT is input only*/
8709 /* break;*/
8710 default:
8711 log_cb(RETRO_LOG_DEBUG, LOGPRE "uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, imm, PC);
8712 break;
8713 }
8714 }
8715
8716 /* 5b: 0101 1011 bbbb bbbb (7807 only) */
CLR(void)8717 static void CLR(void)
8718 {
8719 UINT8 imm;
8720 int bit;
8721
8722 RDOPARG( imm );
8723 bit = imm >> 5;
8724
8725 switch( imm & 0x1f )
8726 {
8727 case 0x10: /* PA */
8728 WP( UPD7810_PORTA, RP( UPD7810_PORTA ) & ~(1 << bit));
8729 break;
8730 case 0x11: /* PB */
8731 WP( UPD7810_PORTB, RP( UPD7810_PORTB ) & ~(1 << bit));
8732 break;
8733 case 0x12: /* PC */
8734 WP( UPD7810_PORTC, RP( UPD7810_PORTC ) & ~(1 << bit));
8735 break;
8736 case 0x13: /* PD */
8737 WP( UPD7810_PORTD, RP( UPD7810_PORTD ) & ~(1 << bit));
8738 break;
8739 case 0x15: /* PF */
8740 WP( UPD7810_PORTF, RP( UPD7810_PORTF ) & ~(1 << bit));
8741 break;
8742 case 0x16: /* MKH */
8743 MKH &= ~(1 << bit);
8744 break;
8745 case 0x17: /* MKL */
8746 MKL &= ~(1 << bit);
8747 break;
8748 case 0x19: /* SMH */
8749 SMH &= ~(1 << bit);
8750 break;
8751 case 0x1b: /* EOM */
8752 EOM &= ~(1 << bit);
8753 break;
8754 case 0x1d: /* TMM */
8755 TMM &= ~(1 << bit);
8756 break;
8757 /* case 0x1e: // PT */
8758 /* PT is input only*/
8759 /* break;*/
8760 default:
8761 log_cb(RETRO_LOG_DEBUG, LOGPRE "uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, imm, PC);
8762 break;
8763 }
8764 }
8765
8766 /* 5d: 0101 1111 bbbb bbbb (7807 only) */
SK_bit(void)8767 static void SK_bit(void)
8768 {
8769 UINT8 imm;
8770 int val;
8771
8772 RDOPARG( imm );
8773
8774 switch( imm & 0x1f )
8775 {
8776 case 0x10: /* PA */
8777 val = RP( UPD7810_PORTA );
8778 break;
8779 case 0x11: /* PB */
8780 val = RP( UPD7810_PORTB );
8781 break;
8782 case 0x12: /* PC */
8783 val = RP( UPD7810_PORTC );
8784 break;
8785 case 0x13: /* PD */
8786 val = RP( UPD7810_PORTD );
8787 break;
8788 case 0x15: /* PF */
8789 val = RP( UPD7810_PORTF );
8790 break;
8791 case 0x16: /* MKH */
8792 val = MKH;
8793 break;
8794 case 0x17: /* MKL */
8795 val = MKL;
8796 break;
8797 case 0x19: /* SMH */
8798 val = SMH;
8799 break;
8800 case 0x1b: /* EOM */
8801 val = EOM;
8802 break;
8803 case 0x1d: /* TMM */
8804 val = TMM;
8805 break;
8806 case 0x1e: /* PT */
8807 val = RP( UPD7807_PORTT );
8808 break;
8809 default:
8810 log_cb(RETRO_LOG_DEBUG, LOGPRE "uPD7810 #%d: illegal opcode %02x %02x at PC:%04x\n", cpu_getactivecpu(), OP, imm, PC);
8811 val = 0;
8812 break;
8813 }
8814
8815 if (val & (1 << (imm >> 5)))
8816 PSW |= SK;
8817 }
8818
8819 /* 60:*/
PRE_60(void)8820 static void PRE_60(void)
8821 {
8822 RDOP(OP2);
8823 upd7810_icount -= op60[OP2].cycles;
8824 upd7810_timers(op60[OP2].cycles);
8825 (*op60[OP2].opfunc)();
8826 }
8827
8828 /* 61: 0110 0001 */
DAA(void)8829 static void DAA(void)
8830 {
8831 UINT8 l = A & 0x0f, h = A >> 4, tmp, adj = 0x00;
8832 if (0 == (PSW & HC))
8833 {
8834 if (l < 10)
8835 {
8836 if (!(h < 10 && 0 == (PSW & CY)))
8837 adj = 0x60;
8838 }
8839 else
8840 {
8841 if (h < 9 && 0 == (PSW & CY))
8842 adj = 0x06;
8843 else
8844 adj = 0x66;
8845 }
8846 }
8847 else
8848 if (l < 3)
8849 {
8850 if (h < 10 && 0 == (PSW & CY))
8851 adj = 0x06;
8852 else
8853 adj = 0x66;
8854 }
8855 tmp = A + adj;
8856 ZHC_ADD( tmp, A, PSW & CY );
8857 A = tmp;
8858 }
8859
8860 /* 62: 0110 0010 */
RETI(void)8861 static void RETI(void)
8862 {
8863 PCL = RM( SPD );
8864 SP++;
8865 PCH = RM( SPD );
8866 SP++;
8867 PSW = RM( SPD );
8868 SP++;
8869 change_pc16( PCD );
8870 }
8871
8872 /* 63: 0110 0011 oooo oooo */
STAW_wa(void)8873 static void STAW_wa(void)
8874 {
8875 PAIR ea = upd7810.va;
8876
8877 RDOPARG( ea.b.l );
8878
8879 WM( ea.d, A );
8880 }
8881
8882 /* 64: prefix */
PRE_64(void)8883 static void PRE_64(void)
8884 {
8885 RDOP(OP2);
8886 upd7810_icount -= op64[OP2].cycles;
8887 upd7810_timers(op64[OP2].cycles);
8888 (*op64[OP2].opfunc)();
8889 }
8890
8891 /* 65: 0110 0101 oooo oooo xxxx xxxx */
NEIW_wa_xx(void)8892 static void NEIW_wa_xx(void)
8893 {
8894 PAIR ea = upd7810.va;
8895 UINT8 tmp, m, imm;
8896
8897 RDOPARG( ea.b.l );
8898 RDOPARG( imm );
8899 m = RM( ea.d );
8900 tmp = m - imm;
8901 ZHC_SUB( tmp, m, 0 );
8902 SKIP_NZ;
8903 }
8904
8905 /* 66: 0110 0110 xxxx xxxx */
8906 /* SUI_A_xx already defined (long form) */
8907
8908 /* 67: 0110 0111 xxxx xxxx */
8909 /* NEI_A_xx already defined (long form) */
8910
8911 /* 68: 0110 1000 xxxx xxxx */
MVI_V_xx(void)8912 static void MVI_V_xx(void)
8913 {
8914 RDOPARG( V );
8915 }
8916
8917 /* 69: 0110 1001 xxxx xxxx */
MVI_A_xx(void)8918 static void MVI_A_xx(void)
8919 {
8920 if (PSW & L1) { /* overlay active? */
8921 PC++;
8922 return; /* NOP */
8923 }
8924 RDOPARG( A );
8925 PSW |= L1;
8926 }
8927
8928 /* 6a: 0110 1010 xxxx xxxx */
MVI_B_xx(void)8929 static void MVI_B_xx(void)
8930 {
8931 RDOPARG( B );
8932 }
8933
8934 /* 6b: 0110 1011 xxxx xxxx */
MVI_C_xx(void)8935 static void MVI_C_xx(void)
8936 {
8937 RDOPARG( C );
8938 }
8939
8940 /* 6c: 0110 1100 xxxx xxxx */
MVI_D_xx(void)8941 static void MVI_D_xx(void)
8942 {
8943 RDOPARG( D );
8944 }
8945
8946 /* 6d: 0110 1101 xxxx xxxx */
MVI_E_xx(void)8947 static void MVI_E_xx(void)
8948 {
8949 RDOPARG( E );
8950 }
8951
8952 /* 6e: 0110 1110 xxxx xxxx */
MVI_H_xx(void)8953 static void MVI_H_xx(void)
8954 {
8955 RDOPARG( H );
8956 }
8957
8958 /* 6f: 0110 1111 xxxx xxxx */
MVI_L_xx(void)8959 static void MVI_L_xx(void)
8960 {
8961 if (PSW & L0) { /* overlay active? */
8962 PC++;
8963 return; /* NOP */
8964 }
8965 RDOPARG( L );
8966 PSW |= L0;
8967 }
8968
8969 /* 70: prefix */
PRE_70(void)8970 static void PRE_70(void)
8971 {
8972 RDOP(OP2);
8973 upd7810_icount -= op70[OP2].cycles;
8974 upd7810_timers(op70[OP2].cycles);
8975 (*op70[OP2].opfunc)();
8976 }
8977
8978 /* 71: 0111 0001 oooo oooo xxxx xxxx */
MVIW_wa_xx(void)8979 static void MVIW_wa_xx(void)
8980 {
8981 PAIR ea = upd7810.va;
8982 UINT8 imm;
8983
8984 RDOPARG( ea.b.l );
8985 RDOPARG( imm );
8986
8987 WM( ea.d, imm );
8988 }
8989
8990 /* 72: 0111 0010 */
SOFTI(void)8991 static void SOFTI(void)
8992 {
8993 SP--;
8994 WM( SPD, PSW );
8995 SP--;
8996 WM( SPD, PCH );
8997 SP--;
8998 WM( SPD, PCL );
8999
9000 PC = 0x0060;
9001 change_pc16( PCD );
9002 }
9003
9004 /* 74: prefix */
PRE_74(void)9005 static void PRE_74(void)
9006 {
9007 RDOP(OP2);
9008 upd7810_icount -= op74[OP2].cycles;
9009 upd7810_timers(op74[OP2].cycles);
9010 (*op74[OP2].opfunc)();
9011 }
9012
9013 /* 75: 0111 0101 oooo oooo xxxx xxxx */
EQIW_wa_xx(void)9014 static void EQIW_wa_xx(void)
9015 {
9016 PAIR ea = upd7810.va;
9017 UINT8 tmp, m, imm;
9018
9019 RDOPARG( ea.b.l );
9020 RDOPARG( imm );
9021 m = RM( ea.d );
9022 tmp = m - imm;
9023 ZHC_SUB( tmp, m, 0 );
9024 SKIP_Z;
9025 }
9026
9027 /* 76: 0111 0110 xxxx xxxx */
9028 /* SBI_A_xx already defined (long form) */
9029
9030 /* 77: 0111 0111 xxxx xxxx */
9031 /* EQI_A_xx already defined (long form) */
9032
9033 /* 78: 0111 1ddd dddd dddd */
CALF(void)9034 static void CALF(void)
9035 {
9036 PAIR w;
9037 w.d = 0;
9038
9039 RDOPARG( w.b.l );
9040 w.b.h = 0x08 + (OP & 0x07);
9041
9042 SP--;
9043 WM( SPD, PCH );
9044 SP--;
9045 WM( SPD, PCL );
9046
9047 PCD = w.d;
9048 change_pc16( PCD );
9049 }
9050
9051 /* 80: 100t tttt */
CALT(void)9052 static void CALT(void)
9053 {
9054 PAIR w;
9055 w.d = 0;
9056
9057 switch (upd7810.config.type) {
9058 case TYPE_7810_GAMEMASTER:
9059 logerror ("!!!!!!!%.4x calt %.2x game master table position not known\n",PPC, OP);
9060 break;
9061 default:
9062 w.w.l = 0x80 + 2 * (OP & 0x1f);
9063 }
9064
9065 if (upd7810.config.type!=TYPE_7810_GAMEMASTER) {
9066 SP--;
9067 WM( SPD, PCH );
9068 SP--;
9069 WM( SPD, PCL );
9070
9071 PCL=RM(w.w.l);
9072 PCH=RM(w.w.l+1);
9073
9074 change_pc16( PCD );
9075 logerror ("!!!!!!!%.4x calt %.2x %.4x; game master table position not known\n",PPC, OP, PCD);
9076 }
9077 }
9078
9079 /* a0: 1010 0000 */
POP_VA(void)9080 static void POP_VA(void)
9081 {
9082 A = RM( SPD );
9083 SP++;
9084 V = RM( SPD );
9085 SP++;
9086 }
9087
9088 /* a1: 1010 0001 */
POP_BC(void)9089 static void POP_BC(void)
9090 {
9091 C = RM( SPD );
9092 SP++;
9093 B = RM( SPD );
9094 SP++;
9095 }
9096
9097 /* a2: 1010 0010 */
POP_DE(void)9098 static void POP_DE(void)
9099 {
9100 E = RM( SPD );
9101 SP++;
9102 D = RM( SPD );
9103 SP++;
9104 }
9105
9106 /* a3: 1010 0011 */
POP_HL(void)9107 static void POP_HL(void)
9108 {
9109 L = RM( SPD );
9110 SP++;
9111 H = RM( SPD );
9112 SP++;
9113 }
9114
9115 /* a4: 1010 0100 */
POP_EA(void)9116 static void POP_EA(void)
9117 {
9118 EAL = RM( SPD );
9119 SP++;
9120 EAH = RM( SPD );
9121 SP++;
9122 }
9123
9124 /* a5: 1010 0101 */
DMOV_EA_BC(void)9125 static void DMOV_EA_BC(void)
9126 {
9127 EA = BC;
9128 }
9129
9130 /* a6: 1010 0110 */
DMOV_EA_DE(void)9131 static void DMOV_EA_DE(void)
9132 {
9133 EA = DE;
9134 }
9135
9136 /* a7: 1010 0111 */
DMOV_EA_HL(void)9137 static void DMOV_EA_HL(void)
9138 {
9139 EA = HL;
9140 }
9141
9142 /* a8: 1010 1000 */
INX_EA(void)9143 static void INX_EA(void)
9144 {
9145 EA++;
9146 }
9147
9148 /* a9: 1010 1001 */
DCX_EA(void)9149 static void DCX_EA(void)
9150 {
9151 EA--;
9152 }
9153
9154 /* aa: 1010 1010 */
EI(void)9155 static void EI(void)
9156 {
9157 IFF = 1;
9158 }
9159
9160 /* ab: 1010 1011 dddd dddd */
LDAX_D_xx(void)9161 static void LDAX_D_xx(void)
9162 {
9163 UINT16 ea;
9164 RDOPARG( ea );
9165 ea += DE;
9166 A = RM( ea );
9167 }
9168
9169 /* ac: 1010 1100 */
LDAX_H_A(void)9170 static void LDAX_H_A(void)
9171 {
9172 UINT16 ea;
9173 ea = HL + A;
9174 A = RM( ea );
9175 }
9176
9177 /* ad: 1010 1101 */
LDAX_H_B(void)9178 static void LDAX_H_B(void)
9179 {
9180 UINT16 ea;
9181 ea = HL + B;
9182 A = RM( ea );
9183 }
9184
9185 /* ae: 1010 1110 */
LDAX_H_EA(void)9186 static void LDAX_H_EA(void)
9187 {
9188 UINT16 ea;
9189 ea = HL + EA;
9190 A = RM( ea );
9191 }
9192
9193 /* af: 1010 1111 dddd dddd */
LDAX_H_xx(void)9194 static void LDAX_H_xx(void)
9195 {
9196 UINT16 ea;
9197 RDOPARG( ea );
9198 ea += HL;
9199 A = RM( ea );
9200 }
9201
9202 /* b0: 1011 0000 */
PUSH_VA(void)9203 static void PUSH_VA(void)
9204 {
9205 SP--;
9206 WM( SPD, V );
9207 SP--;
9208 WM( SPD, A );
9209 }
9210
9211 /* b1: 1011 0001 */
PUSH_BC(void)9212 static void PUSH_BC(void)
9213 {
9214 SP--;
9215 WM( SPD, B );
9216 SP--;
9217 WM( SPD, C );
9218 }
9219
9220 /* b2: 1011 0010 */
PUSH_DE(void)9221 static void PUSH_DE(void)
9222 {
9223 SP--;
9224 WM( SPD, D );
9225 SP--;
9226 WM( SPD, E );
9227 }
9228
9229 /* b3: 1011 0011 */
PUSH_HL(void)9230 static void PUSH_HL(void)
9231 {
9232 SP--;
9233 WM( SPD, H );
9234 SP--;
9235 WM( SPD, L );
9236 }
9237
9238 /* b4: 1011 0100 */
PUSH_EA(void)9239 static void PUSH_EA(void)
9240 {
9241 SP--;
9242 WM( SPD, EAH );
9243 SP--;
9244 WM( SPD, EAL );
9245 }
9246
9247 /* b5: 1011 0101 */
DMOV_BC_EA(void)9248 static void DMOV_BC_EA(void)
9249 {
9250 BC = EA;
9251 }
9252
9253 /* b6: 1011 0110 */
DMOV_DE_EA(void)9254 static void DMOV_DE_EA(void)
9255 {
9256 DE = EA;
9257 }
9258
9259 /* b7: 1011 0111 */
DMOV_HL_EA(void)9260 static void DMOV_HL_EA(void)
9261 {
9262 HL = EA;
9263 }
9264
9265 /* b8: 1011 1000 */
RET(void)9266 static void RET(void)
9267 {
9268 PCL = RM( SPD );
9269 SP++;
9270 PCH = RM( SPD );
9271 SP++;
9272 change_pc16( PCD );
9273 }
9274
9275 /* b9: 1011 1001 */
RETS(void)9276 static void RETS(void)
9277 {
9278 PCL = RM( SPD );
9279 SP++;
9280 PCH = RM( SPD );
9281 SP++;
9282 PSW|=SK; /* skip one instruction */
9283 change_pc16( PCD );
9284 }
9285
9286 /* ba: 1011 1010 */
DI(void)9287 static void DI(void)
9288 {
9289 IFF = 0;
9290 }
9291
9292 /* bb: 1011 1011 dddd dddd */
STAX_D_xx(void)9293 static void STAX_D_xx(void)
9294 {
9295 UINT16 ea;
9296 RDOPARG(ea);
9297 ea += DE;
9298 WM( ea, A );
9299 }
9300
9301 /* bc: 1011 1100 */
STAX_H_A(void)9302 static void STAX_H_A(void)
9303 {
9304 UINT16 ea = A;
9305 ea += HL;
9306 WM( ea, A );
9307 }
9308
9309 /* bd: 1011 1101 */
STAX_H_B(void)9310 static void STAX_H_B(void)
9311 {
9312 UINT16 ea = B;
9313 ea += HL;
9314 WM( ea, A );
9315 }
9316
9317 /* be: 1011 1110 */
STAX_H_EA(void)9318 static void STAX_H_EA(void)
9319 {
9320 UINT16 ea = EA;
9321 ea += HL;
9322 WM( ea, A );
9323 }
9324
9325 /* bf: 1011 1111 dddd dddd */
STAX_H_xx(void)9326 static void STAX_H_xx(void)
9327 {
9328 UINT16 ea;
9329 RDOPARG( ea );
9330 ea += HL;
9331 WM( ea, A );
9332 }
9333
9334 /* c0: 11dd dddd */
JR(void)9335 static void JR(void)
9336 {
9337 INT8 offs = (INT8)(OP << 2) >> 2;
9338 PC += offs;
9339 change_pc16(PCD);
9340 }
9341