1 /***************************************************************************
2
3 Coors Light Bowling/Bowl-O-Rama hardware
4
5 driver by Zsolt Vasvari
6
7 Games supported:
8 * Capcom/Coors Light Bowling
9 * Bowlorama
10
11 Known issues:
12 * none
13
14 ****************************************************************************
15
16 CPU Board:
17
18 0000-3fff 3 Graphics ROMS mapped in using 0x4800 (Coors Light Bowling only)
19 0000-001f Turbo board area (Bowl-O-Rama only) See Below.
20 4000 Display row selected
21 4800 Graphics ROM select
22 5000-57ff Battery backed up RAM (Saves machine state after shut off)
23 Enter setup menu by holding down the F2 key on the
24 high score screen
25 5800-5fff TMS34061 area
26
27 First 0x20 bytes of each row provide a 16 color palette for this
28 row. 2 bytes per color: 0000RRRR GGGGBBBB.
29
30 Remaining 0xe0 bytes contain 2 pixels each for a total of
31 448 pixels, but only 360 seem to be displayed.
32 (Each row appears vertically because the monitor is rotated)
33
34 6000 Sound command
35 6800 Trackball Reset. Double duties as a watchdog.
36 7000 Input port 1 Bit 0-3 Trackball Vertical Position
37 Bit 4 Player 2 Hook Left
38 Bit 5 Player 2 Hook Right
39 Bit 6 Upright/Cocktail DIP Switch
40 Bit 7 Coin 2
41 7800 Input port 2 Bit 0-3 Trackball Horizontal Positon
42 Bit 4 Player 1 Hook Left
43 Bit 5 Player 1 Hook Right
44 Bit 6 Start
45 Bit 7 Coin 1
46 8000-ffff ROM
47
48
49 Sound Board:
50
51 0000-07ff RAM
52 1000-1001 YM2203
53 Port A D7 Read is ticket sensor
54 Port B D7 Write is ticket dispenser enable
55 Port B D6 looks like a diagnostics LED to indicate that
56 the PCB is operating. It's pulsated by the
57 sound CPU. It is kind of pointless to emulate it.
58 2000 Not hooked up according to the schematics
59 6000 DAC write
60 7000 Sound command read (0x34 is used to dispense a ticket)
61 8000-ffff ROM
62
63
64 Turbo Board Layout (Plugs in place of GR0):
65
66 Bowl-O-Rama Copyright 1991 P&P Marketing
67 Marquee says "EXIT Entertainment"
68
69 This portion: Mike Appolo with the help of Andrew Pines.
70 Andrew was one of the game designers for Capcom Bowling,
71 Coors Light Bowling, Strata Bowling, and Bowl-O-Rama.
72
73 This game was an upgrade for Capcom Bowling and included a
74 "Turbo PCB" that had a GAL address decoder / data mask
75
76 Memory Map for turbo board (where GR0 is on Capcom Bowling PCBs:
77
78 0000 Read Mask
79 0001-0003 Unused
80 0004 Read Data
81 0005-0007 Unused
82 0008 GR Address High Byte (GR17-16)
83 0009-0016 Unused
84 0017 GR Address Middle Byte (GR15-0 written as a word to 0017-0018)
85 0018 GR address Low byte
86 0019-001f Unused
87
88 ***************************************************************************/
89
90 #include "driver.h"
91 #include "vidhrdw/generic.h"
92 #include "machine/ticket.h"
93 #include "cpu/m6809/m6809.h"
94 #include "capbowl.h"
95
96
97
98 /*************************************
99 *
100 * NVRAM
101 *
102 *************************************/
103
NVRAM_HANDLER(capbowl)104 static NVRAM_HANDLER( capbowl )
105 {
106 if (read_or_write)
107 mame_fwrite(file,generic_nvram,generic_nvram_size);
108 else
109 {
110 if (file)
111 mame_fread(file,generic_nvram,generic_nvram_size);
112 else
113 {
114 /* invalidate nvram to make the game initialize it.
115 A 0xff fill will cause the game to malfunction, so we use a
116 0x01 fill which seems OK */
117 memset(generic_nvram,0x01,generic_nvram_size);
118 }
119 }
120 }
121
122
123
124 /*************************************
125 *
126 * Sound commands
127 *
128 *************************************/
129
WRITE_HANDLER(capbowl_sndcmd_w)130 static WRITE_HANDLER( capbowl_sndcmd_w )
131 {
132 cpu_set_irq_line(1, M6809_IRQ_LINE, HOLD_LINE);
133 soundlatch_w(offset, data);
134 }
135
136
137
138 /*************************************
139 *
140 * Handler called by the 2203 emulator
141 * when the internal timers cause an IRQ
142 *
143 *************************************/
144
firqhandler(int irq)145 static void firqhandler(int irq)
146 {
147 cpu_set_irq_line(1, 1, irq ? ASSERT_LINE : CLEAR_LINE);
148 }
149
150
151
152 /*************************************
153 *
154 * NMI is to trigger the self test.
155 * We use a fake input port to tie
156 * that event to a keypress
157 *
158 *************************************/
159
INTERRUPT_GEN(capbowl_interrupt)160 static INTERRUPT_GEN( capbowl_interrupt )
161 {
162 if (readinputport(4) & 1) /* get status of the F2 key */
163 cpu_set_irq_line(0, IRQ_LINE_NMI, PULSE_LINE); /* trigger self test */
164 }
165
166
167
168 /*************************************
169 *
170 * Trackball input handlers
171 *
172 *************************************/
173
174 static int track[2];
175
READ_HANDLER(track_0_r)176 static READ_HANDLER( track_0_r )
177 {
178 return (input_port_0_r(offset) & 0xf0) | ((input_port_2_r(offset) - track[0]) & 0x0f);
179 }
180
READ_HANDLER(track_1_r)181 static READ_HANDLER( track_1_r )
182 {
183 return (input_port_1_r(offset) & 0xf0) | ((input_port_3_r(offset) - track[1]) & 0x0f);
184 }
185
WRITE_HANDLER(track_reset_w)186 static WRITE_HANDLER( track_reset_w )
187 {
188 /* reset the trackball counters */
189 track[0] = input_port_2_r(offset);
190 track[1] = input_port_3_r(offset);
191
192 watchdog_reset_w(offset,data);
193 }
194
195
196
197 /*************************************
198 *
199 * Main CPU memory handlers
200 *
201 *************************************/
202
MEMORY_READ_START(capbowl_readmem)203 static MEMORY_READ_START( capbowl_readmem )
204 { 0x0000, 0x3fff, MRA_BANK1 },
205 { 0x5000, 0x57ff, MRA_RAM },
206 { 0x5800, 0x5fff, capbowl_tms34061_r },
207 { 0x7000, 0x7000, track_0_r }, /* + other inputs */
208 { 0x7800, 0x7800, track_1_r }, /* + other inputs */
209 { 0x8000, 0xffff, MRA_ROM },
210 MEMORY_END
211
212
213 static MEMORY_READ_START( bowlrama_readmem )
214 { 0x0000, 0x001f, bowlrama_turbo_r },
215 { 0x5000, 0x57ff, MRA_RAM },
216 { 0x5800, 0x5fff, capbowl_tms34061_r },
217 { 0x7000, 0x7000, track_0_r }, /* + other inputs */
218 { 0x7800, 0x7800, track_1_r }, /* + other inputs */
219 { 0x8000, 0xffff, MRA_ROM },
220 MEMORY_END
221
222
223 static MEMORY_WRITE_START( writemem )
224 { 0x0000, 0x001f, bowlrama_turbo_w }, /* Bowl-O-Rama only */
225 { 0x4000, 0x4000, MWA_RAM, &capbowl_rowaddress },
226 { 0x4800, 0x4800, capbowl_rom_select_w },
227 { 0x5000, 0x57ff, MWA_RAM, &generic_nvram, &generic_nvram_size },
228 { 0x5800, 0x5fff, capbowl_tms34061_w },
229 { 0x6000, 0x6000, capbowl_sndcmd_w },
230 { 0x6800, 0x6800, track_reset_w }, /* + watchdog */
231 MEMORY_END
232
233
234
235 /*************************************
236 *
237 * Sound CPU memory handlers
238 *
239 *************************************/
240
241 static MEMORY_READ_START( sound_readmem )
242 { 0x0000, 0x07ff, MRA_RAM },
243 { 0x1000, 0x1000, YM2203_status_port_0_r },
244 { 0x1001, 0x1001, YM2203_read_port_0_r },
245 { 0x7000, 0x7000, soundlatch_r },
246 { 0x8000, 0xffff, MRA_ROM },
247 MEMORY_END
248
249
250 static MEMORY_WRITE_START( sound_writemem )
251 { 0x0000, 0x07ff, MWA_RAM},
252 { 0x1000, 0x1000, YM2203_control_port_0_w },
253 { 0x1001, 0x1001, YM2203_write_port_0_w },
254 { 0x2000, 0x2000, MWA_NOP }, /* Not hooked up according to the schematics */
255 { 0x6000, 0x6000, DAC_0_data_w },
256 MEMORY_END
257
258
259
260 /*************************************
261 *
262 * Port definitions
263 *
264 *************************************/
265
266 INPUT_PORTS_START( capbowl )
267 PORT_START /* IN0 */
268 /* low 4 bits are for the trackball */
269 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
270 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
271 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) /* This version of Bowl-O-Rama */
272 PORT_DIPSETTING( 0x40, DEF_STR( Upright ) ) /* is Upright only */
273 PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
274 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
275
276 PORT_START /* IN1 */
277 /* low 4 bits are for the trackball */
278 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
279 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
280 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
281 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
282
283 PORT_START /* FAKE */
284 PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_Y | IPF_REVERSE, 20, 40, 0, 0 )
285
286 PORT_START /* FAKE */
287 PORT_ANALOG( 0xff, 0x00, IPT_TRACKBALL_X, 20, 40, 0, 0 )
288
289 PORT_START /* FAKE */
290 /* This fake input port is used to get the status of the F2 key, */
291 /* and activate the test mode, which is triggered by a NMI */
292 PORT_BITX(0x01, IP_ACTIVE_HIGH, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
293 INPUT_PORTS_END
294
295
296
297 /*************************************
298 *
299 * Sound definitions
300 *
301 *************************************/
302
303 static struct YM2203interface ym2203_interface =
304 {
305 1, /* 1 chip */
306 4000000, /* 4 MHz */
307 { YM2203_VOL(40,40) },
308 { ticket_dispenser_r },
309 { 0 },
310 { 0 },
311 { ticket_dispenser_w }, /* Also a status LED. See memory map above */
312 { firqhandler }
313 };
314
315
316 static struct DACinterface dac_interface =
317 {
318 1,
319 { 100 }
320 };
321
322
323
324 /*************************************
325 *
326 * Machine driver
327 *
328 *************************************/
329
330 static MACHINE_DRIVER_START( capbowl )
331
332 /* basic machine hardware */
333 MDRV_CPU_ADD_TAG("main", M6809, 2000000)
334 MDRV_CPU_MEMORY(capbowl_readmem,writemem)
335 MDRV_CPU_VBLANK_INT(capbowl_interrupt,1)
336
337 MDRV_CPU_ADD(M6809,2000000)
338 MDRV_CPU_FLAGS(CPU_AUDIO_CPU)
339 MDRV_CPU_MEMORY(sound_readmem,sound_writemem)
340
341 MDRV_FRAMES_PER_SECOND(57)
342 MDRV_VBLANK_DURATION(5000)
343
344 MDRV_MACHINE_INIT(capbowl)
345 MDRV_NVRAM_HANDLER(capbowl)
346
347 /* video hardware */
348 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
349 MDRV_SCREEN_SIZE(360, 256)
350 MDRV_VISIBLE_AREA(0, 359, 0, 244)
351 MDRV_PALETTE_LENGTH(4096)
352
353 MDRV_VIDEO_START(capbowl)
354 MDRV_VIDEO_UPDATE(capbowl)
355
356 /* sound hardware */
357 MDRV_SOUND_ADD(YM2203, ym2203_interface)
358 MDRV_SOUND_ADD(DAC, dac_interface)
359 MACHINE_DRIVER_END
360
361
362 static MACHINE_DRIVER_START( bowlrama )
363
364 /* basic machine hardware */
365 MDRV_IMPORT_FROM(capbowl)
366
367 MDRV_CPU_MODIFY("main")
368 MDRV_CPU_MEMORY(bowlrama_readmem,writemem)
369
370 /* video hardware */
371 MDRV_VISIBLE_AREA(0, 359, 0, 239)
372 MACHINE_DRIVER_END
373
374
375
376 /*************************************
377 *
378 * ROM definitions
379 *
380 *************************************/
381
382 ROM_START( capbowl )
383 ROM_REGION( 0x28000, REGION_CPU1, 0 )
384 ROM_LOAD( "u6", 0x08000, 0x8000, CRC(14924c96) SHA1(d436c5115873c9c2bc7657acff1cf7d99c0c5d6d) )
385 ROM_LOAD( "gr0", 0x10000, 0x8000, CRC(ef53ca7a) SHA1(219dc342595bfd23c1336f3e167e40ff0c5e7994) )
386 ROM_LOAD( "gr1", 0x18000, 0x8000, CRC(27ede6ce) SHA1(14aa31cbcf089419b5b2ea8d57e82fc51895fc2e) )
387 ROM_LOAD( "gr2", 0x20000, 0x8000, CRC(e49238f4) SHA1(ac76f1a761d6b0765437fb7367442667da7bb373) )
388
389 ROM_REGION( 0x10000, REGION_CPU2, 0 )
390 ROM_LOAD( "sound", 0x8000, 0x8000, CRC(8c9c3b8a) SHA1(f3cdf42ef19012817e6b7966845f9ede39f61b07) )
391 ROM_END
392
393
394 ROM_START( capbowl2 )
395 ROM_REGION( 0x28000, REGION_CPU1, 0 )
396 ROM_LOAD( "progrev3.u6", 0x08000, 0x8000, CRC(9162934a) SHA1(7542dd68a2aa55ad4f03b23ae2313ed6a34ae145) )
397 ROM_LOAD( "gr0", 0x10000, 0x8000, CRC(ef53ca7a) SHA1(219dc342595bfd23c1336f3e167e40ff0c5e7994) )
398 ROM_LOAD( "gr1", 0x18000, 0x8000, CRC(27ede6ce) SHA1(14aa31cbcf089419b5b2ea8d57e82fc51895fc2e) )
399 ROM_LOAD( "gr2", 0x20000, 0x8000, CRC(e49238f4) SHA1(ac76f1a761d6b0765437fb7367442667da7bb373) )
400
401 ROM_REGION( 0x10000, REGION_CPU2, 0 )
402 ROM_LOAD( "sound", 0x8000, 0x8000, CRC(8c9c3b8a) SHA1(f3cdf42ef19012817e6b7966845f9ede39f61b07) )
403 ROM_END
404
405
406 ROM_START( clbowl )
407 ROM_REGION( 0x28000, REGION_CPU1, 0 )
408 ROM_LOAD( "u6.cl", 0x08000, 0x8000, CRC(91e06bc4) SHA1(efa54328417f971cc482a4529d05331a3baffc1a) )
409 ROM_LOAD( "gr0.cl", 0x10000, 0x8000, CRC(899c8f15) SHA1(dbb4a9c015b5e64c62140f0c99b87da2793ae5c1) )
410 ROM_LOAD( "gr1.cl", 0x18000, 0x8000, CRC(0ac0dc4c) SHA1(61afa3af1f84818b940b5c6f6a8cfb58ca557551) )
411 ROM_LOAD( "gr2.cl", 0x20000, 0x8000, CRC(251f5da5) SHA1(063001cfb68e3ec35baa24eed186214e26d55b82) )
412
413 ROM_REGION( 0x10000, REGION_CPU2, 0 )
414 ROM_LOAD( "sound.cl", 0x8000, 0x8000, CRC(1eba501e) SHA1(684bdc18cf5e01a86d8018a3e228ec34e5dec57d) )
415 ROM_END
416
417
418 ROM_START( bowlrama )
419 ROM_REGION( 0x10000, REGION_CPU1, 0 )
420 ROM_LOAD( "u6", 0x08000, 0x08000, CRC(7103ad55) SHA1(92dccc5e6df3e18fc8cdcb67ef14d50ce5eb8b2c) )
421
422 ROM_REGION( 0x10000, REGION_CPU2, 0 )
423 ROM_LOAD( "u30", 0x8000, 0x8000, CRC(f3168834) SHA1(40b7fbe9c15cc4442f4394b71c0666185afe4c8d) )
424
425 ROM_REGION( 0x40000, REGION_GFX1, 0 )
426 ROM_LOAD( "ux7", 0x00000, 0x40000, CRC(8727432a) SHA1(a81d366c5f8df0bdb97e795bba7752e6526ddba0) )
427 ROM_END
428
429
430
431 /*************************************
432 *
433 * Game drivers
434 *
435 *************************************/
436
437 GAME( 1988, capbowl, 0, capbowl, capbowl, 0, ROT270, "Incredible Technologies", "Capcom Bowling (set 1)" )
438 GAME( 1988, capbowl2, capbowl, capbowl, capbowl, 0, ROT270, "Incredible Technologies", "Capcom Bowling (set 2)" )
439 GAME( 1989, clbowl, capbowl, capbowl, capbowl, 0, ROT270, "Incredible Technologies", "Coors Light Bowling" )
440 GAME( 1991, bowlrama, 0, bowlrama, capbowl, 0, ROT270, "PandP Marketing", "Bowl-O-Rama" )
441