1 /***************************************************************************
2
3 Darius (c) Taito 1986
4 ======
5
6 David Graves, Jarek Burczynski
7
8 Sound panning and other enhancements: Hiromitsu Shioya
9
10 Sources: MAME Rastan driver
11 Raine source - invaluable for this driver -
12 many thanks to Richard Bush and the Raine Team.
13
14 *****
15
16 Rom Versions
17 ------------
18
19 Darius appears to be a revision of Dariusj (as well as being
20 for a different sales area). It has continue facilities, missing
21 in Dariusj, and extra sprites which are used when continuing.
22 It also has 2 extra program roms.
23
24
25 Use of PC080SN
26 --------------
27
28 This game uses 3 x PC080SN for generating tilemaps. They must be
29 mapped somehow to a single memory block and set of scroll registers.
30 There is an additional text tilemap on top of this, to allow for
31 both background planes scrolling. This need is presumably what led
32 to the TC0100SCN tilemap chip, debuted in Ninja Warriors (c)1987.
33 (The TC0100SCN includes a separate text layer.)
34
35
36 ADPCM Z80
37 ---------
38
39 This writes the rom area whenever an interrupt occurs. It has no ram
40 therefore no stack to store registers or return addresses: so the
41 standard Z80 writes to the stack become irrelevant.
42
43
44 Dumpers Notes
45 =============
46
47 Darius (Old JPN Ver.)
48 (c)1986 Taito
49
50 -----------------------
51 Sound Board
52 K1100228A
53 CPU :Z80 x2
54 Sound :YM2203C x2
55 OSC :8.000MHz
56 -----------------------
57 A96_56.18
58 A96_57.33
59
60 -----------------------
61 M4300067A
62 K1100226A
63 CPU :MC68000P8 x2
64 OSC :16000.00KHz
65 -----------------------
66 A96_28.152
67 A96_29.185
68 A96_30.154
69 A96_31.187
70
71 A96_32.157
72 A96_33.190
73 A96_34.158
74 A96_35.191
75
76 A96_36.175
77 A96_37.196
78 A96_38.176
79 A96_39.197
80 A96_40.177
81 A96_41.198
82 A96_42.178
83 A96_43.199
84 A96_44.179
85 A96_45.200
86 A96_46.180
87 A96_47.201
88
89 -----------------------
90 K1100227A
91 OSC :26686.00KHz
92 Other :PC080SN x3
93 -----------------------
94 A96_48.103
95 A96_48.24
96 A96_48.63
97 A96_49.104
98 A96_49.25
99 A96_49.64
100 A96_50.105
101 A96_50.26
102 A96_50.65
103 A96_51.131
104 A96_51.47
105 A96_51.86
106 A96_52.132
107 A96_52.48
108 A96_52.87
109 A96_53.133
110 A96_53.49
111 A96_53.88
112
113 A96_54.142
114 A96_55.143
115
116 A96-24.163
117 A96-25.164
118 A96-26.165
119
120
121 TODO
122 ====
123
124 When you add a coin there is temporary volume distortion of other
125 sounds.
126
127 ***************************************************************************/
128
129 #include <stdio.h>
130 #include <stdlib.h>
131 #include <string.h>
132 #include <stdarg.h>
133 #include <math.h>
134
135 #include "driver.h"
136 #include "state.h"
137 #include "vidhrdw/generic.h"
138 #include "vidhrdw/taitoic.h"
139 #include "cpu/z80/z80.h"
140 #include "sndhrdw/taitosnd.h"
141
142
143 MACHINE_INIT( darius );
144
145 VIDEO_START( darius );
146 VIDEO_UPDATE( darius );
147
148 static UINT16 cpua_ctrl;
149 static UINT16 coin_word=0;
150
151 extern data16_t *darius_fg_ram;
152 READ16_HANDLER ( darius_fg_layer_r );
153 WRITE16_HANDLER( darius_fg_layer_w );
154
155 static size_t sharedram_size;
156 static data16_t *sharedram;
157
158
READ16_HANDLER(sharedram_r)159 static READ16_HANDLER( sharedram_r )
160 {
161 return sharedram[offset];
162 }
163
WRITE16_HANDLER(sharedram_w)164 static WRITE16_HANDLER( sharedram_w )
165 {
166 COMBINE_DATA(&sharedram[offset]);
167 }
168
parse_control(void)169 void parse_control( void ) /* assumes Z80 sandwiched between 68Ks */
170 {
171 /* bit 0 enables cpu B */
172 /* however this fails when recovering from a save state
173 if cpu B is disabled !! */
174 cpu_set_reset_line(2,(cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE);
175
176 }
177
WRITE16_HANDLER(cpua_ctrl_w)178 static WRITE16_HANDLER( cpua_ctrl_w )
179 {
180 if ((data &0xff00) && ((data &0xff) == 0))
181 data = data >> 8; /* for Wgp */
182 cpua_ctrl = data;
183
184 parse_control();
185
186 log_cb(RETRO_LOG_DEBUG, LOGPRE "CPU #0 PC %06x: write %04x to cpu control\n",activecpu_get_pc(),data);
187 }
188
WRITE16_HANDLER(darius_watchdog_w)189 static WRITE16_HANDLER( darius_watchdog_w )
190 {
191 watchdog_reset_w(0,data);
192 }
193
READ16_HANDLER(paletteram16_r)194 static READ16_HANDLER( paletteram16_r )
195 {
196 return paletteram16[offset];
197 }
198
199
200 /**********************************************************
201 GAME INPUTS
202 **********************************************************/
203
READ16_HANDLER(darius_ioc_r)204 static READ16_HANDLER( darius_ioc_r )
205 {
206 switch (offset)
207 {
208 case 0x01:
209 return (taitosound_comm_r(0) & 0xff); /* sound interface read */
210
211 case 0x04:
212 return input_port_0_word_r(0,mem_mask); /* IN0 */
213
214 case 0x05:
215 return input_port_1_word_r(0,mem_mask); /* IN1 */
216
217 case 0x06:
218 return input_port_2_word_r(0,mem_mask); /* IN2 */
219
220 case 0x07:
221 return coin_word; /* bits 3&4 coin lockouts, must return zero */
222
223 case 0x08:
224 return input_port_3_word_r(0,mem_mask); /* DSW */
225 }
226
227 log_cb(RETRO_LOG_DEBUG, LOGPRE "CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",activecpu_get_pc(),offset);
228
229 return 0xff;
230 }
231
WRITE16_HANDLER(darius_ioc_w)232 static WRITE16_HANDLER( darius_ioc_w )
233 {
234 switch (offset)
235 {
236 case 0x00: /* sound interface write */
237
238 taitosound_port_w (0, data & 0xff);
239 return;
240
241 case 0x01: /* sound interface write */
242
243 taitosound_comm_w (0, data & 0xff);
244 return;
245
246 case 0x28: /* unknown, written by both cpus - always 0? */
247 /*usrintf_showmessage(" address %04x value %04x",offset,data);*/
248 return;
249
250 case 0x30: /* coin control */
251 /* bits 7,5,4,0 used on reset */
252 /* bit 4 used whenever bg is blanked ? */
253 coin_lockout_w(0, ~data & 0x02);
254 coin_lockout_w(1, ~data & 0x04);
255 coin_counter_w(0, data & 0x08);
256 coin_counter_w(1, data & 0x40);
257 coin_word = data &0xffff;
258 /*usrintf_showmessage(" address %04x value %04x",offset,data);*/
259 return;
260 }
261
262 log_cb(RETRO_LOG_DEBUG, LOGPRE "CPU #0 PC %06x: warning - write unmapped ioc offset %06x with %04x\n",activecpu_get_pc(),offset,data);
263 }
264
265
266 /***********************************************************
267 MEMORY STRUCTURES
268 ***********************************************************/
269
MEMORY_READ16_START(darius_readmem)270 static MEMORY_READ16_START( darius_readmem )
271 { 0x000000, 0x05ffff, MRA16_ROM },
272 { 0x080000, 0x08ffff, MRA16_RAM }, /* main RAM */
273 { 0xc00000, 0xc0001f, darius_ioc_r }, /* inputs, sound */
274 { 0xd00000, 0xd0ffff, PC080SN_word_0_r }, /* tilemaps */
275 { 0xd80000, 0xd80fff, paletteram16_r }, /* palette */
276 { 0xe00100, 0xe00fff, MRA16_RAM }, /* sprite ram */
277 { 0xe01000, 0xe02fff, sharedram_r },
278 { 0xe08000, 0xe0ffff, darius_fg_layer_r }, /* front tilemap */
279 { 0xe10000, 0xe10fff, MRA16_RAM }, /* ??? */
280 MEMORY_END
281
282 static MEMORY_WRITE16_START( darius_writemem )
283 { 0x000000, 0x05ffff, MWA16_ROM },
284 { 0x080000, 0x08ffff, MWA16_RAM },
285 { 0x0a0000, 0x0a0001, cpua_ctrl_w },
286 { 0x0b0000, 0x0b0001, darius_watchdog_w },
287 { 0xc00000, 0xc0007f, darius_ioc_w }, /* coin ctr & lockout, sound */
288 { 0xd00000, 0xd0ffff, PC080SN_word_0_w },
289 { 0xd20000, 0xd20003, PC080SN_yscroll_word_0_w },
290 { 0xd40000, 0xd40003, PC080SN_xscroll_word_0_w },
291 { 0xd50000, 0xd50003, PC080SN_ctrl_word_0_w },
292 { 0xd80000, 0xd80fff, paletteram16_xBBBBBGGGGGRRRRR_word_w, &paletteram16 },
293 { 0xe00100, 0xe00fff, MWA16_RAM, &spriteram16, &spriteram_size },
294 { 0xe01000, 0xe02fff, sharedram_w, &sharedram, &sharedram_size },
295 { 0xe08000, 0xe0ffff, darius_fg_layer_w, &darius_fg_ram },
296 { 0xe10000, 0xe10fff, MWA16_RAM },
297 MEMORY_END
298
299 static MEMORY_READ16_START( darius_cpub_readmem )
300 { 0x000000, 0x03ffff, MRA16_ROM },
301 { 0x040000, 0x04ffff, MRA16_RAM }, /* local RAM */
302 { 0xe01000, 0xe02fff, sharedram_r },
303 MEMORY_END
304
305 static MEMORY_WRITE16_START( darius_cpub_writemem )
306 { 0x000000, 0x03ffff, MWA16_ROM },
307 { 0x040000, 0x04ffff, MWA16_RAM },
308 { 0xc00000, 0xc0007f, darius_ioc_w }, /* only writes $c00050 (?) */
309 { 0xd80000, 0xd80fff, paletteram16_xBBBBBGGGGGRRRRR_word_w },
310 { 0xe00100, 0xe00fff, spriteram16_w }, /* some writes */
311 { 0xe01000, 0Xe02fff, sharedram_w },
312 { 0xe08000, 0xe0ffff, darius_fg_layer_w }, /* a few writes */
313 MEMORY_END
314
315
316 /*****************************************************
317 SOUND
318 *****************************************************/
319
320 static int banknum = -1;
321 static int adpcm_command = 0;
322 static int nmi_enable = 0;
323
reset_sound_region(void)324 static void reset_sound_region(void)
325 {
326 cpu_setbank( STATIC_BANK1, memory_region(REGION_CPU2) + (banknum * 0x8000) + 0x10000 );
327 /* cpu_setbank( 1, memory_region(REGION_CPU2) + (banknum * 0x8000) + 0x10000 );*/
328
329 }
330
WRITE_HANDLER(sound_bankswitch_w)331 static WRITE_HANDLER( sound_bankswitch_w )
332 {
333 banknum = data &0x03;
334 reset_sound_region();
335 /* banknum = data;*/
336 /* reset_sound_region();*/
337 }
338
WRITE_HANDLER(adpcm_command_w)339 static WRITE_HANDLER( adpcm_command_w )
340 {
341 adpcm_command = data;
342 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "#ADPCM command write =%2x\n",data); */
343 }
344
345 #if 0
346 static WRITE_HANDLER( display_value )
347 {
348 usrintf_showmessage("d800=%x",data);
349 }
350 #endif
351
352
353 /*****************************************************
354 Sound mixer/pan control
355 *****************************************************/
356
357 static UINT32 darius_def_vol[0x10];
358
359 #define DARIUS_VOL_MAX (3*2 + 2)
360 #define DARIUS_PAN_MAX (2 + 2 + 1) /* FM 2port + PSG 2port + DA 1port */
361 static UINT8 darius_vol[DARIUS_VOL_MAX];
362 static UINT8 darius_pan[DARIUS_PAN_MAX];
363
update_fm0(void)364 static void update_fm0( void )
365 {
366 int left, right;
367 left = ( darius_pan[0] * darius_vol[6])>>8;
368 right = ((0xff - darius_pan[0]) * darius_vol[6])>>8;
369 mixer_set_stereo_volume( 6, left, right ); /* FM #0 */
370 }
371
update_fm1(void)372 static void update_fm1( void )
373 {
374 int left, right;
375 left = ( darius_pan[1] * darius_vol[7])>>8;
376 right = ((0xff - darius_pan[1]) * darius_vol[7])>>8;
377 mixer_set_stereo_volume( 7, left, right ); /* FM #1 */
378 }
379
update_psg0(int port)380 static void update_psg0( int port )
381 {
382 int left, right;
383 left = ( darius_pan[2] * darius_vol[port])>>8;
384 right = ((0xff - darius_pan[2]) * darius_vol[port])>>8;
385 mixer_set_stereo_volume( port, left, right );
386 }
387
update_psg1(int port)388 static void update_psg1( int port )
389 {
390 int left, right;
391 left = ( darius_pan[3] * darius_vol[port + 3])>>8;
392 right = ((0xff - darius_pan[3]) * darius_vol[port + 3])>>8;
393 mixer_set_stereo_volume( port + 3, left, right );
394 }
395
update_da(void)396 static void update_da( void )
397 {
398 int left, right;
399 left = darius_def_vol[(darius_pan[4]>>4)&0x0f];
400 right = darius_def_vol[(darius_pan[4]>>0)&0x0f];
401 mixer_set_stereo_volume( 8, left, right );
402 }
403
WRITE_HANDLER(darius_fm0_pan)404 static WRITE_HANDLER( darius_fm0_pan )
405 {
406 darius_pan[0] = data&0xff; /* data 0x00:right 0xff:left */
407 update_fm0();
408 }
409
WRITE_HANDLER(darius_fm1_pan)410 static WRITE_HANDLER( darius_fm1_pan )
411 {
412 darius_pan[1] = data&0xff;
413 update_fm1();
414 }
415
WRITE_HANDLER(darius_psg0_pan)416 static WRITE_HANDLER( darius_psg0_pan )
417 {
418 darius_pan[2] = data&0xff;
419 update_psg0( 0 );
420 update_psg0( 1 );
421 update_psg0( 2 );
422 }
423
WRITE_HANDLER(darius_psg1_pan)424 static WRITE_HANDLER( darius_psg1_pan )
425 {
426 darius_pan[3] = data&0xff;
427 update_psg1( 0 );
428 update_psg1( 1 );
429 update_psg1( 2 );
430 }
431
WRITE_HANDLER(darius_da_pan)432 static WRITE_HANDLER( darius_da_pan )
433 {
434 darius_pan[4] = data&0xff;
435 update_da();
436 }
437
438 /**** Mixer Control ****/
439
WRITE_HANDLER(darius_write_portA0)440 static WRITE_HANDLER( darius_write_portA0 )
441 {
442 /* volume control FM #0 PSG #0 A*/
443 /*usrintf_showmessage(" pan %02x %02x %02x %02x %02x", darius_pan[0], darius_pan[1], darius_pan[2], darius_pan[3], darius_pan[4] );*/
444 /*usrintf_showmessage(" A0 %02x A1 %02x B0 %02x B1 %02x", port[0], port[1], port[2], port[3] );*/
445 darius_vol[0] = darius_def_vol[(data>>4)&0x0f];
446 darius_vol[6] = darius_def_vol[(data>>0)&0x0f];
447 update_fm0();
448 update_psg0( 0 );
449 }
450
WRITE_HANDLER(darius_write_portA1)451 static WRITE_HANDLER( darius_write_portA1 )
452 {
453 /* volume control FM #1 PSG #1 A*/
454 /*usrintf_showmessage(" pan %02x %02x %02x %02x %02x", darius_pan[0], darius_pan[1], darius_pan[2], darius_pan[3], darius_pan[4] );*/
455 darius_vol[3] = darius_def_vol[(data>>4)&0x0f];
456 darius_vol[7] = darius_def_vol[(data>>0)&0x0f];
457 update_fm1();
458 update_psg1( 0 );
459 }
460
WRITE_HANDLER(darius_write_portB0)461 static WRITE_HANDLER( darius_write_portB0 )
462 {
463 /* volume control PSG #0 B/C*/
464 /*usrintf_showmessage(" pan %02x %02x %02x %02x %02x", darius_pan[0], darius_pan[1], darius_pan[2], darius_pan[3], darius_pan[4] );*/
465 darius_vol[1] = darius_def_vol[(data>>4)&0x0f];
466 darius_vol[2] = darius_def_vol[(data>>0)&0x0f];
467 update_psg0( 1 );
468 update_psg0( 2 );
469 }
470
WRITE_HANDLER(darius_write_portB1)471 static WRITE_HANDLER( darius_write_portB1 )
472 {
473 /* volume control PSG #1 B/C*/
474 /*usrintf_showmessage(" pan %02x %02x %02x %02x %02x", darius_pan[0], darius_pan[1], darius_pan[2], darius_pan[3], darius_pan[4] );*/
475 darius_vol[4] = darius_def_vol[(data>>4)&0x0f];
476 darius_vol[5] = darius_def_vol[(data>>0)&0x0f];
477 update_psg1( 1 );
478 update_psg1( 2 );
479 }
480
481
482 /*****************************************************
483 Sound memory structures / ADPCM
484 *****************************************************/
485
MEMORY_READ_START(darius_sound_readmem)486 static MEMORY_READ_START( darius_sound_readmem )
487 { 0x0000, 0x7fff, MRA_BANK1 },
488 { 0x8000, 0x8fff, MRA_RAM },
489 { 0x9000, 0x9000, YM2203_status_port_0_r },
490 { 0x9001, 0x9001, YM2203_read_port_0_r },
491 { 0xa000, 0xa000, YM2203_status_port_1_r },
492 { 0xa001, 0xa001, YM2203_read_port_1_r },
493 { 0xb000, 0xb000, MRA_NOP },
494 { 0xb001, 0xb001, taitosound_slave_comm_r },
495 MEMORY_END
496
497 static MEMORY_WRITE_START( darius_sound_writemem )
498 { 0x0000, 0x7fff, MWA_ROM },
499 { 0x8000, 0x8fff, MWA_RAM },
500 { 0x9000, 0x9000, YM2203_control_port_0_w },
501 { 0x9001, 0x9001, YM2203_write_port_0_w },
502 { 0xa000, 0xa000, YM2203_control_port_1_w },
503 { 0xa001, 0xa001, YM2203_write_port_1_w },
504 { 0xb000, 0xb000, taitosound_slave_port_w },
505 { 0xb001, 0xb001, taitosound_slave_comm_w },
506 { 0xc000, 0xc000, darius_fm0_pan },
507 { 0xc400, 0xc400, darius_fm1_pan },
508 { 0xc800, 0xc800, darius_psg0_pan },
509 { 0xcc00, 0xcc00, darius_psg1_pan },
510 { 0xd000, 0xd000, darius_da_pan },
511 { 0xd400, 0xd400, adpcm_command_w }, /* ADPCM command for second Z80 to read from port 0x00 */
512 /* { 0xd800, 0xd800, display_value }, // ??? /*/
513 { 0xdc00, 0xdc00, sound_bankswitch_w },
514 MEMORY_END
515
516 static MEMORY_READ_START( darius_sound2_readmem )
517 { 0x0000, 0xffff, MRA_ROM },
518 /* yes, no RAM */
519 MEMORY_END
520
521 static MEMORY_WRITE_START( darius_sound2_writemem )
522 { 0x0000, 0xffff, MWA_NOP }, /* writes rom whenever interrupt occurs - as no stack */
523 /* yes, no RAM */
524 MEMORY_END
525
526
527 static void darius_adpcm_int (int data)
528 {
529 if (nmi_enable)
530 {
531 cpu_set_nmi_line(3, PULSE_LINE);
532 }
533 }
534
535 static struct MSM5205interface msm5205_interface =
536 {
537 1, /* 1 chip */
538 384000, /* 384KHz */
539 { darius_adpcm_int}, /* interrupt function */
540 { MSM5205_S48_4B}, /* 8KHz */
541 { 50 } /* volume */
542 };
543
READ_HANDLER(adpcm_command_read)544 static READ_HANDLER( adpcm_command_read )
545 {
546 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "read port 0: %02x PC=%4x\n",adpcm_command, activecpu_get_pc() ); */
547 return adpcm_command;
548 }
549
READ_HANDLER(readport2)550 static READ_HANDLER( readport2 )
551 {
552 return 0;
553 }
554
READ_HANDLER(readport3)555 static READ_HANDLER( readport3 )
556 {
557 return 0;
558 }
559
WRITE_HANDLER(adpcm_nmi_disable)560 static WRITE_HANDLER ( adpcm_nmi_disable )
561 {
562 nmi_enable = 0;
563 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "write port 0: NMI DISABLE PC=%4x\n", data, activecpu_get_pc() ); */
564 }
565
WRITE_HANDLER(adpcm_nmi_enable)566 static WRITE_HANDLER ( adpcm_nmi_enable )
567 {
568 nmi_enable = 1;
569 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "write port 1: NMI ENABLE PC=%4x\n", activecpu_get_pc() ); */
570 }
571
WRITE_HANDLER(adpcm_data_w)572 static WRITE_HANDLER( adpcm_data_w )
573 {
574 MSM5205_data_w (0, data );
575 MSM5205_reset_w(0, !(data & 0x20) ); /* my best guess, but it could be output enable as well */
576 }
577
PORT_READ_START(darius_sound2_readport)578 static PORT_READ_START( darius_sound2_readport )
579 { 0x00, 0x00, adpcm_command_read },
580 { 0x02, 0x02, readport2 }, /* ??? */
581 { 0x03, 0x03, readport3 }, /* ??? */
582 PORT_END
583
584 static PORT_WRITE_START( darius_sound2_writeport )
585 { 0x00, 0x00, adpcm_nmi_disable },
586 { 0x01, 0x01, adpcm_nmi_enable },
587 { 0x02, 0x02, adpcm_data_w },
588 PORT_END
589
590
591 /***********************************************************
592 INPUT PORTS, DIPs
593 ***********************************************************/
594
595
596 #define TAITO_COINAGE_WORLD_16 \
597 PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Coin_A ) ) \
598 PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) ) \
599 PORT_DIPSETTING( 0x0010, DEF_STR( 3C_1C ) ) \
600 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) ) \
601 PORT_DIPSETTING( 0x0030, DEF_STR( 1C_1C ) ) \
602 PORT_DIPNAME( 0x00c0, 0x00c0, DEF_STR( Coin_B ) ) \
603 PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_2C ) ) \
604 PORT_DIPSETTING( 0x0080, DEF_STR( 1C_3C ) ) \
605 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_4C ) ) \
606 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_6C ) )
607
608 #define TAITO_COINAGE_JAPAN_16 \
609 PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Coin_A ) ) \
610 PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) ) \
611 PORT_DIPSETTING( 0x0030, DEF_STR( 1C_1C ) ) \
612 PORT_DIPSETTING( 0x0000, DEF_STR( 2C_3C ) ) \
613 PORT_DIPSETTING( 0x0020, DEF_STR( 1C_2C ) ) \
614 PORT_DIPNAME( 0x00c0, 0x00c0, DEF_STR( Coin_B ) ) \
615 PORT_DIPSETTING( 0x0040, DEF_STR( 2C_1C ) ) \
616 PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_1C ) ) \
617 PORT_DIPSETTING( 0x0000, DEF_STR( 2C_3C ) ) \
618 PORT_DIPSETTING( 0x0080, DEF_STR( 1C_2C ) )
619
620 #define TAITO_DIFFICULTY_16 \
621 PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Difficulty ) ) \
622 PORT_DIPSETTING( 0x0200, "Easy" ) \
623 PORT_DIPSETTING( 0x0300, "Medium" ) \
624 PORT_DIPSETTING( 0x0100, "Hard" ) \
625 PORT_DIPSETTING( 0x0000, "Hardest" )
626
627 #define DARIUS_PLAYERS_INPUT( player ) \
628 PORT_START \
629 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | player ) \
630 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | player ) \
631 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | player ) \
632 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | player ) \
633 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | player ) \
634 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | player ) \
635 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
636 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
637
638 #define DARIUS_SYSTEM_INPUT \
639 PORT_START \
640 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) \
641 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) \
642 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 ) \
643 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 ) \
644 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 ) \
645 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_TILT ) \
646 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
647 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
648
649
650 INPUT_PORTS_START( darius )
651 DARIUS_PLAYERS_INPUT( IPF_PLAYER1 )
652
653 DARIUS_PLAYERS_INPUT( IPF_PLAYER2 )
654
655 DARIUS_SYSTEM_INPUT
656
657 PORT_START /* DSW */
658 PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
659 PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
660 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
661 PORT_DIPNAME( 0x0002, 0x0002, "Autofire" )
662 PORT_DIPSETTING( 0x0002, "Normal" )
663 PORT_DIPSETTING( 0x0000, "Fast" )
664 PORT_SERVICE( 0x0004, IP_ACTIVE_LOW )
665 PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Demo_Sounds ) )
666 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
667 PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
668 TAITO_COINAGE_WORLD_16
669 TAITO_DIFFICULTY_16
670 PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Bonus_Life ) )
671 PORT_DIPSETTING( 0x0800, "every 600k" )
672 PORT_DIPSETTING( 0x0c00, "600k only" )
673 PORT_DIPSETTING( 0x0400, "800k only" )
674 PORT_DIPSETTING( 0x0000, "none" )
675 PORT_DIPNAME( 0x3000, 0x3000, DEF_STR( Lives ) )
676 PORT_DIPSETTING( 0x3000, "3" )
677 PORT_DIPSETTING( 0x2000, "4" )
678 PORT_DIPSETTING( 0x1000, "5" )
679 PORT_DIPSETTING( 0x0000, "6" )
680 PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
681 PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
682 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
683 PORT_DIPNAME( 0x8000, 0x8000, "Allow Continue" )
684 PORT_DIPSETTING( 0x0000, DEF_STR( No ) )
685 PORT_DIPSETTING( 0x8000, DEF_STR( Yes ) )
686 INPUT_PORTS_END
687
688 INPUT_PORTS_START( dariuse )
689 DARIUS_PLAYERS_INPUT( IPF_PLAYER1 )
690
691 DARIUS_PLAYERS_INPUT( IPF_PLAYER2 )
692
693 DARIUS_SYSTEM_INPUT
694
695 PORT_START /* DSW */
696 PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
697 PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
698 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
699 PORT_DIPNAME( 0x0002, 0x0002, "Autofire" )
700 PORT_DIPSETTING( 0x0002, "Normal" )
701 PORT_DIPSETTING( 0x0000, "Fast" )
702 PORT_SERVICE( 0x0004, IP_ACTIVE_LOW )
703 PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Demo_Sounds ) )
704 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
705 PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
706 TAITO_COINAGE_JAPAN_16
707 TAITO_DIFFICULTY_16
708 PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Bonus_Life ) )
709 PORT_DIPSETTING( 0x0800, "every 600k" )
710 PORT_DIPSETTING( 0x0c00, "600k only" )
711 PORT_DIPSETTING( 0x0400, "800k only" )
712 PORT_DIPSETTING( 0x0000, "none" )
713 PORT_DIPNAME( 0x3000, 0x3000, DEF_STR( Lives ) )
714 PORT_DIPSETTING( 0x3000, "3" )
715 PORT_DIPSETTING( 0x2000, "4" )
716 PORT_DIPSETTING( 0x1000, "5" )
717 PORT_DIPSETTING( 0x0000, "6" )
718 PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
719 PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
720 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
721 PORT_DIPNAME( 0x8000, 0x8000, "Allow Continue" )
722 PORT_DIPSETTING( 0x0000, DEF_STR( No ) )
723 PORT_DIPSETTING( 0x8000, DEF_STR( Yes ) )
724 INPUT_PORTS_END
725
726 INPUT_PORTS_START( dariusj )
727 DARIUS_PLAYERS_INPUT( IPF_PLAYER1 )
728
729 DARIUS_PLAYERS_INPUT( IPF_PLAYER2 )
730
731 DARIUS_SYSTEM_INPUT
732
733 PORT_START /* DSW */
734 PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
735 PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
736 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
737 PORT_DIPNAME( 0x0002, 0x0002, "Autofire" )
738 PORT_DIPSETTING( 0x0002, "Normal" )
739 PORT_DIPSETTING( 0x0000, "Fast" )
740 PORT_SERVICE( 0x0004, IP_ACTIVE_LOW )
741 PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Demo_Sounds ) )
742 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
743 PORT_DIPSETTING( 0x0008, DEF_STR( On ) )
744 TAITO_COINAGE_JAPAN_16
745 TAITO_DIFFICULTY_16
746 PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Bonus_Life ) )
747 PORT_DIPSETTING( 0x0800, "every 600k" )
748 PORT_DIPSETTING( 0x0c00, "600k only" )
749 PORT_DIPSETTING( 0x0400, "800k only" )
750 PORT_DIPSETTING( 0x0000, "none" )
751 PORT_DIPNAME( 0x3000, 0x3000, DEF_STR( Lives ) )
752 PORT_DIPSETTING( 0x3000, "3" )
753 PORT_DIPSETTING( 0x2000, "4" )
754 PORT_DIPSETTING( 0x1000, "5" )
755 PORT_DIPSETTING( 0x0000, "6" )
756 PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
757 PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
758 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
759 PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
760 PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
761 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
762 INPUT_PORTS_END
763
764 /**************************************************************
765 GFX DECODING
766 **************************************************************/
767
768 static struct GfxLayout tilelayout =
769 {
770 16,16, /* 16*16 sprites */
771 RGN_FRAC(1,1),
772 4, /* 4 bits per pixel */
773 { 24, 8, 16, 0 }, /* pixel bits separated */
774 { 0, 1, 2, 3, 4, 5, 6, 7,
775 0+ 32*8, 1+ 32*8, 2+ 32*8, 3+ 32*8, 4+ 32*8, 5+ 32*8, 6+ 32*8, 7+ 32*8 },
776 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
777 64*8 + 0*32, 64*8 + 1*32, 64*8 + 2*32, 64*8 + 3*32,
778 64*8 + 4*32, 64*8 + 5*32, 64*8 + 6*32, 64*8 + 7*32 },
779 128*8 /* every sprite takes 128 consecutive bytes */
780 };
781
782 static struct GfxLayout charlayout =
783 {
784 8,8, /* 8*8 characters */
785 RGN_FRAC(1,1),
786 4, /* 4 bits per pixel */
787 { 0, 1, 2, 3 },
788 { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 },
789 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
790 32*8 /* every sprite takes 32 consecutive bytes */
791 };
792
793 static struct GfxLayout char2layout =
794 {
795 8,8, /* 8*8 characters */
796 RGN_FRAC(1,1),
797 2, /* 2 bits per pixel */
798 { 0, 8 }, /* pixel bits separated */
799 { 0, 1, 2, 3, 4, 5, 6, 7 },
800 { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
801 16*8 /* every sprite takes 32 consecutive bytes */
802 };
803
804 static struct GfxDecodeInfo darius_gfxdecodeinfo[] =
805 {
806 { REGION_GFX2, 0, &tilelayout, 0, 256 }, /* sprites */
807 { REGION_GFX1, 0, &charlayout, 0, 256 }, /* scr tiles */
808 { REGION_GFX3, 0, &char2layout, 0, 256 }, /* top layer scr tiles */
809 { -1 } /* end of array */
810 };
811
812
813 /**************************************************************
814 YM2203 (SOUND)
815 **************************************************************/
816
817 /* handler called by the YM2203 emulator when the internal timers cause an IRQ */
irqhandler(int irq)818 static void irqhandler(int irq) /* assumes Z80 sandwiched between 68Ks */
819 {
820 cpu_set_irq_line(1,0,irq ? ASSERT_LINE : CLEAR_LINE);
821 }
822
823 static struct YM2203interface ym2203_interface =
824 {
825 2, /* 2 chips */
826 4000000, /* 4 MHz ??? */
827 { YM2203_VOL(60,20), YM2203_VOL(60,20) },
828 { 0, 0 }, /* portA read */
829 { 0, 0 },
830 { darius_write_portA0, darius_write_portA1 }, /* portA write */
831 { darius_write_portB0, darius_write_portB1 }, /* portB write */
832 { irqhandler, 0 }
833 };
834
835
836 /***********************************************************
837 MACHINE DRIVERS
838 ***********************************************************/
839
840 static MACHINE_DRIVER_START( darius )
841
842 /* basic machine hardware */
843 MDRV_CPU_ADD(M68000,16000000/2) /* 8 MHz ? */
MDRV_CPU_MEMORY(darius_readmem,darius_writemem)844 MDRV_CPU_MEMORY(darius_readmem,darius_writemem)
845 MDRV_CPU_VBLANK_INT(irq4_line_hold,1)
846
847 MDRV_CPU_ADD(Z80,8000000/2)
848 MDRV_CPU_FLAGS(CPU_AUDIO_CPU) /* 4 MHz ? */
849 MDRV_CPU_MEMORY(darius_sound_readmem,darius_sound_writemem)
850
851 MDRV_CPU_ADD(M68000,16000000/2) /* 8 MHz ? */
852 MDRV_CPU_MEMORY(darius_cpub_readmem,darius_cpub_writemem)
853 MDRV_CPU_VBLANK_INT(irq4_line_hold,1)
854
855 MDRV_CPU_ADD(Z80,8000000/2) /* 4 MHz ? */
856 MDRV_CPU_FLAGS(CPU_AUDIO_CPU) /* ADPCM player using MSM5205 */
857 MDRV_CPU_MEMORY(darius_sound2_readmem,darius_sound2_writemem)
858 MDRV_CPU_PORTS(darius_sound2_readport,darius_sound2_writeport)
859
860 MDRV_FRAMES_PER_SECOND(60)
861 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
862 MDRV_INTERLEAVE(10) /* 10 CPU slices per frame ? */
863
864 MDRV_MACHINE_INIT(darius)
865
866 /* video hardware */
867 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_DUAL_MONITOR)
868 MDRV_ASPECT_RATIO(12,3)
869 MDRV_SCREEN_SIZE(108*8, 32*8)
870 MDRV_VISIBLE_AREA(0*8, 108*8-1, 1*8, 29*8-1)
871 MDRV_GFXDECODE(darius_gfxdecodeinfo)
872 MDRV_PALETTE_LENGTH(4096*2)
873
874 MDRV_VIDEO_START(darius)
875 MDRV_VIDEO_UPDATE(darius)
876
877 /* sound hardware */
878 MDRV_SOUND_ATTRIBUTES(SOUND_SUPPORTS_STEREO)
879 MDRV_SOUND_ADD(YM2203, ym2203_interface)
880 MDRV_SOUND_ADD(MSM5205, msm5205_interface)
881 MACHINE_DRIVER_END
882
883
884 /***************************************************************************
885 DRIVERS
886 ***************************************************************************/
887
888 ROM_START( darius )
889 ROM_REGION( 0x60000, REGION_CPU1, 0 ) /* 68000 code */
890 ROM_FILL( 0x00000, 0x60000, 0xffffffff )
891 ROM_LOAD16_BYTE( "da-59.bin", 0x00000, 0x10000, CRC(11aab4eb) SHA1(92f795e96a940e8d94abbf429ba4ac119992b991) )
892 ROM_LOAD16_BYTE( "da-58.bin", 0x00001, 0x10000, CRC(5f71e697) SHA1(bf959cf82e8e8ba950ab40d9c008ad5de01385aa) )
893 ROM_LOAD16_BYTE( "da-61.bin", 0x20000, 0x10000, CRC(4736aa9b) SHA1(05e549d96a053e6b3bc34359267adcd73f98dd4a) )
894 ROM_LOAD16_BYTE( "da-66.bin", 0x20001, 0x10000, CRC(4ede5f56) SHA1(88c06aef4b0a3e29fa30c24a57f2d3a05fc9f021) )
895 ROM_LOAD16_BYTE( "a96_31.187", 0x40000, 0x10000, CRC(e9bb5d89) SHA1(a5d08129c32b97e2cce84496945766fd32b6506e) ) /* 2 data roms */
896 ROM_LOAD16_BYTE( "a96_30.154", 0x40001, 0x10000, CRC(9eb5e127) SHA1(50e2fe5ec7f79ecf1fb5107298da13ef5ab37162) )
897
898 ROM_REGION( 0x30000, REGION_CPU2, 0 ) /* Z80 sound cpu */
899 ROM_LOAD( "a96_57.33", 0x00000, 0x10000, CRC(33ceb730) SHA1(05070ea503ac57ff8445145d6f97115f7aad90a5) )
900
901 ROM_REGION( 0x80000, REGION_CPU3, 0 ) /* 68000 code */
902 ROM_LOAD16_BYTE( "a96_33-1.190", 0x00000, 0x10000, CRC(ff186048) SHA1(becb00d2cc69a6d4e839086bd3d902f4e6a99aa6) )
903 ROM_LOAD16_BYTE( "a96_32-1.157", 0x00001, 0x10000, CRC(d9719de8) SHA1(9e907cfb5cbe6abebccfbd065d02e7a71c5aa494) )
904 ROM_LOAD16_BYTE( "a96_35-1.191", 0x20000, 0x10000, CRC(b3280193) SHA1(f4bad066c16682f9267752c50a31ef64b312f11e) )
905 ROM_LOAD16_BYTE( "a96_34-1.158", 0x20001, 0x10000, CRC(ca3b2573) SHA1(4da0d8536e546ea46b2374318e25c30305f4c977) )
906
907 ROM_REGION( 0x10000, REGION_CPU4, 0 ) /* second Z80 driving the ADPCM chip */
908 ROM_LOAD( "a96_56.18", 0x00000, 0x10000, CRC(292ef55c) SHA1(67bfe3693e43daece06d4795645d54cd66419e5b) ) /* Z80 prog + ADPCM samples */
909
910 ROM_REGION( 0x60000, REGION_GFX1, ROMREGION_DISPOSE )
911 /* There are THREE of each SCR gfx rom on the actual board,
912 making a complete set for every PC080SN tilemap chip */
913 ROM_LOAD16_BYTE( "a96_48.24", 0x00000, 0x10000, CRC(39c9b3aa) SHA1(43a91d916c5a09207dfa37413feb5025636f37ae) ) /* 8x8 SCR tiles */
914 ROM_LOAD16_BYTE( "a96_49.25", 0x20000, 0x10000, CRC(37a7d88a) SHA1(cede0d810d74ec460dcc4b391bb1acd5a669a7b4) )
915 ROM_LOAD16_BYTE( "a96_50.26", 0x40000, 0x10000, CRC(75d738e4) SHA1(634606da46136ab605f5477af5639a20e39b44c4) )
916 ROM_LOAD16_BYTE( "a96_51.47", 0x00001, 0x10000, CRC(1bf8f0d3) SHA1(7f36e69336260958282eb663fe71b56410f0ee42) )
917 ROM_LOAD16_BYTE( "a96_52.48", 0x20001, 0x10000, CRC(2d9b2128) SHA1(9b72936fbd9dca6ef8302ac6c40a1cec019cebb5) )
918 ROM_LOAD16_BYTE( "a96_53.49", 0x40001, 0x10000, CRC(0173484c) SHA1(41d70039bda0965afe89251696ceaec7b7f40c24) )
919
920 ROM_REGION( 0xc0000, REGION_GFX2, ROMREGION_DISPOSE )
921 ROM_LOAD32_BYTE( "a96_44.179", 0x00000, 0x10000, CRC(bbc18878) SHA1(7732ab2a3002f8b500615377dab42ac75451cb3b) ) /* 16x16 sprites */
922 ROM_LOAD32_BYTE( "a96_45.200", 0x00001, 0x10000, CRC(616cdd8b) SHA1(74e0c483a68d984a689ea1381ed3a9da2f8a410a) )
923 ROM_LOAD32_BYTE( "a96_46.180", 0x00002, 0x10000, CRC(fec35418) SHA1(f0f401c3634e91b81cb8484b7b03f350d382e889) )
924 ROM_LOAD32_BYTE( "a96_47.201", 0x00003, 0x10000, CRC(8df9286a) SHA1(4a197e4c38d1750cc316b8710f4a0fef4316be14) )
925
926 ROM_LOAD32_BYTE( "a96_40.177", 0x40000, 0x10000, CRC(b699a51e) SHA1(5fd751dd44618743dc8a3df04cf0a987753a868b) )
927 ROM_LOAD32_BYTE( "a96_41.198", 0x40001, 0x10000, CRC(97128a3a) SHA1(257ddd1ba71e6beeaf18e0c5d7006d1d2b6a5edf) )
928 ROM_LOAD32_BYTE( "a96_42.178", 0x40002, 0x10000, CRC(7f55ee0f) SHA1(d9ba7b8fbf59308a08613d67e92da6829f6b6db3) )
929 ROM_LOAD32_BYTE( "a96_43.199", 0x40003, 0x10000, CRC(c7cad469) SHA1(dbd37aa10f12e4950f8ec6bcd7d150fa55e64742) )
930
931 ROM_LOAD32_BYTE( "da-62.bin", 0x80000, 0x10000, CRC(9179862c) SHA1(be94c7d213a34baf82f974ee1092aba44b072623) )
932 ROM_LOAD32_BYTE( "da-63.bin", 0x80001, 0x10000, CRC(fa19cfff) SHA1(58a3ae3270ebe5a162cd62df06da7199843707cf) )
933 ROM_LOAD32_BYTE( "da-64.bin", 0x80002, 0x10000, CRC(814c676f) SHA1(a6a64e65a3c163ecfede14b48ea70c20050248c3) )
934 ROM_LOAD32_BYTE( "da-65.bin", 0x80003, 0x10000, CRC(14eee326) SHA1(41760fada2a5e34ee6c9250af927baf650d9cfc4) )
935
936 ROM_REGION( 0x8000, REGION_GFX3, ROMREGION_DISPOSE ) /* 8x8 SCR tiles */
937 /* There's only one of each of these on a real board */
938 ROM_LOAD16_BYTE( "a96_54.143", 0x0000, 0x4000, CRC(51c02ae2) SHA1(27d2a6c649d047da1f22758569cb36531e3bf8bc) )
939 ROM_LOAD16_BYTE( "a96_55.144", 0x0001, 0x4000, CRC(771e4d98) SHA1(0e8ce5d569775883f4bc777b9bd49eb23ba7b42e) )
940
941 ROM_REGION( 0x1000, REGION_USER1, 0 )
942 ROM_LOAD16_BYTE( "a96-24.163", 0x0000, 0x0400, CRC(0fa8be7f) SHA1(079686b5d65b4b966591090d8c0e13e66dc5beca) ) /* proms, currently unused */
943 ROM_LOAD16_BYTE( "a96-25.164", 0x0400, 0x0400, CRC(265508a6) SHA1(f8ee1c658b33ae76d8a457a4042d9b4b58247823) )
944 ROM_LOAD16_BYTE( "a96-26.165", 0x0800, 0x0400, CRC(4891b9c0) SHA1(1f550a9a4ad3ca379f88f5865ed1b281c7b87f31) )
945 ROM_END
946
947 ROM_START( dariusj )
948 ROM_REGION( 0x60000, REGION_CPU1, 0 ) /* 68000 code */
949 ROM_FILL( 0x00000, 0x60000, 0xffffffff )
950 ROM_LOAD16_BYTE( "a96_29-1.185", 0x00000, 0x10000, CRC(75486f62) SHA1(818b095f2c6cc5764161c3e14ba70fe1c4b2f724) )
951 ROM_LOAD16_BYTE( "a96_28-1.152", 0x00001, 0x10000, CRC(fb34d400) SHA1(b14517384f5eadca8b73833bcd81374614b928d4) )
952 /* middle area is empty */
953 ROM_LOAD16_BYTE( "a96_31.187", 0x40000, 0x10000, CRC(e9bb5d89) SHA1(a5d08129c32b97e2cce84496945766fd32b6506e) ) /* 2 data roms */
954 ROM_LOAD16_BYTE( "a96_30.154", 0x40001, 0x10000, CRC(9eb5e127) SHA1(50e2fe5ec7f79ecf1fb5107298da13ef5ab37162) )
955
956 ROM_REGION( 0x30000, REGION_CPU2, 0 ) /* Z80 sound cpu */
957 ROM_LOAD( "a96_57.33", 0x00000, 0x10000, CRC(33ceb730) SHA1(05070ea503ac57ff8445145d6f97115f7aad90a5) )
958
959 ROM_REGION( 0x80000, REGION_CPU3, 0 ) /* 68000 code */
960 ROM_LOAD16_BYTE( "a96_33-1.190", 0x00000, 0x10000, CRC(ff186048) SHA1(becb00d2cc69a6d4e839086bd3d902f4e6a99aa6) )
961 ROM_LOAD16_BYTE( "a96_32-1.157", 0x00001, 0x10000, CRC(d9719de8) SHA1(9e907cfb5cbe6abebccfbd065d02e7a71c5aa494) )
962 ROM_LOAD16_BYTE( "a96_35-1.191", 0x20000, 0x10000, CRC(b3280193) SHA1(f4bad066c16682f9267752c50a31ef64b312f11e) )
963 ROM_LOAD16_BYTE( "a96_34-1.158", 0x20001, 0x10000, CRC(ca3b2573) SHA1(4da0d8536e546ea46b2374318e25c30305f4c977) )
964
965 ROM_REGION( 0x10000, REGION_CPU4, 0 ) /* second Z80 driving the ADPCM chip */
966 ROM_LOAD( "a96_56.18", 0x00000, 0x10000, CRC(292ef55c) SHA1(67bfe3693e43daece06d4795645d54cd66419e5b) ) /* Z80 prog + ADPCM samples */
967
968 ROM_REGION( 0x60000, REGION_GFX1, ROMREGION_DISPOSE )
969 ROM_LOAD16_BYTE( "a96_48.24", 0x00000, 0x10000, CRC(39c9b3aa) SHA1(43a91d916c5a09207dfa37413feb5025636f37ae) ) /* 8x8 SCR tiles */
970 ROM_LOAD16_BYTE( "a96_49.25", 0x20000, 0x10000, CRC(37a7d88a) SHA1(cede0d810d74ec460dcc4b391bb1acd5a669a7b4) )
971 ROM_LOAD16_BYTE( "a96_50.26", 0x40000, 0x10000, CRC(75d738e4) SHA1(634606da46136ab605f5477af5639a20e39b44c4) )
972 ROM_LOAD16_BYTE( "a96_51.47", 0x00001, 0x10000, CRC(1bf8f0d3) SHA1(7f36e69336260958282eb663fe71b56410f0ee42) )
973 ROM_LOAD16_BYTE( "a96_52.48", 0x20001, 0x10000, CRC(2d9b2128) SHA1(9b72936fbd9dca6ef8302ac6c40a1cec019cebb5) )
974 ROM_LOAD16_BYTE( "a96_53.49", 0x40001, 0x10000, CRC(0173484c) SHA1(41d70039bda0965afe89251696ceaec7b7f40c24) )
975
976 ROM_REGION( 0xc0000, REGION_GFX2, ROMREGION_DISPOSE )
977 ROM_LOAD32_BYTE( "a96_44.179", 0x00000, 0x10000, CRC(bbc18878) SHA1(7732ab2a3002f8b500615377dab42ac75451cb3b) ) /* 16x16 sprites */
978 ROM_LOAD32_BYTE( "a96_45.200", 0x00001, 0x10000, CRC(616cdd8b) SHA1(74e0c483a68d984a689ea1381ed3a9da2f8a410a) )
979 ROM_LOAD32_BYTE( "a96_46.180", 0x00002, 0x10000, CRC(fec35418) SHA1(f0f401c3634e91b81cb8484b7b03f350d382e889) )
980 ROM_LOAD32_BYTE( "a96_47.201", 0x00003, 0x10000, CRC(8df9286a) SHA1(4a197e4c38d1750cc316b8710f4a0fef4316be14) )
981
982 ROM_LOAD32_BYTE( "a96_40.177", 0x40000, 0x10000, CRC(b699a51e) SHA1(5fd751dd44618743dc8a3df04cf0a987753a868b) )
983 ROM_LOAD32_BYTE( "a96_41.198", 0x40001, 0x10000, CRC(97128a3a) SHA1(257ddd1ba71e6beeaf18e0c5d7006d1d2b6a5edf) )
984 ROM_LOAD32_BYTE( "a96_42.178", 0x40002, 0x10000, CRC(7f55ee0f) SHA1(d9ba7b8fbf59308a08613d67e92da6829f6b6db3) )
985 ROM_LOAD32_BYTE( "a96_43.199", 0x40003, 0x10000, CRC(c7cad469) SHA1(dbd37aa10f12e4950f8ec6bcd7d150fa55e64742) )
986
987 ROM_LOAD32_BYTE( "a96_36.175", 0x80000, 0x10000, CRC(af598141) SHA1(f3b888bcbd4560cca48187055cbe4107e2b392a6) )
988 ROM_LOAD32_BYTE( "a96_37.196", 0x80001, 0x10000, CRC(b48137c8) SHA1(03e98a93f4fa19dfe77da244c002abc84b936a22) )
989 ROM_LOAD32_BYTE( "a96_38.176", 0x80002, 0x10000, CRC(e4f3e3a7) SHA1(0baa8a672516bcc4f17f40f429ac3d227de16625) )
990 ROM_LOAD32_BYTE( "a96_39.197", 0x80003, 0x10000, CRC(ea30920f) SHA1(91d47b10886d6c243bc676435e300cb3b5fcca33) )
991
992 ROM_REGION( 0x8000, REGION_GFX3, ROMREGION_DISPOSE ) /* 8x8 SCR tiles */
993 ROM_LOAD16_BYTE( "a96_54.143", 0x0000, 0x4000, CRC(51c02ae2) SHA1(27d2a6c649d047da1f22758569cb36531e3bf8bc) )
994 ROM_LOAD16_BYTE( "a96_55.144", 0x0001, 0x4000, CRC(771e4d98) SHA1(0e8ce5d569775883f4bc777b9bd49eb23ba7b42e) )
995
996 ROM_REGION( 0x1000, REGION_USER1, 0 )
997 ROM_LOAD16_BYTE( "a96-24.163", 0x0000, 0x0400, CRC(0fa8be7f) SHA1(079686b5d65b4b966591090d8c0e13e66dc5beca) ) /* proms, currently unused */
998 ROM_LOAD16_BYTE( "a96-25.164", 0x0400, 0x0400, CRC(265508a6) SHA1(f8ee1c658b33ae76d8a457a4042d9b4b58247823) )
999 ROM_LOAD16_BYTE( "a96-26.165", 0x0800, 0x0400, CRC(4891b9c0) SHA1(1f550a9a4ad3ca379f88f5865ed1b281c7b87f31) )
1000 ROM_END
1001
1002 ROM_START( dariuso )
1003 ROM_REGION( 0x60000, REGION_CPU1, 0 ) /* 68000 code */
1004 ROM_FILL( 0x00000, 0x60000, 0xffffffff )
1005 ROM_LOAD16_BYTE( "a96-29.185", 0x00000, 0x10000, CRC(f775162b) SHA1(a17e570c2ba4daf0a3526b45c324c822faac0c8d) )
1006 ROM_LOAD16_BYTE( "a96-28.152", 0x00001, 0x10000, CRC(4721d667) SHA1(fa9a109054a818f836452215204ce91f2b166ddb) )
1007 /* middle area is empty */
1008 ROM_LOAD16_BYTE( "a96_31.187", 0x40000, 0x10000, CRC(e9bb5d89) SHA1(a5d08129c32b97e2cce84496945766fd32b6506e) ) /* 2 data roms */
1009 ROM_LOAD16_BYTE( "a96_30.154", 0x40001, 0x10000, CRC(9eb5e127) SHA1(50e2fe5ec7f79ecf1fb5107298da13ef5ab37162) )
1010
1011 ROM_REGION( 0x30000, REGION_CPU2, 0 ) /* Z80 sound cpu */
1012 ROM_LOAD( "a96_57.33", 0x00000, 0x10000, CRC(33ceb730) SHA1(05070ea503ac57ff8445145d6f97115f7aad90a5) )
1013
1014 ROM_REGION( 0x80000, REGION_CPU3, 0 ) /* 68000 code */
1015 ROM_LOAD16_BYTE( "a96-33.190", 0x00000, 0x10000, CRC(d2f340d2) SHA1(d9175bf4dda5707afb3c57d3b6affe0305084c71) )
1016 ROM_LOAD16_BYTE( "a96-32.157", 0x00001, 0x10000, CRC(044c9848) SHA1(5293e9e83fd38d0d14e4f3b3a342d88e27ee44d6) )
1017 ROM_LOAD16_BYTE( "a96-35.191", 0x20000, 0x10000, CRC(b8ed718b) SHA1(8951f9c3c971c5621ec98b63fb27d44f30304c70) )
1018 ROM_LOAD16_BYTE( "a96-34.158", 0x20001, 0x10000, CRC(7556a660) SHA1(eaa82f3e1f827616ff25e22673d6d2ee54f0ad4c) )
1019
1020 ROM_REGION( 0x10000, REGION_CPU4, 0 ) /* second Z80 driving the ADPCM chip */
1021 ROM_LOAD( "a96_56.18", 0x00000, 0x10000, CRC(292ef55c) SHA1(67bfe3693e43daece06d4795645d54cd66419e5b) ) /* Z80 prog + ADPCM samples */
1022
1023 ROM_REGION( 0x60000, REGION_GFX1, ROMREGION_DISPOSE )
1024 ROM_LOAD16_BYTE( "a96_48.24", 0x00000, 0x10000, CRC(39c9b3aa) SHA1(43a91d916c5a09207dfa37413feb5025636f37ae) ) /* 8x8 SCR tiles */
1025 ROM_LOAD16_BYTE( "a96_49.25", 0x20000, 0x10000, CRC(37a7d88a) SHA1(cede0d810d74ec460dcc4b391bb1acd5a669a7b4) )
1026 ROM_LOAD16_BYTE( "a96_50.26", 0x40000, 0x10000, CRC(75d738e4) SHA1(634606da46136ab605f5477af5639a20e39b44c4) )
1027 ROM_LOAD16_BYTE( "a96_51.47", 0x00001, 0x10000, CRC(1bf8f0d3) SHA1(7f36e69336260958282eb663fe71b56410f0ee42) )
1028 ROM_LOAD16_BYTE( "a96_52.48", 0x20001, 0x10000, CRC(2d9b2128) SHA1(9b72936fbd9dca6ef8302ac6c40a1cec019cebb5) )
1029 ROM_LOAD16_BYTE( "a96_53.49", 0x40001, 0x10000, CRC(0173484c) SHA1(41d70039bda0965afe89251696ceaec7b7f40c24) )
1030
1031 ROM_REGION( 0xc0000, REGION_GFX2, ROMREGION_DISPOSE )
1032 ROM_LOAD32_BYTE( "a96_44.179", 0x00000, 0x10000, CRC(bbc18878) SHA1(7732ab2a3002f8b500615377dab42ac75451cb3b) ) /* 16x16 sprites */
1033 ROM_LOAD32_BYTE( "a96_45.200", 0x00001, 0x10000, CRC(616cdd8b) SHA1(74e0c483a68d984a689ea1381ed3a9da2f8a410a) )
1034 ROM_LOAD32_BYTE( "a96_46.180", 0x00002, 0x10000, CRC(fec35418) SHA1(f0f401c3634e91b81cb8484b7b03f350d382e889) )
1035 ROM_LOAD32_BYTE( "a96_47.201", 0x00003, 0x10000, CRC(8df9286a) SHA1(4a197e4c38d1750cc316b8710f4a0fef4316be14) )
1036
1037 ROM_LOAD32_BYTE( "a96_40.177", 0x40000, 0x10000, CRC(b699a51e) SHA1(5fd751dd44618743dc8a3df04cf0a987753a868b) )
1038 ROM_LOAD32_BYTE( "a96_41.198", 0x40001, 0x10000, CRC(97128a3a) SHA1(257ddd1ba71e6beeaf18e0c5d7006d1d2b6a5edf) )
1039 ROM_LOAD32_BYTE( "a96_42.178", 0x40002, 0x10000, CRC(7f55ee0f) SHA1(d9ba7b8fbf59308a08613d67e92da6829f6b6db3) )
1040 ROM_LOAD32_BYTE( "a96_43.199", 0x40003, 0x10000, CRC(c7cad469) SHA1(dbd37aa10f12e4950f8ec6bcd7d150fa55e64742) )
1041
1042 ROM_LOAD32_BYTE( "a96_36.175", 0x80000, 0x10000, CRC(af598141) SHA1(f3b888bcbd4560cca48187055cbe4107e2b392a6) )
1043 ROM_LOAD32_BYTE( "a96_37.196", 0x80001, 0x10000, CRC(b48137c8) SHA1(03e98a93f4fa19dfe77da244c002abc84b936a22) )
1044 ROM_LOAD32_BYTE( "a96_38.176", 0x80002, 0x10000, CRC(e4f3e3a7) SHA1(0baa8a672516bcc4f17f40f429ac3d227de16625) )
1045 ROM_LOAD32_BYTE( "a96_39.197", 0x80003, 0x10000, CRC(ea30920f) SHA1(91d47b10886d6c243bc676435e300cb3b5fcca33) )
1046
1047 ROM_REGION( 0x8000, REGION_GFX3, ROMREGION_DISPOSE ) /* 8x8 SCR tiles */
1048 ROM_LOAD16_BYTE( "a96_54.143", 0x0000, 0x4000, CRC(51c02ae2) SHA1(27d2a6c649d047da1f22758569cb36531e3bf8bc) )
1049 ROM_LOAD16_BYTE( "a96_55.144", 0x0001, 0x4000, CRC(771e4d98) SHA1(0e8ce5d569775883f4bc777b9bd49eb23ba7b42e) )
1050
1051 ROM_REGION( 0x1000, REGION_USER1, 0 )
1052 ROM_LOAD16_BYTE( "a96-24.163", 0x0000, 0x0400, CRC(0fa8be7f) SHA1(079686b5d65b4b966591090d8c0e13e66dc5beca) ) /* proms, currently unused */
1053 ROM_LOAD16_BYTE( "a96-25.164", 0x0400, 0x0400, CRC(265508a6) SHA1(f8ee1c658b33ae76d8a457a4042d9b4b58247823) )
1054 ROM_LOAD16_BYTE( "a96-26.165", 0x0800, 0x0400, CRC(4891b9c0) SHA1(1f550a9a4ad3ca379f88f5865ed1b281c7b87f31) )
1055 ROM_END
1056
1057 ROM_START( dariuse )
1058 ROM_REGION( 0x60000, REGION_CPU1, 0 ) /* 68000 code */
1059 ROM_FILL( 0x00000, 0x60000, 0xffffffff )
1060 ROM_LOAD16_BYTE( "dae-68.bin", 0x00000, 0x10000, CRC(ed721127) SHA1(8127f4a9b26b5fb83a381235eef0577d60d1cfd7) )
1061 ROM_LOAD16_BYTE( "dae-67.bin", 0x00001, 0x10000, CRC(b99aea8c) SHA1(859ada7c472ab2ac308faa775066e79ed1f4ad71) )
1062 /* middle area is empty */
1063 ROM_LOAD16_BYTE( "dae-70.bin", 0x40000, 0x10000, CRC(54590b31) SHA1(2b89846f14a5cb19b58ab4999bc5ae11671bbb5a) ) /* 2 data roms */
1064 ROM_LOAD16_BYTE( "a96_30.154", 0x40001, 0x10000, CRC(9eb5e127) SHA1(50e2fe5ec7f79ecf1fb5107298da13ef5ab37162) ) /* dae-69.bin*/
1065
1066 ROM_REGION( 0x30000, REGION_CPU2, 0 ) /* Z80 sound cpu */
1067 ROM_LOAD( "a96_57.33", 0x00000, 0x10000, CRC(33ceb730) SHA1(05070ea503ac57ff8445145d6f97115f7aad90a5) )
1068
1069 ROM_REGION( 0x80000, REGION_CPU3, 0 ) /* 68000 code */
1070 ROM_LOAD16_BYTE( "dae-72.bin", 0x00000, 0x10000, CRC(248ca2cc) SHA1(43b29146d8e2c62dd1fb7dc842fd441a360f2453) )
1071 ROM_LOAD16_BYTE( "dae-71.bin", 0x00001, 0x10000, CRC(65dd0403) SHA1(8036c35ce5df0727cccb9ece3bfac9577160d4fd) )
1072 ROM_LOAD16_BYTE( "dae-74.bin", 0x20000, 0x10000, CRC(0ea31f60) SHA1(c9e7eaf8bf3abbef944b7de407d5d5ddaac93e31) )
1073 ROM_LOAD16_BYTE( "dae-73.bin", 0x20001, 0x10000, CRC(27036a4d) SHA1(426dccb8f559d39460c97bfd4354c74a59af172e) )
1074
1075 ROM_REGION( 0x10000, REGION_CPU4, 0 ) /* second Z80 driving the ADPCM chip */
1076 ROM_LOAD( "a96_56.18", 0x00000, 0x10000, CRC(292ef55c) SHA1(67bfe3693e43daece06d4795645d54cd66419e5b) ) /* Z80 prog + ADPCM samples */
1077
1078 ROM_REGION( 0x60000, REGION_GFX1, ROMREGION_DISPOSE )
1079 ROM_LOAD16_BYTE( "a96_48.24", 0x00000, 0x10000, CRC(39c9b3aa) SHA1(43a91d916c5a09207dfa37413feb5025636f37ae) ) /* 8x8 SCR tiles */
1080 ROM_LOAD16_BYTE( "a96_49.25", 0x20000, 0x10000, CRC(37a7d88a) SHA1(cede0d810d74ec460dcc4b391bb1acd5a669a7b4) )
1081 ROM_LOAD16_BYTE( "a96_50.26", 0x40000, 0x10000, CRC(75d738e4) SHA1(634606da46136ab605f5477af5639a20e39b44c4) )
1082 ROM_LOAD16_BYTE( "a96_51.47", 0x00001, 0x10000, CRC(1bf8f0d3) SHA1(7f36e69336260958282eb663fe71b56410f0ee42) )
1083 ROM_LOAD16_BYTE( "a96_52.48", 0x20001, 0x10000, CRC(2d9b2128) SHA1(9b72936fbd9dca6ef8302ac6c40a1cec019cebb5) )
1084 ROM_LOAD16_BYTE( "a96_53.49", 0x40001, 0x10000, CRC(0173484c) SHA1(41d70039bda0965afe89251696ceaec7b7f40c24) )
1085
1086 ROM_REGION( 0xc0000, REGION_GFX2, ROMREGION_DISPOSE )
1087 ROM_LOAD32_BYTE( "a96_44.179", 0x00000, 0x10000, CRC(bbc18878) SHA1(7732ab2a3002f8b500615377dab42ac75451cb3b) ) /* 16x16 sprites */
1088 ROM_LOAD32_BYTE( "a96_45.200", 0x00001, 0x10000, CRC(616cdd8b) SHA1(74e0c483a68d984a689ea1381ed3a9da2f8a410a) )
1089 ROM_LOAD32_BYTE( "a96_46.180", 0x00002, 0x10000, CRC(fec35418) SHA1(f0f401c3634e91b81cb8484b7b03f350d382e889) )
1090 ROM_LOAD32_BYTE( "a96_47.201", 0x00003, 0x10000, CRC(8df9286a) SHA1(4a197e4c38d1750cc316b8710f4a0fef4316be14) )
1091
1092 ROM_LOAD32_BYTE( "a96_40.177", 0x40000, 0x10000, CRC(b699a51e) SHA1(5fd751dd44618743dc8a3df04cf0a987753a868b) )
1093 ROM_LOAD32_BYTE( "a96_41.198", 0x40001, 0x10000, CRC(97128a3a) SHA1(257ddd1ba71e6beeaf18e0c5d7006d1d2b6a5edf) )
1094 ROM_LOAD32_BYTE( "a96_42.178", 0x40002, 0x10000, CRC(7f55ee0f) SHA1(d9ba7b8fbf59308a08613d67e92da6829f6b6db3) )
1095 ROM_LOAD32_BYTE( "a96_43.199", 0x40003, 0x10000, CRC(c7cad469) SHA1(dbd37aa10f12e4950f8ec6bcd7d150fa55e64742) )
1096
1097 ROM_LOAD32_BYTE( "a96_36.175", 0x80000, 0x10000, CRC(af598141) SHA1(f3b888bcbd4560cca48187055cbe4107e2b392a6) )
1098 ROM_LOAD32_BYTE( "a96_37.196", 0x80001, 0x10000, CRC(b48137c8) SHA1(03e98a93f4fa19dfe77da244c002abc84b936a22) )
1099 ROM_LOAD32_BYTE( "a96_38.176", 0x80002, 0x10000, CRC(e4f3e3a7) SHA1(0baa8a672516bcc4f17f40f429ac3d227de16625) )
1100 ROM_LOAD32_BYTE( "a96_39.197", 0x80003, 0x10000, CRC(ea30920f) SHA1(91d47b10886d6c243bc676435e300cb3b5fcca33) )
1101
1102 ROM_REGION( 0x8000, REGION_GFX3, ROMREGION_DISPOSE ) /* 8x8 SCR tiles */
1103 ROM_LOAD16_BYTE( "a96_54.143", 0x0000, 0x4000, CRC(51c02ae2) SHA1(27d2a6c649d047da1f22758569cb36531e3bf8bc) )
1104 ROM_LOAD16_BYTE( "a96_55.144", 0x0001, 0x4000, CRC(771e4d98) SHA1(0e8ce5d569775883f4bc777b9bd49eb23ba7b42e) )
1105
1106 ROM_REGION( 0x1000, REGION_USER1, 0 )
1107 ROM_LOAD16_BYTE( "a96-24.163", 0x0000, 0x0400, CRC(0fa8be7f) SHA1(079686b5d65b4b966591090d8c0e13e66dc5beca) ) /* proms, currently unused */
1108 ROM_LOAD16_BYTE( "a96-25.164", 0x0400, 0x0400, CRC(265508a6) SHA1(f8ee1c658b33ae76d8a457a4042d9b4b58247823) )
1109 ROM_LOAD16_BYTE( "a96-26.165", 0x0800, 0x0400, CRC(4891b9c0) SHA1(1f550a9a4ad3ca379f88f5865ed1b281c7b87f31) )
1110 ROM_END
1111
1112
1113 static DRIVER_INIT( darius )
1114 {
1115 /* taitosnd_setz80_soundcpu( 2 );*/
1116
1117 cpua_ctrl = 0xff;
1118 state_save_register_UINT16("main1", 0, "control", &cpua_ctrl, 1);
1119 state_save_register_func_postload(parse_control);
1120
1121 banknum = -1;
1122 /* (there are other sound vars that may need saving too) */ /**/
1123 state_save_register_int("sound1", 0, "sound region", &banknum);
1124 state_save_register_int("sound2", 0, "sound region", &adpcm_command);
1125 state_save_register_int("sound3", 0, "sound region", &nmi_enable);
1126 state_save_register_func_postload(reset_sound_region);
1127 }
1128
1129
MACHINE_INIT(darius)1130 MACHINE_INIT( darius )
1131 {
1132 int i;
1133
1134 /**** setup sound bank image ****/
1135 unsigned char *RAM = memory_region(REGION_CPU2);
1136
1137 for( i = 3; i >= 0; i-- ){
1138 memcpy( RAM + 0x8000*i + 0x10000, RAM, 0x4000 );
1139 memcpy( RAM + 0x8000*i + 0x14000, RAM + 0x4000*i, 0x4000 );
1140 }
1141
1142 mixer_sound_enable_global_w( 1 ); /* mixer enabled */
1143
1144 for( i = 0; i < DARIUS_VOL_MAX; i++ ){
1145 darius_vol[i] = 0x00; /* min volume */
1146 }
1147 for( i = 0; i < DARIUS_PAN_MAX; i++ ){
1148 darius_pan[i] = 0x80; /* center */
1149 }
1150 for( i = 0; i < 0x10; i++ ){
1151 /*logerror( "calc %d = %d\n", i, (int)(100.0f / (float)pow(10.0f, (32.0f - (i * (32.0f / (float)(0xf)))) / 20.0f)) );*/
1152 darius_def_vol[i] = (int)(100.0f / (float)pow(10.0f, (32.0f - (i * (32.0f / (float)(0xf)))) / 20.0f));
1153 }
1154 }
1155
1156
1157 GAME( 1986, darius, 0, darius, darius, darius, ROT0, "Taito Corporation Japan", "Darius (World)" )
1158 GAME( 1986, dariusj, darius, darius, dariusj, darius, ROT0, "Taito Corporation", "Darius (Japan)" )
1159 GAME( 1986, dariuso, darius, darius, dariusj, darius, ROT0, "Taito Corporation", "Darius (Japan old version)" )
1160 GAME( 1986, dariuse, darius, darius, dariuse, darius, ROT0, "Taito Corporation", "Darius (Extra) (Japan)" )
1161