1 /***************************************************************************
2
3 Exzisus
4 -------------------------------------
5 driver by Yochizo
6
7 This driver is heavily dependent on the Raine source.
8 Very thanks to Richard Bush and the Raine team.
9
10
11 Supported games :
12 ==================
13 Exzisus (C) 1987 Taito
14
15
16 System specs :
17 ===============
18 CPU : Z80(4 MHz) x 4
19 Sound : YM2151 x 1
20 Chips : TC0010VCU + TC0140SYT
21
22
23 Known issues :
24 ===============
25 - Dip switches are not known very much.
26 - Very slow due to four Z80s.
27
28 ****************************************************************************/
29
30 #include "driver.h"
31 #include "vidhrdw/generic.h"
32 #include "sndhrdw/taitosnd.h"
33
34
35 /***************************************************************************
36
37 Variables
38
39 ***************************************************************************/
40
41 static UINT8 *exzisus_sharedram_ac;
42 static UINT8 *exzisus_sharedram_bc;
43 static int exzisus_cpua_bank = 0;
44 static int exzisus_cpub_bank = 0;
45
46 extern UINT8 *exzisus_videoram0;
47 extern UINT8 *exzisus_videoram1;
48 extern UINT8 *exzisus_objectram0;
49 extern UINT8 *exzisus_objectram1;
50 extern size_t exzisus_objectram_size0;
51 extern size_t exzisus_objectram_size1;
52
53 READ_HANDLER ( exzisus_videoram_0_r );
54 READ_HANDLER ( exzisus_videoram_1_r );
55 READ_HANDLER ( exzisus_objectram_0_r );
56 READ_HANDLER ( exzisus_objectram_1_r );
57 WRITE_HANDLER( exzisus_videoram_0_w );
58 WRITE_HANDLER( exzisus_videoram_1_w );
59 WRITE_HANDLER( exzisus_objectram_0_w );
60 WRITE_HANDLER( exzisus_objectram_1_w );
61
62 VIDEO_UPDATE( exzisus );
63
64
65 /***************************************************************************
66
67 Memory Handler(s)
68
69 ***************************************************************************/
70
WRITE_HANDLER(exzisus_cpua_bankswitch_w)71 static WRITE_HANDLER( exzisus_cpua_bankswitch_w )
72 {
73 UINT8 *RAM = memory_region(REGION_CPU1);
74
75 if ( (data & 0x0f) != exzisus_cpua_bank )
76 {
77 exzisus_cpua_bank = data & 0x0f;
78 if (exzisus_cpua_bank >= 2)
79 {
80 cpu_setbank( 1, &RAM[ 0x10000 + ( (exzisus_cpua_bank - 2) * 0x4000 ) ] );
81 }
82 }
83
84 flip_screen_set(data & 0x40);
85 }
86
WRITE_HANDLER(exzisus_cpub_bankswitch_w)87 static WRITE_HANDLER( exzisus_cpub_bankswitch_w )
88 {
89 UINT8 *RAM = memory_region(REGION_CPU4);
90
91 if ( (data & 0x0f) != exzisus_cpub_bank )
92 {
93 exzisus_cpub_bank = data & 0x0f;
94 if (exzisus_cpub_bank >= 2)
95 {
96 cpu_setbank( 2, &RAM[ 0x10000 + ( (exzisus_cpub_bank - 2) * 0x4000 ) ] );
97 }
98 }
99
100 flip_screen_set(data & 0x40);
101 }
102
WRITE_HANDLER(exzisus_coincounter_w)103 static WRITE_HANDLER( exzisus_coincounter_w )
104 {
105 coin_lockout_w(0,~data & 0x01);
106 coin_lockout_w(1,~data & 0x02);
107 coin_counter_w(0,data & 0x04);
108 coin_counter_w(1,data & 0x08);
109 }
110
READ_HANDLER(exzisus_sharedram_ac_r)111 static READ_HANDLER( exzisus_sharedram_ac_r )
112 {
113 return exzisus_sharedram_ac[offset];
114 }
115
READ_HANDLER(exzisus_sharedram_bc_r)116 static READ_HANDLER( exzisus_sharedram_bc_r )
117 {
118 return exzisus_sharedram_bc[offset];
119 }
120
WRITE_HANDLER(exzisus_sharedram_ac_w)121 static WRITE_HANDLER( exzisus_sharedram_ac_w )
122 {
123 exzisus_sharedram_ac[offset] = data;
124 }
125
WRITE_HANDLER(exzisus_sharedram_bc_w)126 static WRITE_HANDLER( exzisus_sharedram_bc_w )
127 {
128 exzisus_sharedram_bc[offset] = data;
129 }
130
131
132 /**************************************************************************
133
134 Memory Map(s)
135
136 **************************************************************************/
137
DRIVER_INIT(exzisus)138 static DRIVER_INIT( exzisus )
139 {
140 UINT8 *RAM = memory_region(REGION_CPU4);
141
142 /* Fix ROM 1 error */
143 RAM[0x6829] = 0x18;
144
145 /* Fix WORK RAM error */
146 RAM[0x67fd] = 0x18;
147 }
148
irqhandler(int irq)149 static void irqhandler(int irq)
150 {
151 cpu_set_irq_line(1, 0, irq ? ASSERT_LINE : CLEAR_LINE);
152 }
153
154 static struct YM2151interface ym2151_interface =
155 {
156 1, /* 1 chip */
157 4000000, /* 4 MHz ? */
158 { YM3012_VOL(50,MIXER_PAN_CENTER,50,MIXER_PAN_CENTER) },
159 { irqhandler },
160 };
161
MEMORY_READ_START(cpua_readmem)162 static MEMORY_READ_START( cpua_readmem )
163 { 0x0000, 0x7fff, MRA_ROM },
164 { 0x8000, 0xbfff, MRA_BANK1 },
165 { 0xc000, 0xc5ff, exzisus_objectram_0_r },
166 { 0xc600, 0xdfff, exzisus_videoram_0_r },
167 { 0xe000, 0xefff, MRA_RAM },
168 { 0xf000, 0xf000, MRA_NOP },
169 { 0xf001, 0xf001, taitosound_comm_r },
170 { 0xf400, 0xf400, input_port_0_r },
171 { 0xf401, 0xf401, input_port_1_r },
172 { 0xf402, 0xf402, input_port_2_r },
173 { 0xf404, 0xf404, input_port_3_r },
174 { 0xf405, 0xf405, input_port_4_r },
175 { 0xf800, 0xffff, exzisus_sharedram_ac_r },
176 MEMORY_END
177
178 static MEMORY_WRITE_START( cpua_writemem )
179 { 0x0000, 0xbfff, MWA_ROM },
180 { 0xc000, 0xc5ff, exzisus_objectram_0_w, &exzisus_objectram0, &exzisus_objectram_size0 },
181 { 0xc600, 0xdfff, exzisus_videoram_0_w, &exzisus_videoram0 },
182 { 0xe000, 0xefff, MWA_RAM },
183 { 0xf000, 0xf000, taitosound_port_w },
184 { 0xf001, 0xf001, taitosound_comm_w },
185 { 0xf400, 0xf400, exzisus_cpua_bankswitch_w },
186 { 0xf402, 0xf402, exzisus_coincounter_w },
187 { 0xf404, 0xf404, MWA_NOP }, /* ??*/
188 { 0xf800, 0xffff, exzisus_sharedram_ac_w },
189 MEMORY_END
190
191 static MEMORY_READ_START( cpub_readmem )
192 { 0x0000, 0x7fff, MRA_ROM },
193 { 0x8000, 0x85ff, exzisus_objectram_1_r },
194 { 0x8600, 0x9fff, exzisus_videoram_1_r },
195 { 0xa000, 0xafff, exzisus_sharedram_bc_r },
196 { 0xb000, 0xbfff, MRA_RAM },
197 MEMORY_END
198
199 static MEMORY_WRITE_START( cpub_writemem )
200 { 0x0000, 0x7fff, MWA_ROM },
201 { 0x8000, 0x85ff, exzisus_objectram_1_w },
202 { 0x8600, 0x9fff, exzisus_videoram_1_w },
203 { 0xa000, 0xafff, exzisus_sharedram_bc_w },
204 { 0xb000, 0xbfff, MWA_RAM },
205 MEMORY_END
206
207 static MEMORY_READ_START( cpuc_readmem )
208 { 0x0000, 0x7fff, MRA_ROM },
209 { 0x8000, 0xbfff, MRA_BANK2 },
210 { 0xc000, 0xc5ff, exzisus_objectram_1_r },
211 { 0xc600, 0xdfff, exzisus_videoram_1_r },
212 { 0xe000, 0xefff, exzisus_sharedram_bc_r },
213 { 0xf800, 0xffff, exzisus_sharedram_ac_r },
214 MEMORY_END
215
216 static MEMORY_WRITE_START( cpuc_writemem )
217 { 0x0000, 0xbfff, MWA_ROM },
218 { 0xc000, 0xc5ff, exzisus_objectram_1_w, &exzisus_objectram1, &exzisus_objectram_size1 },
219 { 0xc600, 0xdfff, exzisus_videoram_1_w, &exzisus_videoram1 },
220 { 0xe000, 0xefff, exzisus_sharedram_bc_w, &exzisus_sharedram_bc },
221 { 0xf400, 0xf400, exzisus_cpub_bankswitch_w },
222 { 0xf800, 0xffff, exzisus_sharedram_ac_w, &exzisus_sharedram_ac },
223 MEMORY_END
224
225 static MEMORY_READ_START( sound_readmem )
226 { 0x0000, 0x7fff, MRA_ROM },
227 { 0x8000, 0x8fff, MRA_RAM },
228 { 0x9000, 0x9000, MRA_NOP },
229 { 0x9001, 0x9001, YM2151_status_port_0_r },
230 { 0xa000, 0xa000, MRA_NOP },
231 { 0xa001, 0xa001, taitosound_slave_comm_r },
232 MEMORY_END
233
234 static MEMORY_WRITE_START( sound_writemem )
235 { 0x0000, 0x7fff, MWA_ROM },
236 { 0x8000, 0x8fff, MWA_RAM },
237 { 0x9000, 0x9000, YM2151_register_port_0_w },
238 { 0x9001, 0x9001, YM2151_data_port_0_w },
239 { 0xa000, 0xa000, taitosound_slave_port_w },
240 { 0xa001, 0xa001, taitosound_slave_comm_w },
241 MEMORY_END
242
243
244 /***************************************************************************
245
246 Input Port(s)
247
248 ***************************************************************************/
249
250 #define EXZISUS_PLAYERS_INPUT( player ) \
251 PORT_START \
252 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | player ) \
253 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | player ) \
254 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | player ) \
255 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | player ) \
256 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | player ) \
257 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | player )
258
259 #define TAITO_COINAGE_JAPAN_8 \
260 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) \
261 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) ) \
262 PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) \
263 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) \
264 PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) ) \
265 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) \
266 PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) ) \
267 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) \
268 PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) \
269 PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
270
271 #define TAITO_DIFFICULTY_8 \
272 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) \
273 PORT_DIPSETTING( 0x02, "Easy" ) \
274 PORT_DIPSETTING( 0x03, "Medium" ) \
275 PORT_DIPSETTING( 0x01, "Hard" ) \
276 PORT_DIPSETTING( 0x00, "Hardest" )
277
278 INPUT_PORTS_START( exzisus )
279 /* IN0 */
280 EXZISUS_PLAYERS_INPUT( IPF_PLAYER1 )
281 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
282
283 /* IN1 */
284 EXZISUS_PLAYERS_INPUT( IPF_PLAYER2 )
285 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
286
287 /* IN2 */
288 PORT_START /* System control (2) */
289 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
290 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
291 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
292 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
293 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
294 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
295 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
296
297 PORT_START /* DSW 1 (3) */
298 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
299 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
300 PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
301 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) )
302 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
303 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
304 PORT_SERVICE( 0x04, IP_ACTIVE_LOW ) /* Service Mode */
305 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
306 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
307 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
308 TAITO_COINAGE_JAPAN_8
309
310 PORT_START /* DSW 2 (4) */
311 TAITO_DIFFICULTY_8
312 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
313 PORT_DIPSETTING( 0x08, "100k and every 150k" )
314 PORT_DIPSETTING( 0x04, "150k" )
315 PORT_DIPSETTING( 0x0c, "150k and every 200k" )
316 PORT_DIPSETTING( 0x00, "200k" )
317 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) )
318 PORT_DIPSETTING( 0x00, "2" )
319 PORT_DIPSETTING( 0x30, "3" )
320 PORT_DIPSETTING( 0x20, "4" )
321 PORT_DIPSETTING( 0x10, "5" )
322 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
323 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
324 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
325 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
326 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
327 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
328 INPUT_PORTS_END
329
330
331 /***************************************************************************
332
333 Machine Driver(s)
334
335 ***************************************************************************/
336
337 static struct GfxLayout charlayout =
338 {
339 8, 8,
340 8*2048,
341 4,
342 { 0x40000*8, 0x40000*8+4, 0, 4 },
343 { 3, 2, 1, 0, 8+3, 8+2, 8+1, 8+0 },
344 { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
345 16*8
346 };
347
348 static struct GfxDecodeInfo exzisus_gfxdecodeinfo[] =
349 {
350 { REGION_GFX1, 0, &charlayout, 0, 256 },
351 { REGION_GFX2, 0, &charlayout, 256, 256 },
352 { -1 } /* end of array */
353 };
354
355 static MACHINE_DRIVER_START( exzisus )
356
357 /* basic machine hardware */
358 MDRV_CPU_ADD(Z80, 6000000) /* 6 MHz ??? */
359 MDRV_CPU_MEMORY(cpua_readmem,cpua_writemem)
360 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
361
362 MDRV_CPU_ADD(Z80, 4000000) /* 4 MHz ??? */
363 MDRV_CPU_MEMORY(sound_readmem,sound_writemem)
364
365 MDRV_CPU_ADD(Z80, 6000000) /* 6 MHz ??? */
366 MDRV_CPU_MEMORY(cpub_readmem,cpub_writemem)
367 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
368
369 MDRV_CPU_ADD(Z80, 6000000) /* 6 MHz ??? */
370 MDRV_CPU_MEMORY(cpuc_readmem,cpuc_writemem)
371 MDRV_CPU_VBLANK_INT(irq0_line_hold,1)
372
373 MDRV_FRAMES_PER_SECOND(60)
374 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
375 MDRV_INTERLEAVE(10) /* 10 CPU slices per frame - enough for the sound CPU to read all commands */
376
377 /* video hardware */
378 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
379 MDRV_SCREEN_SIZE(32*8, 32*8)
380 MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
381 MDRV_GFXDECODE(exzisus_gfxdecodeinfo)
382 MDRV_PALETTE_LENGTH(1024)
383
384 MDRV_PALETTE_INIT(RRRR_GGGG_BBBB)
385 MDRV_VIDEO_UPDATE(exzisus)
386
387 /* sound hardware */
388 MDRV_SOUND_ADD(YM2151, ym2151_interface)
389 MACHINE_DRIVER_END
390
391
392 /***************************************************************************
393
394 Game driver(s)
395
396 ***************************************************************************/
397
398 ROM_START( exzisus )
399 ROM_REGION( 0x48000, REGION_CPU1, 0 ) /* Z80 CPU A */
400 ROM_LOAD( "b23-11.bin", 0x00000, 0x08000, CRC(d6a79cef) SHA1(e2b56aa38c017b24b50f304b9fe49ee14006f9a4) )
401 ROM_CONTINUE( 0x10000, 0x08000 )
402 ROM_LOAD( "b12-12.bin", 0x18000, 0x10000, CRC(a662be67) SHA1(0643480d56d8ac020288db800a705dd5d0d3ad9f) )
403 ROM_LOAD( "b12-13.bin", 0x28000, 0x10000, CRC(04a29633) SHA1(39476365241718f01f9630c12467cb24791a67e1) )
404
405 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* Z80 for Sound */
406 ROM_LOAD( "b23-14.bin", 0x00000, 0x08000, CRC(f7ca7df2) SHA1(6048d9341f0303546e447a76439e1927d14cdd57) )
407
408 ROM_REGION( 0x10000, REGION_CPU3, 0 ) /* Z80 CPU B */
409 ROM_LOAD( "b23-13.bin", 0x00000, 0x08000, CRC(51110aa1) SHA1(34c2701625eb1987affad1efd19ff8c9971456ae) )
410
411 ROM_REGION( 0x48000, REGION_CPU4, 0 ) /* Z80 CPU C */
412 ROM_LOAD( "b23-10.bin", 0x00000, 0x08000, CRC(c80216fc) SHA1(7b952779c420be08573768f09bd65d0a188df024) )
413 ROM_CONTINUE( 0x10000, 0x08000 )
414 ROM_LOAD( "b23-12.bin", 0x18000, 0x10000, CRC(13637f54) SHA1(c175bc60120e32eec6ccca822fa497a42dd59823) )
415
416 ROM_REGION( 0x80000, REGION_GFX1, ROMREGION_DISPOSE | ROMREGION_INVERT ) /* BG 0 */
417 ROM_LOAD( "b12-16.bin", 0x00000, 0x10000, CRC(6fec6acb) SHA1(2289c116d3f6093988a088d011f192dd4a99aa77) )
418 ROM_LOAD( "b12-18.bin", 0x10000, 0x10000, CRC(64e358aa) SHA1(cd1a23458b1a2f9c8c8aea8086dc04e0f6cc6908) )
419 ROM_LOAD( "b12-20.bin", 0x20000, 0x10000, CRC(87f52e89) SHA1(3f8530aca087fa2a32dc6dfbcfe2f86604ee3ca1) )
420 ROM_LOAD( "b12-15.bin", 0x40000, 0x10000, CRC(d81107c8) SHA1(c024c9b7956de493687e1373318d4cd74b3555b2) )
421 ROM_LOAD( "b12-17.bin", 0x50000, 0x10000, CRC(db1d5a6c) SHA1(c2e1b8d92c2b3b2ce775ed50ca4a37e84ed35a93) )
422 ROM_LOAD( "b12-19.bin", 0x60000, 0x10000, CRC(772b2641) SHA1(35cc6d5a725f1817791e710afde992e64d14104f) )
423
424 ROM_REGION( 0x80000, REGION_GFX2, ROMREGION_DISPOSE | ROMREGION_INVERT ) /* BG 1 */
425 ROM_LOAD( "b23-06.bin", 0x00000, 0x10000, CRC(44f8f661) SHA1(d77160a89e45556cd9ce211d89c398e1086d8d92) )
426 ROM_LOAD( "b23-08.bin", 0x10000, 0x10000, CRC(1ce498c1) SHA1(a9ce3de997089bd40c99bd89919b459c9f215fc8) )
427 ROM_LOAD( "b23-07.bin", 0x40000, 0x10000, CRC(d7f6ec89) SHA1(e8da207ddaf46ceff870b45ecec0e89c499291b4) )
428 ROM_LOAD( "b23-09.bin", 0x50000, 0x10000, CRC(6651617f) SHA1(6351a0b01589cb181b896285ade70e9dfcd799ec) )
429
430 ROM_REGION( 0x00c00, REGION_PROMS, 0 ) /* PROMS */
431 ROM_LOAD( "b23-04.bin", 0x00000, 0x00400, CRC(5042cffa) SHA1(c969748866a12681cf2dbf25a46da2c4e4f92313) )
432 ROM_LOAD( "b23-03.bin", 0x00400, 0x00400, CRC(9458fd45) SHA1(7f7cdacf37bb6f15de1109fa73ba3c5fc88893d0) )
433 ROM_LOAD( "b23-05.bin", 0x00800, 0x00400, CRC(87f0f69a) SHA1(37df6fd56245fab9beaabfd86fd8f95d7c42c2a5) )
434 ROM_END
435
436
437 /* ( YEAR NAME PARENT MACHINE INPUT INIT MONITOR COMPANY FULLNAME ) */
438 GAME( 1987, exzisus, 0, exzisus, exzisus, exzisus, ROT0, "Taito Corporation", "Exzisus (Japan)" )
439