1 /***************************************************************************
2
3 Hexion (GX122) (c) 1992 Konami
4
5 driver by Nicola Salmoria
6
7 Notes:
8 - There are probably palette PROMs missing. Palette data doesn't seem to be
9 written anywhere in RAM.
10 - The board has a 052591, which is used for protection in Thunder Cross and
11 S.P.Y. In this game, however, the only thing it seems to do is clear the
12 screen.
13 This is the program for the 052591:
14 00: 5f 80 01 e0 08
15 01: df 80 00 e0 0c
16 02: df 90 02 e0 0c
17 03: df a0 03 e0 0c
18 04: df b0 0f e0 0c
19 05: df c0 ff bf 0c
20 06: 5c 02 00 33 0c
21 07: 5f 80 04 80 0c
22 08: 5c 0e 00 2b 0c
23 09: df 70 00 cb 08
24 0a: 5f 80 00 80 0c
25 0b: 5c 04 00 2b 0c
26 0c: df 60 00 cb 08
27 0d: 5c 0c 1f e9 0c
28 0e: 4c 0c 2d e9 08
29 0f: 5f 80 03 80 0c
30 10: 5c 04 00 2b 0c
31 11: 5f 00 00 cb 00
32 12: 5f 80 02 a0 0c
33 13: df d0 00 c0 04
34 14: 01 3a 00 f3 0a
35 15: 5c 08 00 b3 0c
36 16: 5c 0e 00 13 0c
37 17: 5f 80 00 a0 0c
38 18: 5c 00 00 13 0c
39 19: 5c 08 00 b3 0c
40 1a: 5c 00 00 13 0c
41 1b: 84 5a 00 b3 0c
42 1c: 48 0a 5b d1 0c
43 1d: 5f 80 00 e0 08
44 1e: 5f 00 1e fd 0c
45 1f: 5f 80 01 a0 0c
46 20: df 20 00 cb 08
47 21: 5c 08 00 b3 0c
48 22: 5f 80 03 00 0c
49 23: 5c 08 00 b3 0c
50 24: 5f 80 00 80 0c
51 25: 5c 00 00 33 0c
52 26: 5c 08 00 93 0c
53 27: 9f 91 ff cf 0e
54 28: 5c 84 00 20 0c
55 29: 84 00 00 b3 0c
56 2a: 49 10 69 d1 0c
57 2b: 5f 80 00 e0 08
58 2c: 5f 00 2c fd 0c
59 2d: 5f 80 01 a0 0c
60 2e: df 20 00 cb 08
61 2f: 5c 08 00 b3 0c
62 30: 5f 80 03 00 0c
63 31: 5c 00 00 b3 0c
64 32: 5f 80 01 00 0c
65 33: 5c 08 00 b3 0c
66 34: 5f 80 00 80 0c
67 35: 5c 00 00 33 0c
68 36: 5c 08 00 93 0c
69 37: 9f 91 ff cf 0e
70 38: 5c 84 00 20 0c
71 39: 84 00 00 b3 0c
72 3a: 49 10 79 d1 0c
73 3b: 5f 80 00 e0 08
74 3c: 5f 00 3c fd 0c
75 3d: ff ff ff ff ff
76 3e: ff ff ff ff ff
77 3f: ff ff ff ff ff
78
79 ***************************************************************************/
80
81 #include "driver.h"
82 #include "vidhrdw/generic.h"
83
84
85 VIDEO_START( hexion );
86 VIDEO_UPDATE( hexion );
87
88 WRITE_HANDLER( hexion_bankswitch_w );
89 READ_HANDLER( hexion_bankedram_r );
90 WRITE_HANDLER( hexion_bankedram_w );
91 WRITE_HANDLER( hexion_bankctrl_w );
92 WRITE_HANDLER( hexion_gfxrom_select_w );
93
94
95
WRITE_HANDLER(coincntr_w)96 static WRITE_HANDLER( coincntr_w )
97 {
98 /*logerror("%04x: coincntr_w %02x\n",activecpu_get_pc(),data);*/
99
100 /* bits 0/1 = coin counters */
101 coin_counter_w(0,data & 0x01);
102 coin_counter_w(1,data & 0x02);
103
104 /* bit 5 = flip screen */
105 flip_screen_set(data & 0x20);
106
107 /* other bit unknown */
108 if ((data & 0xdc) != 0x10) usrintf_showmessage("coincntr %02x",data);
109 }
110
111
112
MEMORY_READ_START(readmem)113 static MEMORY_READ_START( readmem )
114 { 0x0000, 0x7fff, MRA_ROM },
115 { 0x8000, 0x9fff, MRA_BANK1 },
116 { 0xa000, 0xbfff, MRA_RAM },
117 { 0xc000, 0xdffe, hexion_bankedram_r },
118 { 0xf400, 0xf400, input_port_0_r },
119 { 0xf401, 0xf401, input_port_1_r },
120 { 0xf402, 0xf402, input_port_3_r },
121 { 0xf403, 0xf403, input_port_4_r },
122 { 0xf440, 0xf440, input_port_2_r },
123 { 0xf441, 0xf441, input_port_5_r },
124 { 0xf540, 0xf540, watchdog_reset_r },
125 MEMORY_END
126
127 static MEMORY_WRITE_START( writemem )
128 { 0x0000, 0x7fff, MWA_ROM },
129 { 0xa000, 0xbfff, MWA_RAM },
130 { 0xc000, 0xdffe, hexion_bankedram_w },
131 { 0xdfff, 0xdfff, hexion_bankctrl_w },
132 { 0xe800, 0xe87f, K051649_waveform_w },
133 { 0xe880, 0xe889, K051649_frequency_w },
134 { 0xe88a, 0xe88e, K051649_volume_w },
135 { 0xe88f, 0xe88f, K051649_keyonoff_w },
136 { 0xf000, 0xf00f, MWA_NOP }, /* 053252? f00e = IRQ ack, f00f = NMI ack */
137 { 0xf200, 0xf200, OKIM6295_data_0_w },
138 { 0xf480, 0xf480, hexion_bankswitch_w },
139 { 0xf4c0, 0xf4c0, coincntr_w },
140 { 0xf500, 0xf500, hexion_gfxrom_select_w },
141 MEMORY_END
142
143
144
145 INPUT_PORTS_START( hexion )
146 PORT_START
147 PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
148 PORT_DIPSETTING( 0x02, DEF_STR( 4C_1C ) )
149 PORT_DIPSETTING( 0x05, DEF_STR( 3C_1C ) )
150 PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
151 PORT_DIPSETTING( 0x04, DEF_STR( 3C_2C ) )
152 PORT_DIPSETTING( 0x01, DEF_STR( 4C_3C ) )
153 PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) )
154 PORT_DIPSETTING( 0x03, DEF_STR( 3C_4C ) )
155 PORT_DIPSETTING( 0x07, DEF_STR( 2C_3C ) )
156 PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ) )
157 PORT_DIPSETTING( 0x06, DEF_STR( 2C_5C ) )
158 PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ) )
159 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
160 PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ) )
161 PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
162 PORT_DIPSETTING( 0x09, DEF_STR( 1C_7C ) )
163 PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
164 PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
165 PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
166 PORT_DIPSETTING( 0x50, DEF_STR( 3C_1C ) )
167 PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
168 PORT_DIPSETTING( 0x40, DEF_STR( 3C_2C ) )
169 PORT_DIPSETTING( 0x10, DEF_STR( 4C_3C ) )
170 PORT_DIPSETTING( 0xf0, DEF_STR( 1C_1C ) )
171 PORT_DIPSETTING( 0x30, DEF_STR( 3C_4C ) )
172 PORT_DIPSETTING( 0x70, DEF_STR( 2C_3C ) )
173 PORT_DIPSETTING( 0xe0, DEF_STR( 1C_2C ) )
174 PORT_DIPSETTING( 0x60, DEF_STR( 2C_5C ) )
175 PORT_DIPSETTING( 0xd0, DEF_STR( 1C_3C ) )
176 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
177 PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
178 PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
179 PORT_DIPSETTING( 0x90, DEF_STR( 1C_7C ) )
180 PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
181
182 PORT_START
183 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
184 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
185 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
186 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
187 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
188 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
189 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
190 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
191 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
192 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
193 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
194 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
195 PORT_DIPNAME( 0x70, 0x70, DEF_STR( Difficulty ) )
196 PORT_DIPSETTING( 0x70, "Easiest" )
197 PORT_DIPSETTING( 0x60, "Very Easy" )
198 PORT_DIPSETTING( 0x50, "Easy" )
199 PORT_DIPSETTING( 0x40, "Medium" )
200 PORT_DIPSETTING( 0x30, "Medium Hard" )
201 PORT_DIPSETTING( 0x20, "Hard" )
202 PORT_DIPSETTING( 0x10, "Very Hard" )
203 PORT_DIPSETTING( 0x00, "Hardest" )
204 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
205 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
206 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
207
208 PORT_START
209 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) )
210 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
211 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
212 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
213 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
214 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
215 PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
216 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
217 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
218 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
219 PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
220
221 PORT_START
222 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
223 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
224 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
225 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
226 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
227 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
228 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
229 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
230
231 PORT_START
232 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
233 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
234 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
235 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
236 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
237 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
238 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
239 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
240
241 PORT_START
242 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
243 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
244 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
245 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* 052591? game waits for it to be 0 */
246 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
247 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
248 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
249 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
250 INPUT_PORTS_END
251
252
253
254 static struct GfxLayout charlayout =
255 {
256 8,8,
257 RGN_FRAC(1,2),
258 4,
259 { 0, 1, 2, 3 },
260 { RGN_FRAC(1,2)+0*4, RGN_FRAC(1,2)+1*4, 0*4, 1*4, RGN_FRAC(1,2)+2*4, RGN_FRAC(1,2)+3*4, 2*4, 3*4 },
261 { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
262 16*8
263 };
264
265 static struct GfxDecodeInfo gfxdecodeinfo[] =
266 {
267 { REGION_GFX1, 0, &charlayout, 0, 16 },
268 { -1 } /* end of array */
269 };
270
271
272
273 static struct OKIM6295interface okim6295_interface =
274 {
275 1, /* 1 chip */
276 { 8000 }, /* 8000Hz frequency */
277 { REGION_SOUND1 }, /* memory region */
278 { 100 }
279 };
280
281 static struct k051649_interface k051649_interface =
282 {
283 24000000/16, /* Clock */
284 100, /* Volume */
285 };
286
287
288
INTERRUPT_GEN(hexion_interrupt)289 static INTERRUPT_GEN( hexion_interrupt )
290 {
291 /* NMI handles start and coin inputs, origin unknown */
292 if (cpu_getiloops())
293 cpu_set_irq_line(0, IRQ_LINE_NMI, PULSE_LINE);
294 else
295 cpu_set_irq_line(0, 0, HOLD_LINE);
296 }
297
298 static MACHINE_DRIVER_START( hexion )
299
300 /* basic machine hardware */
301 MDRV_CPU_ADD(Z80,24000000/4) /* Z80B 6 MHz */
302 MDRV_CPU_MEMORY(readmem,writemem)
303 MDRV_CPU_VBLANK_INT(hexion_interrupt,3) /* both IRQ and NMI are used */
304
305 MDRV_FRAMES_PER_SECOND(60)
306 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
307
308 /* video hardware */
309 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_PIXEL_ASPECT_RATIO_1_2)
310 MDRV_SCREEN_SIZE(64*8, 32*8)
311 MDRV_VISIBLE_AREA(0*8, 64*8-1, 0*8, 32*8-1)
312 MDRV_GFXDECODE(gfxdecodeinfo)
313 MDRV_PALETTE_LENGTH(256)
314
315 MDRV_PALETTE_INIT(RRRR_GGGG_BBBB)
316 MDRV_VIDEO_START(hexion)
317 MDRV_VIDEO_UPDATE(hexion)
318
319 /* sound hardware */
320 MDRV_SOUND_ADD(OKIM6295, okim6295_interface)
321 MDRV_SOUND_ADD(K051649, k051649_interface)
322 MACHINE_DRIVER_END
323
324
325
326 /***************************************************************************
327
328 Game driver(s)
329
330 ***************************************************************************/
331
332 ROM_START( hexion )
333 ROM_REGION( 0x34800, REGION_CPU1, 0 ) /* ROMs + space for additional RAM */
334 ROM_LOAD( "122jab01.bin", 0x00000, 0x20000, CRC(eabc6dd1) SHA1(e74c1f1f2fcf8973f0741a2d544f25c8639448bf) )
335 ROM_RELOAD( 0x10000, 0x20000 ) /* banked at 8000-9fff */
336
337 ROM_REGION( 0x80000, REGION_GFX1, 0 ) /* addressable by the main CPU */
338 ROM_LOAD( "122a07.bin", 0x00000, 0x40000, CRC(22ae55e3) SHA1(41bdc990f69416b639542e2186a3610c16389063) )
339 ROM_LOAD( "122a06.bin", 0x40000, 0x40000, CRC(438f4388) SHA1(9e23805c9642a237daeaf106187d1e1e0692434d) )
340
341 ROM_REGION( 0x40000, REGION_SOUND1, 0 ) /* OKIM6295 samples */
342 ROM_LOAD( "122a05.bin", 0x0000, 0x40000, CRC(bcc831bf) SHA1(c3382065dd0069a4dc0bde2d9931ec85b0bffc73) )
343
344 ROM_REGION( 0x0300, REGION_PROMS, 0 )
345 ROM_LOAD( "122a04.10b", 0x0000, 0x0100, CRC(506eb8c6) SHA1(3bff7cf286942d8bdbc3998245c3de20981fbecb) )
346 ROM_LOAD( "122a03.11b", 0x0100, 0x0100, CRC(590c4f64) SHA1(db4b34f8c5fdfea034a94d65873f6fb842f123e9) )
347 ROM_LOAD( "122a02.13b", 0x0200, 0x0100, CRC(5734305c) SHA1(c72e59acf79a4db1a5a9d827eef899c0675336f2) )
348 ROM_END
349
350
351 GAME( 1992, hexion, 0, hexion, hexion, 0, ROT0, "Konami", "Hexion (Japan)" )
352