1 /*
2 * Sega System 24
3 *
4 * Kudos to Charles MacDonald (http://cgfm2.emuviews.com) for his
5 * very useful research
6 *
7 */
8
9 /* Missing:
10 - linescroll in special modes (qgh title, mahmajn2/qrouka attract mode)
11 - screen flipping (mix register 13 & 2)
12 */
13
14 /*
15 PCB Layout
16 ----------
17
18 837-6442 SYSTEM 24 (C) SEGA 1987
19 |-------------------------------------------------------------------------------|
20 | YM2151 DSW1 EPR12186.IC1 --------------------------| TMM41464-10 x4 |
21 | DSW2 EPR12187.IC2 |-------------------------- |
22 | CN2 |
23 | 68000 TMM41464-10 x4 |
24 | |--------------| 315-5295 |
25 | 315-5296 |HITACHI FD1094| (QFP100) |
26 |-| (QFP100) |317-0058-03D | |
27 | |--------------| |
28 |-| MB81C466-10 x4 |
29 | |
30 | |
31 |S 315-5295 |
32 |E 20MHz 315-5195 (QFP100) MB81C466-10 x4 |
33 |G (QFP100) |
34 |A |
35 | |
36 |5 |
37 |6 |
38 | 315-5294 315-5292 315-5293 |
39 | (QFP100) (QFP160) 32MHz (QFP160) |
40 | MB81C78A-45 |
41 |-| MB81C78A-45 M5M4464-12 x4 MB81461-12 x6 |
42 | |
43 |-| YM3012 |
44 | |
45 | 315-5242 HM65256 HM65256 HM65256 M5M4464-12 x4 MB81461-12 x6 |
46 | (QFP44) HM65256 HM65256 HM65256 |
47 |-------------------------------------------------------------------------------|
48
49
50 Floppy Controller PCB Layout
51 ----------------------------
52
53
54 837-6443 ___________
55 |---------------| DATA |-- ||||---|
56 | PWR |
57 | 74LS367 74LS05 |
58 | 74LS367 74LS174 |
59 | MB4107 74LS05 |
60 | |
61 | MB89311 74LS139 8MHz |
62 | CN1 |
63 | --------------------------| |
64 | |-------------------------- |
65 |--------------------------------------|
66
67
68 Notes:
69 68000 clock: 10.000MHz
70 Hitachi FD1094 clock: 10.000MHz
71 YM2151 clock: 4.000MHz
72 VSync: 58Hz
73 HSync: 24.33kHz (game requires 24kHz monitor)
74 CN2 (Above PCB): Connector for ROM Board (Not used for Gain Ground)
75 CN2 (Below PCB): Connector for Floppy Controller Board
76 PCB Pinout same as System 16
77 Floppy Drive is a standard 1.44 High Density drive, but the controller
78 is custom and the floppy disk format is custom. The floppy disk can be read with "Anadisk"
79 depending on the PC being used and its floppy controller. Mostly, PC's can't read the System 24
80 floppies even with "Anadisk"[1]
81
82 [1] Actually, most can _except_ for the hotrod disks. Those 8K sectors are deadly.
83 */
84
85
86 /* system24temp_ functions / variables are from shared rewrite files,
87 once the rest of the rewrite is complete they can be removed, I
88 just made a copy & renamed them for now to avoid any conflicts
89 */
90
91 #include "driver.h"
92 #include "vidhrdw/generic.h"
93 #include "cpu/m68000/m68k.h"
94 #include "system24.h"
95 #include "system16.h"
96 #include "vidhrdw/segaic24.h"
97 #include "sound/ym2151.h"
98
99 VIDEO_START(system24);
100 VIDEO_UPDATE(system24);
101
102
103 /* Floppy Fisk Controller*/
104
105 static int fdc_status, fdc_track, fdc_sector, fdc_data;
106 static int fdc_phys_track, fdc_irq, fdc_drq, fdc_span, fdc_index_count;
107 static unsigned char *fdc_pt;
108 static int track_size;
109
fdc_init(void)110 static void fdc_init(void)
111 {
112 fdc_status = 0;
113 fdc_track = 0;
114 fdc_sector = 0;
115 fdc_data = 0;
116 fdc_phys_track = 0;
117 fdc_irq = 0;
118 fdc_drq = 0;
119 fdc_index_count = 0;
120 }
121
READ16_HANDLER(fdc_r)122 static READ16_HANDLER( fdc_r )
123 {
124 if(!track_size)
125 return 0xffff;
126
127 switch(offset) {
128 case 0:
129 fdc_irq = 0;
130 return fdc_status;
131 case 1:
132 return fdc_track;
133 case 2:
134 return fdc_sector;
135 case 3:
136 default: {
137 int res = fdc_data;
138 if(fdc_drq) {
139 fdc_span--;
140 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "Read %02x (%d)\n", res, fdc_span);*/
141 if(fdc_span) {
142 fdc_pt++;
143 fdc_data = *fdc_pt;
144 } else {
145 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: transfert complete\n");
146 fdc_drq = 0;
147 fdc_status = 0;
148 fdc_irq = 1;
149 }
150 } else
151 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: data read with drq down\n");
152 return res;
153 }
154 }
155 }
156
WRITE16_HANDLER(fdc_w)157 static WRITE16_HANDLER( fdc_w )
158 {
159 if(!track_size)
160 return;
161
162 if(ACCESSING_LSB) {
163 data &= 0xff;
164 switch(offset) {
165 case 0:
166 fdc_irq = 0;
167 switch(data >> 4) {
168 case 0x0:
169 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Restore\n");
170 fdc_phys_track = fdc_track = 0;
171 fdc_irq = 1;
172 fdc_status = 4;
173 break;
174 case 0x1:
175 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Seek %d\n", fdc_data);
176 fdc_phys_track = fdc_track = fdc_data;
177 fdc_irq = 1;
178 fdc_status = fdc_track ? 0 : 4;
179 break;
180 case 0x9:
181 log_cb(RETRO_LOG_DEBUG, LOGPRE "Read multiple [%02x] %d..%d side %d track %d\n", data, fdc_sector, fdc_sector+fdc_data-1, data & 8 ? 1 : 0, fdc_phys_track);
182 fdc_pt = memory_region(REGION_USER2) + track_size*(2*fdc_phys_track+(data & 8 ? 1 : 0));
183 fdc_span = track_size;
184 fdc_status = 3;
185 fdc_drq = 1;
186 fdc_data = *fdc_pt;
187 break;
188 case 0xb:
189 log_cb(RETRO_LOG_DEBUG, LOGPRE "Write multiple [%02x] %d..%d side %d track %d\n", data, fdc_sector, fdc_sector+fdc_data-1, data & 8 ? 1 : 0, fdc_phys_track);
190 fdc_pt = memory_region(REGION_USER2) + track_size*(2*fdc_phys_track+(data & 8 ? 1 : 0));
191 fdc_span = track_size;
192 fdc_status = 3;
193 fdc_drq = 1;
194 break;
195 case 0xd:
196 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Forced interrupt\n");
197 fdc_span = 0;
198 fdc_drq = 0;
199 fdc_irq = data & 1;
200 fdc_status = 0;
201 break;
202 case 0xf:
203 if(data == 0xfe)
204 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Assign mode %02x\n", fdc_data);
205 else if(data == 0xfd)
206 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Assign parameter %02x\n", fdc_data);
207 else
208 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Unknown command %02x\n", data);
209 break;
210 default:
211 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Unknown command %02x\n", data);
212 break;
213 }
214 break;
215 case 1:
216 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Track register %02x\n", data);
217 fdc_track = data;
218 break;
219 case 2:
220 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Sector register %02x\n", data);
221 fdc_sector = data;
222 break;
223 case 3:
224 if(fdc_drq) {
225 /* log_cb(RETRO_LOG_DEBUG, LOGPRE "Write %02x (%d)\n", data, fdc_span);*/
226 *fdc_pt++ = data;
227 fdc_span--;
228 if(!fdc_span) {
229 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: transfert complete\n");
230 fdc_drq = 0;
231 fdc_status = 0;
232 fdc_irq = 1;
233 }
234 } else
235 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC: Data register %02x\n", data);
236 fdc_data = data;
237 break;
238 }
239 }
240 }
241
READ16_HANDLER(fdc_status_r)242 static READ16_HANDLER( fdc_status_r )
243 {
244 if(!track_size)
245 return 0xffff;
246
247 return 0x90 | (fdc_irq ? 2 : 0) | (fdc_drq ? 1 : 0) | (fdc_phys_track ? 0x40 : 0) | (fdc_index_count ? 0x20 : 0);
248 }
249
WRITE16_HANDLER(fdc_ctrl_w)250 static WRITE16_HANDLER( fdc_ctrl_w )
251 {
252 if(ACCESSING_LSB)
253 log_cb(RETRO_LOG_DEBUG, LOGPRE "FDC control %02x\n", data & 0xff);
254 }
255
256
257 /* I/O Mappers*/
258
hotrod_io_r(int port)259 static UINT8 hotrod_io_r(int port)
260 {
261 switch(port) {
262 case 0:
263 return readinputport(0);
264 case 1:
265 return readinputport(1);
266 case 2:
267 return 0xff;
268 case 3:
269 return 0xff;
270 case 4:
271 return readinputport(2);
272 case 5: /* Dip switches*/
273 return readinputport(3);
274 case 6:
275 return readinputport(4);
276 case 7: /* DAC*/
277 return 0xff;
278 }
279 return 0x00;
280 }
281
dcclub_io_r(int port)282 static UINT8 dcclub_io_r(int port)
283 {
284 switch(port) {
285 case 0: {
286 static UINT8 pos[16] = { 0, 1, 3, 2, 6, 4, 12, 8, 9 };
287 return (readinputport(0) & 0xf) | ((~pos[readinputport(5)>>4]<<4) & 0xf0);
288 }
289 case 1:
290 return readinputport(1);
291 case 2:
292 return 0xff;
293 case 3:
294 return 0xff;
295 case 4:
296 return readinputport(2);
297 case 5: /* Dip switches*/
298 return readinputport(3);
299 case 6:
300 return readinputport(4);
301 case 7: /* DAC*/
302 return 0xff;
303 }
304 return 0x00;
305 }
306
307 static int cur_input_line;
308
mahmajn_io_r(int port)309 static UINT8 mahmajn_io_r(int port)
310 {
311 switch(port) {
312 case 0:
313 return ~(1 << cur_input_line);
314 case 1:
315 return 0xff;
316 case 2:
317 return readinputport(cur_input_line);
318 case 3:
319 return 0xff;
320 case 4:
321 return readinputport(8);
322 case 5: /* Dip switches*/
323 return readinputport(9);
324 case 6:
325 return readinputport(10);
326 case 7: /* DAC*/
327 return 0xff;
328 }
329 return 0x00;
330 }
331
mahmajn_io_w(int port,UINT8 data)332 static void mahmajn_io_w(int port, UINT8 data)
333 {
334 switch(port) {
335 case 3:
336 if(data & 4)
337 cur_input_line = (cur_input_line + 1) & 7;
338 break;
339 case 7: /* DAC*/
340 DAC_0_signed_data_w(0, data);
341 break;
342 default:
343 fprintf(stderr, "Port %d : %02x\n", port, data & 0xff);
344 }
345 }
346
hotrod_io_w(int port,UINT8 data)347 static void hotrod_io_w(int port, UINT8 data)
348 {
349 switch(port) {
350 case 3: /* Lamps*/
351 break;
352 case 7: /* DAC*/
353 DAC_0_signed_data_w(0, data);
354 break;
355 default:
356 fprintf(stderr, "Port %d : %02x\n", port, data & 0xff);
357 }
358 }
359
360 static UINT8 hotrod_ctrl_cur;
361
WRITE16_HANDLER(hotrod3_ctrl_w)362 static WRITE16_HANDLER( hotrod3_ctrl_w )
363 {
364 if(ACCESSING_LSB) {
365 data &= 3;
366 if(data == 3)
367 hotrod_ctrl_cur = 0;
368 else
369 hotrod_ctrl_cur = readinputport(8+data);
370 }
371 }
372
READ16_HANDLER(hotrod3_ctrl_r)373 static READ16_HANDLER( hotrod3_ctrl_r )
374 {
375 if(ACCESSING_LSB) {
376 switch(offset) {
377 /* Steering dials*/
378 case 0:
379 return readinputport(5) & 0xff;
380 case 1:
381 return readinputport(5) >> 8;
382 case 2:
383 return readinputport(6) & 0xff;
384 case 3:
385 return readinputport(6) >> 8;
386 case 4:
387 return readinputport(7) & 0xff;
388 case 5:
389 return readinputport(7) >> 8;
390
391 case 6:
392 return 0xff;
393 case 7:
394 return 0xff;
395
396 case 8: { /* Serial ADCs for the accel*/
397 int v = hotrod_ctrl_cur & 0x80;
398 hotrod_ctrl_cur <<= 1;
399 return v ? 0xff : 0;
400 }
401 }
402 }
403 return 0;
404 }
405
READ16_HANDLER(iod_r)406 static READ16_HANDLER( iod_r )
407 {
408 log_cb(RETRO_LOG_DEBUG, LOGPRE "IO daughterboard read %02x (%x)\n", offset, activecpu_get_pc());
409 return 0xffff;
410 }
411
WRITE16_HANDLER(iod_w)412 static WRITE16_HANDLER( iod_w )
413 {
414 log_cb(RETRO_LOG_DEBUG, LOGPRE "IO daughterboard write %02x, %04x & %04x (%x)\n", offset, data, mem_mask, activecpu_get_pc());
415 }
416
417
418 /* Cpu #1 reset control*/
419
420 static unsigned char resetcontrol, prev_resetcontrol;
421
reset_reset(void)422 static void reset_reset(void)
423 {
424 int changed = resetcontrol ^ prev_resetcontrol;
425 if(changed & 2) {
426 if(resetcontrol & 2) {
427 cpu_set_halt_line(1, CLEAR_LINE);
428 cpu_set_reset_line(1, PULSE_LINE);
429 } else
430 cpu_set_halt_line(1, ASSERT_LINE);
431 }
432 if(changed & 4)
433 YM2151ResetChip(0);
434 prev_resetcontrol = resetcontrol;
435 }
436
resetcontrol_w(UINT8 data)437 static void resetcontrol_w(UINT8 data)
438 {
439 resetcontrol = data;
440 log_cb(RETRO_LOG_DEBUG, LOGPRE "Reset control %02x (%x:%x)\n", resetcontrol, cpu_getactivecpu(), activecpu_get_pc());
441 reset_reset();
442 }
443
444
445 /* Rom board bank access*/
446
447 static unsigned char curbank;
448 static const UINT16 *rom_base;
449
reset_bank(void)450 static void reset_bank(void)
451 {
452 rom_base = (UINT16 *)(memory_region(REGION_USER1) + curbank * 0x40000);
453 }
454
READ16_HANDLER(curbank_r)455 static READ16_HANDLER( curbank_r )
456 {
457 return curbank;
458 }
459
WRITE16_HANDLER(curbank_w)460 static WRITE16_HANDLER( curbank_w )
461 {
462 if(ACCESSING_LSB) {
463 curbank = data & 0xff;
464 reset_bank();
465 }
466 }
467
468
READ16_HANDLER(rombank_r)469 static READ16_HANDLER(rombank_r)
470 {
471 return rom_base[offset];
472 }
473
474
475 /* Shared banks access*/
476
477 static UINT16 *ramlo, *ramhi, *ramprg;
478
READ16_HANDLER(ramlo_r)479 static READ16_HANDLER( ramlo_r )
480 {
481 return ramlo[offset];
482 }
483
WRITE16_HANDLER(ramlo_w)484 static WRITE16_HANDLER( ramlo_w )
485 {
486 COMBINE_DATA(ramlo+offset);
487 }
488
READ16_HANDLER(ramhi_r)489 static READ16_HANDLER( ramhi_r )
490 {
491 return ramhi[offset];
492 }
493
WRITE16_HANDLER(ramhi_w)494 static WRITE16_HANDLER( ramhi_w )
495 {
496 COMBINE_DATA(ramhi+offset);
497 }
498
READ16_HANDLER(ramprg_r)499 static READ16_HANDLER( ramprg_r )
500 {
501 return ramprg[offset];
502 }
503
WRITE16_HANDLER(ramprg_w)504 static WRITE16_HANDLER( ramprg_w )
505 {
506 COMBINE_DATA(ramprg+offset);
507 }
508
READ16_HANDLER(rom_r)509 static READ16_HANDLER( rom_r )
510 {
511 return ((UINT16 *)memory_region(REGION_CPU1))[offset];
512 }
513
514
515 /* YM2151*/
516
READ16_HANDLER(ym_status_r)517 static READ16_HANDLER( ym_status_r )
518 {
519 return YM2151_status_port_0_r(0);
520 }
521
WRITE16_HANDLER(ym_register_w)522 static WRITE16_HANDLER( ym_register_w )
523 {
524 if(ACCESSING_LSB)
525 YM2151_register_port_0_w(0, data);
526 }
527
WRITE16_HANDLER(ym_data_w)528 static WRITE16_HANDLER( ym_data_w )
529 {
530 if(ACCESSING_LSB)
531 YM2151_data_port_0_w(0, data);
532 }
533
534
535 /* Protection magic latch*/
536
537 static UINT8 mahmajn_mlt[8] = { 5, 1, 6, 2, 3, 7, 4, 0 };
538 static UINT8 mahmajn2_mlt[8] = { 6, 0, 5, 3, 1, 4, 2, 7 };
539 static UINT8 gqh_mlt[8] = { 3, 7, 4, 0, 2, 6, 5, 1 };
540 static UINT8 bnzabros_mlt[8] = { 2, 4, 0, 5, 7, 3, 1, 6 };
541 static UINT8 qrouka_mlt[8] = { 1, 6, 4, 7, 0, 5, 3, 2 };
542 static UINT8 quizmeku_mlt[8] = { 0, 3, 2, 4, 6, 1, 7, 5 };
543 static UINT8 dcclub_mlt[8] = { 4, 3, 7, 0, 2, 6, 1, 5 };
544
545 static UINT8 mlatch;
546 static const unsigned char *mlatch_table;
547
READ16_HANDLER(mlatch_r)548 static READ16_HANDLER( mlatch_r )
549 {
550 return mlatch;
551 }
552
WRITE16_HANDLER(mlatch_w)553 static WRITE16_HANDLER( mlatch_w )
554 {
555 if(ACCESSING_LSB) {
556 int i;
557 unsigned char mxor = 0;
558 if(!mlatch_table) {
559 log_cb(RETRO_LOG_DEBUG, LOGPRE "Protection: magic latch accessed but no table loaded (%d:%x)\n", cpu_getactivecpu(), activecpu_get_pc());
560 return;
561 }
562
563 data &= 0xff;
564
565 if(data != 0xff) {
566 for(i=0; i<8; i++)
567 if(mlatch & (1<<i))
568 mxor |= 1 << mlatch_table[i];
569 mlatch = data ^ mxor;
570 log_cb(RETRO_LOG_DEBUG, LOGPRE "Magic latching %02x ^ %02x as %02x (%d:%x)\n", data & 0xff, mxor, mlatch, cpu_getactivecpu(), activecpu_get_pc());
571 } else {
572 log_cb(RETRO_LOG_DEBUG, LOGPRE "Magic latch reset (%d:%x)\n", cpu_getactivecpu(), activecpu_get_pc());
573 mlatch = 0x00;
574 }
575 }
576 }
577
578
579 /* Timers and IRQs*/
580
581 enum {
582 IRQ_YM2151 = 1,
583 IRQ_TIMER = 2,
584 IRQ_VBLANK = 3,
585 IRQ_SPRITE = 4
586 };
587
588 static UINT16 irq_timera;
589 static UINT8 irq_timerb;
590 static UINT8 irq_allow0, irq_allow1;
591 static int irq_timer_pend0, irq_timer_pend1, irq_yms;
592 static void *irq_timer;
593
irq_timer_cb(int param)594 static void irq_timer_cb(int param)
595 {
596 irq_timer_pend0 = irq_timer_pend1 = 1;
597 if(irq_allow0 & (1 << IRQ_TIMER))
598 cpu_set_irq_line(0, IRQ_TIMER+1, ASSERT_LINE);
599 if(irq_allow1 & (1 << IRQ_TIMER))
600 cpu_set_irq_line(1, IRQ_TIMER+1, ASSERT_LINE);
601 }
602
irq_init(void)603 static void irq_init(void)
604 {
605 irq_timera = 0;
606 irq_timerb = 0;
607 irq_allow0 = 0;
608 irq_allow1 = 0;
609 irq_timer_pend0 = 0;
610 irq_timer_pend1 = 0;
611 irq_timer = timer_alloc(irq_timer_cb);
612 }
613
irq_timer_reset(void)614 static void irq_timer_reset(void)
615 {
616 int freq = (irq_timerb << 12) | irq_timera;
617 freq &= 0x1fff;
618
619 timer_adjust(irq_timer, TIME_IN_HZ(freq), 0, TIME_IN_HZ(freq));
620 log_cb(RETRO_LOG_DEBUG, LOGPRE "New timer frequency: %0d [%02x %04x]\n", freq, irq_timerb, irq_timera);
621 }
622
WRITE16_HANDLER(irq_w)623 static WRITE16_HANDLER(irq_w)
624 {
625 switch(offset) {
626 case 0: {
627 UINT16 old_ta = irq_timera;
628 COMBINE_DATA(&irq_timera);
629 if(old_ta != irq_timera)
630 irq_timer_reset();
631 break;
632 }
633 case 1:
634 if(ACCESSING_LSB) {
635 UINT8 old_tb = irq_timerb;
636 irq_timerb = data;
637 if(old_tb != irq_timerb)
638 irq_timer_reset();
639 }
640 break;
641 case 2:
642 irq_allow0 = data;
643 cpu_set_irq_line(0, IRQ_TIMER+1, irq_timer_pend0 && (irq_allow0 & (1 << IRQ_TIMER)) ? ASSERT_LINE : CLEAR_LINE);
644 cpu_set_irq_line(0, IRQ_YM2151+1, irq_yms && (irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
645 break;
646 case 3:
647 irq_allow1 = data;
648 cpu_set_irq_line(1, IRQ_TIMER+1, irq_timer_pend1 && (irq_allow1 & (1 << IRQ_TIMER)) ? ASSERT_LINE : CLEAR_LINE);
649 cpu_set_irq_line(1, IRQ_YM2151+1, irq_yms && (irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
650 break;
651 }
652 }
653
READ16_HANDLER(irq_r)654 static READ16_HANDLER(irq_r)
655 {
656 switch(offset) {
657 case 2:
658 irq_timer_pend0 = 0;
659 cpu_set_irq_line(0, IRQ_TIMER+1, CLEAR_LINE);
660 break;
661 case 3:
662 irq_timer_pend1 = 0;
663 cpu_set_irq_line(1, IRQ_TIMER+1, CLEAR_LINE);
664 break;
665 }
666 return 0xffff;
667 }
668
INTERRUPT_GEN(irq_vbl)669 static INTERRUPT_GEN(irq_vbl)
670 {
671 int irq = cpu_getiloops() ? IRQ_SPRITE : IRQ_VBLANK;
672 int mask = 1 << irq;
673
674 if(irq_allow0 & mask)
675 cpu_set_irq_line(0, 1+irq, HOLD_LINE);
676
677 if(irq_allow1 & mask)
678 cpu_set_irq_line(1, 1+irq, HOLD_LINE);
679
680 if(!cpu_getiloops()) {
681 /* Ensure one index pulse every 20 frames*/
682 /* The is some code in bnzabros at 0x852 that makes it crash*/
683 /* if the pulse train is too fast*/
684 fdc_index_count++;
685 if(fdc_index_count >= 20)
686 fdc_index_count = 0;
687 }
688 }
689
irq_ym(int irq)690 static void irq_ym(int irq)
691 {
692 irq_yms = irq;
693 cpu_set_irq_line(0, IRQ_YM2151+1, irq_yms && (irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
694 cpu_set_irq_line(1, IRQ_YM2151+1, irq_yms && (irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
695 }
696
697
698
MEMORY_READ16_START(system24_readmem)699 static MEMORY_READ16_START( system24_readmem )
700 { 0x000000, 0x03ffff, MRA16_ROM },
701 { 0x040000, 0x07ffff, rom_r },
702 { 0x080000, 0x0fffff, MRA16_RAM },
703 { 0x100000, 0x13ffff, rom_r },
704 { 0x140000, 0x17ffff, rom_r },
705 { 0x200000, 0x20ffff, sys24_tile_r },
706 { 0x280000, 0x29ffff, sys24_char_r },
707 { 0x400000, 0x403fff, MRA16_RAM },
708 { 0x404000, 0x40401f, sys24_mixer_r },
709 { 0x600000, 0x63ffff, sys24_sprite_r },
710 { 0x800000, 0x80007f, system24temp_sys16_io_r },
711 { 0x800102, 0x800103, ym_status_r },
712 { 0xa00000, 0xa00007, irq_r },
713
714 { 0xb00000, 0xb00007, fdc_r },
715 { 0xb00008, 0xb0000f, fdc_status_r },
716
717 { 0xb80000, 0xbbffff, rombank_r },
718 { 0xbc0000, 0xbc0001, curbank_r },
719 { 0xbc0006, 0xbc0007, mlatch_r },
720
721 { 0xc00000, 0xc00011, hotrod3_ctrl_r },
722
723 { 0xc80000, 0xcbffff, rombank_r },
724 { 0xcc0000, 0xcc0001, curbank_r },
725 { 0xcc0006, 0xcc0007, mlatch_r },
726
727 { 0xf00000, 0xf3ffff, ramprg_r },
728 { 0xfc0000, 0xffffff, MRA16_RAM },
729 MEMORY_END
730
731 static MEMORY_WRITE16_START( system24_writemem )
732 { 0x000000, 0x03ffff, MWA16_ROM },
733 { 0x080000, 0x0fffff, MWA16_RAM, &ramlo },
734 { 0x200000, 0x20ffff, sys24_tile_w },
735 { 0x220000, 0x220001, MWA16_NOP }, /* Unknown, always 0*/
736 { 0x240000, 0x240001, MWA16_NOP }, /* Horizontal synchronization register*/
737 { 0x260000, 0x260001, MWA16_NOP }, /* Vertical synchronization register*/
738 { 0x270000, 0x270001, MWA16_NOP }, /* Video synchronization switch*/
739 { 0x280000, 0x29ffff, sys24_char_w },
740 { 0x400000, 0x403fff, system24temp_sys16_paletteram1_w, &paletteram16 },
741 { 0x404000, 0x40401f, sys24_mixer_w },
742 { 0x600000, 0x63ffff, sys24_sprite_w },
743 { 0x800000, 0x80007f, system24temp_sys16_io_w },
744 { 0x800100, 0x800101, ym_register_w },
745 { 0x800102, 0x800103, ym_data_w },
746 { 0xa00000, 0xa00007, irq_w },
747
748 { 0xb00000, 0xb00007, fdc_w },
749 { 0xb00008, 0xb0000f, fdc_ctrl_w },
750
751 { 0xbc0000, 0xbc0001, curbank_w },
752 { 0xbc0006, 0xbc0007, mlatch_w },
753
754 { 0xc00010, 0xc00011, hotrod3_ctrl_w },
755
756 { 0xcc0000, 0xcc0001, curbank_w },
757 { 0xcc0006, 0xcc0007, mlatch_w },
758
759 { 0xd00300, 0xd00301, MWA16_NOP },
760 { 0xf00000, 0xf3ffff, ramprg_w },
761 { 0xfc0000, 0xffffff, MWA16_RAM, &ramhi },
762 MEMORY_END
763
764 static MEMORY_READ16_START( system24_readmem2 )
765 { 0x000000, 0x03ffff, MRA16_RAM },
766 { 0x040000, 0x07ffff, rom_r },
767 { 0x080000, 0x0fffff, ramlo_r },
768 { 0x100000, 0x13ffff, rom_r },
769 { 0x140000, 0x17ffff, rom_r },
770 { 0x200000, 0x20ffff, sys24_tile_r },
771 { 0x280000, 0x29ffff, sys24_char_r },
772 { 0x400000, 0x403fff, paletteram16_word_r },
773 { 0x404000, 0x40401f, sys24_mixer_r },
774 { 0x600000, 0x63ffff, sys24_sprite_r },
775 { 0x800000, 0x80007f, system24temp_sys16_io_r },
776 { 0x800102, 0x800103, ym_status_r },
777 { 0xa00000, 0xa00007, irq_r },
778
779 { 0xb80000, 0xbbffff, rombank_r },
780 { 0xbc0000, 0xbc0001, curbank_r },
781 { 0xbc0006, 0xbc0007, mlatch_r },
782
783 { 0xc00000, 0xc00011, hotrod3_ctrl_r },
784
785 { 0xc80000, 0xcbffff, rombank_r },
786 { 0xcc0000, 0xcc0001, curbank_r },
787 { 0xcc0006, 0xcc0007, mlatch_r },
788
789 { 0xf00000, 0xf3ffff, ramprg_r },
790 { 0xfc0000, 0xffffff, ramhi_r },
791 MEMORY_END
792
793 static MEMORY_WRITE16_START( system24_writemem2 )
794 { 0x000000, 0x03ffff, MWA16_RAM, &ramprg },
795 { 0x080000, 0x0fffff, ramlo_w },
796 { 0x200000, 0x20ffff, sys24_tile_w },
797 { 0x220000, 0x220001, MWA16_NOP }, /* Unknown, always 0*/
798 { 0x240000, 0x240001, MWA16_NOP }, /* Horizontal synchronization register*/
799 { 0x260000, 0x260001, MWA16_NOP }, /* Vertical synchronization register*/
800 { 0x270000, 0x270001, MWA16_NOP }, /* Video synchronization switch*/
801 { 0x280000, 0x29ffff, sys24_char_w },
802 { 0x400000, 0x403fff, system24temp_sys16_paletteram1_w },
803 { 0x404000, 0x40401f, sys24_mixer_w },
804 { 0x600000, 0x63ffff, sys24_sprite_w },
805 { 0x800000, 0x80007f, system24temp_sys16_io_w },
806 { 0x800100, 0x800101, ym_register_w },
807 { 0x800102, 0x800103, ym_data_w },
808 { 0xa00000, 0xa00007, irq_w },
809 { 0xbc0000, 0xbc0001, curbank_w },
810 { 0xbc0006, 0xbc0007, mlatch_w },
811 { 0xc00010, 0xc00011, hotrod3_ctrl_w },
812 { 0xcc0000, 0xcc0001, curbank_w },
813 { 0xcc0006, 0xcc0007, mlatch_w },
814 { 0xd00300, 0xd00301, MWA16_NOP },
815 { 0xf00000, 0xf3ffff, ramprg_w },
816 { 0xfc0000, 0xffffff, ramhi_w },
817 MEMORY_END
818
819 static DRIVER_INIT(qgh)
820 {
821 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
822 mlatch_table = gqh_mlt;
823 track_size = 0;
824 }
825
DRIVER_INIT(dcclub)826 static DRIVER_INIT(dcclub)
827 {
828 system24temp_sys16_io_set_callbacks(dcclub_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
829 mlatch_table = dcclub_mlt;
830 track_size = 0;
831 }
832
DRIVER_INIT(qrouka)833 static DRIVER_INIT(qrouka)
834 {
835 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
836 mlatch_table = qrouka_mlt;
837 track_size = 0;
838 }
839
DRIVER_INIT(quizmeku)840 static DRIVER_INIT(quizmeku)
841 {
842 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
843 mlatch_table = quizmeku_mlt;
844 track_size = 0;
845 }
846
DRIVER_INIT(mahmajn)847 static DRIVER_INIT(mahmajn)
848 {
849
850 system24temp_sys16_io_set_callbacks(mahmajn_io_r, mahmajn_io_w, resetcontrol_w, iod_r, iod_w);
851 mlatch_table = mahmajn_mlt;
852 track_size = 0;
853 cur_input_line = 0;
854 }
855
DRIVER_INIT(mahmajn2)856 static DRIVER_INIT(mahmajn2)
857 {
858
859 system24temp_sys16_io_set_callbacks(mahmajn_io_r, mahmajn_io_w, resetcontrol_w, iod_r, iod_w);
860 mlatch_table = mahmajn2_mlt;
861 track_size = 0;
862 cur_input_line = 0;
863 }
864
DRIVER_INIT(hotrod)865 static DRIVER_INIT(hotrod)
866 {
867 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
868 mlatch_table = 0;
869
870 /* Sector Size*/
871 /* 1 8192*/
872 /* 2 1024*/
873 /* 3 1024*/
874 /* 4 1024*/
875 /* 5 512*/
876 /* 6 256*/
877
878 track_size = 0x2f00;
879 }
880
DRIVER_INIT(bnzabros)881 static DRIVER_INIT(bnzabros)
882 {
883 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
884 mlatch_table = bnzabros_mlt;
885
886 /* Sector Size*/
887 /* 1 2048*/
888 /* 2 2048*/
889 /* 3 2048*/
890 /* 4 2048*/
891 /* 5 2048*/
892 /* 6 1024*/
893 /* 7 256*/
894
895 track_size = 0x2d00;
896 }
897
DRIVER_INIT(sspirits)898 static DRIVER_INIT(sspirits)
899 {
900 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
901 mlatch_table = 0;
902 track_size = 0x2d00;
903 }
904
DRIVER_INIT(sgmast)905 static DRIVER_INIT(sgmast)
906 {
907 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
908 mlatch_table = 0;
909 track_size = 0x2d00;
910 }
911
DRIVER_INIT(qsww)912 static DRIVER_INIT(qsww)
913 {
914 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
915 mlatch_table = 0;
916 track_size = 0x2d00;
917 }
918
DRIVER_INIT(gground)919 static DRIVER_INIT(gground)
920 {
921 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
922 mlatch_table = 0;
923 track_size = 0x2d00;
924 }
925
DRIVER_INIT(crkdown)926 static DRIVER_INIT(crkdown)
927 {
928 system24temp_sys16_io_set_callbacks(hotrod_io_r, hotrod_io_w, resetcontrol_w, iod_r, iod_w);
929 mlatch_table = 0;
930 track_size = 0x2d00;
931 }
932
NVRAM_HANDLER(system24)933 static NVRAM_HANDLER(system24)
934 {
935 if(!track_size || !file)
936 return;
937 if(read_or_write)
938 mame_fwrite(file, memory_region(REGION_USER2), 2*track_size);
939 else
940 mame_fread(file, memory_region(REGION_USER2), 2*track_size);
941 }
942
MACHINE_INIT(system24)943 static MACHINE_INIT(system24)
944 {
945 cpu_set_halt_line(1, ASSERT_LINE);
946 prev_resetcontrol = resetcontrol = 0x06;
947 fdc_init();
948 curbank = 0;
949 reset_bank();
950 irq_init();
951 mlatch = 0x00;
952 }
953
954 INPUT_PORTS_START( hotrod )
955 PORT_START
956 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
957 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
958 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
959 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
960 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN4 )
961 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN5 )
962 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN6 )
963 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
964
965 PORT_START
966 PORT_BIT( 0x07, IP_ACTIVE_LOW, IPT_UNKNOWN )
967 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 )
968 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE2 )
969 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE3 )
970 PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
971
972 PORT_START
973 PORT_BIT( 0x03, IP_ACTIVE_LOW, IPT_UNKNOWN )
974 PORT_BITX(0x04, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
975 PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNKNOWN )
976
977 SYS16_COINAGE
978
979 PORT_START
980 PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
981 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
982 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
983 PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) )
984 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
985 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
986 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) )
987 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
988 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
989 PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) )
990 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
991 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
992 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
993 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
994 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
995 PORT_DIPNAME( 0x20, 0x20, "Start Credit" )
996 PORT_DIPSETTING( 0x20, "1" )
997 PORT_DIPSETTING( 0x00, "2" )
998 PORT_DIPNAME( 0x40, 0x40, "Coin Chute" )
999 PORT_DIPSETTING( 0x40, "Common" )
1000 PORT_DIPSETTING( 0x00, "Individual" )
1001 PORT_DIPNAME( 0x80, 0x80, "Monitor flip" )
1002 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1003 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1004
1005 PORT_START
1006 PORT_ANALOG( 0xfff, 0x000, IPT_DIAL | IPF_PLAYER1, 25, 15, 0x000, 0xfff )
1007
1008 PORT_START
1009 PORT_ANALOG( 0xfff, 0x000, IPT_DIAL | IPF_PLAYER2, 25, 15, 0x000, 0xfff )
1010
1011 PORT_START
1012 PORT_ANALOG( 0xfff, 0x000, IPT_DIAL | IPF_PLAYER3, 25, 15, 0x000, 0xfff )
1013
1014 PORT_START
1015 PORT_ANALOG( 0xff, 0x01, IPT_PEDAL | IPF_PLAYER1, 25, 15, 0x01, 0xff )
1016
1017 PORT_START
1018 PORT_ANALOG( 0xff, 0x01, IPT_PEDAL | IPF_PLAYER2, 25, 15, 0x01, 0xff )
1019
1020 PORT_START
1021 PORT_ANALOG( 0xff, 0x01, IPT_PEDAL | IPF_PLAYER3, 25, 15, 0x01, 0xff )
1022 INPUT_PORTS_END
1023
1024 INPUT_PORTS_START( bnzabros )
1025 PORT_START
1026 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1 )
1027 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1028 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1029 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1030 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1031 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1032 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1033 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1034
1035 PORT_START
1036 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER2 )
1037 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1038 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1039 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
1040 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1041 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1042 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1043 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1044
1045 PORT_START
1046 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1047 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1048 PORT_BITX(0x04, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
1049 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 )
1050 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1051 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1052 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1053 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1054
1055 SYS16_COINAGE
1056
1057 PORT_START
1058 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) )
1059 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1060 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1061 PORT_DIPNAME( 0x02, 0x02, "Start Credit" )
1062 PORT_DIPSETTING( 0x02, "1" )
1063 PORT_DIPSETTING( 0x00, "2" )
1064 PORT_DIPNAME( 0x04, 0x04, "Coin Chute" )
1065 PORT_DIPSETTING( 0x04, "Common" )
1066 PORT_DIPSETTING( 0x00, "Individual" )
1067 PORT_DIPNAME( 0x08, 0x08, "Monitor flip" )
1068 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1069 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1070 PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) )
1071 PORT_DIPSETTING( 0x30, "Normal" )
1072 PORT_DIPSETTING( 0x20, "Easy" )
1073 PORT_DIPSETTING( 0x10, "Hard" )
1074 PORT_DIPSETTING( 0x00, "Hardest" )
1075 PORT_DIPNAME( 0xc0, 0xc0, "Initial lives" )
1076 PORT_DIPSETTING( 0xc0, "3" )
1077 PORT_DIPSETTING( 0x80, "4" )
1078 PORT_DIPSETTING( 0x40, "2" )
1079 PORT_DIPSETTING( 0x00, "1" )
1080 INPUT_PORTS_END
1081
1082
1083 INPUT_PORTS_START( qgh )
1084 PORT_START
1085 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1086 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1087 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1088 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
1089 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1090 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1091 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1092 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1093
1094 PORT_START
1095 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1096 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1097 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1098 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
1099 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1100 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1101 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1102 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1103
1104 PORT_START
1105 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1106 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1107 PORT_BITX(0x04, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
1108 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 )
1109 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1110 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1111 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1112 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1113
1114 SYS16_COINAGE
1115
1116 PORT_START
1117 PORT_DIPNAME( 0x01, 0x01, "Monitor flip" )
1118 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1119 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1120 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) )
1121 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1122 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1123 PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) )
1124 PORT_DIPSETTING( 0x0c, "Normal" )
1125 PORT_DIPSETTING( 0x08, "Easy" )
1126 PORT_DIPSETTING( 0x04, "Hard" )
1127 PORT_DIPSETTING( 0x00, "Hard" )
1128 PORT_DIPNAME( 0x30, 0x30, "Initial lives" )
1129 PORT_DIPSETTING( 0x30, "5" )
1130 PORT_DIPSETTING( 0x20, "4" )
1131 PORT_DIPSETTING( 0x10, "3" )
1132 PORT_DIPSETTING( 0x00, "3" )
1133 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
1134 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1135 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1136 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
1137 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1138 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1139 INPUT_PORTS_END
1140
1141 INPUT_PORTS_START( dcclub )
1142 PORT_START
1143 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1 )
1144 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1145 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON4 | IPF_PLAYER1 )
1146 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1147
1148 PORT_START
1149 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
1150
1151 PORT_START
1152 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1153 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1154 PORT_BITX(0x04, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
1155 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 )
1156 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1157 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1158 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1159 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1160
1161 SYS16_COINAGE
1162
1163 PORT_START
1164 PORT_DIPNAME( 0x01, 0x01, "Start Credit" )
1165 PORT_DIPSETTING( 0x01, "1" )
1166 PORT_DIPSETTING( 0x00, "2" )
1167 PORT_DIPNAME( 0x02, 0x02, "Monitor flip" )
1168 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1169 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1170 PORT_DIPNAME( 0x04, 0x00, DEF_STR( Demo_Sounds ) )
1171 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
1172 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1173 PORT_DIPNAME( 0x08, 0x08, "Timing Meter" )
1174 PORT_DIPSETTING( 0x08, "Normal" )
1175 PORT_DIPSETTING( 0x00, "Easy" )
1176 PORT_DIPNAME( 0x10, 0x10, "Initial Balls" )
1177 PORT_DIPSETTING( 0x10, "2" )
1178 PORT_DIPSETTING( 0x00, "1" )
1179 PORT_DIPNAME( 0x20, 0x20, "Balls Limit" )
1180 PORT_DIPSETTING( 0x20, "4" )
1181 PORT_DIPSETTING( 0x00, "3" )
1182 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) )
1183 PORT_DIPSETTING( 0xc0, "Normal" )
1184 PORT_DIPSETTING( 0x80, "Easy" )
1185 PORT_DIPSETTING( 0x40, "Hard" )
1186 PORT_DIPSETTING( 0x00, "Hardest" )
1187
1188 PORT_START
1189 PORT_ANALOG( 0xff, 0x00, IPT_PEDAL | IPF_PLAYER1, 16, 16, 0x00, 0x8f )
1190 INPUT_PORTS_END
1191
1192 INPUT_PORTS_START( quizmeku )
1193 PORT_START
1194 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1195 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
1196 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
1197 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
1198 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER1 )
1199 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER1 )
1200 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER1 )
1201 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER1 )
1202
1203 PORT_START
1204 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1205 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER2 )
1206 PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER2 )
1207 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
1208 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_PLAYER2 )
1209 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_PLAYER2 )
1210 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_PLAYER2 )
1211 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_PLAYER2 )
1212
1213 PORT_START
1214 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1215 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1216 PORT_BITX(0x04, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
1217 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 )
1218 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
1219 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1220 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1221 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1222
1223 SYS16_COINAGE
1224
1225 PORT_START
1226 PORT_DIPNAME( 0x01, 0x01, "Players" )
1227 PORT_DIPSETTING( 0x01, "2P" )
1228 PORT_DIPSETTING( 0x00, "4P" )
1229 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) )
1230 PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
1231 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1232 PORT_DIPNAME( 0x0c, 0x00, "Initial lives" )
1233 PORT_DIPSETTING( 0x0c, "3" )
1234 PORT_DIPSETTING( 0x08, "2" )
1235 PORT_DIPSETTING( 0x04, "4" )
1236 PORT_DIPSETTING( 0x00, "5" )
1237 PORT_DIPNAME( 0x10, 0x10, "Answer Counts" )
1238 PORT_DIPSETTING( 0x10, "Every" )
1239 PORT_DIPSETTING( 0x00, "3" )
1240 PORT_DIPNAME( 0x20, 0x20, "Monitor flip" )
1241 PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
1242 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1243 PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) )
1244 PORT_DIPSETTING( 0xc0, "Normal" )
1245 PORT_DIPSETTING( 0x80, "Easy" )
1246 PORT_DIPSETTING( 0x40, "Hard" )
1247 PORT_DIPSETTING( 0x00, "Hardest" )
1248 INPUT_PORTS_END
1249
1250 INPUT_PORTS_START( mahmajn )
1251 PORT_START
1252 PORT_BITX(0x01, IP_ACTIVE_LOW, 0, "A", KEYCODE_A, IP_JOY_NONE )
1253 PORT_BITX(0x02, IP_ACTIVE_LOW, 0, "B", KEYCODE_B, IP_JOY_NONE )
1254 PORT_BITX(0x04, IP_ACTIVE_LOW, 0, "C", KEYCODE_C, IP_JOY_NONE )
1255 PORT_BITX(0x08, IP_ACTIVE_LOW, 0, "D", KEYCODE_D, IP_JOY_NONE )
1256 PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
1257
1258 PORT_START
1259 PORT_BITX(0x01, IP_ACTIVE_LOW, 0, "E", KEYCODE_E, IP_JOY_NONE )
1260 PORT_BITX(0x02, IP_ACTIVE_LOW, 0, "F", KEYCODE_F, IP_JOY_NONE )
1261 PORT_BITX(0x04, IP_ACTIVE_LOW, 0, "G", KEYCODE_G, IP_JOY_NONE )
1262 PORT_BITX(0x08, IP_ACTIVE_LOW, 0, "H", KEYCODE_H, IP_JOY_NONE )
1263 PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
1264
1265 PORT_START
1266 PORT_BITX(0x01, IP_ACTIVE_LOW, 0, "I", KEYCODE_I, IP_JOY_NONE )
1267 PORT_BITX(0x02, IP_ACTIVE_LOW, 0, "J", KEYCODE_J, IP_JOY_NONE )
1268 PORT_BITX(0x04, IP_ACTIVE_LOW, 0, "K", KEYCODE_K, IP_JOY_NONE )
1269 PORT_BITX(0x08, IP_ACTIVE_LOW, 0, "L", KEYCODE_L, IP_JOY_NONE )
1270 PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
1271
1272 PORT_START
1273 PORT_BITX(0x01, IP_ACTIVE_LOW, 0, "M", KEYCODE_M, IP_JOY_NONE )
1274 PORT_BITX(0x02, IP_ACTIVE_LOW, 0, "N", KEYCODE_N, IP_JOY_NONE )
1275 PORT_BITX(0x04, IP_ACTIVE_LOW, 0, "Chi", KEYCODE_SPACE, IP_JOY_NONE )
1276 PORT_BITX(0x08, IP_ACTIVE_LOW, 0, "Pon", KEYCODE_LALT, IP_JOY_NONE )
1277 PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
1278
1279 PORT_START
1280 PORT_BIT (0x01, IP_ACTIVE_LOW, IPT_START1 )
1281 PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
1282
1283 PORT_START
1284 PORT_BITX(0x01, IP_ACTIVE_LOW, 0, "Kan", KEYCODE_LCONTROL, IP_JOY_NONE )
1285 PORT_BITX(0x02, IP_ACTIVE_LOW, 0, "Reach", KEYCODE_LSHIFT, IP_JOY_NONE )
1286 PORT_BITX(0x04, IP_ACTIVE_LOW, 0, "Ron", KEYCODE_Z, IP_JOY_NONE )
1287 PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNUSED )
1288
1289 PORT_START
1290 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
1291
1292 PORT_START
1293 PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
1294
1295 PORT_START
1296 PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
1297 PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
1298 PORT_BITX(0x04, IP_ACTIVE_LOW, IPT_SERVICE, DEF_STR( Service_Mode ), KEYCODE_F2, IP_JOY_NONE )
1299 PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 )
1300 PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
1301 PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
1302 PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
1303 PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
1304
1305 SYS16_COINAGE
1306
1307 PORT_START
1308 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) )
1309 PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
1310 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1311 PORT_DIPNAME( 0x02, 0x02, "Start score" )
1312 PORT_DIPSETTING( 0x02, "3000" )
1313 PORT_DIPSETTING( 0x00, "2000" )
1314 PORT_DIPNAME( 0x0c, 0x0c, "Difficulty (computer)" )
1315 PORT_DIPSETTING( 0x0c, "Normal" )
1316 PORT_DIPSETTING( 0x08, "Easy" )
1317 PORT_DIPSETTING( 0x04, "Hard" )
1318 PORT_DIPSETTING( 0x00, "Hardest" )
1319 PORT_DIPNAME( 0x30, 0x30, "Difficulty (player)" )
1320 PORT_DIPSETTING( 0x30, "Normal" )
1321 PORT_DIPSETTING( 0x20, "Easy" )
1322 PORT_DIPSETTING( 0x10, "Hard" )
1323 PORT_DIPSETTING( 0x00, "Hardest" )
1324 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) )
1325 PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
1326 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1327 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )
1328 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
1329 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1330 INPUT_PORTS_END
1331
1332 ROM_START( hotrod )
1333 ROM_REGION( 0x100000, REGION_CPU1, 0 ) /* 68000 code */
1334 ROM_LOAD16_BYTE( "epr11339.bin", 0x000000, 0x20000, CRC(75130e73) SHA1(e079739f4a3da3807aac570442c5afef1a7d7b0e) )
1335 ROM_LOAD16_BYTE( "epr11338.bin", 0x000001, 0x20000, CRC(7d4a7ff3) SHA1(3d3af04d990d232ba0a8fe155de59bc632a0a461) )
1336
1337 ROM_REGION( 0x1d6000, REGION_USER2, 0)
1338 ROM_LOAD( "ds3-5000-01d_3p_turbo.bin", 0x000000, 0x1d6000, CRC(627e8053) SHA1(d1a95f99078f5a29cccacfb1b30c3c9ead7b605c) )
1339 ROM_END
1340
1341 ROM_START( qgh )
1342 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1343 ROM_LOAD16_BYTE( "16900b", 0x000000, 0x20000, CRC(20d7b7d1) SHA1(345b228c27e5f2fef9a2b8b5f619c59450a070f8) )
1344 ROM_LOAD16_BYTE( "16899b", 0x000001, 0x20000, CRC(397b3ba9) SHA1(1773212cd87dcff840f3953ec368be7e2394faf0) )
1345
1346 ROM_REGION16_BE( 0x400000, REGION_USER1, 0)
1347 ROM_LOAD16_BYTE( "16902a", 0x000000, 0x80000, CRC(d35b7706) SHA1(341bca0af6b6d3f326328a88cdc69c7897b83a0d) )
1348 ROM_LOAD16_BYTE( "16901a", 0x000001, 0x80000, CRC(ab4bcb33) SHA1(8acd73096eb485c6dc83da6adfcc47d5d0f5b7f3) )
1349 ROM_LOAD16_BYTE( "16904", 0x100000, 0x80000, CRC(10987c88) SHA1(66f893690565aed613427421958ebe225a20ad0f) )
1350 ROM_LOAD16_BYTE( "16903", 0x100001, 0x80000, CRC(c19f9e46) SHA1(f1275674a8b44957428d79402f240ca21a34f48d) )
1351 ROM_LOAD16_BYTE( "16906", 0x200000, 0x80000, CRC(99c6773e) SHA1(568570b607d2cbbedb39ceae5bbc479478fae4ca) )
1352 ROM_LOAD16_BYTE( "16905", 0x200001, 0x80000, CRC(3922bbe3) SHA1(4378ca900f96138b5e33265ddac56af7b45afbc8) )
1353 ROM_LOAD16_BYTE( "16908", 0x300000, 0x80000, CRC(407ec20f) SHA1(c8a909d8e9ba024a37a5af6b7920fe7023f80d49) )
1354 ROM_LOAD16_BYTE( "16907", 0x300001, 0x80000, CRC(734b0a82) SHA1(d3fb31c55e79b99040beb7c49faaf2e17b95aa87) )
1355 ROM_END
1356
1357 ROM_START( qrouka )
1358 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1359 ROM_LOAD16_BYTE( "14485", 0x000000, 0x20000, CRC(fc0085f9) SHA1(0250d1e17e19b541b85198ec4207e55bfbd5c32e) )
1360 ROM_LOAD16_BYTE( "14484", 0x000001, 0x20000, CRC(f51c641c) SHA1(3f2fd0be7d58c75e88565393da5e810655413b53) )
1361
1362 ROM_REGION16_BE( 0x200000, REGION_USER1, 0)
1363 ROM_LOAD16_BYTE( "14482", 0x000000, 0x80000, CRC(7a13dd97) SHA1(bfe9950d2cd41f3f866520923c1ed7b8da1990ec) )
1364 ROM_LOAD16_BYTE( "14483", 0x100000, 0x80000, CRC(f3eb51a0) SHA1(6904830ff5e7aa5f016e115572fb6da678896ede) )
1365 ROM_END
1366
1367 ROM_START( mahmajn )
1368 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1369 ROM_LOAD16_BYTE( "epr14813.bin", 0x000000, 0x20000, CRC(ea38cf4b) SHA1(118ab2e0ae20a4db5e619945dfbb3f200de3979c) )
1370 ROM_LOAD16_BYTE( "epr14812.bin", 0x000001, 0x20000, CRC(5a3cb4a7) SHA1(c0f21282140e8e6e927664f5f2b90525ae0207e9) )
1371
1372 ROM_REGION16_BE( 0x400000, REGION_USER1, 0)
1373 ROM_LOAD16_BYTE( "mpr14820.bin", 0x000000, 0x80000, CRC(8d2a03d3) SHA1(b3339bcd101bcfe042e2a1cfdc8baef0a86624df) )
1374 ROM_LOAD16_BYTE( "mpr14819.bin", 0x000001, 0x80000, CRC(e84c4827) SHA1(54741295e1bdca7d0c78eb795a68b92212d43b2e) )
1375 ROM_LOAD16_BYTE( "mpr14822.bin", 0x100000, 0x80000, CRC(7c3dcc51) SHA1(a199c2c71cda44a2c8755074c1007d83c8d45d2d) )
1376 ROM_LOAD16_BYTE( "mpr14821.bin", 0x100001, 0x80000, CRC(bd8dc543) SHA1(fd50b14fa73307a62dc0b522cfedb8b3332c407e) )
1377 ROM_LOAD16_BYTE( "mpr14824.bin", 0x200000, 0x80000, CRC(38311933) SHA1(237d9a8ffe14ba9ec371bb571d7c9e74a93fe1f3) )
1378 ROM_LOAD16_BYTE( "mpr14823.bin", 0x200001, 0x80000, CRC(4c8d4550) SHA1(be8717d4080ce932fc8272ebe54e2b0a60b20edd) )
1379 ROM_LOAD16_BYTE( "mpr14826.bin", 0x300000, 0x80000, CRC(c31b8805) SHA1(b446388c83af2e14300b0c4248470d3a8c504f2c) )
1380 ROM_LOAD16_BYTE( "mpr14825.bin", 0x300001, 0x80000, CRC(191080a1) SHA1(407c1c5fa4c76732e8a444860094542e90a1e8e8) )
1381 ROM_END
1382
1383 ROM_START( mahmajn2 )
1384 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1385 ROM_LOAD16_BYTE( "epr16799.bin", 0x000000, 0x20000, CRC(3a34cf75) SHA1(d22bf6334668af29167cf4244d18f9cd2e7ff7d6) )
1386 ROM_LOAD16_BYTE( "epr16798.bin", 0x000001, 0x20000, CRC(662923fa) SHA1(dcd3964d899d3f34dab22ffcd1a5af895804fae1) )
1387
1388 ROM_REGION16_BE( 0x400000, REGION_USER1, 0)
1389 ROM_LOAD16_BYTE( "mpr16801.bin", 0x000000, 0x80000, CRC(74855a17) SHA1(d2d8e7da7b261e7cb64605284d2c78fbd1465b69) )
1390 ROM_LOAD16_BYTE( "mpr16800.bin", 0x000001, 0x80000, CRC(6dbc1e02) SHA1(cce5734243ff171759cecb5c05c12dc743a25c1d) )
1391 ROM_LOAD16_BYTE( "mpr16803.bin", 0x100000, 0x80000, CRC(9b658dd6) SHA1(eaaae289a3555aa6a92f57eea964dbbf48c5c2a4) )
1392 ROM_LOAD16_BYTE( "mpr16802.bin", 0x100001, 0x80000, CRC(b4723225) SHA1(acb8923c7d9908b1112f8d1f2512f18236915e5d) )
1393 ROM_LOAD16_BYTE( "mpr16805.bin", 0x200000, 0x80000, CRC(d15528df) SHA1(bda1dd5c98867c2e7666380bca0bc7eef8022fbc) )
1394 ROM_LOAD16_BYTE( "mpr16804.bin", 0x200001, 0x80000, CRC(a0de08e2) SHA1(2c36b66e74b88fb076e2eaa250c6d06ee0b4ac88) )
1395 ROM_LOAD16_BYTE( "mpr16807.bin", 0x300000, 0x80000, CRC(816188bb) SHA1(76b2690a6156766a1af94f01f6de1209b7756b2c) )
1396 ROM_LOAD16_BYTE( "mpr16806.bin", 0x300001, 0x80000, CRC(54b353d3) SHA1(40632e4571b44ee215b5a1f7aab9d89c460a5c9e) )
1397 ROM_END
1398
1399 ROM_START( bnzabros )
1400 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1401 ROM_LOAD16_BYTE( "epr12187.ic2", 0x000000, 0x20000, CRC(e83783f3) SHA1(4b3b32df7de85aef9cd77c8a4ffc17e10466b638) )
1402 ROM_LOAD16_BYTE( "epr12186.ic1", 0x000001, 0x20000, CRC(ce76319d) SHA1(0ede61f0700f9161285c768fa97636f0e42b96f8) )
1403
1404 ROM_REGION16_BE( 0x200000, REGION_USER1, 0)
1405 ROM_LOAD16_BYTE( "mpr13188.h2", 0x000000, 0x80000, CRC(d3802294) SHA1(7608e71e8ef398ac24dbf851994253bca5ace625) )
1406 ROM_LOAD16_BYTE( "mpr13187.h1", 0x000001, 0x80000, CRC(e3d8c5f7) SHA1(5b1e8646debee2f2ef272ddd3320b0a17192fbbe) )
1407 ROM_LOAD16_BYTE( "mpr13190.4", 0x100000, 0x40000, CRC(0b4df388) SHA1(340478bba82069ab745d6d8703e6801411fd2fc4) )
1408 ROM_RELOAD ( 0x180000, 0x40000)
1409 ROM_LOAD16_BYTE( "mpr13189.3", 0x100001, 0x40000, CRC(5ea5a2f3) SHA1(514b5446303c50aeb1d6d10d0a3f210da2577e16) )
1410 ROM_RELOAD ( 0x180001, 0x40000)
1411
1412 ROM_REGION( 0x1c2000, REGION_USER2, 0)
1413 ROM_LOAD( "bb-disk.bin", 0x000000, 0x1c2000, CRC(ea7a3302) SHA1(5f92efb2e1135c1f3eeca38ba5789739a22dbd11) )
1414 ROM_END
1415
1416 ROM_START( quizmeku ) /* Quiz Mekuromeku Story*/
1417 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1418 ROM_LOAD16_BYTE( "epr15343.ic2", 0x000000, 0x20000, CRC(c72399a7) SHA1(bfbf0079ea63f89bca4ce9081aed5d5c1d9d169a) )
1419 ROM_LOAD16_BYTE( "epr15342.ic1", 0x000001, 0x20000, CRC(0968ac84) SHA1(4e1170ac123adaec32819754b5075531ff1925fe) )
1420
1421 ROM_REGION16_BE( 0x400000, REGION_USER1, 0)
1422 ROM_LOAD16_BYTE( "epr15345.ic5", 0x000000, 0x80000, CRC(88030b5d) SHA1(d2feeedb9a64c3dc8dd25716209f945d12fa9b53) )
1423 ROM_LOAD16_BYTE( "epr15344.ic4", 0x000001, 0x80000, CRC(dd11b382) SHA1(2b0f49fb307a9aba0f295de64782ee095c557170) )
1424 ROM_LOAD16_BYTE( "mpr15347.ic7", 0x100000, 0x80000, CRC(0472677b) SHA1(93ae57a2817b6b54c99814fca28ef51f7ff5e559) )
1425 ROM_LOAD16_BYTE( "mpr15346.ic6", 0x100001, 0x80000, CRC(746d4d0e) SHA1(7863abe36126684772a4459d5b6f3b24670ec02b) )
1426 ROM_LOAD16_BYTE( "mpr15349.ic9", 0x200000, 0x80000, CRC(770eecf1) SHA1(86cc5b4a325198dc1da1446ecd8e718415b7998a) )
1427 ROM_LOAD16_BYTE( "mpr15348.ic8", 0x200001, 0x80000, CRC(7666e960) SHA1(f3f88d5c8318301a8c73141de60292f8349ac0ce) )
1428 ROM_END
1429
1430 ROM_START( sspirits )
1431 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1432 ROM_LOAD16_BYTE( "epr12187.ic2", 0x000000, 0x20000, CRC(e83783f3) SHA1(4b3b32df7de85aef9cd77c8a4ffc17e10466b638) )
1433 ROM_LOAD16_BYTE( "epr12186.ic1", 0x000001, 0x20000, CRC(ce76319d) SHA1(0ede61f0700f9161285c768fa97636f0e42b96f8) )
1434
1435 ROM_REGION( 0x1c2000, REGION_USER2, 0)
1436 ROM_LOAD( "ss-dump.bin", 0x000000, 0x1c2000, CRC(75d79c0c) SHA1(413ff2c10ce5e74d47da946fdd07eab14af53778) )
1437 ROM_END
1438
1439 ROM_START( sgmast )
1440 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1441 ROM_LOAD16_BYTE( "epr12187.ic2", 0x000000, 0x20000, CRC(e83783f3) SHA1(4b3b32df7de85aef9cd77c8a4ffc17e10466b638) )
1442 ROM_LOAD16_BYTE( "epr12186.ic1", 0x000001, 0x20000, CRC(ce76319d) SHA1(0ede61f0700f9161285c768fa97636f0e42b96f8) )
1443
1444 ROM_REGION( 0x1c2000, REGION_USER2, 0)
1445 ROM_LOAD( "sm-dump.bin", 0x000000, 0x1c2000, CRC(460bdcd5) SHA1(49b7384ac5742b45b7369f220f33f04ef955e992) )
1446 ROM_END
1447
1448 ROM_START( qsww )
1449 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1450 ROM_LOAD16_BYTE( "epr12187.ic2", 0x000000, 0x20000, CRC(e83783f3) SHA1(4b3b32df7de85aef9cd77c8a4ffc17e10466b638) )
1451 ROM_LOAD16_BYTE( "epr12186.ic1", 0x000001, 0x20000, CRC(ce76319d) SHA1(0ede61f0700f9161285c768fa97636f0e42b96f8) )
1452
1453 ROM_REGION( 0x1c2000, REGION_USER2, 0)
1454 ROM_LOAD( "ds3-5000-08b.bin", 0x000000, 0x1c2000, CRC(5a886d38) SHA1(2e974a9ffe3534da4fb117c579b8b0e61a63542c) )
1455 ROM_END
1456
1457 ROM_START( gground )
1458 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1459 ROM_LOAD16_BYTE( "epr12187.ic2", 0x000000, 0x20000, CRC(e83783f3) SHA1(4b3b32df7de85aef9cd77c8a4ffc17e10466b638) )
1460 ROM_LOAD16_BYTE( "epr12186.ic1", 0x000001, 0x20000, CRC(ce76319d) SHA1(0ede61f0700f9161285c768fa97636f0e42b96f8) )
1461
1462 ROM_REGION( 0x1c2000, REGION_USER2, 0)
1463 ROM_LOAD( "gg-dump.bin", 0x000000, 0x1c2000, CRC(5c5910f2) SHA1(9ed564a03c0d4ca4a207f3ecfb7336c6cbcaa70f) )
1464 ROM_END
1465
1466 ROM_START( crkdown )
1467 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1468 ROM_LOAD16_BYTE( "epr12187.ic2", 0x000000, 0x20000, CRC(e83783f3) SHA1(4b3b32df7de85aef9cd77c8a4ffc17e10466b638) )
1469 ROM_LOAD16_BYTE( "epr12186.ic1", 0x000001, 0x20000, CRC(ce76319d) SHA1(0ede61f0700f9161285c768fa97636f0e42b96f8) )
1470
1471 ROM_REGION( 0x1c2000, REGION_USER2, 0)
1472 ROM_LOAD( "ds3-5000-04d.bin", 0x000000, 0x1c2000, CRC(b95bcdb7) SHA1(25c465349972ec5e57765ca6446883943daf3890) )
1473 ROM_END
1474
1475 ROM_START( dcclub )
1476 ROM_REGION( 0x40000, REGION_CPU1, 0 ) /* 68000 code */
1477 ROM_LOAD16_BYTE( "epr13948.bin", 0x000000, 0x20000, CRC(d6a031c8) SHA1(45b7e3cd2c7412e24f547cd4185166199d3938d5) )
1478 ROM_LOAD16_BYTE( "epr13947.bin", 0x000001, 0x20000, CRC(7e3cff5e) SHA1(ff8cb776d2491796feeb8892c7e644e590438945) )
1479
1480 ROM_REGION16_BE( 0x200000, REGION_USER1, 0)
1481 ROM_LOAD16_BYTE( "epr15345.bin", 0x000000, 0x80000, CRC(d9e120c2) SHA1(b18b76733078d8534c6f0d8950632ab51e6a10ab) )
1482 ROM_LOAD16_BYTE( "epr15344.bin", 0x000001, 0x80000, CRC(8f8b9f74) SHA1(de6b923118bea60197547ad016cb5d5e1a8f372b) )
1483 ROM_LOAD16_BYTE( "mpr14097.bin", 0x100000, 0x80000, CRC(4bd74cae) SHA1(5aa90bd5d2b8e2338ef0fe41d1f794e8d51321e1) )
1484 ROM_LOAD16_BYTE( "mpr14096.bin", 0x100001, 0x80000, CRC(38d96502) SHA1(c68b3c5c83fd0839c3f6f81189c310ec19bdf1c4) )
1485 ROM_END
1486
1487 static struct YM2151interface ym2151_interface =
1488 {
1489 1,
1490 4000000,
1491 { YM3012_VOL(50, MIXER_PAN_LEFT, 50, MIXER_PAN_RIGHT) },
1492 { irq_ym }
1493 };
1494
1495 static struct DACinterface dac_interface =
1496 {
1497 1,
1498 { 50 }
1499 };
1500
1501 static MACHINE_DRIVER_START( system24 )
1502 MDRV_CPU_ADD(M68000, 10000000)
1503 MDRV_CPU_MEMORY(system24_readmem, system24_writemem)
1504 MDRV_CPU_VBLANK_INT(irq_vbl, 2)
1505
1506 MDRV_CPU_ADD(M68000, 10000000)
1507 MDRV_CPU_MEMORY(system24_readmem2, system24_writemem2)
1508
1509 MDRV_FRAMES_PER_SECOND(60)
1510 MDRV_VBLANK_DURATION(100)
1511 MDRV_INTERLEAVE(4)
1512
1513 MDRV_MACHINE_INIT(system24)
1514 MDRV_NVRAM_HANDLER(system24)
1515
1516 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER | VIDEO_UPDATE_AFTER_VBLANK)
1517 MDRV_SCREEN_SIZE(62*8, 48*8)
1518 MDRV_VISIBLE_AREA(0*8, 62*8-1, 0*8, 48*8-1)
1519 MDRV_PALETTE_LENGTH(8192*2)
1520
1521 MDRV_VIDEO_START(system24)
1522 MDRV_VIDEO_UPDATE(system24)
1523
1524 MDRV_SOUND_ATTRIBUTES(SOUND_SUPPORTS_STEREO)
1525 MDRV_SOUND_ADD(YM2151, ym2151_interface)
1526 MDRV_SOUND_ADD(DAC, dac_interface)
1527 MACHINE_DRIVER_END
1528
1529
1530 GAME( 1988, hotrod, 0, system24, hotrod, hotrod, ROT0, "Sega", "Hot Rod (turbo 3 player)")
1531 GAME( 1990, bnzabros, 0, system24, bnzabros, bnzabros, ROT0, "Sega", "Bonanza Bros")
1532 GAME( 1991, dcclub, 0, system24, dcclub, dcclub, ROT0, "Sega", "Dynamic Country Club")
1533 GAME( 1992, mahmajn, 0, system24, mahmajn, mahmajn, ROT0, "Sega", "Tokoro San no MahMahjan")
1534 GAME( 1994, qgh, 0, system24, qgh, qgh, ROT0, "Sega", "Quiz Ghost Hunter")
1535 GAME( 1994, quizmeku, 0, system24, quizmeku, quizmeku, ROT0, "Sega", "Quiz Mekurumeku Story")
1536 GAME( 1994, qrouka, 0, system24, qgh, qrouka, ROT0, "Sega", "Quiz Rouka Ni Tattenasai")
1537 GAME( 1994, mahmajn2, 0, system24, mahmajn, mahmajn2, ROT0, "Sega", "Tokoro San no MahMahjan 2")
1538
1539 /* Encrypted */
1540 GAMEX( ????, sspirits, 0, system24, bnzabros, sspirits, ROT0, "Sega", "Scramble Spirits", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION)
1541 GAMEX( ????, sgmast, 0, system24, bnzabros, sgmast, ROT0, "Sega", "Super Masters Golf", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION)
1542 GAMEX( ????, qsww, 0, system24, bnzabros, qsww, ROT0, "Sega", "Quiz Syukudai wo Wasuremashita", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION)
1543 GAMEX( ????, gground, 0, system24, bnzabros, gground, ROT0, "Sega", "Gain Ground", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION)
1544 GAMEX( ????, crkdown, 0, system24, bnzabros, crkdown, ROT0, "Sega", "Crackdown", GAME_NOT_WORKING|GAME_UNEMULATED_PROTECTION)
1545
1546 /* Other S24 Games, mostly not dumped / encrypted / only bad disk images exist
1547
1548 Jumbo Ozaki Super Masters - Encrypted, Disk Based?
1549 Scramble Spirits - Disk Based, Encrypted and Non-Encrypted versions Exist
1550 + a bunch of other Japanese Quiz Games
1551
1552 */
1553