1 /***************************************************************************
2
3 Vastar memory map (preliminary)
4
5 driver by Allard Van Der Bas
6
7 CPU #1:
8
9 0000-7fff ROM
10 8000-83ff bg #1 attribute RAM
11 8800-8bff bg #1 video RAM
12 8c00-8fff bg #1 color RAM
13 9000-93ff bg #2 attribute RAM
14 9800-9bff bg #2 video RAM
15 9c00-9fff bg #2 color RAM
16 a000-a3ff used only during startup - it's NOT a part of the RAM test
17 c400-c7ff fg color RAM
18 c800-cbff fg attribute RAM
19 cc00-cfff fg video RAM
20 f000-f7ff RAM (f000-f0ff is shared with CPU #2)
21
22 read:
23 e000 ???
24
25 write:
26 c410-c41f sprites
27 c430-c43f sprites
28 c7c0-c7df bg #2 scroll
29 c7e0-c7ff bg #1 scroll
30 c810-c81f sprites
31 c830-c83f sprites
32 cc10-cc1f sprites
33 cc30-cc3f sprites
34 e000 ???
35
36 I/O:
37 read:
38
39 write:
40 02 0 = hold CPU #2?
41
42 CPU #2:
43
44 0000-1fff ROM
45 4000-43ff RAM (shared with CPU #1)
46
47 read:
48 8000 IN1
49 8040 IN0
50 8080 IN2
51
52 write:
53
54 I/O:
55 read:
56 02 8910 read (port A = DSW0 port B = DSW1)
57
58 write:
59 00 8910 control
60 01 8910 write
61
62 ***************************************************************************/
63
64 #include "driver.h"
65 #include "vidhrdw/generic.h"
66
67
68
69 extern data8_t *vastar_bg1videoram,*vastar_bg2videoram,*vastar_fgvideoram;
70 extern data8_t *vastar_bg1_scroll,*vastar_bg2_scroll;
71 extern data8_t *vastar_sprite_priority;
72
73 WRITE_HANDLER( vastar_bg1videoram_w );
74 WRITE_HANDLER( vastar_bg2videoram_w );
75 WRITE_HANDLER( vastar_fgvideoram_w );
76 READ_HANDLER( vastar_bg1videoram_r );
77 READ_HANDLER( vastar_bg2videoram_r );
78 VIDEO_START( vastar );
79 VIDEO_UPDATE( vastar );
80 VIDEO_UPDATE( pprobe );
81
82 static unsigned char *vastar_sharedram;
83
84
85
MACHINE_INIT(vastar)86 static MACHINE_INIT( vastar )
87 {
88 /* we must start with the second CPU halted */
89 cpu_set_reset_line(1,ASSERT_LINE);
90 }
91
WRITE_HANDLER(vastar_hold_cpu2_w)92 static WRITE_HANDLER( vastar_hold_cpu2_w )
93 {
94 /* I'm not sure that this works exactly like this */
95 if (data & 1)
96 cpu_set_reset_line(1,CLEAR_LINE);
97 else
98 cpu_set_reset_line(1,ASSERT_LINE);
99 }
100
READ_HANDLER(vastar_sharedram_r)101 static READ_HANDLER( vastar_sharedram_r )
102 {
103 return vastar_sharedram[offset];
104 }
105
WRITE_HANDLER(vastar_sharedram_w)106 static WRITE_HANDLER( vastar_sharedram_w )
107 {
108 vastar_sharedram[offset] = data;
109 }
110
WRITE_HANDLER(flip_screen_w)111 static WRITE_HANDLER( flip_screen_w )
112 {
113 flip_screen_set(data);
114 }
115
116
117
MEMORY_READ_START(readmem)118 static MEMORY_READ_START( readmem )
119 { 0x0000, 0x7fff, MRA_ROM },
120 { 0x8000, 0x8fff, vastar_bg2videoram_r },
121 { 0x9000, 0x9fff, vastar_bg1videoram_r },
122 { 0xa000, 0xafff, vastar_bg2videoram_r }, /* mirror address */
123 { 0xb000, 0xbfff, vastar_bg1videoram_r }, /* mirror address */
124 { 0xc400, 0xcfff, MRA_RAM },
125 { 0xe000, 0xe000, watchdog_reset_r },
126 { 0xf000, 0xf0ff, vastar_sharedram_r },
127 { 0xf100, 0xf7ff, MRA_RAM },
128 MEMORY_END
129
130 static MEMORY_WRITE_START( writemem )
131 { 0x0000, 0x7fff, MWA_ROM },
132 { 0x8000, 0x8fff, vastar_bg2videoram_w, &vastar_bg2videoram },
133 { 0x9000, 0x9fff, vastar_bg1videoram_w, &vastar_bg1videoram },
134 { 0xa000, 0xafff, vastar_bg2videoram_w }, /* mirror address */
135 { 0xb000, 0xbfff, vastar_bg1videoram_w }, /* mirror address */
136 { 0xc000, 0xc000, MWA_RAM, &vastar_sprite_priority }, /* sprite/BG priority */
137 { 0xc400, 0xcfff, vastar_fgvideoram_w, &vastar_fgvideoram },
138 { 0xe000, 0xe000, watchdog_reset_w },
139 { 0xf000, 0xf0ff, vastar_sharedram_w, &vastar_sharedram },
140 { 0xf100, 0xf7ff, MWA_RAM },
141
142 /* in hidden portions of video RAM: */
143 { 0xc400, 0xc43f, MWA_RAM, &spriteram, &spriteram_size }, /* actually c410-c41f and c430-c43f */
144 { 0xc7c0, 0xc7df, MWA_RAM, &vastar_bg1_scroll },
145 { 0xc7e0, 0xc7ff, MWA_RAM, &vastar_bg2_scroll },
146 { 0xc800, 0xc83f, MWA_RAM, &spriteram_2 }, /* actually c810-c81f and c830-c83f */
147 { 0xcc00, 0xcc3f, MWA_RAM, &spriteram_3 }, /* actually cc10-cc1f and cc30-cc3f */
148 MEMORY_END
149
150 static PORT_WRITE_START( writeport )
151 { 0x00, 0x00, interrupt_enable_w },
152 { 0x01, 0x01, flip_screen_w },
153 { 0x02, 0x02, vastar_hold_cpu2_w },
154 PORT_END
155
156 static MEMORY_READ_START( cpu2_readmem )
157 { 0x0000, 0x1fff, MRA_ROM },
158 { 0x4000, 0x47ff, vastar_sharedram_r }, /* pprobe */
159 { 0x8000, 0x8000, input_port_1_r },
160 { 0x8040, 0x8040, input_port_0_r },
161 { 0x8080, 0x8080, input_port_2_r },
162 MEMORY_END
163
164 static MEMORY_WRITE_START( cpu2_writemem )
165 { 0x0000, 0x1fff, MWA_ROM },
166 { 0x4000, 0x47ff, vastar_sharedram_w }, /* pprobe */
167 MEMORY_END
168
169 static PORT_READ_START( cpu2_readport )
170 { 0x02, 0x02, AY8910_read_port_0_r },
171 PORT_END
172
173 static PORT_WRITE_START( cpu2_writeport )
174 { 0x00, 0x00, AY8910_control_port_0_w },
175 { 0x01, 0x01, AY8910_write_port_0_w },
176 PORT_END
177
178
179
180
181 INPUT_PORTS_START( pprobe )
182 PORT_START /* IN0 */
183 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_8WAY )
184 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_8WAY )
185 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_8WAY )
186 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_8WAY )
187 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 )
188 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 )
189 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
190 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
191
192 PORT_START /* IN1 */
193 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
194 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
195 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
196 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
197 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 | IPF_COCKTAIL )
198 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 | IPF_COCKTAIL )
199 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
200 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
201
202 PORT_START
203 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
204 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
205 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
206 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START1 )
207 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START2 )
208 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
209 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
210 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
211
212 PORT_START
213 PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) )
214 PORT_DIPSETTING( 0x03, "1" )
215 PORT_DIPSETTING( 0x02, "2" )
216 PORT_DIPSETTING( 0x01, "3" )
217 PORT_DIPSETTING( 0x00, "4" )
218 PORT_DIPNAME( 0x04, 0x04, "Player Controls Demo (Cheat)" )
219 PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
220 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
221 PORT_DIPNAME( 0x08, 0x08, "Invulnerability (Cheat)" )
222 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
223 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
224 PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
225 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
226 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
227 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) )
228 PORT_DIPSETTING( 0x20, "20000 then every 40000" )
229 PORT_DIPSETTING( 0x00, "30000 then every 70000" )
230 PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ) )
231 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
232 PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )
233 PORT_DIPNAME( 0x80, 0x80, "Rom Test / STOP" )
234 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
235 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
236
237 PORT_START
238 PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
239 PORT_DIPSETTING( 0x02, DEF_STR( 4C_1C ) )
240 PORT_DIPSETTING( 0x01, DEF_STR( 4C_3C ) )
241 PORT_DIPSETTING( 0x05, DEF_STR( 3C_1C ) )
242 PORT_DIPSETTING( 0x04, DEF_STR( 3C_2C ) )
243 PORT_DIPSETTING( 0x03, DEF_STR( 3C_4C ) )
244 PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
245 PORT_DIPSETTING( 0x07, DEF_STR( 2C_3C ) )
246 PORT_DIPSETTING( 0x06, DEF_STR( 2C_5C ) )
247 PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) )
248 PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ) )
249 PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ) )
250 PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
251 PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ) )
252 PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
253 PORT_DIPSETTING( 0x09, DEF_STR( 1C_7C ) )
254 PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
255 PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
256 PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) )
257 PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
258 PORT_DIPSETTING( 0x10, DEF_STR( 4C_3C ) )
259 PORT_DIPSETTING( 0x50, DEF_STR( 3C_1C ) )
260 PORT_DIPSETTING( 0x40, DEF_STR( 3C_2C ) )
261 PORT_DIPSETTING( 0x30, DEF_STR( 3C_4C ) )
262 PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
263 PORT_DIPSETTING( 0x70, DEF_STR( 2C_3C ) )
264 PORT_DIPSETTING( 0x60, DEF_STR( 2C_5C ) )
265 PORT_DIPSETTING( 0xf0, DEF_STR( 1C_1C ) )
266 PORT_DIPSETTING( 0xe0, DEF_STR( 1C_2C ) )
267 PORT_DIPSETTING( 0xd0, DEF_STR( 1C_3C ) )
268 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
269 PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
270 PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
271 PORT_DIPSETTING( 0x90, DEF_STR( 1C_7C ) )
272 INPUT_PORTS_END
273
274 INPUT_PORTS_START( vastar )
275 PORT_START /* IN0 */
276 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_8WAY )
277 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_8WAY )
278 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_8WAY )
279 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_8WAY )
280 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 )
281 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 )
282 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
283 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
284
285 PORT_START /* IN1 */
286 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
287 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
288 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
289 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
290 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 | IPF_COCKTAIL )
291 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON2 | IPF_COCKTAIL )
292 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
293 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
294
295 PORT_START
296 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
297 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
298 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
299 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START1 )
300 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START2 )
301 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
302 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
303 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
304
305 PORT_START /* DSW0 */
306 PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
307 PORT_DIPSETTING( 0x03, "3" )
308 PORT_DIPSETTING( 0x02, "4" )
309 PORT_DIPSETTING( 0x01, "5" )
310 PORT_DIPSETTING( 0x00, "6" )
311 PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
312 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
313 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
314 PORT_DIPNAME( 0x08, 0x08, "Show Author Credits" )
315 PORT_DIPSETTING( 0x08, DEF_STR( No ) )
316 PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
317 PORT_BITX( 0x10, 0x10, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Slow Motion", IP_KEY_NONE, IP_JOY_NONE )
318 PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
319 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
320 PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) )
321 PORT_DIPSETTING( 0x20, "20000 50000" )
322 PORT_DIPSETTING( 0x00, "40000 70000" )
323 PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ) )
324 PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
325 PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )
326 PORT_DIPNAME( 0x80, 0x80, "Freeze" )
327 PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
328 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
329
330 PORT_START /* DSW1 */
331 PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
332 PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
333 PORT_DIPSETTING( 0x01, DEF_STR( 3C_2C ) )
334 PORT_DIPSETTING( 0x07, DEF_STR( 1C_1C ) )
335 PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
336 PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
337 PORT_DIPSETTING( 0x04, DEF_STR( 1C_4C ) )
338 PORT_DIPSETTING( 0x03, DEF_STR( 1C_6C ) )
339 PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
340 PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coin_B ) )
341 PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) )
342 PORT_DIPSETTING( 0x08, DEF_STR( 4C_1C ) )
343 PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
344 PORT_DIPSETTING( 0x18, DEF_STR( 2C_1C ) )
345 PORT_DIPSETTING( 0x38, DEF_STR( 1C_1C ) )
346 PORT_DIPSETTING( 0x20, DEF_STR( 3C_4C ) )
347 PORT_DIPSETTING( 0x30, DEF_STR( 1C_2C ) )
348 PORT_DIPSETTING( 0x28, DEF_STR( 1C_3C ) )
349 PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
350 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
351 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
352 PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
353 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
354 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
355 INPUT_PORTS_END
356
357
358
359 static struct GfxLayout charlayout =
360 {
361 8,8,
362 RGN_FRAC(1,1),
363 2,
364 { 0, 4 },
365 { 0, 1, 2, 3, 8*8+0, 8*8+1, 8*8+2, 8*8+3 },
366 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
367 16*8
368 };
369
370 static struct GfxLayout spritelayout =
371 {
372 16,16,
373 RGN_FRAC(1,1),
374 2,
375 { 0, 4 },
376 { 0, 1, 2, 3, 8*8+0, 8*8+1, 8*8+2, 8*8+3,
377 16*8+0, 16*8+1, 16*8+2, 16*8+3, 24*8+0, 24*8+1, 24*8+2, 24*8+3 },
378 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
379 32*8, 33*8, 34*8, 35*8, 36*8, 37*8, 38*8, 39*8 },
380 64*8
381 };
382
383 static struct GfxLayout spritelayoutdw =
384 {
385 16,32,
386 RGN_FRAC(1,1),
387 2,
388 { 0, 4 },
389 { 0, 1, 2, 3, 8*8+0, 8*8+1, 8*8+2, 8*8+3,
390 16*8+0, 16*8+1, 16*8+2, 16*8+3, 24*8+0, 24*8+1, 24*8+2, 24*8+3 },
391 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
392 32*8, 33*8, 34*8, 35*8, 36*8, 37*8, 38*8, 39*8,
393 64*8, 65*8, 66*8, 67*8, 68*8, 69*8, 70*8, 71*8,
394 96*8, 97*8, 98*8, 99*8, 100*8, 101*8, 102*8, 103*8 },
395 128*8
396 };
397
398 static struct GfxDecodeInfo gfxdecodeinfo[] =
399 {
400 { REGION_GFX1, 0, &charlayout, 0, 64 },
401 { REGION_GFX2, 0, &spritelayout, 0, 64 },
402 { REGION_GFX2, 0, &spritelayoutdw, 0, 64 },
403 { REGION_GFX3, 0, &charlayout, 0, 64 },
404 { REGION_GFX4, 0, &charlayout, 0, 64 },
405 { -1 } /* end of array */
406 };
407
408
409
410 static struct AY8910interface ay8910_interface =
411 {
412 1, /* 1 chip */
413 1500000, /* 1.5 MHz??????? */
414 { 50 },
415 { input_port_3_r },
416 { input_port_4_r },
417 { 0 },
418 { 0 }
419 };
420
421
422
423 static MACHINE_DRIVER_START( pprobe )
424
425 /* basic machine hardware */
426 MDRV_CPU_ADD(Z80, 3072000) /* 3.072 MHz ???? */
427 MDRV_CPU_MEMORY(readmem,writemem)
428 MDRV_CPU_PORTS(0,writeport)
429 MDRV_CPU_VBLANK_INT(nmi_line_pulse,1)
430
431 MDRV_CPU_ADD(Z80, 3072000) /* 3.072 MHz ???? */
432 MDRV_CPU_MEMORY(cpu2_readmem,cpu2_writemem)
433 MDRV_CPU_PORTS(cpu2_readport,cpu2_writeport)
434 MDRV_CPU_VBLANK_INT(irq0_line_hold,4) /* ??? */
435
436 MDRV_FRAMES_PER_SECOND(60)
437 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
438 MDRV_INTERLEAVE(10) /* 10 CPU slices per frame - seems enough to ensure proper */
439 /* synchronization of the CPUs */
440 MDRV_MACHINE_INIT(vastar)
441
442 /* video hardware */
443 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
444 MDRV_SCREEN_SIZE(32*8, 32*8)
445 MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
446 MDRV_GFXDECODE(gfxdecodeinfo)
447 MDRV_PALETTE_LENGTH(256)
448
449 MDRV_PALETTE_INIT(RRRR_GGGG_BBBB)
450 MDRV_VIDEO_START(vastar)
451 MDRV_VIDEO_UPDATE(pprobe)
452
453 /* sound hardware */
454 MDRV_SOUND_ADD(AY8910, ay8910_interface)
455 MACHINE_DRIVER_END
456
457
458 static MACHINE_DRIVER_START( vastar )
459
460 /* basic machine hardware */
461 MDRV_CPU_ADD(Z80, 3072000) /* 3.072 MHz ???? */
462 MDRV_CPU_MEMORY(readmem,writemem)
463 MDRV_CPU_PORTS(0,writeport)
464 MDRV_CPU_VBLANK_INT(nmi_line_pulse,1)
465
466 MDRV_CPU_ADD(Z80, 3072000) /* 3.072 MHz ???? */
467 MDRV_CPU_MEMORY(cpu2_readmem,cpu2_writemem)
468 MDRV_CPU_PORTS(cpu2_readport,cpu2_writeport)
469 MDRV_CPU_VBLANK_INT(irq0_line_hold,4) /* ??? */
470
471 MDRV_FRAMES_PER_SECOND(60)
472 MDRV_VBLANK_DURATION(DEFAULT_60HZ_VBLANK_DURATION)
473 MDRV_INTERLEAVE(10) /* 10 CPU slices per frame - seems enough to ensure proper */
474 /* synchronization of the CPUs */
475 MDRV_MACHINE_INIT(vastar)
476
477 /* video hardware */
478 MDRV_VIDEO_ATTRIBUTES(VIDEO_TYPE_RASTER)
479 MDRV_SCREEN_SIZE(32*8, 32*8)
480 MDRV_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
481 MDRV_GFXDECODE(gfxdecodeinfo)
482 MDRV_PALETTE_LENGTH(256)
483
484 MDRV_PALETTE_INIT(RRRR_GGGG_BBBB)
485 MDRV_VIDEO_START(vastar)
486 MDRV_VIDEO_UPDATE(vastar)
487
488 /* sound hardware */
489 MDRV_SOUND_ADD(AY8910, ay8910_interface)
490 MACHINE_DRIVER_END
491
492
493
494 /***************************************************************************
495
496 Game driver(s)
497
498 ***************************************************************************/
499
500 ROM_START( pprobe )
501 ROM_REGION( 0x10000, REGION_CPU1, 0 )
502 ROM_LOAD( "pb2.bin", 0x0000, 0x2000, CRC(a88592aa) SHA1(98e8e6233b85e678718f532708d57ec946b9fd88) )
503 ROM_LOAD( "pb3.bin", 0x2000, 0x2000, CRC(e4e20f74) SHA1(53b4d0499127cca149a3dd03af4f05de552cff57) )
504 ROM_LOAD( "pb4.bin", 0x4000, 0x2000, CRC(4e40e3fe) SHA1(ccb3c5828508efc9f0df44bf3408e807d5ef58a0) )
505 ROM_LOAD( "pb5.bin", 0x6000, 0x2000, CRC(b26ff0fd) SHA1(c64966ee91557f8982b9b7fd17306508228f1e15) )
506
507 ROM_REGION( 0x10000, REGION_CPU2, 0 )
508 ROM_LOAD( "pb1.bin", 0x0000, 0x2000, CRC(cd624df9) SHA1(0645ce8dc1b361904da4f6e7adc9b7de109b2d14) )
509
510 ROM_REGION( 0x2000, REGION_GFX1, ROMREGION_DISPOSE )
511 ROM_LOAD( "pb9.bin", 0x0000, 0x2000, CRC(82294dd6) SHA1(24b8eac3d476d4a4d91dd169e26bd075b0d1bf45) )
512
513 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
514 ROM_LOAD( "pb8.bin", 0x0000, 0x2000, CRC(8d809e45) SHA1(70f99626acdceaadbe03de49bcf778266ddff893) )
515 ROM_LOAD( "pb10.bin", 0x2000, 0x2000, CRC(895f9dd3) SHA1(919861482598aa35a9ad476da19f9efa30904cd4) )
516
517 ROM_REGION( 0x2000, REGION_GFX3, ROMREGION_DISPOSE )
518 ROM_LOAD( "pb6.bin", 0x0000, 0x2000, CRC(ff309239) SHA1(4e52833fafd54d4502ad09091fbfb1a8a2ff8828) )
519
520 ROM_REGION( 0x2000, REGION_GFX4, ROMREGION_DISPOSE )
521 ROM_LOAD( "pb7.bin", 0x0000, 0x2000, CRC(439978f7) SHA1(ba80dd919a9bb6f8c516d4eb794c02ae0f0dea00) )
522
523 ROM_REGION( 0x0400, REGION_PROMS, 0 )
524 ROM_LOAD( "n82s129.3", 0x0000, 0x0100, CRC(dfb6b97c) SHA1(e35eda4f3022e661b021b952c53054d96481fb49) )
525 ROM_LOAD( "n82s129.1", 0x0100, 0x0100, CRC(3cc696a2) SHA1(0a1407c19c63ee0f02c3e8b95b0c199b9aec3ce5) )
526 ROM_LOAD( "dm74s287.2", 0x0200, 0x0100, CRC(64fea033) SHA1(19bbb325f71cb17ea069958b3c246fa908f0008e) )
527 ROM_LOAD( "mmi6301-1.bin", 0x0300, 0x0100, CRC(b5297a3b) SHA1(a5a512f86097b7d892f6d11e8492e8a379c07f60) ) /* ???? == vastar - tbp24s10.8n */
528 ROM_END
529
530 ROM_START( vastar )
531 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
532 ROM_LOAD( "e_f4.rom", 0x0000, 0x1000, CRC(45fa5075) SHA1(99c3d7414f3bc3a84430067a71dd00d260bbcdab) )
533 ROM_LOAD( "e_k4.rom", 0x1000, 0x1000, CRC(84531982) SHA1(bf2fd92d821734f64ad72e13f4e1aae8e055aa43) )
534 ROM_LOAD( "e_h4.rom", 0x2000, 0x1000, CRC(94a4f778) SHA1(d52b3d6ed4953cff6dde1884dec9f9cc94847cb2) )
535 ROM_LOAD( "e_l4.rom", 0x3000, 0x1000, CRC(40e4d57b) SHA1(3f073574f430791518283314ce325e48d8daa246) )
536 ROM_LOAD( "e_j4.rom", 0x4000, 0x1000, CRC(bd607651) SHA1(23d3c7d2a0c17a780286a01a93e480aafcdb4b05) )
537 ROM_LOAD( "e_n4.rom", 0x5000, 0x1000, CRC(7a3779a4) SHA1(98e7092ed4eaec1ab129a7bede6ea1cf16e329f0) )
538 ROM_LOAD( "e_n7.rom", 0x6000, 0x1000, CRC(31b6be39) SHA1(be0d03db9c6c8982b2f38ad534a6e213bbde1802) )
539 ROM_LOAD( "e_n5.rom", 0x7000, 0x1000, CRC(f63f0e78) SHA1(a029e340b11b358dbe0dcf2d1a0e6c6c093bbc9d) )
540
541 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
542 ROM_LOAD( "e_f2.rom", 0x0000, 0x1000, CRC(713478d8) SHA1(9cbd1fb689d93a8964f48e59d4effaa4878b2945) )
543 ROM_LOAD( "e_j2.rom", 0x1000, 0x1000, CRC(e4535442) SHA1(280d93bec5cf6183250827ce70ed5ddff968bba5) )
544
545 ROM_REGION( 0x2000, REGION_GFX1, ROMREGION_DISPOSE )
546 ROM_LOAD( "c_c9.rom", 0x0000, 0x2000, CRC(34f067b6) SHA1(45d7f8be5bd1dc9e5e511aa2e99c216c5ff12273) )
547
548 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
549 ROM_LOAD( "c_f7.rom", 0x0000, 0x2000, CRC(edbf3b13) SHA1(9d6ddf16e83c68c831fec28607584471b5cbcbd2) )
550 ROM_LOAD( "c_f9.rom", 0x2000, 0x2000, CRC(8f309e22) SHA1(f5bbc5cf70687415061a0674e273e20fbfcc1f8f) )
551
552 ROM_REGION( 0x2000, REGION_GFX3, ROMREGION_DISPOSE )
553 ROM_LOAD( "c_n4.rom", 0x0000, 0x2000, CRC(b5f9c866) SHA1(17fc38cd40638e4f5d25c0cae70df3b8f03425dd) )
554
555 ROM_REGION( 0x2000, REGION_GFX4, ROMREGION_DISPOSE )
556 ROM_LOAD( "c_s4.rom", 0x0000, 0x2000, CRC(c9fbbfc9) SHA1(7c6ace0e2eae8420a31d9054ad5dd94924273d5f) )
557
558 ROM_REGION( 0x0400, REGION_PROMS, 0 )
559 ROM_LOAD( "tbp24s10.6p", 0x0000, 0x0100, CRC(a712d73a) SHA1(a65fa5928431d8631fb04e01ad0a0d2de849bf1d) ) /* red component */
560 ROM_LOAD( "tbp24s10.6s", 0x0100, 0x0100, CRC(0a7d48ec) SHA1(400e0b271c241712e7b7502e96e4f8a609e078e1) ) /* green component */
561 ROM_LOAD( "tbp24s10.6m", 0x0200, 0x0100, CRC(4c3db907) SHA1(03bcbc4763dcf49f4a06f499042e36183aa8b762) ) /* blue component */
562 ROM_LOAD( "tbp24s10.8n", 0x0300, 0x0100, CRC(b5297a3b) SHA1(a5a512f86097b7d892f6d11e8492e8a379c07f60) ) /* ???? */
563 ROM_END
564
565 ROM_START( vastar2 )
566 ROM_REGION( 0x10000, REGION_CPU1, 0 ) /* 64k for code */
567 ROM_LOAD( "3.4f", 0x0000, 0x1000, CRC(6741ff9c) SHA1(d83e8233626845962b4cf9302d4aa75915017f36) )
568 ROM_LOAD( "6.4k", 0x1000, 0x1000, CRC(5027619b) SHA1(5fa1d53f6ee125048d4ef3bc3bff5655648c5bd6) )
569 ROM_LOAD( "4.4h", 0x2000, 0x1000, CRC(fdaa44e6) SHA1(7e4dbd924d001d1d3ffb86dd0e88d363ef32fa5f) )
570 ROM_LOAD( "7.4l", 0x3000, 0x1000, CRC(29bef91c) SHA1(bc8eacac39c73b92ee84ea20c32e6987c4dd450b) )
571 ROM_LOAD( "5.4j", 0x4000, 0x1000, CRC(c17c2458) SHA1(585022ca6df8568d0bf6fc4dc2e77909b3c8ab54) )
572 ROM_LOAD( "8.4n", 0x5000, 0x1000, CRC(8ca25c37) SHA1(c8307a8453c426075927a4a8a20edd48c6c74f05) )
573 ROM_LOAD( "10.6n", 0x6000, 0x1000, CRC(80df74ba) SHA1(5cbc75fb96ad6d63186ec42a5e9af6aae209d78f) )
574 ROM_LOAD( "9.5n", 0x7000, 0x1000, CRC(239ec84e) SHA1(8b516c63d858d5c4acc3701a9abf9c3d53ddf7ff) )
575
576 ROM_REGION( 0x10000, REGION_CPU2, 0 ) /* 64k for the second CPU */
577 ROM_LOAD( "e_f2.rom", 0x0000, 0x1000, CRC(713478d8) SHA1(9cbd1fb689d93a8964f48e59d4effaa4878b2945) )
578 ROM_LOAD( "e_j2.rom", 0x1000, 0x1000, CRC(e4535442) SHA1(280d93bec5cf6183250827ce70ed5ddff968bba5) )
579
580 ROM_REGION( 0x2000, REGION_GFX1, ROMREGION_DISPOSE )
581 ROM_LOAD( "c_c9.rom", 0x0000, 0x2000, CRC(34f067b6) SHA1(45d7f8be5bd1dc9e5e511aa2e99c216c5ff12273) )
582
583 ROM_REGION( 0x4000, REGION_GFX2, ROMREGION_DISPOSE )
584 ROM_LOAD( "c_f7.rom", 0x0000, 0x2000, CRC(edbf3b13) SHA1(9d6ddf16e83c68c831fec28607584471b5cbcbd2) )
585 ROM_LOAD( "c_f9.rom", 0x2000, 0x2000, CRC(8f309e22) SHA1(f5bbc5cf70687415061a0674e273e20fbfcc1f8f) )
586
587 ROM_REGION( 0x2000, REGION_GFX3, ROMREGION_DISPOSE )
588 ROM_LOAD( "c_n4.rom", 0x0000, 0x2000, CRC(b5f9c866) SHA1(17fc38cd40638e4f5d25c0cae70df3b8f03425dd) )
589
590 ROM_REGION( 0x2000, REGION_GFX4, ROMREGION_DISPOSE )
591 ROM_LOAD( "c_s4.rom", 0x0000, 0x2000, CRC(c9fbbfc9) SHA1(7c6ace0e2eae8420a31d9054ad5dd94924273d5f) )
592
593 ROM_REGION( 0x0400, REGION_PROMS, 0 )
594 ROM_LOAD( "tbp24s10.6p", 0x0000, 0x0100, CRC(a712d73a) SHA1(a65fa5928431d8631fb04e01ad0a0d2de849bf1d) ) /* red component */
595 ROM_LOAD( "tbp24s10.6s", 0x0100, 0x0100, CRC(0a7d48ec) SHA1(400e0b271c241712e7b7502e96e4f8a609e078e1) ) /* green component */
596 ROM_LOAD( "tbp24s10.6m", 0x0200, 0x0100, CRC(4c3db907) SHA1(03bcbc4763dcf49f4a06f499042e36183aa8b762) ) /* blue component */
597 ROM_LOAD( "tbp24s10.8n", 0x0300, 0x0100, CRC(b5297a3b) SHA1(a5a512f86097b7d892f6d11e8492e8a379c07f60) ) /* ???? */
598 ROM_END
599
600
601 GAME( 1985, pprobe, 0, pprobe, pprobe, 0, ROT90, "Crux / Kyugo", "Planet Probe (prototype?)" )
602 GAME( 1983, vastar, 0, vastar, vastar, 0, ROT90, "Sesame Japan", "Vastar (set 1)" )
603 GAME( 1983, vastar2, vastar, vastar, vastar, 0, ROT90, "Sesame Japan", "Vastar (set 2)" )
604