1 #pragma once
2 
3 #include "Types.h"
4 #include "Iop_Intc.h"
5 #include "../PadListener.h"
6 #include <deque>
7 
8 namespace Iop
9 {
10 	class CSio2 : public CPadListener
11 	{
12 	public:
13 		enum
14 		{
15 			ADDR_BEGIN = 0x1F808200,
16 			ADDR_END = 0x1F8082FF
17 		};
18 
19 		CSio2(Iop::CIntc&);
20 		virtual ~CSio2() = default;
21 
22 		void Reset();
23 
24 		void LoadState(Framework::CZipArchiveReader&);
25 		void SaveState(Framework::CZipArchiveWriter&);
26 
27 		uint32 ReadRegister(uint32);
28 		void WriteRegister(uint32, uint32);
29 
30 		uint32 ReceiveDmaIn(uint8*, uint32, uint32);
31 		uint32 ReceiveDmaOut(uint8*, uint32, uint32);
32 
33 		void SetButtonState(unsigned int, PS2::CControllerInfo::BUTTON, bool, uint8*) override;
34 		void SetAxisState(unsigned int, PS2::CControllerInfo::BUTTON, uint8, uint8*) override;
35 
36 	private:
37 		enum REGISTERS
38 		{
39 			REG_BASE = 0x1F808200,
40 			REG_BASE_END = 0x1F80823F,
41 
42 			REG_PORT0_CTRL1 = 0x1F808240,
43 			REG_PORT0_CTRL2 = 0x1F808244,
44 
45 			REG_PORT1_CTRL1 = 0x1F808248,
46 			REG_PORT1_CTRL2 = 0x1F80824C,
47 
48 			REG_PORT2_CTRL1 = 0x1F808250,
49 			REG_PORT2_CTRL2 = 0x1F808254,
50 
51 			REG_PORT3_CTRL1 = 0x1F808258,
52 			REG_PORT3_CTRL2 = 0x1F80825C,
53 
54 			REG_DATA_OUT = 0x1F808260,
55 			REG_DATA_IN = 0x1F808264,
56 
57 			REG_CTRL = 0x1F808268,
58 			REG_STAT6C = 0x1F80826C,
59 		};
60 
61 		enum
62 		{
63 			MAX_REGS = 16,
64 			MAX_PADS = 2,
65 			MAX_PORTS = 4
66 		};
67 
68 		struct PADSTATE
69 		{
70 			bool configMode;
71 			uint8 mode;
72 			uint8 pollMask[3];
73 			uint16 buttonState;
74 			uint8 analogStickState[4];
75 		};
76 
77 		typedef std::deque<uint8> ByteBufferType;
78 
79 		void ProcessCommand();
80 		void ProcessController(unsigned int, size_t, uint32, uint32);
81 		void ProcessMultitap(unsigned int, size_t, uint32, uint32);
82 		void ProcessMemoryCard(unsigned int, size_t, uint32, uint32);
83 
84 		void DisassembleRead(uint32, uint32);
85 		void DisassembleWrite(uint32, uint32);
86 
87 		Iop::CIntc& m_intc;
88 
89 		unsigned int m_currentRegIndex;
90 		uint32 m_regs[MAX_REGS];
91 		uint32 m_ctrl1[MAX_PORTS];
92 		uint32 m_ctrl2[MAX_PORTS];
93 		ByteBufferType m_inputBuffer;
94 		ByteBufferType m_outputBuffer;
95 
96 		PADSTATE m_padState[MAX_PADS];
97 	};
98 }
99