1 /*-------------------------------------------------- 2 TGB Dual - Gameboy Emulator - 3 Copyright (C) 2001 Hii 4 5 This program is free software; you can redistribute it and/or 6 modify it under the terms of the GNU General Public License 7 as published by the Free Software Foundation; either version 2 8 of the License, or (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the Free Software 17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 */ 19 20 //-------------------------------------------------- 21 // GB クラス定義部,その他 22 23 #include <list> 24 25 #include "gb_types.h" 26 #include "renderer.h" 27 #include "serializer.h" 28 29 #define INT_VBLANK 1 30 #define INT_LCDC 2 31 #define INT_TIMER 4 32 #define INT_SERIAL 8 33 #define INT_PAD 16 34 35 class gb; 36 class cpu; 37 class lcd; 38 class apu; 39 class apu_snd; 40 class rom; 41 class mbc; 42 class cheat; 43 44 struct ext_hook{ 45 byte (*send)(byte); 46 bool (*led)(void); 47 }; 48 49 struct cheat_dat{ 50 bool enable; 51 byte code; 52 word adr; 53 byte dat; 54 char name[255]; 55 cheat_dat *next; 56 }; 57 58 struct gb_regs { 59 byte P1,SB,SC,DIV,TIMA,TMA,TAC,IF,LCDC,STAT,SCY,SCX,LY,LYC,DMA,BGP,OBP1,OBP2,WY,WX,IE; 60 }; 61 62 struct gbc_regs { 63 byte KEY1,VBK,HDMA1,HDMA2,HDMA3,HDMA4,HDMA5,RP,BCPS,BCPD,OCPS,OCPD,SVBK; 64 }; 65 66 union pare_reg { 67 word w; 68 struct{byte l,h;}b; 69 }; 70 71 struct cpu_regs { 72 pare_reg AF; 73 pare_reg BC; 74 pare_reg DE; 75 pare_reg HL; 76 word SP; 77 word PC; 78 byte I; 79 }; 80 81 struct apu_stat{ 82 bool sq1_playing; 83 int sq1_sw_time; 84 int sq1_sw_dir; 85 int sq1_sw_shift; 86 87 int sq1_len; 88 int sq1_init_len; 89 int sq1_type; 90 91 int sq1_vol; 92 int sq1_init_vol; 93 int sq1_env_dir; 94 int sq1_env_speed; 95 96 int sq1_freq; 97 int sq1_init_freq; 98 99 int sq1_hold; 100 101 102 bool sq2_playing; 103 104 int sq2_len; 105 int sq2_init_len; 106 int sq2_type; 107 108 int sq2_vol; 109 int sq2_init_vol; 110 int sq2_env_dir; 111 int sq2_env_speed; 112 113 int sq2_freq; 114 int sq2_init_freq; 115 116 int sq2_hold; 117 118 119 bool wav_playing; 120 int wav_vol; 121 int wav_freq; 122 int wav_init_freq; 123 int wav_init_len; 124 int wav_len; 125 int wav_hold; 126 127 128 bool noi_playing; 129 int noi_len; 130 int noi_init_len; 131 132 int noi_vol; 133 int noi_init_vol; 134 int noi_env_dir; 135 int noi_env_speed; 136 137 int noi_freq; 138 int noi_init_freq; 139 int noi_hold; 140 int noi_step; 141 142 int master_enable; 143 int ch_enable[4][2]; 144 int master_vol[2]; 145 int ch_on[4]; 146 int wav_enable; 147 }; 148 149 struct apu_que { 150 word adr; 151 byte dat; 152 int clock; 153 }; 154 155 struct rom_info { 156 char cart_name[18]; 157 int cart_type; 158 byte rom_size; 159 byte ram_size; 160 161 bool check_sum; 162 int gb_type; 163 }; 164 165 class gb 166 { 167 friend class cpu; 168 public: 169 gb(renderer *ref,bool b_lcd,bool b_apu); 170 ~gb(); 171 get_cpu()172 cpu *get_cpu() { return m_cpu; } get_lcd()173 lcd *get_lcd() { return m_lcd; } get_apu()174 apu *get_apu() { return m_apu; } get_rom()175 rom *get_rom() { return m_rom; } get_mbc()176 mbc *get_mbc() { return m_mbc; } get_renderer()177 renderer *get_renderer() { return m_renderer; } get_cheat()178 cheat *get_cheat() { return m_cheat; } get_target()179 gb *get_target() { return target; } get_regs()180 gb_regs *get_regs() { return ®s; } get_cregs()181 gbc_regs *get_cregs() { return &c_regs; } 182 183 void run(); 184 void reset(); 185 void set_skip(int frame); set_use_gba(bool use)186 void set_use_gba(bool use) { use_gba=use; } 187 bool load_rom(byte *buf,int size,byte *ram,int ram_size); 188 189 void serialize(serializer &s); 190 void serialize_firstrev(serializer &s); 191 void serialize_legacy(serializer &s); 192 193 size_t get_state_size(void); 194 void save_state_mem(void *buf); 195 void restore_state_mem(void *buf); 196 197 void refresh_pal(); 198 set_target(gb * tar)199 void set_target(gb *tar) { target=tar; } 200 201 void hook_extport(ext_hook *ext); 202 void unhook_extport(); 203 204 private: 205 cpu *m_cpu; 206 lcd *m_lcd; 207 apu *m_apu; 208 rom *m_rom; 209 mbc *m_mbc; 210 renderer *m_renderer; 211 212 cheat *m_cheat; 213 214 gb *target; 215 216 gb_regs regs; 217 gbc_regs c_regs; 218 219 word dmy[160*5]; // vframe はみ出した時用 220 word vframe[160*(144+100)]; 221 222 ext_hook hook_proc; 223 224 int skip,skip_buf; 225 int now_frame; 226 int re_render; 227 228 bool hook_ext; 229 bool use_gba; 230 }; 231 232 class cheat 233 { 234 public: 235 cheat(gb *ref); 236 ~cheat(); 237 238 byte cheat_read(word adr); 239 void cheat_write(word adr,byte dat); 240 241 bool cheak_cheat(word adr); 242 void create_cheat_map(); 243 244 void add_cheat(cheat_dat *dat); 245 void delete_cheat(char *name); 246 std::list<cheat_dat>::iterator find_cheat(char *name); 247 void create_unique_name(char *buf); 248 249 void clear(); 250 get_first()251 std::list<cheat_dat>::iterator get_first() { return cheat_list.begin(); } get_end()252 std::list<cheat_dat>::iterator get_end() { return cheat_list.end(); } 253 get_cheat_map()254 int *get_cheat_map() { return cheat_map; } 255 256 private: 257 std::list<cheat_dat> cheat_list; 258 int cheat_map[0x10000]; 259 260 gb *ref_gb; 261 }; 262 263 class lcd 264 { 265 public: 266 lcd(gb *ref); 267 ~lcd(); 268 269 void render(void *buf,int scanline); 270 void reset(); clear_win_count()271 void clear_win_count() { now_win_line=9; } get_pal(int num)272 word *get_pal(int num) { return col_pal[num]; } get_mapped_pal(int num)273 word *get_mapped_pal(int num) { return mapped_pal[num]; } 274 275 void set_enable(int layer,bool enable); 276 bool get_enable(int layer); 277 get_sprite_count()278 int get_sprite_count() { return sprite_count; }; 279 280 void serialize(serializer &s); 281 private: 282 void bg_render(void *buf,int scanline); 283 void win_render(void *buf,int scanline); 284 void sprite_render(void *buf,int scanline); 285 void bg_render_color(void *buf,int scanline); 286 void win_render_color(void *buf,int scanline); 287 void sprite_render_color(void *buf,int scanline); 288 289 word m_pal16[4]; 290 dword m_pal32[4]; 291 word col_pal[16][4]; 292 word mapped_pal[16][4]; 293 294 int trans_count; 295 byte trans_tbl[160+160],priority_tbl[320]; 296 297 int now_win_line; 298 int mul; 299 int sprite_count; 300 301 bool layer_enable[3]; 302 303 gb *ref_gb; 304 }; 305 306 class apu 307 { 308 friend class apu_snd; 309 public: 310 apu(gb *ref); 311 ~apu(); 312 get_renderer()313 apu_snd *get_renderer() { return snd; } 314 apu_stat *get_stat(); 315 apu_stat *get_stat_cpy(); 316 byte *get_mem(); 317 318 byte read(word adr); 319 void write(word adr,byte dat,int clock); 320 321 void update(); 322 void reset(); 323 324 void serialize(serializer &s); 325 private: 326 gb *ref_gb; 327 apu_snd *snd; 328 }; 329 330 class apu_snd : public sound_renderer 331 { 332 friend class apu; 333 public: 334 apu_snd(apu *papu); 335 ~apu_snd(); 336 337 void set_enable(int ch,bool enable); 338 bool get_enable(int ch); set_echo(bool echo)339 void set_echo(bool echo){ b_echo=echo; }; set_lowpass(bool lowpass)340 void set_lowpass(bool lowpass){ b_lowpass=lowpass; }; get_echo()341 bool get_echo(){ return b_echo; }; get_lowpass()342 bool get_lowpass(){ return b_lowpass; }; 343 344 345 void render(short *buf,int sample); 346 void reset(); 347 348 void serialize(serializer &s); 349 private: 350 void process(word adr,byte dat); 351 void update(); 352 short sq1_produce(int freq); 353 short sq2_produce(int freq); 354 short wav_produce(int freq,bool interpolation); 355 short noi_produce(int freq); 356 357 apu_stat stat; 358 apu_stat stat_cpy,stat_tmp; 359 apu_que write_que[0x10000]; 360 int que_count; 361 int bef_clock; 362 apu *ref_apu; 363 364 bool b_echo; 365 bool b_lowpass; 366 367 byte mem[0x100]; 368 bool b_enable[4]; 369 }; 370 371 class mbc 372 { 373 public: 374 mbc(gb *ref); 375 ~mbc(); 376 get_rom()377 byte *get_rom() { return rom_page; } get_sram()378 byte *get_sram() { return sram_page; } is_ext_ram()379 bool is_ext_ram() { return ext_is_ram; } set_ext_is(bool ext)380 void set_ext_is(bool ext) { ext_is_ram=ext; } 381 382 int get_state(); 383 void set_state(int dat); 384 void set_page(int rom,int sram); 385 386 byte read(word adr); 387 void write(word adr,byte dat); 388 byte ext_read(word adr); 389 void ext_write(word adr,byte dat); 390 void reset(); 391 392 void serialize(serializer &s); 393 private: 394 void mbc1_write(word adr,byte dat); 395 void mbc2_write(word adr,byte dat); 396 void mbc3_write(word adr,byte dat); 397 void mbc5_write(word adr,byte dat); 398 void mbc7_write(word adr,byte dat); 399 void huc1_write(word adr,byte dat); 400 void huc3_write(word adr,byte dat); 401 void tama5_write(word adr,byte dat); 402 void mmm01_write(word adr,byte dat); 403 404 byte *rom_page; 405 byte *sram_page; 406 407 bool mbc1_16_8; 408 byte mbc1_dat; 409 410 byte mbc3_latch; // 1 bits 411 byte mbc3_sec; // 6 412 byte mbc3_min; // 6 413 byte mbc3_hour; // 5 414 byte mbc3_dayl; // 8 415 byte mbc3_dayh; // 1 416 417 byte mbc3_timer; // 4 418 bool ext_is_ram; // 1 419 // total 32bits 420 421 int mbc5_dat; 422 423 bool mbc7_write_enable; 424 bool mbc7_idle; 425 byte mbc7_cs; 426 byte mbc7_sk; 427 byte mbc7_op_code; 428 byte mbc7_adr; 429 word mbc7_dat; 430 byte mbc7_ret; 431 byte mbc7_state; 432 word mbc7_buf; 433 byte mbc7_count; 434 435 bool huc1_16_8; 436 byte huc1_dat; 437 438 gb *ref_gb; 439 }; 440 441 class rom 442 { 443 public: 444 rom(); 445 ~rom(); 446 get_info()447 rom_info *get_info() { return &info; } get_rom()448 byte *get_rom() { return first_page; } get_sram()449 byte *get_sram() { return sram; } get_loaded()450 bool get_loaded() { return b_loaded; } 451 452 bool has_battery(); 453 int get_sram_size(); // byte単位 454 set_first(int page)455 void set_first(int page) { first_page=dat+0x4000*page; } 456 457 bool load_rom(byte *buf,int size,byte *ram,int ram_size); 458 459 void serialize(serializer &s); 460 private: 461 rom_info info; 462 463 byte *dat; 464 byte *sram; 465 466 byte *first_page; 467 468 bool b_loaded; 469 }; 470 471 class cpu 472 { 473 friend class gb; 474 public: 475 cpu(gb *ref); 476 ~cpu(); 477 read(word adr)478 byte read(word adr) { return (ref_gb->get_cheat()->get_cheat_map()[adr])?ref_gb->get_cheat()->cheat_read(adr):read_direct(adr); } 479 480 byte read_direct(word adr); 481 void write(word adr,byte dat); readw(word adr)482 word inline readw(word adr) { return read(adr)|(read(adr+1)<<8); } writew(word adr,word dat)483 void inline writew(word adr,word dat) { write(adr,(byte)dat);write(adr+1,dat>>8); } 484 485 void exec(int clocks); 486 byte seri_send(byte dat); 487 void irq(int irq_type); 488 void inline irq_process(); 489 void reset(); set_trace(bool trace)490 void set_trace(bool trace) { b_trace=trace; } 491 get_vram()492 byte *get_vram() { return vram; } get_ram()493 byte *get_ram() { return ram; } get_oam()494 byte *get_oam() { return oam; } get_stack()495 byte *get_stack() { return stack; } 496 get_ram_bank()497 byte *get_ram_bank() { return ram_bank; } set_ram_bank(int bank)498 void set_ram_bank(int bank) { ram_bank=ram+bank*0x1000; } 499 get_regs()500 cpu_regs *get_regs() { return ®s; } 501 get_clock()502 int get_clock() { return total_clock; } get_speed()503 bool get_speed() { return speed; } 504 get_halt()505 bool *get_halt() { return &halt; } 506 507 void save_state(int *dat); 508 void restore_state(int *dat); 509 void save_state_ex(int *dat); 510 void restore_state_ex(int *dat); 511 512 void serialize(serializer &s); 513 private: 514 byte inline io_read(word adr); 515 void inline io_write(word adr,byte dat); op_read()516 byte op_read() { return read(regs.PC++); } op_readw()517 word op_readw() { regs.PC+=2;return readw(regs.PC-2); } 518 519 int dasm(char *S,byte *A); 520 void log(); 521 522 gb *ref_gb; 523 cpu_regs regs; 524 525 byte ram[0x2000*4]; 526 byte vram[0x2000*2]; 527 byte stack[0x80]; 528 byte oam[0xA0]; 529 byte spare_oam[0x18]; 530 byte ext_mem[16]; 531 532 byte *vram_bank; 533 byte *ram_bank; 534 535 byte z802gb[256],gb2z80[256]; 536 dword rp_que[256]; 537 int que_cur; 538 // word org_pal[16][4]; 539 int total_clock,rest_clock,sys_clock,seri_occer,div_clock; 540 bool halt,speed,speed_change,dma_executing; 541 bool b_trace; 542 int dma_src; 543 int dma_dest; 544 int dma_rest; 545 int gdma_rest; 546 bool b_dma_first; 547 548 int last_int; 549 bool int_desable; 550 551 byte *dma_src_bank; 552 byte *dma_dest_bank; 553 554 byte _ff6c,_ff72,_ff73,_ff74,_ff75; 555 }; 556