1 //
2 // Copyright (C) 2013-2018 Alexey Khokholov (Nuke.YKT)
3 //
4 // This program is free software; you can redistribute it and/or
5 // modify it under the terms of the GNU General Public License
6 // as published by the Free Software Foundation; either version 2
7 // of the License, or (at your option) any later version.
8 //
9 // This program is distributed in the hope that it will be useful,
10 // but WITHOUT ANY WARRANTY; without even the implied warranty of
11 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 // GNU General Public License for more details.
13 //
14 //
15 //  Nuked OPL3 emulator.
16 //  Thanks:
17 //      MAME Development Team(Jarek Burczynski, Tatsuyuki Satoh):
18 //          Feedback and Rhythm part calculation information.
19 //      forums.submarine.org.uk(carbon14, opl3):
20 //          Tremolo and phase generator calculation information.
21 //      OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
22 //          OPL2 ROMs.
23 //      siliconpr0n.org(John McMaster, digshadow):
24 //          YMF262 and VRC VII decaps and die shots.
25 //
26 // version: 1.8
27 //
28 
29 #include <stdlib.h>
30 #include <string.h>
31 #include "audio/mixer.h"
32 #include "common/system.h"
33 #include "common/scummsys.h"
34 #include "nuked.h"
35 
36 #ifndef DISABLE_NUKED_OPL
37 
38 namespace OPL {
39 namespace NUKED {
40 
41 #define RSM_FRAC    10
42 
43 // Channel types
44 
45 enum {
46     ch_2op = 0,
47     ch_4op = 1,
48     ch_4op2 = 2,
49     ch_drum = 3
50 };
51 
52 // Envelope key types
53 
54 enum {
55     egk_norm = 0x01,
56     egk_drum = 0x02
57 };
58 
59 
60 //
61 // logsin table
62 //
63 
64 static const Bit16u logsinrom[256] = {
65     0x859, 0x6c3, 0x607, 0x58b, 0x52e, 0x4e4, 0x4a6, 0x471,
66     0x443, 0x41a, 0x3f5, 0x3d3, 0x3b5, 0x398, 0x37e, 0x365,
67     0x34e, 0x339, 0x324, 0x311, 0x2ff, 0x2ed, 0x2dc, 0x2cd,
68     0x2bd, 0x2af, 0x2a0, 0x293, 0x286, 0x279, 0x26d, 0x261,
69     0x256, 0x24b, 0x240, 0x236, 0x22c, 0x222, 0x218, 0x20f,
70     0x206, 0x1fd, 0x1f5, 0x1ec, 0x1e4, 0x1dc, 0x1d4, 0x1cd,
71     0x1c5, 0x1be, 0x1b7, 0x1b0, 0x1a9, 0x1a2, 0x19b, 0x195,
72     0x18f, 0x188, 0x182, 0x17c, 0x177, 0x171, 0x16b, 0x166,
73     0x160, 0x15b, 0x155, 0x150, 0x14b, 0x146, 0x141, 0x13c,
74     0x137, 0x133, 0x12e, 0x129, 0x125, 0x121, 0x11c, 0x118,
75     0x114, 0x10f, 0x10b, 0x107, 0x103, 0x0ff, 0x0fb, 0x0f8,
76     0x0f4, 0x0f0, 0x0ec, 0x0e9, 0x0e5, 0x0e2, 0x0de, 0x0db,
77     0x0d7, 0x0d4, 0x0d1, 0x0cd, 0x0ca, 0x0c7, 0x0c4, 0x0c1,
78     0x0be, 0x0bb, 0x0b8, 0x0b5, 0x0b2, 0x0af, 0x0ac, 0x0a9,
79     0x0a7, 0x0a4, 0x0a1, 0x09f, 0x09c, 0x099, 0x097, 0x094,
80     0x092, 0x08f, 0x08d, 0x08a, 0x088, 0x086, 0x083, 0x081,
81     0x07f, 0x07d, 0x07a, 0x078, 0x076, 0x074, 0x072, 0x070,
82     0x06e, 0x06c, 0x06a, 0x068, 0x066, 0x064, 0x062, 0x060,
83     0x05e, 0x05c, 0x05b, 0x059, 0x057, 0x055, 0x053, 0x052,
84     0x050, 0x04e, 0x04d, 0x04b, 0x04a, 0x048, 0x046, 0x045,
85     0x043, 0x042, 0x040, 0x03f, 0x03e, 0x03c, 0x03b, 0x039,
86     0x038, 0x037, 0x035, 0x034, 0x033, 0x031, 0x030, 0x02f,
87     0x02e, 0x02d, 0x02b, 0x02a, 0x029, 0x028, 0x027, 0x026,
88     0x025, 0x024, 0x023, 0x022, 0x021, 0x020, 0x01f, 0x01e,
89     0x01d, 0x01c, 0x01b, 0x01a, 0x019, 0x018, 0x017, 0x017,
90     0x016, 0x015, 0x014, 0x014, 0x013, 0x012, 0x011, 0x011,
91     0x010, 0x00f, 0x00f, 0x00e, 0x00d, 0x00d, 0x00c, 0x00c,
92     0x00b, 0x00a, 0x00a, 0x009, 0x009, 0x008, 0x008, 0x007,
93     0x007, 0x007, 0x006, 0x006, 0x005, 0x005, 0x005, 0x004,
94     0x004, 0x004, 0x003, 0x003, 0x003, 0x002, 0x002, 0x002,
95     0x002, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001, 0x001,
96     0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000, 0x000
97 };
98 
99 //
100 // exp table
101 //
102 
103 static const Bit16u exprom[256] = {
104     0x7fa, 0x7f5, 0x7ef, 0x7ea, 0x7e4, 0x7df, 0x7da, 0x7d4,
105     0x7cf, 0x7c9, 0x7c4, 0x7bf, 0x7b9, 0x7b4, 0x7ae, 0x7a9,
106     0x7a4, 0x79f, 0x799, 0x794, 0x78f, 0x78a, 0x784, 0x77f,
107     0x77a, 0x775, 0x770, 0x76a, 0x765, 0x760, 0x75b, 0x756,
108     0x751, 0x74c, 0x747, 0x742, 0x73d, 0x738, 0x733, 0x72e,
109     0x729, 0x724, 0x71f, 0x71a, 0x715, 0x710, 0x70b, 0x706,
110     0x702, 0x6fd, 0x6f8, 0x6f3, 0x6ee, 0x6e9, 0x6e5, 0x6e0,
111     0x6db, 0x6d6, 0x6d2, 0x6cd, 0x6c8, 0x6c4, 0x6bf, 0x6ba,
112     0x6b5, 0x6b1, 0x6ac, 0x6a8, 0x6a3, 0x69e, 0x69a, 0x695,
113     0x691, 0x68c, 0x688, 0x683, 0x67f, 0x67a, 0x676, 0x671,
114     0x66d, 0x668, 0x664, 0x65f, 0x65b, 0x657, 0x652, 0x64e,
115     0x649, 0x645, 0x641, 0x63c, 0x638, 0x634, 0x630, 0x62b,
116     0x627, 0x623, 0x61e, 0x61a, 0x616, 0x612, 0x60e, 0x609,
117     0x605, 0x601, 0x5fd, 0x5f9, 0x5f5, 0x5f0, 0x5ec, 0x5e8,
118     0x5e4, 0x5e0, 0x5dc, 0x5d8, 0x5d4, 0x5d0, 0x5cc, 0x5c8,
119     0x5c4, 0x5c0, 0x5bc, 0x5b8, 0x5b4, 0x5b0, 0x5ac, 0x5a8,
120     0x5a4, 0x5a0, 0x59c, 0x599, 0x595, 0x591, 0x58d, 0x589,
121     0x585, 0x581, 0x57e, 0x57a, 0x576, 0x572, 0x56f, 0x56b,
122     0x567, 0x563, 0x560, 0x55c, 0x558, 0x554, 0x551, 0x54d,
123     0x549, 0x546, 0x542, 0x53e, 0x53b, 0x537, 0x534, 0x530,
124     0x52c, 0x529, 0x525, 0x522, 0x51e, 0x51b, 0x517, 0x514,
125     0x510, 0x50c, 0x509, 0x506, 0x502, 0x4ff, 0x4fb, 0x4f8,
126     0x4f4, 0x4f1, 0x4ed, 0x4ea, 0x4e7, 0x4e3, 0x4e0, 0x4dc,
127     0x4d9, 0x4d6, 0x4d2, 0x4cf, 0x4cc, 0x4c8, 0x4c5, 0x4c2,
128     0x4be, 0x4bb, 0x4b8, 0x4b5, 0x4b1, 0x4ae, 0x4ab, 0x4a8,
129     0x4a4, 0x4a1, 0x49e, 0x49b, 0x498, 0x494, 0x491, 0x48e,
130     0x48b, 0x488, 0x485, 0x482, 0x47e, 0x47b, 0x478, 0x475,
131     0x472, 0x46f, 0x46c, 0x469, 0x466, 0x463, 0x460, 0x45d,
132     0x45a, 0x457, 0x454, 0x451, 0x44e, 0x44b, 0x448, 0x445,
133     0x442, 0x43f, 0x43c, 0x439, 0x436, 0x433, 0x430, 0x42d,
134     0x42a, 0x428, 0x425, 0x422, 0x41f, 0x41c, 0x419, 0x416,
135     0x414, 0x411, 0x40e, 0x40b, 0x408, 0x406, 0x403, 0x400
136 };
137 
138 //
139 // freq mult table multiplied by 2
140 //
141 // 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 10, 12, 12, 15, 15
142 //
143 
144 static const Bit8u mt[16] = {
145     1, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 20, 24, 24, 30, 30
146 };
147 
148 //
149 // ksl table
150 //
151 
152 static const Bit8u kslrom[16] = {
153     0, 32, 40, 45, 48, 51, 53, 55, 56, 58, 59, 60, 61, 62, 63, 64
154 };
155 
156 static const Bit8u kslshift[4] = {
157     8, 1, 2, 0
158 };
159 
160 //
161 // envelope generator constants
162 //
163 
164 static const Bit8u eg_incstep[4][4] = {
165     { 0, 0, 0, 0 },
166     { 1, 0, 0, 0 },
167     { 1, 0, 1, 0 },
168     { 1, 1, 1, 0 }
169 };
170 
171 //
172 // address decoding
173 //
174 
175 static const Bit8s ad_slot[0x20] = {
176     0, 1, 2, 3, 4, 5, -1, -1, 6, 7, 8, 9, 10, 11, -1, -1,
177     12, 13, 14, 15, 16, 17, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
178 };
179 
180 static const Bit8u ch_slot[18] = {
181     0, 1, 2, 6, 7, 8, 12, 13, 14, 18, 19, 20, 24, 25, 26, 30, 31, 32
182 };
183 
184 //
185 // Envelope generator
186 //
187 
188 typedef Bit16s(*envelope_sinfunc)(Bit16u phase, Bit16u envelope);
189 typedef void(*envelope_genfunc)(opl3_slot *slott);
190 
OPL3_EnvelopeCalcExp(Bit32u level)191 static Bit16s OPL3_EnvelopeCalcExp(Bit32u level)
192 {
193     if (level > 0x1fff)
194     {
195         level = 0x1fff;
196     }
197     return (exprom[level & 0xff] << 1) >> (level >> 8);
198 }
199 
OPL3_EnvelopeCalcSin0(Bit16u phase,Bit16u envelope)200 static Bit16s OPL3_EnvelopeCalcSin0(Bit16u phase, Bit16u envelope)
201 {
202     Bit16u out = 0;
203     Bit16u neg = 0;
204     phase &= 0x3ff;
205     if (phase & 0x200)
206     {
207         neg = 0xffff;
208     }
209     if (phase & 0x100)
210     {
211         out = logsinrom[(phase & 0xff) ^ 0xff];
212     }
213     else
214     {
215         out = logsinrom[phase & 0xff];
216     }
217     return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
218 }
219 
OPL3_EnvelopeCalcSin1(Bit16u phase,Bit16u envelope)220 static Bit16s OPL3_EnvelopeCalcSin1(Bit16u phase, Bit16u envelope)
221 {
222     Bit16u out = 0;
223     phase &= 0x3ff;
224     if (phase & 0x200)
225     {
226         out = 0x1000;
227     }
228     else if (phase & 0x100)
229     {
230         out = logsinrom[(phase & 0xff) ^ 0xff];
231     }
232     else
233     {
234         out = logsinrom[phase & 0xff];
235     }
236     return OPL3_EnvelopeCalcExp(out + (envelope << 3));
237 }
238 
OPL3_EnvelopeCalcSin2(Bit16u phase,Bit16u envelope)239 static Bit16s OPL3_EnvelopeCalcSin2(Bit16u phase, Bit16u envelope)
240 {
241     Bit16u out = 0;
242     phase &= 0x3ff;
243     if (phase & 0x100)
244     {
245         out = logsinrom[(phase & 0xff) ^ 0xff];
246     }
247     else
248     {
249         out = logsinrom[phase & 0xff];
250     }
251     return OPL3_EnvelopeCalcExp(out + (envelope << 3));
252 }
253 
OPL3_EnvelopeCalcSin3(Bit16u phase,Bit16u envelope)254 static Bit16s OPL3_EnvelopeCalcSin3(Bit16u phase, Bit16u envelope)
255 {
256     Bit16u out = 0;
257     phase &= 0x3ff;
258     if (phase & 0x100)
259     {
260         out = 0x1000;
261     }
262     else
263     {
264         out = logsinrom[phase & 0xff];
265     }
266     return OPL3_EnvelopeCalcExp(out + (envelope << 3));
267 }
268 
OPL3_EnvelopeCalcSin4(Bit16u phase,Bit16u envelope)269 static Bit16s OPL3_EnvelopeCalcSin4(Bit16u phase, Bit16u envelope)
270 {
271     Bit16u out = 0;
272     Bit16u neg = 0;
273     phase &= 0x3ff;
274     if ((phase & 0x300) == 0x100)
275     {
276         neg = 0xffff;
277     }
278     if (phase & 0x200)
279     {
280         out = 0x1000;
281     }
282     else if (phase & 0x80)
283     {
284         out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
285     }
286     else
287     {
288         out = logsinrom[(phase << 1) & 0xff];
289     }
290     return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
291 }
292 
OPL3_EnvelopeCalcSin5(Bit16u phase,Bit16u envelope)293 static Bit16s OPL3_EnvelopeCalcSin5(Bit16u phase, Bit16u envelope)
294 {
295     Bit16u out = 0;
296     phase &= 0x3ff;
297     if (phase & 0x200)
298     {
299         out = 0x1000;
300     }
301     else if (phase & 0x80)
302     {
303         out = logsinrom[((phase ^ 0xff) << 1) & 0xff];
304     }
305     else
306     {
307         out = logsinrom[(phase << 1) & 0xff];
308     }
309     return OPL3_EnvelopeCalcExp(out + (envelope << 3));
310 }
311 
OPL3_EnvelopeCalcSin6(Bit16u phase,Bit16u envelope)312 static Bit16s OPL3_EnvelopeCalcSin6(Bit16u phase, Bit16u envelope)
313 {
314     Bit16u neg = 0;
315     phase &= 0x3ff;
316     if (phase & 0x200)
317     {
318         neg = 0xffff;
319     }
320     return OPL3_EnvelopeCalcExp(envelope << 3) ^ neg;
321 }
322 
OPL3_EnvelopeCalcSin7(Bit16u phase,Bit16u envelope)323 static Bit16s OPL3_EnvelopeCalcSin7(Bit16u phase, Bit16u envelope)
324 {
325     Bit16u out = 0;
326     Bit16u neg = 0;
327     phase &= 0x3ff;
328     if (phase & 0x200)
329     {
330         neg = 0xffff;
331         phase = (phase & 0x1ff) ^ 0x1ff;
332     }
333     out = phase << 3;
334     return OPL3_EnvelopeCalcExp(out + (envelope << 3)) ^ neg;
335 }
336 
337 static const envelope_sinfunc envelope_sin[8] = {
338     OPL3_EnvelopeCalcSin0,
339     OPL3_EnvelopeCalcSin1,
340     OPL3_EnvelopeCalcSin2,
341     OPL3_EnvelopeCalcSin3,
342     OPL3_EnvelopeCalcSin4,
343     OPL3_EnvelopeCalcSin5,
344     OPL3_EnvelopeCalcSin6,
345     OPL3_EnvelopeCalcSin7
346 };
347 
348 enum envelope_gen_num
349 {
350     envelope_gen_num_attack = 0,
351     envelope_gen_num_decay = 1,
352     envelope_gen_num_sustain = 2,
353     envelope_gen_num_release = 3
354 };
355 
OPL3_EnvelopeUpdateKSL(opl3_slot * slot)356 static void OPL3_EnvelopeUpdateKSL(opl3_slot *slot)
357 {
358     Bit16s ksl = (kslrom[slot->channel->f_num >> 6] << 2)
359                - ((0x08 - slot->channel->block) << 5);
360     if (ksl < 0)
361     {
362         ksl = 0;
363     }
364     slot->eg_ksl = (Bit8u)ksl;
365 }
366 
OPL3_EnvelopeCalc(opl3_slot * slot)367 static void OPL3_EnvelopeCalc(opl3_slot *slot)
368 {
369     Bit8u nonzero;
370     Bit8u rate;
371     Bit8u rate_hi;
372     Bit8u rate_lo;
373     Bit8u reg_rate = 0;
374     Bit8u ks;
375     Bit8u eg_shift, shift;
376     Bit16u eg_rout;
377     Bit16s eg_inc;
378     Bit8u eg_off;
379     Bit8u reset = 0;
380     slot->eg_out = slot->eg_rout + (slot->reg_tl << 2)
381                  + (slot->eg_ksl >> kslshift[slot->reg_ksl]) + *slot->trem;
382     if (slot->key && slot->eg_gen == envelope_gen_num_release)
383     {
384         reset = 1;
385         reg_rate = slot->reg_ar;
386     }
387     else
388     {
389         switch (slot->eg_gen)
390         {
391         case envelope_gen_num_attack:
392             reg_rate = slot->reg_ar;
393             break;
394         case envelope_gen_num_decay:
395             reg_rate = slot->reg_dr;
396             break;
397         case envelope_gen_num_sustain:
398             if (!slot->reg_type)
399             {
400                 reg_rate = slot->reg_rr;
401             }
402             break;
403         case envelope_gen_num_release:
404             reg_rate = slot->reg_rr;
405             break;
406         default:
407             break;
408         }
409     }
410     slot->pg_reset = reset;
411     ks = slot->channel->ksv >> ((slot->reg_ksr ^ 1) << 1);
412     nonzero = (reg_rate != 0);
413     rate = ks + (reg_rate << 2);
414     rate_hi = rate >> 2;
415     rate_lo = rate & 0x03;
416     if (rate_hi & 0x10)
417     {
418         rate_hi = 0x0f;
419     }
420     eg_shift = rate_hi + slot->chip->eg_add;
421     shift = 0;
422     if (nonzero)
423     {
424         if (rate_hi < 12)
425         {
426             if (slot->chip->eg_state)
427             {
428                 switch (eg_shift)
429                 {
430                 case 12:
431                     shift = 1;
432                     break;
433                 case 13:
434                     shift = (rate_lo >> 1) & 0x01;
435                     break;
436                 case 14:
437                     shift = rate_lo & 0x01;
438                     break;
439                 default:
440                     break;
441                 }
442             }
443         }
444         else
445         {
446             shift = (rate_hi & 0x03) + eg_incstep[rate_lo][slot->chip->timer & 0x03];
447             if (shift & 0x04)
448             {
449                 shift = 0x03;
450             }
451             if (!shift)
452             {
453                 shift = slot->chip->eg_state;
454             }
455         }
456     }
457     eg_rout = slot->eg_rout;
458     eg_inc = 0;
459     eg_off = 0;
460     // Instant attack
461     if (reset && rate_hi == 0x0f)
462     {
463         eg_rout = 0x00;
464     }
465     // Envelope off
466     if ((slot->eg_rout & 0x1f8) == 0x1f8)
467     {
468         eg_off = 1;
469     }
470     if (slot->eg_gen != envelope_gen_num_attack && !reset && eg_off)
471     {
472         eg_rout = 0x1ff;
473     }
474     switch (slot->eg_gen)
475     {
476     case envelope_gen_num_attack:
477         if (!slot->eg_rout)
478         {
479             slot->eg_gen = envelope_gen_num_decay;
480         }
481         else if (slot->key && shift > 0 && rate_hi != 0x0f)
482         {
483             eg_inc = ((~slot->eg_rout) << shift) >> 4;
484         }
485         break;
486     case envelope_gen_num_decay:
487         if ((slot->eg_rout >> 4) == slot->reg_sl)
488         {
489             slot->eg_gen = envelope_gen_num_sustain;
490         }
491         else if (!eg_off && !reset && shift > 0)
492         {
493             eg_inc = 1 << (shift - 1);
494         }
495         break;
496     case envelope_gen_num_sustain:
497     case envelope_gen_num_release:
498         if (!eg_off && !reset && shift > 0)
499         {
500             eg_inc = 1 << (shift - 1);
501         }
502         break;
503     default:
504         break;
505     }
506     slot->eg_rout = (eg_rout + eg_inc) & 0x1ff;
507     // Key off
508     if (reset)
509     {
510         slot->eg_gen = envelope_gen_num_attack;
511     }
512     if (!slot->key)
513     {
514         slot->eg_gen = envelope_gen_num_release;
515     }
516 }
517 
OPL3_EnvelopeKeyOn(opl3_slot * slot,Bit8u type)518 static void OPL3_EnvelopeKeyOn(opl3_slot *slot, Bit8u type)
519 {
520     slot->key |= type;
521 }
522 
OPL3_EnvelopeKeyOff(opl3_slot * slot,Bit8u type)523 static void OPL3_EnvelopeKeyOff(opl3_slot *slot, Bit8u type)
524 {
525     slot->key &= ~type;
526 }
527 
528 //
529 // Phase Generator
530 //
531 
OPL3_PhaseGenerate(opl3_slot * slot)532 static void OPL3_PhaseGenerate(opl3_slot *slot)
533 {
534     opl3_chip *chip;
535     Bit16u f_num;
536     Bit32u basefreq;
537     Bit8u rm_xor, n_bit;
538     Bit32u noise;
539     Bit16u phase;
540 
541     chip = slot->chip;
542     f_num = slot->channel->f_num;
543     if (slot->reg_vib)
544     {
545         Bit8s range;
546         Bit8u vibpos;
547 
548         range = (f_num >> 7) & 7;
549         vibpos = slot->chip->vibpos;
550 
551         if (!(vibpos & 3))
552         {
553             range = 0;
554         }
555         else if (vibpos & 1)
556         {
557             range >>= 1;
558         }
559         range >>= slot->chip->vibshift;
560 
561         if (vibpos & 4)
562         {
563             range = -range;
564         }
565         f_num += range;
566     }
567     basefreq = (f_num << slot->channel->block) >> 1;
568     phase = (Bit16u)(slot->pg_phase >> 9);
569     if (slot->pg_reset)
570     {
571         slot->pg_phase = 0;
572     }
573     slot->pg_phase += (basefreq * mt[slot->reg_mult]) >> 1;
574     // Rhythm mode
575     noise = chip->noise;
576     slot->pg_phase_out = phase;
577     if (slot->slot_num == 13) // hh
578     {
579         chip->rm_hh_bit2 = (phase >> 2) & 1;
580         chip->rm_hh_bit3 = (phase >> 3) & 1;
581         chip->rm_hh_bit7 = (phase >> 7) & 1;
582         chip->rm_hh_bit8 = (phase >> 8) & 1;
583     }
584     if (slot->slot_num == 17 && (chip->rhy & 0x20)) // tc
585     {
586         chip->rm_tc_bit3 = (phase >> 3) & 1;
587         chip->rm_tc_bit5 = (phase >> 5) & 1;
588     }
589     if (chip->rhy & 0x20)
590     {
591         rm_xor = (chip->rm_hh_bit2 ^ chip->rm_hh_bit7)
592                | (chip->rm_hh_bit3 ^ chip->rm_tc_bit5)
593                | (chip->rm_tc_bit3 ^ chip->rm_tc_bit5);
594         switch (slot->slot_num)
595         {
596         case 13: // hh
597             slot->pg_phase_out = rm_xor << 9;
598             if (rm_xor ^ (noise & 1))
599             {
600                 slot->pg_phase_out |= 0xd0;
601             }
602             else
603             {
604                 slot->pg_phase_out |= 0x34;
605             }
606             break;
607         case 16: // sd
608             slot->pg_phase_out = (chip->rm_hh_bit8 << 9)
609                                | ((chip->rm_hh_bit8 ^ (noise & 1)) << 8);
610             break;
611         case 17: // tc
612             slot->pg_phase_out = (rm_xor << 9) | 0x80;
613             break;
614         default:
615             break;
616         }
617     }
618     n_bit = ((noise >> 14) ^ noise) & 0x01;
619     chip->noise = (noise >> 1) | (n_bit << 22);
620 }
621 
622 //
623 // Slot
624 //
625 
OPL3_SlotWrite20(opl3_slot * slot,Bit8u data)626 static void OPL3_SlotWrite20(opl3_slot *slot, Bit8u data)
627 {
628     if ((data >> 7) & 0x01)
629     {
630         slot->trem = &slot->chip->tremolo;
631     }
632     else
633     {
634         slot->trem = (Bit8u*)&slot->chip->zeromod;
635     }
636     slot->reg_vib = (data >> 6) & 0x01;
637     slot->reg_type = (data >> 5) & 0x01;
638     slot->reg_ksr = (data >> 4) & 0x01;
639     slot->reg_mult = data & 0x0f;
640 }
641 
OPL3_SlotWrite40(opl3_slot * slot,Bit8u data)642 static void OPL3_SlotWrite40(opl3_slot *slot, Bit8u data)
643 {
644     slot->reg_ksl = (data >> 6) & 0x03;
645     slot->reg_tl = data & 0x3f;
646     OPL3_EnvelopeUpdateKSL(slot);
647 }
648 
OPL3_SlotWrite60(opl3_slot * slot,Bit8u data)649 static void OPL3_SlotWrite60(opl3_slot *slot, Bit8u data)
650 {
651     slot->reg_ar = (data >> 4) & 0x0f;
652     slot->reg_dr = data & 0x0f;
653 }
654 
OPL3_SlotWrite80(opl3_slot * slot,Bit8u data)655 static void OPL3_SlotWrite80(opl3_slot *slot, Bit8u data)
656 {
657     slot->reg_sl = (data >> 4) & 0x0f;
658     if (slot->reg_sl == 0x0f)
659     {
660         slot->reg_sl = 0x1f;
661     }
662     slot->reg_rr = data & 0x0f;
663 }
664 
OPL3_SlotWriteE0(opl3_slot * slot,Bit8u data)665 static void OPL3_SlotWriteE0(opl3_slot *slot, Bit8u data)
666 {
667     slot->reg_wf = data & 0x07;
668     if (slot->chip->newm == 0x00)
669     {
670         slot->reg_wf &= 0x03;
671     }
672 }
673 
OPL3_SlotGenerate(opl3_slot * slot)674 static void OPL3_SlotGenerate(opl3_slot *slot)
675 {
676     slot->out = envelope_sin[slot->reg_wf](slot->pg_phase_out + *slot->mod, slot->eg_out);
677 }
678 
OPL3_SlotCalcFB(opl3_slot * slot)679 static void OPL3_SlotCalcFB(opl3_slot *slot)
680 {
681     if (slot->channel->fb != 0x00)
682     {
683         slot->fbmod = (slot->prout + slot->out) >> (0x09 - slot->channel->fb);
684     }
685     else
686     {
687         slot->fbmod = 0;
688     }
689     slot->prout = slot->out;
690 }
691 
692 //
693 // Channel
694 //
695 
696 static void OPL3_ChannelSetupAlg(opl3_channel *channel);
697 
OPL3_ChannelUpdateRhythm(opl3_chip * chip,Bit8u data)698 static void OPL3_ChannelUpdateRhythm(opl3_chip *chip, Bit8u data)
699 {
700     opl3_channel *channel6;
701     opl3_channel *channel7;
702     opl3_channel *channel8;
703     Bit8u chnum;
704 
705     chip->rhy = data & 0x3f;
706     if (chip->rhy & 0x20)
707     {
708         channel6 = &chip->channel[6];
709         channel7 = &chip->channel[7];
710         channel8 = &chip->channel[8];
711         channel6->out[0] = &channel6->slots[1]->out;
712         channel6->out[1] = &channel6->slots[1]->out;
713         channel6->out[2] = &chip->zeromod;
714         channel6->out[3] = &chip->zeromod;
715         channel7->out[0] = &channel7->slots[0]->out;
716         channel7->out[1] = &channel7->slots[0]->out;
717         channel7->out[2] = &channel7->slots[1]->out;
718         channel7->out[3] = &channel7->slots[1]->out;
719         channel8->out[0] = &channel8->slots[0]->out;
720         channel8->out[1] = &channel8->slots[0]->out;
721         channel8->out[2] = &channel8->slots[1]->out;
722         channel8->out[3] = &channel8->slots[1]->out;
723         for (chnum = 6; chnum < 9; chnum++)
724         {
725             chip->channel[chnum].chtype = ch_drum;
726         }
727         OPL3_ChannelSetupAlg(channel6);
728         OPL3_ChannelSetupAlg(channel7);
729         OPL3_ChannelSetupAlg(channel8);
730         //hh
731         if (chip->rhy & 0x01)
732         {
733             OPL3_EnvelopeKeyOn(channel7->slots[0], egk_drum);
734         }
735         else
736         {
737             OPL3_EnvelopeKeyOff(channel7->slots[0], egk_drum);
738         }
739         //tc
740         if (chip->rhy & 0x02)
741         {
742             OPL3_EnvelopeKeyOn(channel8->slots[1], egk_drum);
743         }
744         else
745         {
746             OPL3_EnvelopeKeyOff(channel8->slots[1], egk_drum);
747         }
748         //tom
749         if (chip->rhy & 0x04)
750         {
751             OPL3_EnvelopeKeyOn(channel8->slots[0], egk_drum);
752         }
753         else
754         {
755             OPL3_EnvelopeKeyOff(channel8->slots[0], egk_drum);
756         }
757         //sd
758         if (chip->rhy & 0x08)
759         {
760             OPL3_EnvelopeKeyOn(channel7->slots[1], egk_drum);
761         }
762         else
763         {
764             OPL3_EnvelopeKeyOff(channel7->slots[1], egk_drum);
765         }
766         //bd
767         if (chip->rhy & 0x10)
768         {
769             OPL3_EnvelopeKeyOn(channel6->slots[0], egk_drum);
770             OPL3_EnvelopeKeyOn(channel6->slots[1], egk_drum);
771         }
772         else
773         {
774             OPL3_EnvelopeKeyOff(channel6->slots[0], egk_drum);
775             OPL3_EnvelopeKeyOff(channel6->slots[1], egk_drum);
776         }
777     }
778     else
779     {
780         for (chnum = 6; chnum < 9; chnum++)
781         {
782             chip->channel[chnum].chtype = ch_2op;
783             OPL3_ChannelSetupAlg(&chip->channel[chnum]);
784             OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[0], egk_drum);
785             OPL3_EnvelopeKeyOff(chip->channel[chnum].slots[1], egk_drum);
786         }
787     }
788 }
789 
OPL3_ChannelWriteA0(opl3_channel * channel,Bit8u data)790 static void OPL3_ChannelWriteA0(opl3_channel *channel, Bit8u data)
791 {
792     if (channel->chip->newm && channel->chtype == ch_4op2)
793     {
794         return;
795     }
796     channel->f_num = (channel->f_num & 0x300) | data;
797     channel->ksv = (channel->block << 1)
798                  | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
799     OPL3_EnvelopeUpdateKSL(channel->slots[0]);
800     OPL3_EnvelopeUpdateKSL(channel->slots[1]);
801     if (channel->chip->newm && channel->chtype == ch_4op)
802     {
803         channel->pair->f_num = channel->f_num;
804         channel->pair->ksv = channel->ksv;
805         OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]);
806         OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]);
807     }
808 }
809 
OPL3_ChannelWriteB0(opl3_channel * channel,Bit8u data)810 static void OPL3_ChannelWriteB0(opl3_channel *channel, Bit8u data)
811 {
812     if (channel->chip->newm && channel->chtype == ch_4op2)
813     {
814         return;
815     }
816     channel->f_num = (channel->f_num & 0xff) | ((data & 0x03) << 8);
817     channel->block = (data >> 2) & 0x07;
818     channel->ksv = (channel->block << 1)
819                  | ((channel->f_num >> (0x09 - channel->chip->nts)) & 0x01);
820     OPL3_EnvelopeUpdateKSL(channel->slots[0]);
821     OPL3_EnvelopeUpdateKSL(channel->slots[1]);
822     if (channel->chip->newm && channel->chtype == ch_4op)
823     {
824         channel->pair->f_num = channel->f_num;
825         channel->pair->block = channel->block;
826         channel->pair->ksv = channel->ksv;
827         OPL3_EnvelopeUpdateKSL(channel->pair->slots[0]);
828         OPL3_EnvelopeUpdateKSL(channel->pair->slots[1]);
829     }
830 }
831 
OPL3_ChannelSetupAlg(opl3_channel * channel)832 static void OPL3_ChannelSetupAlg(opl3_channel *channel)
833 {
834     if (channel->chtype == ch_drum)
835     {
836         if (channel->ch_num == 7 || channel->ch_num == 8)
837         {
838             channel->slots[0]->mod = &channel->chip->zeromod;
839             channel->slots[1]->mod = &channel->chip->zeromod;
840             return;
841         }
842         switch (channel->alg & 0x01)
843         {
844         case 0x00:
845             channel->slots[0]->mod = &channel->slots[0]->fbmod;
846             channel->slots[1]->mod = &channel->slots[0]->out;
847             break;
848         case 0x01:
849             channel->slots[0]->mod = &channel->slots[0]->fbmod;
850             channel->slots[1]->mod = &channel->chip->zeromod;
851             break;
852         default:
853             break;
854         }
855         return;
856     }
857     if (channel->alg & 0x08)
858     {
859         return;
860     }
861     if (channel->alg & 0x04)
862     {
863         channel->pair->out[0] = &channel->chip->zeromod;
864         channel->pair->out[1] = &channel->chip->zeromod;
865         channel->pair->out[2] = &channel->chip->zeromod;
866         channel->pair->out[3] = &channel->chip->zeromod;
867         switch (channel->alg & 0x03)
868         {
869         case 0x00:
870             channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
871             channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
872             channel->slots[0]->mod = &channel->pair->slots[1]->out;
873             channel->slots[1]->mod = &channel->slots[0]->out;
874             channel->out[0] = &channel->slots[1]->out;
875             channel->out[1] = &channel->chip->zeromod;
876             channel->out[2] = &channel->chip->zeromod;
877             channel->out[3] = &channel->chip->zeromod;
878             break;
879         case 0x01:
880             channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
881             channel->pair->slots[1]->mod = &channel->pair->slots[0]->out;
882             channel->slots[0]->mod = &channel->chip->zeromod;
883             channel->slots[1]->mod = &channel->slots[0]->out;
884             channel->out[0] = &channel->pair->slots[1]->out;
885             channel->out[1] = &channel->slots[1]->out;
886             channel->out[2] = &channel->chip->zeromod;
887             channel->out[3] = &channel->chip->zeromod;
888             break;
889         case 0x02:
890             channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
891             channel->pair->slots[1]->mod = &channel->chip->zeromod;
892             channel->slots[0]->mod = &channel->pair->slots[1]->out;
893             channel->slots[1]->mod = &channel->slots[0]->out;
894             channel->out[0] = &channel->pair->slots[0]->out;
895             channel->out[1] = &channel->slots[1]->out;
896             channel->out[2] = &channel->chip->zeromod;
897             channel->out[3] = &channel->chip->zeromod;
898             break;
899         case 0x03:
900             channel->pair->slots[0]->mod = &channel->pair->slots[0]->fbmod;
901             channel->pair->slots[1]->mod = &channel->chip->zeromod;
902             channel->slots[0]->mod = &channel->pair->slots[1]->out;
903             channel->slots[1]->mod = &channel->chip->zeromod;
904             channel->out[0] = &channel->pair->slots[0]->out;
905             channel->out[1] = &channel->slots[0]->out;
906             channel->out[2] = &channel->slots[1]->out;
907             channel->out[3] = &channel->chip->zeromod;
908             break;
909         default:
910             break;
911         }
912     }
913     else
914     {
915         switch (channel->alg & 0x01)
916         {
917         case 0x00:
918             channel->slots[0]->mod = &channel->slots[0]->fbmod;
919             channel->slots[1]->mod = &channel->slots[0]->out;
920             channel->out[0] = &channel->slots[1]->out;
921             channel->out[1] = &channel->chip->zeromod;
922             channel->out[2] = &channel->chip->zeromod;
923             channel->out[3] = &channel->chip->zeromod;
924             break;
925         case 0x01:
926             channel->slots[0]->mod = &channel->slots[0]->fbmod;
927             channel->slots[1]->mod = &channel->chip->zeromod;
928             channel->out[0] = &channel->slots[0]->out;
929             channel->out[1] = &channel->slots[1]->out;
930             channel->out[2] = &channel->chip->zeromod;
931             channel->out[3] = &channel->chip->zeromod;
932             break;
933         default:
934             break;
935         }
936     }
937 }
938 
OPL3_ChannelWriteC0(opl3_channel * channel,Bit8u data)939 static void OPL3_ChannelWriteC0(opl3_channel *channel, Bit8u data)
940 {
941     channel->fb = (data & 0x0e) >> 1;
942     channel->con = data & 0x01;
943     channel->alg = channel->con;
944     if (channel->chip->newm)
945     {
946         if (channel->chtype == ch_4op)
947         {
948             channel->pair->alg = 0x04 | (channel->con << 1) | (channel->pair->con);
949             channel->alg = 0x08;
950             OPL3_ChannelSetupAlg(channel->pair);
951         }
952         else if (channel->chtype == ch_4op2)
953         {
954             channel->alg = 0x04 | (channel->pair->con << 1) | (channel->con);
955             channel->pair->alg = 0x08;
956             OPL3_ChannelSetupAlg(channel);
957         }
958         else
959         {
960             OPL3_ChannelSetupAlg(channel);
961         }
962     }
963     else
964     {
965         OPL3_ChannelSetupAlg(channel);
966     }
967     if (channel->chip->newm)
968     {
969         channel->cha = ((data >> 4) & 0x01) ? ~0 : 0;
970         channel->chb = ((data >> 5) & 0x01) ? ~0 : 0;
971     }
972     else
973     {
974         channel->cha = channel->chb = (Bit16u)~0;
975     }
976 }
977 
OPL3_ChannelKeyOn(opl3_channel * channel)978 static void OPL3_ChannelKeyOn(opl3_channel *channel)
979 {
980     if (channel->chip->newm)
981     {
982         if (channel->chtype == ch_4op)
983         {
984             OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
985             OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
986             OPL3_EnvelopeKeyOn(channel->pair->slots[0], egk_norm);
987             OPL3_EnvelopeKeyOn(channel->pair->slots[1], egk_norm);
988         }
989         else if (channel->chtype == ch_2op || channel->chtype == ch_drum)
990         {
991             OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
992             OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
993         }
994     }
995     else
996     {
997         OPL3_EnvelopeKeyOn(channel->slots[0], egk_norm);
998         OPL3_EnvelopeKeyOn(channel->slots[1], egk_norm);
999     }
1000 }
1001 
OPL3_ChannelKeyOff(opl3_channel * channel)1002 static void OPL3_ChannelKeyOff(opl3_channel *channel)
1003 {
1004     if (channel->chip->newm)
1005     {
1006         if (channel->chtype == ch_4op)
1007         {
1008             OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
1009             OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
1010             OPL3_EnvelopeKeyOff(channel->pair->slots[0], egk_norm);
1011             OPL3_EnvelopeKeyOff(channel->pair->slots[1], egk_norm);
1012         }
1013         else if (channel->chtype == ch_2op || channel->chtype == ch_drum)
1014         {
1015             OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
1016             OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
1017         }
1018     }
1019     else
1020     {
1021         OPL3_EnvelopeKeyOff(channel->slots[0], egk_norm);
1022         OPL3_EnvelopeKeyOff(channel->slots[1], egk_norm);
1023     }
1024 }
1025 
OPL3_ChannelSet4Op(opl3_chip * chip,Bit8u data)1026 static void OPL3_ChannelSet4Op(opl3_chip *chip, Bit8u data)
1027 {
1028     Bit8u bit;
1029     Bit8u chnum;
1030     for (bit = 0; bit < 6; bit++)
1031     {
1032         chnum = bit;
1033         if (bit >= 3)
1034         {
1035             chnum += 9 - 3;
1036         }
1037         if ((data >> bit) & 0x01)
1038         {
1039             chip->channel[chnum].chtype = ch_4op;
1040             chip->channel[chnum + 3].chtype = ch_4op2;
1041         }
1042         else
1043         {
1044             chip->channel[chnum].chtype = ch_2op;
1045             chip->channel[chnum + 3].chtype = ch_2op;
1046         }
1047     }
1048 }
1049 
OPL3_ClipSample(Bit32s sample)1050 static Bit16s OPL3_ClipSample(Bit32s sample)
1051 {
1052     if (sample > 32767)
1053     {
1054         sample = 32767;
1055     }
1056     else if (sample < -32768)
1057     {
1058         sample = -32768;
1059     }
1060     return (Bit16s)sample;
1061 }
1062 
OPL3_Generate(opl3_chip * chip,Bit16s * buf)1063 void OPL3_Generate(opl3_chip *chip, Bit16s *buf)
1064 {
1065     Bit8u ii;
1066     Bit8u jj;
1067     Bit16s accm;
1068     Bit8u shift = 0;
1069 
1070     buf[1] = OPL3_ClipSample(chip->mixbuff[1]);
1071 
1072     for (ii = 0; ii < 15; ii++)
1073     {
1074         OPL3_SlotCalcFB(&chip->slot[ii]);
1075         OPL3_EnvelopeCalc(&chip->slot[ii]);
1076         OPL3_PhaseGenerate(&chip->slot[ii]);
1077         OPL3_SlotGenerate(&chip->slot[ii]);
1078     }
1079 
1080     chip->mixbuff[0] = 0;
1081     for (ii = 0; ii < 18; ii++)
1082     {
1083         accm = 0;
1084         for (jj = 0; jj < 4; jj++)
1085         {
1086             accm += *chip->channel[ii].out[jj];
1087         }
1088         chip->mixbuff[0] += (Bit16s)(accm & chip->channel[ii].cha);
1089     }
1090 
1091     for (ii = 15; ii < 18; ii++)
1092     {
1093         OPL3_SlotCalcFB(&chip->slot[ii]);
1094         OPL3_EnvelopeCalc(&chip->slot[ii]);
1095         OPL3_PhaseGenerate(&chip->slot[ii]);
1096         OPL3_SlotGenerate(&chip->slot[ii]);
1097     }
1098 
1099     buf[0] = OPL3_ClipSample(chip->mixbuff[0]);
1100 
1101     for (ii = 18; ii < 33; ii++)
1102     {
1103         OPL3_SlotCalcFB(&chip->slot[ii]);
1104         OPL3_EnvelopeCalc(&chip->slot[ii]);
1105         OPL3_PhaseGenerate(&chip->slot[ii]);
1106         OPL3_SlotGenerate(&chip->slot[ii]);
1107     }
1108 
1109     chip->mixbuff[1] = 0;
1110     for (ii = 0; ii < 18; ii++)
1111     {
1112         accm = 0;
1113         for (jj = 0; jj < 4; jj++)
1114         {
1115             accm += *chip->channel[ii].out[jj];
1116         }
1117         chip->mixbuff[1] += (Bit16s)(accm & chip->channel[ii].chb);
1118     }
1119 
1120     for (ii = 33; ii < 36; ii++)
1121     {
1122         OPL3_SlotCalcFB(&chip->slot[ii]);
1123         OPL3_EnvelopeCalc(&chip->slot[ii]);
1124         OPL3_PhaseGenerate(&chip->slot[ii]);
1125         OPL3_SlotGenerate(&chip->slot[ii]);
1126     }
1127 
1128     if ((chip->timer & 0x3f) == 0x3f)
1129     {
1130         chip->tremolopos = (chip->tremolopos + 1) % 210;
1131     }
1132     if (chip->tremolopos < 105)
1133     {
1134         chip->tremolo = chip->tremolopos >> chip->tremoloshift;
1135     }
1136     else
1137     {
1138         chip->tremolo = (210 - chip->tremolopos) >> chip->tremoloshift;
1139     }
1140 
1141     if ((chip->timer & 0x3ff) == 0x3ff)
1142     {
1143         chip->vibpos = (chip->vibpos + 1) & 7;
1144     }
1145 
1146     chip->timer++;
1147 
1148     chip->eg_add = 0;
1149     if (chip->eg_timer)
1150     {
1151         while (shift < 36 && ((chip->eg_timer >> shift) & 1) == 0)
1152         {
1153             shift++;
1154         }
1155         if (shift > 12)
1156         {
1157             chip->eg_add = 0;
1158         }
1159         else
1160         {
1161             chip->eg_add = shift + 1;
1162         }
1163     }
1164 
1165     if (chip->eg_timerrem || chip->eg_state)
1166     {
1167         if (chip->eg_timer == 0xfffffffffULL)
1168         {
1169             chip->eg_timer = 0;
1170             chip->eg_timerrem = 1;
1171         }
1172         else
1173         {
1174             chip->eg_timer++;
1175             chip->eg_timerrem = 0;
1176         }
1177     }
1178 
1179     chip->eg_state ^= 1;
1180 
1181     while (chip->writebuf[chip->writebuf_cur].time <= chip->writebuf_samplecnt)
1182     {
1183         if (!(chip->writebuf[chip->writebuf_cur].reg & 0x200))
1184         {
1185             break;
1186         }
1187         chip->writebuf[chip->writebuf_cur].reg &= 0x1ff;
1188         OPL3_WriteReg(chip, chip->writebuf[chip->writebuf_cur].reg,
1189                       chip->writebuf[chip->writebuf_cur].data);
1190         chip->writebuf_cur = (chip->writebuf_cur + 1) % OPL_WRITEBUF_SIZE;
1191     }
1192     chip->writebuf_samplecnt++;
1193 }
1194 
OPL3_GenerateResampled(opl3_chip * chip,Bit16s * buf)1195 void OPL3_GenerateResampled(opl3_chip *chip, Bit16s *buf)
1196 {
1197     while (chip->samplecnt >= chip->rateratio)
1198     {
1199         chip->oldsamples[0] = chip->samples[0];
1200         chip->oldsamples[1] = chip->samples[1];
1201         OPL3_Generate(chip, chip->samples);
1202         chip->samplecnt -= chip->rateratio;
1203     }
1204     buf[0] = (Bit16s)((chip->oldsamples[0] * (chip->rateratio - chip->samplecnt)
1205                      + chip->samples[0] * chip->samplecnt) / chip->rateratio);
1206     buf[1] = (Bit16s)((chip->oldsamples[1] * (chip->rateratio - chip->samplecnt)
1207                      + chip->samples[1] * chip->samplecnt) / chip->rateratio);
1208     chip->samplecnt += 1 << RSM_FRAC;
1209 }
1210 
OPL3_Reset(opl3_chip * chip,Bit32u samplerate)1211 void OPL3_Reset(opl3_chip *chip, Bit32u samplerate)
1212 {
1213     Bit8u slotnum;
1214     Bit8u channum;
1215 
1216     memset(chip, 0, sizeof(opl3_chip));
1217     for (slotnum = 0; slotnum < 36; slotnum++)
1218     {
1219         chip->slot[slotnum].chip = chip;
1220         chip->slot[slotnum].mod = &chip->zeromod;
1221         chip->slot[slotnum].eg_rout = 0x1ff;
1222         chip->slot[slotnum].eg_out = 0x1ff;
1223         chip->slot[slotnum].eg_gen = envelope_gen_num_release;
1224         chip->slot[slotnum].trem = (Bit8u*)&chip->zeromod;
1225         chip->slot[slotnum].slot_num = slotnum;
1226     }
1227     for (channum = 0; channum < 18; channum++)
1228     {
1229         chip->channel[channum].slots[0] = &chip->slot[ch_slot[channum]];
1230         chip->channel[channum].slots[1] = &chip->slot[ch_slot[channum] + 3];
1231         chip->slot[ch_slot[channum]].channel = &chip->channel[channum];
1232         chip->slot[ch_slot[channum] + 3].channel = &chip->channel[channum];
1233         if ((channum % 9) < 3)
1234         {
1235             chip->channel[channum].pair = &chip->channel[channum + 3];
1236         }
1237         else if ((channum % 9) < 6)
1238         {
1239             chip->channel[channum].pair = &chip->channel[channum - 3];
1240         }
1241         chip->channel[channum].chip = chip;
1242         chip->channel[channum].out[0] = &chip->zeromod;
1243         chip->channel[channum].out[1] = &chip->zeromod;
1244         chip->channel[channum].out[2] = &chip->zeromod;
1245         chip->channel[channum].out[3] = &chip->zeromod;
1246         chip->channel[channum].chtype = ch_2op;
1247         chip->channel[channum].cha = 0xffff;
1248         chip->channel[channum].chb = 0xffff;
1249         chip->channel[channum].ch_num = channum;
1250         OPL3_ChannelSetupAlg(&chip->channel[channum]);
1251     }
1252     chip->noise = 1;
1253     chip->rateratio = (samplerate << RSM_FRAC) / 49716;
1254     chip->tremoloshift = 4;
1255     chip->vibshift = 1;
1256 }
1257 
OPL3_WriteReg(opl3_chip * chip,Bit16u reg,Bit8u v)1258 void OPL3_WriteReg(opl3_chip *chip, Bit16u reg, Bit8u v)
1259 {
1260     Bit8u high = (reg >> 8) & 0x01;
1261     Bit8u regm = reg & 0xff;
1262     switch (regm & 0xf0)
1263     {
1264     case 0x00:
1265         if (high)
1266         {
1267             switch (regm & 0x0f)
1268             {
1269             case 0x04:
1270                 OPL3_ChannelSet4Op(chip, v);
1271                 break;
1272             case 0x05:
1273                 chip->newm = v & 0x01;
1274                 break;
1275             default:
1276                 break;
1277             }
1278         }
1279         else
1280         {
1281             switch (regm & 0x0f)
1282             {
1283             case 0x08:
1284                 chip->nts = (v >> 6) & 0x01;
1285                 break;
1286             default:
1287                 break;
1288             }
1289         }
1290         break;
1291     case 0x20:
1292     case 0x30:
1293         if (ad_slot[regm & 0x1f] >= 0)
1294         {
1295             OPL3_SlotWrite20(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1296         }
1297         break;
1298     case 0x40:
1299     case 0x50:
1300         if (ad_slot[regm & 0x1f] >= 0)
1301         {
1302             OPL3_SlotWrite40(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1303         }
1304         break;
1305     case 0x60:
1306     case 0x70:
1307         if (ad_slot[regm & 0x1f] >= 0)
1308         {
1309             OPL3_SlotWrite60(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1310         }
1311         break;
1312     case 0x80:
1313     case 0x90:
1314         if (ad_slot[regm & 0x1f] >= 0)
1315         {
1316             OPL3_SlotWrite80(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1317         }
1318         break;
1319     case 0xe0:
1320     case 0xf0:
1321         if (ad_slot[regm & 0x1f] >= 0)
1322         {
1323             OPL3_SlotWriteE0(&chip->slot[18 * high + ad_slot[regm & 0x1f]], v);
1324         }
1325         break;
1326     case 0xa0:
1327         if ((regm & 0x0f) < 9)
1328         {
1329             OPL3_ChannelWriteA0(&chip->channel[9 * high + (regm & 0x0f)], v);
1330         }
1331         break;
1332     case 0xb0:
1333         if (regm == 0xbd && !high)
1334         {
1335             chip->tremoloshift = (((v >> 7) ^ 1) << 1) + 2;
1336             chip->vibshift = ((v >> 6) & 0x01) ^ 1;
1337             OPL3_ChannelUpdateRhythm(chip, v);
1338         }
1339         else if ((regm & 0x0f) < 9)
1340         {
1341             OPL3_ChannelWriteB0(&chip->channel[9 * high + (regm & 0x0f)], v);
1342             if (v & 0x20)
1343             {
1344                 OPL3_ChannelKeyOn(&chip->channel[9 * high + (regm & 0x0f)]);
1345             }
1346             else
1347             {
1348                 OPL3_ChannelKeyOff(&chip->channel[9 * high + (regm & 0x0f)]);
1349             }
1350         }
1351         break;
1352     case 0xc0:
1353         if ((regm & 0x0f) < 9)
1354         {
1355             OPL3_ChannelWriteC0(&chip->channel[9 * high + (regm & 0x0f)], v);
1356         }
1357         break;
1358     default:
1359         break;
1360     }
1361 }
1362 
OPL3_WriteRegBuffered(opl3_chip * chip,Bit16u reg,Bit8u v)1363 void OPL3_WriteRegBuffered(opl3_chip *chip, Bit16u reg, Bit8u v)
1364 {
1365     Bit64u time1, time2;
1366 
1367     if (chip->writebuf[chip->writebuf_last].reg & 0x200)
1368     {
1369         OPL3_WriteReg(chip, chip->writebuf[chip->writebuf_last].reg & 0x1ff,
1370                       chip->writebuf[chip->writebuf_last].data);
1371 
1372         chip->writebuf_cur = (chip->writebuf_last + 1) % OPL_WRITEBUF_SIZE;
1373         chip->writebuf_samplecnt = chip->writebuf[chip->writebuf_last].time;
1374     }
1375 
1376     chip->writebuf[chip->writebuf_last].reg = reg | 0x200;
1377     chip->writebuf[chip->writebuf_last].data = v;
1378     time1 = chip->writebuf_lasttime + OPL_WRITEBUF_DELAY;
1379     time2 = chip->writebuf_samplecnt;
1380 
1381     if (time1 < time2)
1382     {
1383         time1 = time2;
1384     }
1385 
1386     chip->writebuf[chip->writebuf_last].time = time1;
1387     chip->writebuf_lasttime = time1;
1388     chip->writebuf_last = (chip->writebuf_last + 1) % OPL_WRITEBUF_SIZE;
1389 }
1390 
OPL3_GenerateStream(opl3_chip * chip,Bit16s * sndptr,Bit32u numsamples)1391 void OPL3_GenerateStream(opl3_chip *chip, Bit16s *sndptr, Bit32u numsamples)
1392 {
1393     Bit32u i;
1394 
1395     for(i = 0; i < numsamples; i++)
1396     {
1397         OPL3_GenerateResampled(chip, sndptr);
1398         sndptr += 2;
1399     }
1400 }
1401 
OPL(Config::OplType type)1402 OPL::OPL(Config::OplType type) : _type(type), _rate(0) {
1403 }
1404 
~OPL()1405 OPL::~OPL() {
1406 	stop();
1407 }
1408 
init()1409 bool OPL::init() {
1410 	_rate = g_system->getMixer()->getOutputRate();
1411 	OPL3_Reset(&chip, _rate);
1412 
1413 	if (_type == Config::kDualOpl2) {
1414 		OPL3_WriteReg(&chip, 0x105, 0x01);
1415 	}
1416 
1417 	return true;
1418 }
1419 
reset()1420 void OPL::reset() {
1421 	OPL3_Reset(&chip, _rate);
1422 }
1423 
write(int port,int val)1424 void OPL::write(int port, int val) {
1425 	if (port & 1) {
1426 		switch (_type) {
1427 		case Config::kOpl2:
1428 		case Config::kOpl3:
1429 			OPL3_WriteRegBuffered(&chip, (Bit16u)address[0], (Bit8u)val);
1430 			break;
1431 		case Config::kDualOpl2:
1432 			// Not a 0x??8 port, then write to a specific port
1433 			if (!(port & 0x8)) {
1434 				byte index = (port & 2) >> 1;
1435 				dualWrite(index, address[index], val);
1436 			}
1437 			else {
1438 				//Write to both ports
1439 				dualWrite(0, address[0], val);
1440 				dualWrite(1, address[1], val);
1441 			}
1442 			break;
1443 		default:
1444 			break;
1445 		}
1446 	} else {
1447 		switch (_type) {
1448 		case Config::kOpl2:
1449 			address[0] = val & 0xff;
1450 			break;
1451 		case Config::kDualOpl2:
1452 			// Not a 0x?88 port, when write to a specific side
1453 			if (!(port & 0x8)) {
1454 				byte index = (port & 2) >> 1;
1455 				address[index] = val & 0xff;
1456 			}
1457 			else {
1458 				address[0] = val & 0xff;
1459 				address[1] = val & 0xff;
1460 			}
1461 			break;
1462 		case Config::kOpl3:
1463 			address[0] = (val & 0xff) | ((port << 7) & 0x100);
1464 			break;
1465 		default:
1466 			break;
1467 		}
1468 	}
1469 }
1470 
1471 
writeReg(int r,int v)1472 void OPL::writeReg(int r, int v) {
1473 	OPL3_WriteRegBuffered(&chip, (Bit16u)r, (Bit8u)v);
1474 }
1475 
dualWrite(uint8 index,uint8 reg,uint8 val)1476 void OPL::dualWrite(uint8 index, uint8 reg, uint8 val) {
1477 	// Make sure you don't use opl3 features
1478 	// Don't allow write to disable opl3
1479 	if (reg == 5)
1480 		return;
1481 
1482 	// Only allow 4 waveforms
1483 	if (reg >= 0xE0 && reg <= 0xE8)
1484 		val &= 3;
1485 
1486 	// Enabling panning
1487 	if (reg >= 0xC0 && reg <= 0xC8) {
1488 		val &= 15;
1489 		val |= index ? 0xA0 : 0x50;
1490 	}
1491 
1492 	uint32 fullReg = reg + (index ? 0x100 : 0);
1493 	OPL3_WriteRegBuffered(&chip, (Bit16u)fullReg, (Bit8u)val);
1494 }
1495 
read(int port)1496 byte OPL::read(int port) {
1497 	return 0;
1498 }
1499 
generateSamples(int16 * buffer,int length)1500 void OPL::generateSamples(int16*buffer, int length) {
1501 	OPL3_GenerateStream(&chip, (Bit16s*)buffer, (Bit16u)length / 2);
1502 }
1503 
1504 }
1505 }
1506 
1507 #endif // !DISABLE_NUKED_OPL
1508