1 /* ScummVM - Graphic Adventure Engine
2 *
3 * ScummVM is the legal property of its developers, whose names
4 * are too numerous to list here. Please refer to the COPYRIGHT
5 * file distributed with this source distribution.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
20 *
21 */
22
23 #include "ultima/nuvie/sound/adplug/fm_opl.h"
24 #include "common/scummsys.h"
25
26 namespace Ultima {
27 namespace Nuvie {
28
29 #ifndef PI
30 #define PI 3.14159265358979323846
31 #endif
32
33 #ifdef _MSC_VER
34 # define INLINE __inline
35 #elif defined(__GNUC__)
36 # define INLINE static inline
37 #else
38 # define INLINE
39 #endif
40
41 /* output final shift */
42 #if (OPL_SAMPLE_BITS==16)
43 #define FINAL_SH (0)
44 #define MAXOUT (+32767)
45 #define MINOUT (-32768)
46 #else
47 #define FINAL_SH (8)
48 #define MAXOUT (+127)
49 #define MINOUT (-128)
50 #endif
51
52
53 #define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
54 #define EG_SH 16 /* 16.16 fixed point (EG timing) */
55 #define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
56 #define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
57
58 #define FREQ_MASK ((1<<FREQ_SH)-1)
59
60 /* envelope output entries */
61 #define ENV_BITS 10
62 #define ENV_LEN (1<<ENV_BITS)
63 #define ENV_STEP (128.0/ENV_LEN)
64
65 #define MAX_ATT_INDEX ((1<<(ENV_BITS-1))-1) /*511*/
66 #define MIN_ATT_INDEX (0)
67
68 /* sinwave entries */
69 #define SIN_BITS 10
70 #define SIN_LEN (1<<SIN_BITS)
71 #define SIN_MASK (SIN_LEN-1)
72
73 #define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
74
75
76
77 /* register number to channel number , slot offset */
78 #define SLOT1 0
79 #define SLOT2 1
80
81 /* Envelope Generator phases */
82
83 #define EG_ATT 4
84 #define EG_DEC 3
85 #define EG_SUS 2
86 #define EG_REL 1
87 #define EG_OFF 0
88
89
90 /* save output as raw 16-bit sample */
91
92 /*#define SAVE_SAMPLE*/
93
94 #ifdef SAVE_SAMPLE
95 static FILE *sample[1];
96 #if 1 /*save to MONO file */
97 #define SAVE_ALL_CHANNELS \
98 { signed int pom = lt; \
99 fputc((unsigned short)pom&0xff,sample[0]); \
100 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
101 }
102 #else /*save to STEREO file */
103 #define SAVE_ALL_CHANNELS \
104 { signed int pom = lt; \
105 fputc((unsigned short)pom&0xff,sample[0]); \
106 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
107 pom = rt; \
108 fputc((unsigned short)pom&0xff,sample[0]); \
109 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
110 }
111 #endif
112 #endif
113
114 /* #define LOG_CYM_FILE */
115 #ifdef LOG_CYM_FILE
116 FILE * cymfile = NULL;
117 #endif
118
119
120
121 #define OPL_TYPE_WAVESEL 0x01 /* waveform select */
122 #define OPL_TYPE_ADPCM 0x02 /* DELTA-T ADPCM unit */
123 #define OPL_TYPE_KEYBOARD 0x04 /* keyboard interface */
124 #define OPL_TYPE_IO 0x08 /* I/O port */
125
126 /* ---------- Generic interface section ---------- */
127 #define OPL_TYPE_YM3526 (0)
128 #define OPL_TYPE_YM3812 (OPL_TYPE_WAVESEL)
129 #define OPL_TYPE_Y8950 (OPL_TYPE_ADPCM|OPL_TYPE_KEYBOARD|OPL_TYPE_IO)
130
131
132
133 /* Saving is necessary for member of the 'R' mark for suspend/resume */
134
135 typedef struct{
136 uint32 ar; /* attack rate: AR<<2 */
137 uint32 dr; /* decay rate: DR<<2 */
138 uint32 rr; /* release rate:RR<<2 */
139 uint8 KSR; /* key scale rate */
140 uint8 ksl; /* keyscale level */
141 uint8 ksr; /* key scale rate: kcode>>KSR */
142 uint8 mul; /* multiple: mul_tab[ML] */
143
144 /* Phase Generator */
145 uint32 Cnt; /* frequency counter */
146 uint32 Incr; /* frequency counter step */
147 uint8 FB; /* feedback shift value */
148 signed int *connect1; /* slot1 output pointer */
149 int32 op1_out[2]; /* slot1 output for feedback */
150 uint8 CON; /* connection (algorithm) type */
151
152 /* Envelope Generator */
153 uint8 eg_type; /* percussive/non-percussive mode */
154 uint8 state; /* phase type */
155 uint32 TL; /* total level: TL << 2 */
156 int32 TLL; /* adjusted now TL */
157 int32 volume; /* envelope counter */
158 uint32 sl; /* sustain level: sl_tab[SL] */
159
160 uint8 eg_sh_ar; /* (attack state) */
161 uint8 eg_sel_ar; /* (attack state) */
162 uint8 eg_sh_dr; /* (decay state) */
163 uint8 eg_sel_dr; /* (decay state) */
164 uint8 eg_sh_rr; /* (release state) */
165 uint8 eg_sel_rr; /* (release state) */
166
167 uint32 key; /* 0 = KEY OFF, >0 = KEY ON */
168
169 /* LFO */
170 uint32 AMmask; /* LFO Amplitude Modulation enable mask */
171 uint8 vib; /* LFO Phase Modulation enable flag (active high)*/
172
173 /* waveform select */
174 unsigned int wavetable;
175 } OPL_SLOT;
176
177 typedef struct{
178 OPL_SLOT SLOT[2];
179 /* phase generator state */
180 uint32 block_fnum; /* block+fnum */
181 uint32 fc; /* Freq. Increment base */
182 uint32 ksl_base; /* KeyScaleLevel Base step */
183 uint8 kcode; /* key code (for key scaling) */
184 } OPL_CH;
185
186 /* OPL state */
187 typedef struct fm_opl_f {
188 /* FM channel slots */
189 OPL_CH P_CH[9]; /* OPL/OPL2 chips have 9 channels*/
190
191 uint32 eg_cnt; /* global envelope generator counter */
192 uint32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
193 uint32 eg_timer_add; /* step of eg_timer */
194 uint32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
195
196 uint8 rhythm; /* Rhythm mode */
197
198 uint32 fn_tab[1024]; /* fnumber->increment counter */
199
200 /* LFO */
201 uint8 lfo_am_depth;
202 uint8 lfo_pm_depth_range;
203 uint32 lfo_am_cnt;
204 uint32 lfo_am_inc;
205 uint32 lfo_pm_cnt;
206 uint32 lfo_pm_inc;
207
208 uint32 noise_rng; /* 23 bit noise shift register */
209 uint32 noise_p; /* current noise 'phase' */
210 uint32 noise_f; /* current noise period */
211
212 uint8 wavesel; /* waveform select enable flag */
213
214 int T[2]; /* timer counters */
215 uint8 st[2]; /* timer enable */
216
217 #if BUILD_Y8950
218 /* Delta-T ADPCM unit (Y8950) */
219
220 YM_DELTAT *deltat;
221
222 /* Keyboard / I/O interface unit*/
223 uint8 portDirection;
224 uint8 portLatch;
225 OPL_PORTHANDLER_R porthandler_r;
226 OPL_PORTHANDLER_W porthandler_w;
227 int port_param;
228 OPL_PORTHANDLER_R keyboardhandler_r;
229 OPL_PORTHANDLER_W keyboardhandler_w;
230 int keyboard_param;
231 #endif
232
233 /* external event callback handlers */
234 OPL_TIMERHANDLER TimerHandler; /* TIMER handler */
235 int TimerParam; /* TIMER parameter */
236 OPL_IRQHANDLER IRQHandler; /* IRQ handler */
237 int IRQParam; /* IRQ parameter */
238 OPL_UPDATEHANDLER UpdateHandler;/* stream update handler */
239 int UpdateParam; /* stream update parameter */
240
241 uint8 type; /* chip type */
242 uint8 address; /* address register */
243 uint8 status; /* status flag */
244 uint8 statusmask; /* status mask */
245 uint8 mode; /* Reg.08 : CSM,notesel,etc. */
246
247 int clock; /* master clock (Hz) */
248 int rate; /* sampling rate (Hz) */
249 double freqbase; /* frequency base */
250 double TimerBase; /* Timer base time (==sampling time)*/
251 } FM_OPL;
252
253
254
255 /* mapping of register number (offset) to slot number used by the emulator */
256 static const int slot_array[32]=
257 {
258 0, 2, 4, 1, 3, 5,-1,-1,
259 6, 8,10, 7, 9,11,-1,-1,
260 12,14,16,13,15,17,-1,-1,
261 -1,-1,-1,-1,-1,-1,-1,-1
262 };
263
264 /* key scale level */
265 /* table is 3dB/octave , DV converts this into 6dB/octave */
266 /* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */
267 #define DV (0.1875/2.0)
268 static const uint32 ksl_tab[8*16]=
269 {
270 /* OCT 0 */
271 (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV),
272 (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV),
273 (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV),
274 (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV),
275 /* OCT 1 */
276 (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV),
277 (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV),
278 (uint32)(0.000/DV), (uint32)(0.750/DV), (uint32)(1.125/DV), (uint32)(1.500/DV),
279 (uint32)(1.875/DV), (uint32)(2.250/DV), (uint32)(2.625/DV), (uint32)(3.000/DV),
280 /* OCT 2 */
281 (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV),
282 (uint32)(0.000/DV), (uint32)(1.125/DV), (uint32)(1.875/DV), (uint32)(2.625/DV),
283 (uint32)(3.000/DV), (uint32)(3.750/DV), (uint32)(4.125/DV), (uint32)(4.500/DV),
284 (uint32)(4.875/DV), (uint32)(5.250/DV), (uint32)(5.625/DV), (uint32)(6.000/DV),
285 /* OCT 3 */
286 (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(1.875/DV),
287 (uint32)(3.000/DV), (uint32)(4.125/DV), (uint32)(4.875/DV), (uint32)(5.625/DV),
288 (uint32)(6.000/DV), (uint32)(6.750/DV), (uint32)(7.125/DV), (uint32)(7.500/DV),
289 (uint32)(7.875/DV), (uint32)(8.250/DV), (uint32)(8.625/DV), (uint32)(9.000/DV),
290 /* OCT 4 */
291 (uint32)(0.000/DV), (uint32)(0.000/DV), (uint32)(3.000/DV), (uint32)(4.875/DV),
292 (uint32)(6.000/DV), (uint32)(7.125/DV), (uint32)(7.875/DV), (uint32)(8.625/DV),
293 (uint32)(9.000/DV), (uint32)(9.750/DV), (uint32)(10.125/DV),(uint32)(10.500/DV),
294 (uint32)(10.875/DV),(uint32)(11.250/DV),(uint32)(11.625/DV),(uint32)(12.000/DV),
295 /* OCT 5 */
296 (uint32)(0.000/DV), (uint32)(3.000/DV), (uint32)(6.000/DV), (uint32)(7.875/DV),
297 (uint32)(9.000/DV), (uint32)(10.125/DV),(uint32)(10.875/DV),(uint32)(11.625/DV),
298 (uint32)(12.000/DV),(uint32)(12.750/DV),(uint32)(13.125/DV),(uint32)(13.500/DV),
299 (uint32)(13.875/DV),(uint32)(14.250/DV),(uint32)(14.625/DV),(uint32)(15.000/DV),
300 /* OCT 6 */
301 (uint32)(0.000/DV), (uint32)(6.000/DV), (uint32)(9.000/DV), (uint32)(10.875/DV),
302 (uint32)(12.000/DV),(uint32)(13.125/DV),(uint32)(13.875/DV),(uint32)(14.625/DV),
303 (uint32)(15.000/DV),(uint32)(15.750/DV),(uint32)(16.125/DV),(uint32)(16.500/DV),
304 (uint32)(16.875/DV),(uint32)(17.250/DV),(uint32)(17.625/DV),(uint32)(18.000/DV),
305 /* OCT 7 */
306 (uint32)(0.000/DV), (uint32)(9.000/DV), (uint32)(12.000/DV),(uint32)(13.875/DV),
307 (uint32)(15.000/DV),(uint32)(16.125/DV),(uint32)(16.875/DV),(uint32)(17.625/DV),
308 (uint32)(18.000/DV),(uint32)(18.750/DV),(uint32)(19.125/DV),(uint32)(19.500/DV),
309 (uint32)(19.875/DV),(uint32)(20.250/DV),(uint32)(20.625/DV),(uint32)(21.000/DV)
310 };
311 #undef DV
312
313 /* sustain level table (3dB per step) */
314 /* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
315 #define SC(db) (uint32) ( db * (2.0/ENV_STEP) )
316 static const uint32 sl_tab[16]={
317 SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
318 SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
319 };
320 #undef SC
321
322
323 #define RATE_STEPS (8)
324 static const unsigned char eg_inc[15*RATE_STEPS]={
325
326 /*cycle:0 1 2 3 4 5 6 7*/
327
328 /* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */
329 /* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */
330 /* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */
331 /* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */
332
333 /* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */
334 /* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */
335 /* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */
336 /* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */
337
338 /* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */
339 /* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */
340 /*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */
341 /*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */
342
343 /*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 4) */
344 /*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 2, 15 3 for attack */
345 /*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */
346 };
347
348
349 #define O(a) (a*RATE_STEPS)
350
351 /*note that there is no O(13) in this table - it's directly in the code */
352 static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
353 /* 16 dummy (infinite time) rates */
354 O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
355 O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
356
357 /* rates 00-12 */
358 O( 0),O( 1),O( 2),O( 3),
359 O( 0),O( 1),O( 2),O( 3),
360 O( 0),O( 1),O( 2),O( 3),
361 O( 0),O( 1),O( 2),O( 3),
362 O( 0),O( 1),O( 2),O( 3),
363 O( 0),O( 1),O( 2),O( 3),
364 O( 0),O( 1),O( 2),O( 3),
365 O( 0),O( 1),O( 2),O( 3),
366 O( 0),O( 1),O( 2),O( 3),
367 O( 0),O( 1),O( 2),O( 3),
368 O( 0),O( 1),O( 2),O( 3),
369 O( 0),O( 1),O( 2),O( 3),
370 O( 0),O( 1),O( 2),O( 3),
371
372 /* rate 13 */
373 O( 4),O( 5),O( 6),O( 7),
374
375 /* rate 14 */
376 O( 8),O( 9),O(10),O(11),
377
378 /* rate 15 */
379 O(12),O(12),O(12),O(12),
380
381 /* 16 dummy rates (same as 15 3) */
382 O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
383 O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
384
385 };
386 #undef O
387
388 //rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
389 //shift 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0
390 //mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0
391
392 #define O(a) (a*1)
393 static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
394 /* 16 infinite time rates */
395 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
396 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
397
398 /* rates 00-12 */
399 O(12),O(12),O(12),O(12),
400 O(11),O(11),O(11),O(11),
401 O(10),O(10),O(10),O(10),
402 O( 9),O( 9),O( 9),O( 9),
403 O( 8),O( 8),O( 8),O( 8),
404 O( 7),O( 7),O( 7),O( 7),
405 O( 6),O( 6),O( 6),O( 6),
406 O( 5),O( 5),O( 5),O( 5),
407 O( 4),O( 4),O( 4),O( 4),
408 O( 3),O( 3),O( 3),O( 3),
409 O( 2),O( 2),O( 2),O( 2),
410 O( 1),O( 1),O( 1),O( 1),
411 O( 0),O( 0),O( 0),O( 0),
412
413 /* rate 13 */
414 O( 0),O( 0),O( 0),O( 0),
415
416 /* rate 14 */
417 O( 0),O( 0),O( 0),O( 0),
418
419 /* rate 15 */
420 O( 0),O( 0),O( 0),O( 0),
421
422 /* 16 dummy rates (same as 15 3) */
423 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
424 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
425
426 };
427 #undef O
428
429
430 /* multiple table */
431 #define ML 2
432 static const uint8 mul_tab[16]= {
433 /* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
434 (uint8)(0.50*ML), (uint8)(1.00*ML),(uint8)(2.00*ML), (uint8)(3.00*ML), (uint8)(4.00*ML), (uint8)(5.00*ML), (uint8)(6.00*ML), (uint8)(7.00*ML),
435 (uint8)(8.00*ML), (uint8)(9.00*ML),(uint8)(10.00*ML),(uint8)(10.00*ML),(uint8)(12.00*ML),(uint8)(12.00*ML),(uint8)(15.00*ML),(uint8)(15.00*ML)
436 };
437 #undef ML
438
439 /* TL_TAB_LEN is calculated as:
440 * 12 - sinus amplitude bits (Y axis)
441 * 2 - sinus sign bit (Y axis)
442 * TL_RES_LEN - sinus resolution (X axis)
443 */
444 #define TL_TAB_LEN (12*2*TL_RES_LEN)
445 static signed int tl_tab[TL_TAB_LEN];
446
447 #define ENV_QUIET (TL_TAB_LEN>>4)
448
449 /* sin waveform table in 'decibel' scale */
450 /* four waveforms on OPL2 type chips */
451 static unsigned int sin_tab[SIN_LEN * 4];
452
453
454 /* LFO Amplitude Modulation table (verified on real YM3812)
455 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples
456
457 Length: 210 elements.
458
459 Each of the elements has to be repeated
460 exactly 64 times (on 64 consecutive samples).
461 The whole table takes: 64 * 210 = 13440 samples.
462
463 When AM = 1 data is used directly
464 When AM = 0 data is divided by 4 before being used (loosing precision is important)
465 */
466
467 #define LFO_AM_TAB_ELEMENTS 210
468
469 static const uint8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
470 0,0,0,0,0,0,0,
471 1,1,1,1,
472 2,2,2,2,
473 3,3,3,3,
474 4,4,4,4,
475 5,5,5,5,
476 6,6,6,6,
477 7,7,7,7,
478 8,8,8,8,
479 9,9,9,9,
480 10,10,10,10,
481 11,11,11,11,
482 12,12,12,12,
483 13,13,13,13,
484 14,14,14,14,
485 15,15,15,15,
486 16,16,16,16,
487 17,17,17,17,
488 18,18,18,18,
489 19,19,19,19,
490 20,20,20,20,
491 21,21,21,21,
492 22,22,22,22,
493 23,23,23,23,
494 24,24,24,24,
495 25,25,25,25,
496 26,26,26,
497 25,25,25,25,
498 24,24,24,24,
499 23,23,23,23,
500 22,22,22,22,
501 21,21,21,21,
502 20,20,20,20,
503 19,19,19,19,
504 18,18,18,18,
505 17,17,17,17,
506 16,16,16,16,
507 15,15,15,15,
508 14,14,14,14,
509 13,13,13,13,
510 12,12,12,12,
511 11,11,11,11,
512 10,10,10,10,
513 9,9,9,9,
514 8,8,8,8,
515 7,7,7,7,
516 6,6,6,6,
517 5,5,5,5,
518 4,4,4,4,
519 3,3,3,3,
520 2,2,2,2,
521 1,1,1,1
522 };
523
524 /* LFO Phase Modulation table (verified on real YM3812) */
525 static const int8 lfo_pm_table[8*8*2] = {
526
527 /* FNUM2/FNUM = 00 0xxxxxxx (0x0000) */
528 0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
529 0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/
530
531 /* FNUM2/FNUM = 00 1xxxxxxx (0x0080) */
532 0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
533 1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/
534
535 /* FNUM2/FNUM = 01 0xxxxxxx (0x0100) */
536 1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
537 2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/
538
539 /* FNUM2/FNUM = 01 1xxxxxxx (0x0180) */
540 1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
541 3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/
542
543 /* FNUM2/FNUM = 10 0xxxxxxx (0x0200) */
544 2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
545 4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/
546
547 /* FNUM2/FNUM = 10 1xxxxxxx (0x0280) */
548 2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
549 5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/
550
551 /* FNUM2/FNUM = 11 0xxxxxxx (0x0300) */
552 3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
553 6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/
554
555 /* FNUM2/FNUM = 11 1xxxxxxx (0x0380) */
556 3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
557 7, 3, 0,-3,-7,-3, 0, 3 /*LFO PM depth = 1*/
558 };
559
560
561 /* lock level of common table */
562 static int num_lock = 0;
563
564 /* work table */
565 static void *cur_chip = NULL; /* current chip point */
566 OPL_SLOT *SLOT7_1,*SLOT7_2,*SLOT8_1,*SLOT8_2;
567
568 static signed int phase_modulation; /* phase modulation input (SLOT 2) */
569 static signed int output[1];
570
571 #if BUILD_Y8950
572 static int32 output_deltat[4]; /* for Y8950 DELTA-T */
573 #endif
574
575 static uint32 LFO_AM;
576 static int32 LFO_PM;
577
578
579
limit(int val,int max,int min)580 INLINE int limit( int val, int max, int min ) {
581 if ( val > max )
582 val = max;
583 else if ( val < min )
584 val = min;
585
586 return val;
587 }
588
589
590 /* status set and IRQ handling */
OPL_STATUS_SET(FM_OPL * OPL,int flag)591 INLINE void OPL_STATUS_SET(FM_OPL *OPL,int flag)
592 {
593 /* set status flag */
594 OPL->status |= flag;
595 if(!(OPL->status & 0x80))
596 {
597 if(OPL->status & OPL->statusmask)
598 { /* IRQ on */
599 OPL->status |= 0x80;
600 /* callback user interrupt handler (IRQ is OFF to ON) */
601 if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,1);
602 }
603 }
604 }
605
606 /* status reset and IRQ handling */
OPL_STATUS_RESET(FM_OPL * OPL,int flag)607 INLINE void OPL_STATUS_RESET(FM_OPL *OPL,int flag)
608 {
609 /* reset status flag */
610 OPL->status &=~flag;
611 if((OPL->status & 0x80))
612 {
613 if (!(OPL->status & OPL->statusmask) )
614 {
615 OPL->status &= 0x7f;
616 /* callback user interrupt handler (IRQ is ON to OFF) */
617 if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,0);
618 }
619 }
620 }
621
622 /* IRQ mask set */
OPL_STATUSMASK_SET(FM_OPL * OPL,int flag)623 INLINE void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag)
624 {
625 OPL->statusmask = flag;
626 /* IRQ handling check */
627 OPL_STATUS_SET(OPL,0);
628 OPL_STATUS_RESET(OPL,0);
629 }
630
631
632 /* advance LFO to next sample */
advance_lfo(FM_OPL * OPL)633 INLINE void advance_lfo(FM_OPL *OPL)
634 {
635 uint8 tmp;
636
637 /* LFO */
638 OPL->lfo_am_cnt += OPL->lfo_am_inc;
639 if (OPL->lfo_am_cnt >= (uint32)(LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
640 OPL->lfo_am_cnt -= (uint32)(LFO_AM_TAB_ELEMENTS<<LFO_SH);
641
642 tmp = lfo_am_table[ OPL->lfo_am_cnt >> LFO_SH ];
643
644 if (OPL->lfo_am_depth)
645 LFO_AM = tmp;
646 else
647 LFO_AM = tmp>>2;
648
649 OPL->lfo_pm_cnt += OPL->lfo_pm_inc;
650 LFO_PM = ((OPL->lfo_pm_cnt>>LFO_SH) & 7) | OPL->lfo_pm_depth_range;
651 }
652
653 /* advance to next sample */
advancex(FM_OPL * OPL)654 INLINE void advancex(FM_OPL *OPL)
655 {
656 OPL_CH *CH;
657 OPL_SLOT *op;
658 int i;
659
660 OPL->eg_timer += OPL->eg_timer_add;
661
662 while (OPL->eg_timer >= OPL->eg_timer_overflow)
663 {
664 OPL->eg_timer -= OPL->eg_timer_overflow;
665
666 OPL->eg_cnt++;
667
668 for (i=0; i<9*2; i++)
669 {
670 CH = &OPL->P_CH[i/2];
671 op = &CH->SLOT[i&1];
672
673 /* Envelope Generator */
674 switch(op->state)
675 {
676 case EG_ATT: /* attack phase */
677 {
678
679 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
680 {
681 op->volume += (~op->volume *
682 (eg_inc[op->eg_sel_ar + ((OPL->eg_cnt>>op->eg_sh_ar)&7)])
683 ) >>3;
684
685 if (op->volume <= MIN_ATT_INDEX)
686 {
687 op->volume = MIN_ATT_INDEX;
688 op->state = EG_DEC;
689 }
690
691 }
692
693 }
694 break;
695
696 case EG_DEC: /* decay phase */
697 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
698 {
699 op->volume += eg_inc[op->eg_sel_dr + ((OPL->eg_cnt>>op->eg_sh_dr)&7)];
700
701 if ( op->volume >= (int32)op->sl )
702 op->state = EG_SUS;
703
704 }
705 break;
706
707 case EG_SUS: /* sustain phase */
708
709 /* this is important behaviour:
710 one can change percusive/non-percussive modes on the fly and
711 the chip will remain in sustain phase - verified on real YM3812 */
712
713 if(op->eg_type) /* non-percussive mode */
714 {
715 /* do nothing */
716 }
717 else /* percussive mode */
718 {
719 /* during sustain phase chip adds Release Rate (in percussive mode) */
720 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
721 {
722 op->volume += eg_inc[op->eg_sel_rr + ((OPL->eg_cnt>>op->eg_sh_rr)&7)];
723
724 if ( op->volume >= MAX_ATT_INDEX )
725 op->volume = MAX_ATT_INDEX;
726 }
727 /* else do nothing in sustain phase */
728 }
729 break;
730
731 case EG_REL: /* release phase */
732 if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
733 {
734 op->volume += eg_inc[op->eg_sel_rr + ((OPL->eg_cnt>>op->eg_sh_rr)&7)];
735
736 if ( op->volume >= MAX_ATT_INDEX )
737 {
738 op->volume = MAX_ATT_INDEX;
739 op->state = EG_OFF;
740 }
741
742 }
743 break;
744
745 default:
746 break;
747 }
748 }
749 }
750
751 for (i=0; i<9*2; i++)
752 {
753 CH = &OPL->P_CH[i/2];
754 op = &CH->SLOT[i&1];
755
756 /* Phase Generator */
757 if(op->vib)
758 {
759 uint8 block;
760 unsigned int block_fnum = CH->block_fnum;
761
762 unsigned int fnum_lfo = (block_fnum&0x0380) >> 7;
763
764 signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + 16*fnum_lfo ];
765
766 if (lfo_fn_table_index_offset) /* LFO phase modulation active */
767 {
768 block_fnum += lfo_fn_table_index_offset;
769 block = (block_fnum&0x1c00) >> 10;
770 op->Cnt += (OPL->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;//ok
771 }
772 else /* LFO phase modulation = zero */
773 {
774 op->Cnt += op->Incr;
775 }
776 }
777 else /* LFO phase modulation disabled for this operator */
778 {
779 op->Cnt += op->Incr;
780 }
781 }
782
783 /* The Noise Generator of the YM3812 is 23-bit shift register.
784 * Period is equal to 2^23-2 samples.
785 * Register works at sampling frequency of the chip, so output
786 * can change on every sample.
787 *
788 * Output of the register and input to the bit 22 is:
789 * bit0 XOR bit14 XOR bit15 XOR bit22
790 *
791 * Simply use bit 22 as the noise output.
792 */
793
794 OPL->noise_p += OPL->noise_f;
795 i = OPL->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
796 OPL->noise_p &= FREQ_MASK;
797 while (i)
798 {
799 /*
800 uint32 j;
801 j = ( (OPL->noise_rng) ^ (OPL->noise_rng>>14) ^ (OPL->noise_rng>>15) ^ (OPL->noise_rng>>22) ) & 1;
802 OPL->noise_rng = (j<<22) | (OPL->noise_rng>>1);
803 */
804
805 /*
806 Instead of doing all the logic operations above, we
807 use a trick here (and use bit 0 as the noise output).
808 The difference is only that the noise bit changes one
809 step ahead. This doesn't matter since we don't know
810 what is real state of the noise_rng after the reset.
811 */
812
813 if (OPL->noise_rng & 1) OPL->noise_rng ^= 0x800302;
814 OPL->noise_rng >>= 1;
815
816 i--;
817 }
818 }
819
820
op_calc(uint32 phase,unsigned int env,signed int pm,unsigned int wave_tab)821 INLINE signed int op_calc(uint32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
822 {
823 uint32 p;
824
825 p = (env<<4) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<16))) >> FREQ_SH ) & SIN_MASK) ];
826
827 if (p >= TL_TAB_LEN)
828 return 0;
829 return tl_tab[p];
830 }
831
op_calc1(uint32 phase,unsigned int env,signed int pm,unsigned int wave_tab)832 INLINE signed int op_calc1(uint32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
833 {
834 uint32 p;
835 int32 i;
836
837 i = (phase & ~FREQ_MASK) + pm;
838
839 /*logerror("i=%08x (i>>16)&511=%8i phase=%i [pm=%08x] ",i, (i>>16)&511, phase>>FREQ_SH, pm);*/
840
841 p = (env<<4) + sin_tab[ wave_tab + ((i>>FREQ_SH) & SIN_MASK)];
842
843 /*logerror("(p&255=%i p>>8=%i) out= %i\n", p&255,p>>8, tl_tab[p&255]>>(p>>8) );*/
844
845 if (p >= TL_TAB_LEN)
846 return 0;
847 return tl_tab[p];
848 }
849
850
851 #define volume_calc(OP) ((OP)->TLL + ((uint32)(OP)->volume) + (LFO_AM & (OP)->AMmask))
852
853 /* calculate output */
OPL_CALC_CH(OPL_CH * CH)854 INLINE void OPL_CALC_CH( OPL_CH *CH )
855 {
856 OPL_SLOT *SLOT;
857 unsigned int env;
858 signed int out;
859
860 phase_modulation = 0;
861
862 /* SLOT 1 */
863 SLOT = &CH->SLOT[SLOT1];
864 env = volume_calc(SLOT);
865 out = SLOT->op1_out[0] + SLOT->op1_out[1];
866 SLOT->op1_out[0] = SLOT->op1_out[1];
867 *SLOT->connect1 += SLOT->op1_out[0];
868 SLOT->op1_out[1] = 0;
869 if( env < ENV_QUIET )
870 {
871 if (!SLOT->FB)
872 out = 0;
873 SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable );
874 }
875
876 /* SLOT 2 */
877 SLOT++;
878 env = volume_calc(SLOT);
879 if( env < ENV_QUIET )
880 output[0] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable);
881 }
882
883 /*
884 operators used in the rhythm sounds generation process:
885
886 Envelope Generator:
887
888 channel operator register number Bass High Snare Tom Top
889 / slot number TL ARDR SLRR Wave Drum Hat Drum Tom Cymbal
890 6 / 0 12 50 70 90 f0 +
891 6 / 1 15 53 73 93 f3 +
892 7 / 0 13 51 71 91 f1 +
893 7 / 1 16 54 74 94 f4 +
894 8 / 0 14 52 72 92 f2 +
895 8 / 1 17 55 75 95 f5 +
896
897 Phase Generator:
898
899 channel operator register number Bass High Snare Tom Top
900 / slot number MULTIPLE Drum Hat Drum Tom Cymbal
901 6 / 0 12 30 +
902 6 / 1 15 33 +
903 7 / 0 13 31 + + +
904 7 / 1 16 34 ----- n o t u s e d -----
905 8 / 0 14 32 +
906 8 / 1 17 35 + +
907
908 channel operator register number Bass High Snare Tom Top
909 number number BLK/FNUM2 FNUM Drum Hat Drum Tom Cymbal
910 6 12,15 B6 A6 +
911
912 7 13,16 B7 A7 + + +
913
914 8 14,17 B8 A8 + + +
915
916 */
917
918 /* calculate rhythm */
919
OPL_CALC_RH(OPL_CH * CH,unsigned int noise)920 INLINE void OPL_CALC_RH( OPL_CH *CH, unsigned int noise )
921 {
922 OPL_SLOT *SLOT;
923 signed int out;
924 unsigned int env;
925
926
927 /* Bass Drum (verified on real YM3812):
928 - depends on the channel 6 'connect' register:
929 when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
930 when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
931 - output sample always is multiplied by 2
932 */
933
934 phase_modulation = 0;
935 /* SLOT 1 */
936 SLOT = &CH[6].SLOT[SLOT1];
937 env = volume_calc(SLOT);
938
939 out = SLOT->op1_out[0] + SLOT->op1_out[1];
940 SLOT->op1_out[0] = SLOT->op1_out[1];
941
942 if (!SLOT->CON)
943 phase_modulation = SLOT->op1_out[0];
944 //else ignore output of operator 1
945
946 SLOT->op1_out[1] = 0;
947 if( env < ENV_QUIET )
948 {
949 if (!SLOT->FB)
950 out = 0;
951 SLOT->op1_out[1] = op_calc1(SLOT->Cnt, env, (out<<SLOT->FB), SLOT->wavetable );
952 }
953
954 /* SLOT 2 */
955 SLOT++;
956 env = volume_calc(SLOT);
957 if( env < ENV_QUIET )
958 output[0] += op_calc(SLOT->Cnt, env, phase_modulation, SLOT->wavetable) * 2;
959
960
961 /* Phase generation is based on: */
962 // HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases)
963 // SD (16) channel 7->slot 1
964 // TOM (14) channel 8->slot 1
965 // TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases)
966
967 /* Envelope generation based on: */
968 // HH channel 7->slot1
969 // SD channel 7->slot2
970 // TOM channel 8->slot1
971 // TOP channel 8->slot2
972
973
974 /* The following formulas can be well optimized.
975 I leave them in direct form for now (in case I've missed something).
976 */
977
978 /* High Hat (verified on real YM3812) */
979 env = volume_calc(SLOT7_1);
980 if( env < ENV_QUIET )
981 {
982
983 /* high hat phase generation:
984 phase = d0 or 234 (based on frequency only)
985 phase = 34 or 2d0 (based on noise)
986 */
987
988 /* base frequency derived from operator 1 in channel 7 */
989 unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1;
990 unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1;
991 unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1;
992
993 unsigned char res1 = (bit2 ^ bit7) | bit3;
994
995 /* when res1 = 0 phase = 0x000 | 0xd0; */
996 /* when res1 = 1 phase = 0x200 | (0xd0>>2); */
997 uint32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0;
998
999 /* enable gate based on frequency of operator 2 in channel 8 */
1000 unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1;
1001 unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1;
1002
1003 unsigned char res2 = (bit3e ^ bit5e);
1004
1005 /* when res2 = 0 pass the phase from calculation above (res1); */
1006 /* when res2 = 1 phase = 0x200 | (0xd0>>2); */
1007 if (res2)
1008 phase = (0x200|(0xd0>>2));
1009
1010
1011 /* when phase & 0x200 is set and noise=1 then phase = 0x200|0xd0 */
1012 /* when phase & 0x200 is set and noise=0 then phase = 0x200|(0xd0>>2), ie no change */
1013 if (phase&0x200)
1014 {
1015 if (noise)
1016 phase = 0x200|0xd0;
1017 }
1018 else
1019 /* when phase & 0x200 is clear and noise=1 then phase = 0xd0>>2 */
1020 /* when phase & 0x200 is clear and noise=0 then phase = 0xd0, ie no change */
1021 {
1022 if (noise)
1023 phase = 0xd0>>2;
1024 }
1025
1026 output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
1027 }
1028
1029 /* Snare Drum (verified on real YM3812) */
1030 env = volume_calc(SLOT7_2);
1031 if( env < ENV_QUIET )
1032 {
1033 /* base frequency derived from operator 1 in channel 7 */
1034 unsigned char bit8 = ((SLOT7_1->Cnt>>FREQ_SH)>>8)&1;
1035
1036 /* when bit8 = 0 phase = 0x100; */
1037 /* when bit8 = 1 phase = 0x200; */
1038 uint32 phase = bit8 ? 0x200 : 0x100;
1039
1040 /* Noise bit XOR'es phase by 0x100 */
1041 /* when noisebit = 0 pass the phase from calculation above */
1042 /* when noisebit = 1 phase ^= 0x100; */
1043 /* in other words: phase ^= (noisebit<<8); */
1044 if (noise)
1045 phase ^= 0x100;
1046
1047 output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
1048 }
1049
1050 /* Tom Tom (verified on real YM3812) */
1051 env = volume_calc(SLOT8_1);
1052 if( env < ENV_QUIET )
1053 output[0] += op_calc(SLOT8_1->Cnt, env, 0, SLOT8_1->wavetable) * 2;
1054
1055 /* Top Cymbal (verified on real YM3812) */
1056 env = volume_calc(SLOT8_2);
1057 if( env < ENV_QUIET )
1058 {
1059 /* base frequency derived from operator 1 in channel 7 */
1060 unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1;
1061 unsigned char bit3 = ((SLOT7_1->Cnt>>FREQ_SH)>>3)&1;
1062 unsigned char bit2 = ((SLOT7_1->Cnt>>FREQ_SH)>>2)&1;
1063
1064 unsigned char res1 = (bit2 ^ bit7) | bit3;
1065
1066 /* when res1 = 0 phase = 0x000 | 0x100; */
1067 /* when res1 = 1 phase = 0x200 | 0x100; */
1068 uint32 phase = res1 ? 0x300 : 0x100;
1069
1070 /* enable gate based on frequency of operator 2 in channel 8 */
1071 unsigned char bit5e= ((SLOT8_2->Cnt>>FREQ_SH)>>5)&1;
1072 unsigned char bit3e= ((SLOT8_2->Cnt>>FREQ_SH)>>3)&1;
1073
1074 unsigned char res2 = (bit3e ^ bit5e);
1075 /* when res2 = 0 pass the phase from calculation above (res1); */
1076 /* when res2 = 1 phase = 0x200 | 0x100; */
1077 if (res2)
1078 phase = 0x300;
1079
1080 output[0] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2;
1081 }
1082
1083 }
1084
1085
1086 /* generic table initialize */
init_tables(void)1087 static int init_tables(void)
1088 {
1089 signed int i,x;
1090 signed int n;
1091 double o,m;
1092
1093
1094 for (x=0; x<TL_RES_LEN; x++)
1095 {
1096 m = (1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0);
1097 m = floor(m);
1098
1099 /* we never reach (1<<16) here due to the (x+1) */
1100 /* result fits within 16 bits at maximum */
1101
1102 n = (int)m; /* 16 bits here */
1103 n >>= 4; /* 12 bits here */
1104 if (n&1) /* round to nearest */
1105 n = (n>>1)+1;
1106 else
1107 n = n>>1;
1108 /* 11 bits here (rounded) */
1109 n <<= 1; /* 12 bits here (as in real chip) */
1110 tl_tab[ x*2 + 0 ] = n;
1111 tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
1112
1113 for (i=1; i<12; i++)
1114 {
1115 tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i;
1116 tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ];
1117 }
1118 #if 0
1119 logerror("tl %04i", x*2);
1120 for (i=0; i<12; i++)
1121 logerror(", [%02i] %5i", i*2, tl_tab[ x*2 /*+1*/ + i*2*TL_RES_LEN ] );
1122 logerror("\n");
1123 #endif
1124 }
1125 /*logerror("FMOPL.C: TL_TAB_LEN = %i elements (%i bytes)\n",TL_TAB_LEN, (int)sizeof(tl_tab));*/
1126
1127
1128 for (i=0; i<SIN_LEN; i++)
1129 {
1130 /* non-standard sinus */
1131 m = sin( ((i*2)+1) * PI / SIN_LEN ); /* checked against the real chip */
1132
1133 /* we never reach zero here due to ((i*2)+1) */
1134
1135 if (m>0.0)
1136 o = 8*log(1.0/m)/log(2); /* convert to 'decibels' */
1137 else
1138 o = 8*log(-1.0/m)/log(2); /* convert to 'decibels' */
1139
1140 o = o / (ENV_STEP/4);
1141
1142 n = (int)(2.0*o);
1143 if (n&1) /* round to nearest */
1144 n = (n>>1)+1;
1145 else
1146 n = n>>1;
1147
1148 sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 );
1149
1150 /*logerror("FMOPL.C: sin [%4i (hex=%03x)]= %4i (tl_tab value=%5i)\n", i, i, sin_tab[i], tl_tab[sin_tab[i]] );*/
1151 }
1152
1153 for (i=0; i<SIN_LEN; i++)
1154 {
1155 /* waveform 1: __ __ */
1156 /* / \____/ \____*/
1157 /* output only first half of the sinus waveform (positive one) */
1158
1159 if (i & (1<<(SIN_BITS-1)) )
1160 sin_tab[1*SIN_LEN+i] = TL_TAB_LEN;
1161 else
1162 sin_tab[1*SIN_LEN+i] = sin_tab[i];
1163
1164 /* waveform 2: __ __ __ __ */
1165 /* / \/ \/ \/ \*/
1166 /* abs(sin) */
1167
1168 sin_tab[2*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>1) ];
1169
1170 /* waveform 3: _ _ _ _ */
1171 /* / |_/ |_/ |_/ |_*/
1172 /* abs(output only first quarter of the sinus waveform) */
1173
1174 if (i & (1<<(SIN_BITS-2)) )
1175 sin_tab[3*SIN_LEN+i] = TL_TAB_LEN;
1176 else
1177 sin_tab[3*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>2)];
1178
1179 /*logerror("FMOPL.C: sin1[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[1*SIN_LEN+i], tl_tab[sin_tab[1*SIN_LEN+i]] );
1180 logerror("FMOPL.C: sin2[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[2*SIN_LEN+i], tl_tab[sin_tab[2*SIN_LEN+i]] );
1181 logerror("FMOPL.C: sin3[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[3*SIN_LEN+i], tl_tab[sin_tab[3*SIN_LEN+i]] );*/
1182 }
1183 /*logerror("FMOPL.C: ENV_QUIET= %08x (dec*8=%i)\n", ENV_QUIET, ENV_QUIET*8 );*/
1184
1185
1186 #ifdef SAVE_SAMPLE
1187 sample[0]=fopen("sampsum.pcm","wb");
1188 #endif
1189
1190 return 1;
1191 }
1192
OPLCloseTable(void)1193 static void OPLCloseTable( void )
1194 {
1195 #ifdef SAVE_SAMPLE
1196 fclose(sample[0]);
1197 #endif
1198 }
1199
1200
1201
OPL_initalize(FM_OPL * OPL)1202 static void OPL_initalize(FM_OPL *OPL)
1203 {
1204 int i;
1205
1206 /* frequency base */
1207 #if 1
1208 OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / 72.0) / OPL->rate : 0;
1209 #else
1210 OPL->rate = (double)OPL->clock / 72.0;
1211 OPL->freqbase = 1.0;
1212 #endif
1213
1214 /* Timer base time */
1215 OPL->TimerBase = 1.0 / ((double)OPL->clock / 72.0 );
1216
1217 /* make fnumber -> increment counter table */
1218 for( i=0 ; i < 1024 ; i++ )
1219 {
1220 /* opn phase increment counter = 20bit */
1221 OPL->fn_tab[i] = (uint32)( (double)i * 64 * OPL->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
1222 #if 0
1223 logerror("FMOPL.C: fn_tab[%4i] = %08x (dec=%8i)\n",
1224 i, OPL->fn_tab[i]>>6, OPL->fn_tab[i]>>6 );
1225 #endif
1226 }
1227
1228 #if 0
1229 for( i=0 ; i < 16 ; i++ )
1230 {
1231 logerror("FMOPL.C: sl_tab[%i] = %08x\n",
1232 i, sl_tab[i] );
1233 }
1234 for( i=0 ; i < 8 ; i++ )
1235 {
1236 int j;
1237 logerror("FMOPL.C: ksl_tab[oct=%2i] =",i);
1238 for (j=0; j<16; j++)
1239 {
1240 logerror("%08x ", ksl_tab[i*16+j] );
1241 }
1242 logerror("\n");
1243 }
1244 #endif
1245
1246
1247 /* Amplitude modulation: 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples */
1248 /* One entry from LFO_AM_TABLE lasts for 64 samples */
1249 OPL->lfo_am_inc = (1.0 / 64.0 ) * (1<<LFO_SH) * OPL->freqbase;
1250
1251 /* Vibrato: 8 output levels (triangle waveform); 1 level takes 1024 samples */
1252 OPL->lfo_pm_inc = (1.0 / 1024.0) * (1<<LFO_SH) * OPL->freqbase;
1253
1254 /*logerror ("OPL->lfo_am_inc = %8x ; OPL->lfo_pm_inc = %8x\n", OPL->lfo_am_inc, OPL->lfo_pm_inc);*/
1255
1256 /* Noise generator: a step takes 1 sample */
1257 OPL->noise_f = (1.0 / 1.0) * (1<<FREQ_SH) * OPL->freqbase;
1258
1259 OPL->eg_timer_add = (1<<EG_SH) * OPL->freqbase;
1260 OPL->eg_timer_overflow = ( 1 ) * (1<<EG_SH);
1261 /*logerror("OPLinit eg_timer_add=%8x eg_timer_overflow=%8x\n", OPL->eg_timer_add, OPL->eg_timer_overflow);*/
1262
1263 }
1264
FM_KEYON(OPL_SLOT * SLOT,uint32 key_set)1265 INLINE void FM_KEYON(OPL_SLOT *SLOT, uint32 key_set)
1266 {
1267 if( !SLOT->key )
1268 {
1269 /* restart Phase Generator */
1270 SLOT->Cnt = 0;
1271 /* phase -> Attack */
1272 SLOT->state = EG_ATT;
1273 }
1274 SLOT->key |= key_set;
1275 }
1276
FM_KEYOFF(OPL_SLOT * SLOT,uint32 key_clr)1277 INLINE void FM_KEYOFF(OPL_SLOT *SLOT, uint32 key_clr)
1278 {
1279 if( SLOT->key )
1280 {
1281 SLOT->key &= key_clr;
1282
1283 if( !SLOT->key )
1284 {
1285 /* phase -> Release */
1286 if (SLOT->state>EG_REL)
1287 SLOT->state = EG_REL;
1288 }
1289 }
1290 }
1291
1292 /* update phase increment counter of operator (also update the EG rates if necessary) */
CALC_FCSLOT(OPL_CH * CH,OPL_SLOT * SLOT)1293 INLINE void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT)
1294 {
1295 int ksr;
1296
1297 /* (frequency) phase increment counter */
1298 SLOT->Incr = CH->fc * SLOT->mul;
1299 ksr = CH->kcode >> SLOT->KSR;
1300
1301 if( SLOT->ksr != ksr )
1302 {
1303 SLOT->ksr = ksr;
1304
1305 /* calculate envelope generator rates */
1306 if ((SLOT->ar + SLOT->ksr) < 16+62)
1307 {
1308 SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1309 SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1310 }
1311 else
1312 {
1313 SLOT->eg_sh_ar = 0;
1314 SLOT->eg_sel_ar = 13*RATE_STEPS;
1315 }
1316 SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1317 SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1318 SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1319 SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1320 }
1321 }
1322
1323 /* set multi,am,vib,EG-TYP,KSR,mul */
set_mul(FM_OPL * OPL,int slot,int v)1324 INLINE void set_mul(FM_OPL *OPL,int slot,int v)
1325 {
1326 OPL_CH *CH = &OPL->P_CH[slot/2];
1327 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
1328
1329 SLOT->mul = mul_tab[v&0x0f];
1330 SLOT->KSR = (v&0x10) ? 0 : 2;
1331 SLOT->eg_type = (v&0x20);
1332 SLOT->vib = (v&0x40);
1333 SLOT->AMmask = (v&0x80) ? ~0 : 0;
1334 CALC_FCSLOT(CH,SLOT);
1335 }
1336
1337 /* set ksl & tl */
set_ksl_tl(FM_OPL * OPL,int slot,int v)1338 INLINE void set_ksl_tl(FM_OPL *OPL,int slot,int v)
1339 {
1340 OPL_CH *CH = &OPL->P_CH[slot/2];
1341 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
1342 int ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */
1343
1344 SLOT->ksl = ksl ? 3-ksl : 31;
1345 SLOT->TL = (v&0x3f)<<(ENV_BITS-1-7); /* 7 bits TL (bit 6 = always 0) */
1346
1347 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1348 }
1349
1350 /* set attack rate & decay rate */
set_ar_dr(FM_OPL * OPL,int slot,int v)1351 INLINE void set_ar_dr(FM_OPL *OPL,int slot,int v)
1352 {
1353 OPL_CH *CH = &OPL->P_CH[slot/2];
1354 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
1355
1356 SLOT->ar = (v>>4) ? 16 + ((v>>4) <<2) : 0;
1357
1358 if ((SLOT->ar + SLOT->ksr) < 16+62)
1359 {
1360 SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1361 SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1362 }
1363 else
1364 {
1365 SLOT->eg_sh_ar = 0;
1366 SLOT->eg_sel_ar = 13*RATE_STEPS;
1367 }
1368
1369 SLOT->dr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1370 SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1371 SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1372 }
1373
1374 /* set sustain level & release rate */
set_sl_rr(FM_OPL * OPL,int slot,int v)1375 INLINE void set_sl_rr(FM_OPL *OPL,int slot,int v)
1376 {
1377 OPL_CH *CH = &OPL->P_CH[slot/2];
1378 OPL_SLOT *SLOT = &CH->SLOT[slot&1];
1379
1380 SLOT->sl = sl_tab[ v>>4 ];
1381
1382 SLOT->rr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1383 SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1384 SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1385 }
1386
1387
1388 /* write a value v to register r on OPL chip */
OPLWriteReg(FM_OPL * OPL,int r,int v)1389 static void OPLWriteReg(FM_OPL *OPL, int r, int v)
1390 {
1391 OPL_CH *CH;
1392 int slot;
1393 int block_fnum;
1394
1395
1396 /* adjust bus to 8 bits */
1397 r &= 0xff;
1398 v &= 0xff;
1399
1400 #ifdef LOG_CYM_FILE
1401 if ((cymfile) && (r!=0) )
1402 {
1403 fputc( (unsigned char)r, cymfile );
1404 fputc( (unsigned char)v, cymfile );
1405 }
1406 #endif
1407
1408
1409 switch(r&0xe0)
1410 {
1411 case 0x00: /* 00-1f:control */
1412 switch(r&0x1f)
1413 {
1414 case 0x01: /* waveform select enable */
1415 if(OPL->type&OPL_TYPE_WAVESEL)
1416 {
1417 OPL->wavesel = v&0x20;
1418 /* do not change the waveform previously selected */
1419 }
1420 break;
1421 case 0x02: /* Timer 1 */
1422 OPL->T[0] = (256-v)*4;
1423 break;
1424 case 0x03: /* Timer 2 */
1425 OPL->T[1] = (256-v)*16;
1426 break;
1427 case 0x04: /* IRQ clear / mask and Timer enable */
1428 if(v&0x80)
1429 { /* IRQ flag clear */
1430 OPL_STATUS_RESET(OPL,0x7f);
1431 }
1432 else
1433 { /* set IRQ mask ,timer enable*/
1434 uint8 st1 = v&1;
1435 uint8 st2 = (v>>1)&1;
1436 /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */
1437 OPL_STATUS_RESET(OPL,v&0x78);
1438 OPL_STATUSMASK_SET(OPL,((~v)&0x78)|0x01);
1439 /* timer 2 */
1440 if(OPL->st[1] != st2)
1441 {
1442 double interval = st2 ? (double)OPL->T[1]*OPL->TimerBase : 0.0;
1443 OPL->st[1] = st2;
1444 if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+1,interval);
1445 }
1446 /* timer 1 */
1447 if(OPL->st[0] != st1)
1448 {
1449 double interval = st1 ? (double)OPL->T[0]*OPL->TimerBase : 0.0;
1450 OPL->st[0] = st1;
1451 if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+0,interval);
1452 }
1453 }
1454 break;
1455 #if BUILD_Y8950
1456 case 0x06: /* Key Board OUT */
1457 if(OPL->type&OPL_TYPE_KEYBOARD)
1458 {
1459 if(OPL->keyboardhandler_w)
1460 OPL->keyboardhandler_w(OPL->keyboard_param,v);
1461 else
1462 logerror("OPL:write unmapped KEYBOARD port\n");
1463 }
1464 break;
1465 case 0x07: /* DELTA-T controll : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
1466 if(OPL->type&OPL_TYPE_ADPCM)
1467 YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
1468 break;
1469 #endif
1470 case 0x08: /* MODE,DELTA-T : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
1471 OPL->mode = v;
1472 #if !(BUILD_Y8950)
1473 break;
1474 #endif
1475
1476 #if BUILD_Y8950
1477 v&=0x1f; /* for DELTA-T unit */
1478 case 0x09: /* START ADD */
1479 case 0x0a:
1480 case 0x0b: /* STOP ADD */
1481 case 0x0c:
1482 case 0x0d: /* PRESCALE */
1483 case 0x0e:
1484 case 0x0f: /* ADPCM data */
1485 case 0x10: /* DELTA-N */
1486 case 0x11: /* DELTA-N */
1487 case 0x12: /* EG-CTRL */
1488 if(OPL->type&OPL_TYPE_ADPCM)
1489 YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
1490 break;
1491 #if 0
1492 case 0x15: /* DAC data */
1493 case 0x16:
1494 case 0x17: /* SHIFT */
1495 break;
1496 case 0x18: /* I/O CTRL (Direction) */
1497 if(OPL->type&OPL_TYPE_IO)
1498 OPL->portDirection = v&0x0f;
1499 break;
1500 case 0x19: /* I/O DATA */
1501 if(OPL->type&OPL_TYPE_IO)
1502 {
1503 OPL->portLatch = v;
1504 if(OPL->porthandler_w)
1505 OPL->porthandler_w(OPL->port_param,v&OPL->portDirection);
1506 }
1507 break;
1508 case 0x1a: /* PCM data */
1509 break;
1510 #endif
1511 #endif
1512 }
1513 break;
1514 case 0x20: /* am ON, vib ON, ksr, eg_type, mul */
1515 slot = slot_array[r&0x1f];
1516 if(slot < 0) return;
1517 set_mul(OPL,slot,v);
1518 break;
1519 case 0x40:
1520 slot = slot_array[r&0x1f];
1521 if(slot < 0) return;
1522 set_ksl_tl(OPL,slot,v);
1523 break;
1524 case 0x60:
1525 slot = slot_array[r&0x1f];
1526 if(slot < 0) return;
1527 set_ar_dr(OPL,slot,v);
1528 break;
1529 case 0x80:
1530 slot = slot_array[r&0x1f];
1531 if(slot < 0) return;
1532 set_sl_rr(OPL,slot,v);
1533 break;
1534 case 0xa0:
1535 if (r == 0xbd) /* am depth, vibrato depth, r,bd,sd,tom,tc,hh */
1536 {
1537 OPL->lfo_am_depth = v & 0x80;
1538 OPL->lfo_pm_depth_range = (v&0x40) ? 8 : 0;
1539
1540 OPL->rhythm = v&0x3f;
1541
1542 if(OPL->rhythm&0x20)
1543 {
1544 /* BD key on/off */
1545 if(v&0x10)
1546 {
1547 FM_KEYON (&OPL->P_CH[6].SLOT[SLOT1], 2U);
1548 FM_KEYON (&OPL->P_CH[6].SLOT[SLOT2], 2U);
1549 }
1550 else
1551 {
1552 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1],~2U);
1553 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2],~2U);
1554 }
1555 /* HH key on/off */
1556 if(v&0x01) FM_KEYON (&OPL->P_CH[7].SLOT[SLOT1], 2U);
1557 else FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1],~2U);
1558 /* SD key on/off */
1559 if(v&0x08) FM_KEYON (&OPL->P_CH[7].SLOT[SLOT2], 2U);
1560 else FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2],~2U);
1561 /* TOM key on/off */
1562 if(v&0x04) FM_KEYON (&OPL->P_CH[8].SLOT[SLOT1], 2U);
1563 else FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1],~2U);
1564 /* TOP-CY key on/off */
1565 if(v&0x02) FM_KEYON (&OPL->P_CH[8].SLOT[SLOT2], 2U);
1566 else FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2],~2U);
1567 }
1568 else
1569 {
1570 /* BD key off */
1571 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1],~2U);
1572 FM_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2],~2U);
1573 /* HH key off */
1574 FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1],~2U);
1575 /* SD key off */
1576 FM_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2],~2U);
1577 /* TOM key off */
1578 FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1],~2U);
1579 /* TOP-CY off */
1580 FM_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2],~2U);
1581 }
1582 return;
1583 }
1584 /* keyon,block,fnum */
1585 if( (r&0x0f) > 8) return;
1586 CH = &OPL->P_CH[r&0x0f];
1587 if(!(r&0x10))
1588 { /* a0-a8 */
1589 block_fnum = (CH->block_fnum&0x1f00) | v;
1590 }
1591 else
1592 { /* b0-b8 */
1593 block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff);
1594
1595 if(v&0x20)
1596 {
1597 FM_KEYON (&CH->SLOT[SLOT1], 1U);
1598 FM_KEYON (&CH->SLOT[SLOT2], 1U);
1599 }
1600 else
1601 {
1602 FM_KEYOFF(&CH->SLOT[SLOT1],~1U);
1603 FM_KEYOFF(&CH->SLOT[SLOT2],~1U);
1604 }
1605 }
1606 /* update */
1607 if(CH->block_fnum != (uint32)block_fnum)
1608 {
1609 uint8 block = block_fnum >> 10;
1610
1611 CH->block_fnum = block_fnum;
1612
1613 CH->ksl_base = ksl_tab[block_fnum>>6];
1614 CH->fc = OPL->fn_tab[block_fnum&0x03ff] >> (7-block);
1615
1616 /* BLK 2,1,0 bits -> bits 3,2,1 of kcode */
1617 CH->kcode = (CH->block_fnum&0x1c00)>>9;
1618
1619 /* the info below is actually opposite to what is stated in the Manuals (verifed on real YM3812) */
1620 /* if notesel == 0 -> lsb of kcode is bit 10 (MSB) of fnum */
1621 /* if notesel == 1 -> lsb of kcode is bit 9 (MSB-1) of fnum */
1622 if (OPL->mode&0x40)
1623 CH->kcode |= (CH->block_fnum&0x100)>>8; /* notesel == 1 */
1624 else
1625 CH->kcode |= (CH->block_fnum&0x200)>>9; /* notesel == 0 */
1626
1627 /* refresh Total Level in both SLOTs of this channel */
1628 CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl);
1629 CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl);
1630
1631 /* refresh frequency counter in both SLOTs of this channel */
1632 CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
1633 CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
1634 }
1635 break;
1636 case 0xc0:
1637 /* FB,C */
1638 if( (r&0x0f) > 8) return;
1639 CH = &OPL->P_CH[r&0x0f];
1640 CH->SLOT[SLOT1].FB = (v>>1)&7 ? ((v>>1)&7) + 7 : 0;
1641 CH->SLOT[SLOT1].CON = v&1;
1642 CH->SLOT[SLOT1].connect1 = CH->SLOT[SLOT1].CON ? &output[0] : &phase_modulation;
1643 break;
1644 case 0xe0: /* waveform select */
1645 /* simply ignore write to the waveform select register if selecting not enabled in test register */
1646 if(OPL->wavesel)
1647 {
1648 slot = slot_array[r&0x1f];
1649 if(slot < 0) return;
1650 CH = &OPL->P_CH[slot/2];
1651
1652 CH->SLOT[slot&1].wavetable = (v&0x03)*SIN_LEN;
1653 }
1654 break;
1655 }
1656 }
1657
1658 #ifdef LOG_CYM_FILE
cymfile_callback(int n)1659 static void cymfile_callback (int n)
1660 {
1661 if (cymfile)
1662 {
1663 fputc( (unsigned char)0, cymfile );
1664 }
1665 }
1666 #endif
1667
1668 /* lock/unlock for common table */
OPL_LockTable(void)1669 static int OPL_LockTable(void)
1670 {
1671 num_lock++;
1672 if(num_lock>1) return 0;
1673
1674 /* first time */
1675
1676 cur_chip = NULL;
1677 /* allocate total level table (128kb space) */
1678 if( !init_tables() )
1679 {
1680 num_lock--;
1681 return -1;
1682 }
1683
1684 #ifdef LOG_CYM_FILE
1685 cymfile = fopen("3812_.cym","wb");
1686 if (cymfile)
1687 timer_pulse ( TIME_IN_HZ(110), 0, cymfile_callback); /*110 Hz pulse timer*/
1688 else
1689 logerror("Could not create file 3812_.cym\n");
1690 #endif
1691
1692 return 0;
1693 }
1694
OPL_UnLockTable(void)1695 static void OPL_UnLockTable(void)
1696 {
1697 if(num_lock) num_lock--;
1698 if(num_lock) return;
1699
1700 /* last time */
1701
1702 cur_chip = NULL;
1703 OPLCloseTable();
1704
1705 #ifdef LOG_CYM_FILE
1706 fclose (cymfile);
1707 cymfile = NULL;
1708 #endif
1709
1710 }
1711
OPLResetChip(FM_OPL * OPL)1712 static void OPLResetChip(FM_OPL *OPL)
1713 {
1714 int c,s;
1715 int i;
1716
1717 OPL->eg_timer = 0;
1718 OPL->eg_cnt = 0;
1719
1720 OPL->noise_rng = 1; /* noise shift register */
1721 OPL->mode = 0; /* normal mode */
1722 OPL_STATUS_RESET(OPL,0x7f);
1723
1724 /* reset with register write */
1725 OPLWriteReg(OPL,0x01,0); /* wavesel disable */
1726 OPLWriteReg(OPL,0x02,0); /* Timer1 */
1727 OPLWriteReg(OPL,0x03,0); /* Timer2 */
1728 OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */
1729 for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0);
1730
1731 /* reset operator parameters */
1732 for( c = 0 ; c < 9 ; c++ )
1733 {
1734 OPL_CH *CH = &OPL->P_CH[c];
1735 for(s = 0 ; s < 2 ; s++ )
1736 {
1737 /* wave table */
1738 CH->SLOT[s].wavetable = 0;
1739 CH->SLOT[s].state = EG_OFF;
1740 CH->SLOT[s].volume = MAX_ATT_INDEX;
1741 }
1742 }
1743 #if BUILD_Y8950
1744 if(OPL->type&OPL_TYPE_ADPCM)
1745 {
1746 YM_DELTAT *DELTAT = OPL->deltat;
1747
1748 DELTAT->freqbase = OPL->freqbase;
1749 DELTAT->output_pointer = &output_deltat[0];
1750 DELTAT->portshift = 5;
1751 DELTAT->output_range = 1<<23;
1752 YM_DELTAT_ADPCM_Reset(DELTAT,0);
1753 }
1754 #endif
1755 }
1756
1757 /* Create one of virtual YM3812 */
1758 /* 'clock' is chip clock in Hz */
1759 /* 'rate' is sampling rate */
OPLCreate(int type,int clock,int rate)1760 static FM_OPL *OPLCreate(int type, int clock, int rate)
1761 {
1762 char *ptr;
1763 FM_OPL *OPL;
1764 int state_size;
1765
1766 if (OPL_LockTable() ==-1) return NULL;
1767
1768 /* calculate OPL state size */
1769 state_size = sizeof(FM_OPL);
1770
1771 #if BUILD_Y8950
1772 if (type&OPL_TYPE_ADPCM) state_size+= sizeof(YM_DELTAT);
1773 #endif
1774
1775 /* allocate memory block */
1776 ptr = (char *)malloc(state_size);
1777
1778 if (ptr==NULL)
1779 return NULL;
1780
1781 /* clear */
1782 memset(ptr,0,state_size);
1783
1784 OPL = (FM_OPL *)ptr;
1785
1786 ptr += sizeof(FM_OPL);
1787
1788 #if BUILD_Y8950
1789 if (type&OPL_TYPE_ADPCM)
1790 OPL->deltat = (YM_DELTAT *)ptr;
1791 ptr += sizeof(YM_DELTAT);
1792 #endif
1793
1794 OPL->type = type;
1795 OPL->clock = clock;
1796 OPL->rate = rate;
1797
1798 /* init global tables */
1799 OPL_initalize(OPL);
1800
1801 /* reset chip */
1802 OPLResetChip(OPL);
1803 return OPL;
1804 }
1805
1806 /* Destroy one of virtual YM3812 */
OPLDestroy(FM_OPL * OPL)1807 static void OPLDestroy(FM_OPL *OPL)
1808 {
1809 OPL_UnLockTable();
1810 free(OPL);
1811 }
1812
1813 /* Option handlers */
1814
OPLSetTimerHandler(FM_OPL * OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset)1815 static void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset)
1816 {
1817 OPL->TimerHandler = TimerHandler;
1818 OPL->TimerParam = channelOffset;
1819 }
OPLSetIRQHandler(FM_OPL * OPL,OPL_IRQHANDLER IRQHandler,int param)1820 static void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,int param)
1821 {
1822 OPL->IRQHandler = IRQHandler;
1823 OPL->IRQParam = param;
1824 }
OPLSetUpdateHandler(FM_OPL * OPL,OPL_UPDATEHANDLER UpdateHandler,int param)1825 static void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,int param)
1826 {
1827 OPL->UpdateHandler = UpdateHandler;
1828 OPL->UpdateParam = param;
1829 }
1830
1831 /* YM3812 I/O interface */
OPLWrite(FM_OPL * OPL,int a,int v)1832 static int OPLWrite(FM_OPL *OPL,int a,int v)
1833 {
1834 if( !(a&1) )
1835 { /* address port */
1836 OPL->address = v & 0xff;
1837 }
1838 else
1839 { /* data port */
1840 if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
1841 OPLWriteReg(OPL,OPL->address,v);
1842 }
1843 return OPL->status>>7;
1844 }
1845
OPLRead(FM_OPL * OPL,int a)1846 static unsigned char OPLRead(FM_OPL *OPL,int a)
1847 {
1848 if( !(a&1) )
1849 {
1850 /* status port */
1851 return OPL->status & (OPL->statusmask|0x80);
1852 }
1853
1854 #if BUILD_Y8950
1855 /* data port */
1856 switch(OPL->address)
1857 {
1858 case 0x05: /* KeyBoard IN */
1859 if(OPL->type&OPL_TYPE_KEYBOARD)
1860 {
1861 if(OPL->keyboardhandler_r)
1862 return OPL->keyboardhandler_r(OPL->keyboard_param);
1863 else
1864 logerror("OPL:read unmapped KEYBOARD port\n");
1865 }
1866 return 0;
1867 #if 0
1868 case 0x0f: /* ADPCM-DATA */
1869 return 0;
1870 #endif
1871 case 0x19: /* I/O DATA */
1872 if(OPL->type&OPL_TYPE_IO)
1873 {
1874 if(OPL->porthandler_r)
1875 return OPL->porthandler_r(OPL->port_param);
1876 else
1877 logerror("OPL:read unmapped I/O port\n");
1878 }
1879 return 0;
1880 case 0x1a: /* PCM-DATA */
1881 return 0;
1882 }
1883 #endif
1884
1885 return 0xff;
1886 }
1887
1888 /* CSM Key Controll */
CSMKeyControll(OPL_CH * CH)1889 INLINE void CSMKeyControll(OPL_CH *CH)
1890 {
1891 FM_KEYON (&CH->SLOT[SLOT1], 4U);
1892 FM_KEYON (&CH->SLOT[SLOT2], 4U);
1893
1894 /* The key off should happen exactly one sample later - not implemented correctly yet */
1895
1896 FM_KEYOFF(&CH->SLOT[SLOT1], ~4U);
1897 FM_KEYOFF(&CH->SLOT[SLOT2], ~4U);
1898 }
1899
1900
OPLTimerOver(FM_OPL * OPL,int c)1901 static int OPLTimerOver(FM_OPL *OPL,int c)
1902 {
1903 if( c )
1904 { /* Timer B */
1905 OPL_STATUS_SET(OPL,0x20);
1906 }
1907 else
1908 { /* Timer A */
1909 OPL_STATUS_SET(OPL,0x40);
1910 /* CSM mode key,TL controll */
1911 if( OPL->mode & 0x80 )
1912 { /* CSM mode total level latch and auto key on */
1913 int ch;
1914 if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
1915 for(ch=0; ch<9; ch++)
1916 CSMKeyControll( &OPL->P_CH[ch] );
1917 }
1918 }
1919 /* reload timer */
1920 if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+c,(double)OPL->T[c]*OPL->TimerBase);
1921 return OPL->status>>7;
1922 }
1923
1924
1925 #define MAX_OPL_CHIPS 2
1926
1927
1928 #if (BUILD_YM3812)
1929
1930 static FM_OPL *OPL_YM3812[MAX_OPL_CHIPS]; /* array of pointers to the YM3812's */
1931 static int YM3812NumChips = 0; /* number of chips */
1932
YM3812Init(int num,int clock,int rate)1933 int YM3812Init(int num, int clock, int rate)
1934 {
1935 int i;
1936
1937 if (YM3812NumChips)
1938 return -1; /* duplicate init. */
1939
1940 YM3812NumChips = num;
1941
1942 for (i = 0;i < YM3812NumChips; i++)
1943 {
1944 /* emulator create */
1945 OPL_YM3812[i] = OPLCreate(OPL_TYPE_YM3812,clock,rate);
1946 if(OPL_YM3812[i] == NULL)
1947 {
1948 /* it's really bad - we run out of memeory */
1949 YM3812NumChips = 0;
1950 return -1;
1951 }
1952 }
1953
1954 return 0;
1955 }
1956
YM3812Shutdown(void)1957 void YM3812Shutdown(void)
1958 {
1959 int i;
1960
1961 for (i = 0;i < YM3812NumChips; i++)
1962 {
1963 /* emulator shutdown */
1964 OPLDestroy(OPL_YM3812[i]);
1965 OPL_YM3812[i] = NULL;
1966 }
1967 YM3812NumChips = 0;
1968 }
YM3812ResetChip(int which)1969 void YM3812ResetChip(int which)
1970 {
1971 OPLResetChip(OPL_YM3812[which]);
1972 }
1973
YM3812Write(int which,int a,int v)1974 int YM3812Write(int which, int a, int v)
1975 {
1976 return OPLWrite(OPL_YM3812[which], a, v);
1977 }
1978
YM3812Read(int which,int a)1979 unsigned char YM3812Read(int which, int a)
1980 {
1981 /* YM3812 always returns bit2 and bit1 in HIGH state */
1982 return OPLRead(OPL_YM3812[which], a) | 0x06 ;
1983 }
YM3812TimerOver(int which,int c)1984 int YM3812TimerOver(int which, int c)
1985 {
1986 return OPLTimerOver(OPL_YM3812[which], c);
1987 }
1988
YM3812SetTimerHandler(int which,OPL_TIMERHANDLER TimerHandler,int channelOffset)1989 void YM3812SetTimerHandler(int which, OPL_TIMERHANDLER TimerHandler, int channelOffset)
1990 {
1991 OPLSetTimerHandler(OPL_YM3812[which], TimerHandler, channelOffset);
1992 }
YM3812SetIRQHandler(int which,OPL_IRQHANDLER IRQHandler,int param)1993 void YM3812SetIRQHandler(int which,OPL_IRQHANDLER IRQHandler,int param)
1994 {
1995 OPLSetIRQHandler(OPL_YM3812[which], IRQHandler, param);
1996 }
YM3812SetUpdateHandler(int which,OPL_UPDATEHANDLER UpdateHandler,int param)1997 void YM3812SetUpdateHandler(int which,OPL_UPDATEHANDLER UpdateHandler,int param)
1998 {
1999 OPLSetUpdateHandler(OPL_YM3812[which], UpdateHandler, param);
2000 }
2001
2002
2003 /*
2004 ** Generate samples for one of the YM3812's
2005 **
2006 ** 'which' is the virtual YM3812 number
2007 ** '*buffer' is the output buffer pointer
2008 ** 'length' is the number of samples that should be generated
2009 */
YM3812UpdateOne(int which,int16 * buffer,int length)2010 void YM3812UpdateOne(int which, int16 *buffer, int length)
2011 {
2012 FM_OPL *OPL = OPL_YM3812[which];
2013 uint8 rhythm = OPL->rhythm&0x20;
2014 OPLSAMPLE *buf = buffer;
2015 int i;
2016
2017 if( (void *)OPL != cur_chip ){
2018 cur_chip = (void *)OPL;
2019 /* rhythm slots */
2020 SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
2021 SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
2022 SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
2023 SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
2024 }
2025 for( i=0; i < length ; i++ )
2026 {
2027 int lt;
2028
2029 output[0] = 0;
2030
2031 advance_lfo(OPL);
2032
2033 /* FM part */
2034 OPL_CALC_CH(&OPL->P_CH[0]);
2035 OPL_CALC_CH(&OPL->P_CH[1]);
2036 OPL_CALC_CH(&OPL->P_CH[2]);
2037 OPL_CALC_CH(&OPL->P_CH[3]);
2038 OPL_CALC_CH(&OPL->P_CH[4]);
2039 OPL_CALC_CH(&OPL->P_CH[5]);
2040
2041 if(!rhythm)
2042 {
2043 OPL_CALC_CH(&OPL->P_CH[6]);
2044 OPL_CALC_CH(&OPL->P_CH[7]);
2045 OPL_CALC_CH(&OPL->P_CH[8]);
2046 }
2047 else /* Rhythm part */
2048 {
2049 OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
2050 }
2051
2052 lt = output[0];
2053
2054 lt >>= FINAL_SH;
2055
2056 /* limit check */
2057 lt = limit( lt , MAXOUT, MINOUT );
2058
2059 #ifdef SAVE_SAMPLE
2060 SAVE_ALL_CHANNELS
2061 #endif
2062
2063 /* store to sound buffer */
2064 buf[i] = lt;
2065
2066 advancex(OPL);
2067 }
2068
2069 }
2070 #endif /* BUILD_YM3812 */
2071
2072
2073
2074 #if (BUILD_YM3526)
2075
2076 static FM_OPL *OPL_YM3526[MAX_OPL_CHIPS]; /* array of pointers to the YM3526's */
2077 static int YM3526NumChips = 0; /* number of chips */
2078
YM3526Init(int num,int clock,int rate)2079 int YM3526Init(int num, int clock, int rate)
2080 {
2081 int i;
2082
2083 if (YM3526NumChips)
2084 return -1; /* duplicate init. */
2085
2086 YM3526NumChips = num;
2087
2088 for (i = 0;i < YM3526NumChips; i++)
2089 {
2090 /* emulator create */
2091 OPL_YM3526[i] = OPLCreate(OPL_TYPE_YM3526,clock,rate);
2092 if(OPL_YM3526[i] == NULL)
2093 {
2094 /* it's really bad - we run out of memeory */
2095 YM3526NumChips = 0;
2096 return -1;
2097 }
2098 }
2099
2100 return 0;
2101 }
2102
YM3526Shutdown(void)2103 void YM3526Shutdown(void)
2104 {
2105 int i;
2106
2107 for (i = 0;i < YM3526NumChips; i++)
2108 {
2109 /* emulator shutdown */
2110 OPLDestroy(OPL_YM3526[i]);
2111 OPL_YM3526[i] = NULL;
2112 }
2113 YM3526NumChips = 0;
2114 }
YM3526ResetChip(int which)2115 void YM3526ResetChip(int which)
2116 {
2117 OPLResetChip(OPL_YM3526[which]);
2118 }
2119
YM3526Write(int which,int a,int v)2120 int YM3526Write(int which, int a, int v)
2121 {
2122 return OPLWrite(OPL_YM3526[which], a, v);
2123 }
2124
YM3526Read(int which,int a)2125 unsigned char YM3526Read(int which, int a)
2126 {
2127 return OPLRead(OPL_YM3526[which], a);
2128 }
YM3526TimerOver(int which,int c)2129 int YM3526TimerOver(int which, int c)
2130 {
2131 return OPLTimerOver(OPL_YM3526[which], c);
2132 }
2133
YM3526SetTimerHandler(int which,OPL_TIMERHANDLER TimerHandler,int channelOffset)2134 void YM3526SetTimerHandler(int which, OPL_TIMERHANDLER TimerHandler, int channelOffset)
2135 {
2136 OPLSetTimerHandler(OPL_YM3526[which], TimerHandler, channelOffset);
2137 }
YM3526SetIRQHandler(int which,OPL_IRQHANDLER IRQHandler,int param)2138 void YM3526SetIRQHandler(int which,OPL_IRQHANDLER IRQHandler,int param)
2139 {
2140 OPLSetIRQHandler(OPL_YM3526[which], IRQHandler, param);
2141 }
YM3526SetUpdateHandler(int which,OPL_UPDATEHANDLER UpdateHandler,int param)2142 void YM3526SetUpdateHandler(int which,OPL_UPDATEHANDLER UpdateHandler,int param)
2143 {
2144 OPLSetUpdateHandler(OPL_YM3526[which], UpdateHandler, param);
2145 }
2146
2147
2148 /*
2149 ** Generate samples for one of the YM3526's
2150 **
2151 ** 'which' is the virtual YM3526 number
2152 ** '*buffer' is the output buffer pointer
2153 ** 'length' is the number of samples that should be generated
2154 */
YM3526UpdateOne(int which,int16 * buffer,int length)2155 void YM3526UpdateOne(int which, int16 *buffer, int length)
2156 {
2157 FM_OPL *OPL = OPL_YM3526[which];
2158 uint8 rhythm = OPL->rhythm&0x20;
2159 OPLSAMPLE *buf = buffer;
2160 int i;
2161
2162 if( (void *)OPL != cur_chip ){
2163 cur_chip = (void *)OPL;
2164 /* rhythm slots */
2165 SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
2166 SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
2167 SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
2168 SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
2169 }
2170 for( i=0; i < length ; i++ )
2171 {
2172 int lt;
2173
2174 output[0] = 0;
2175
2176 advance_lfo(OPL);
2177
2178 /* FM part */
2179 OPL_CALC_CH(&OPL->P_CH[0]);
2180 OPL_CALC_CH(&OPL->P_CH[1]);
2181 OPL_CALC_CH(&OPL->P_CH[2]);
2182 OPL_CALC_CH(&OPL->P_CH[3]);
2183 OPL_CALC_CH(&OPL->P_CH[4]);
2184 OPL_CALC_CH(&OPL->P_CH[5]);
2185
2186 if(!rhythm)
2187 {
2188 OPL_CALC_CH(&OPL->P_CH[6]);
2189 OPL_CALC_CH(&OPL->P_CH[7]);
2190 OPL_CALC_CH(&OPL->P_CH[8]);
2191 }
2192 else /* Rhythm part */
2193 {
2194 OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
2195 }
2196
2197 lt = output[0];
2198
2199 lt >>= FINAL_SH;
2200
2201 /* limit check */
2202 lt = limit( lt , MAXOUT, MINOUT );
2203
2204 #ifdef SAVE_SAMPLE
2205 SAVE_ALL_CHANNELS
2206 #endif
2207
2208 /* store to sound buffer */
2209 buf[i] = lt;
2210
2211 advance(OPL);
2212 }
2213
2214 }
2215 #endif /* BUILD_YM3526 */
2216
2217
2218
2219
2220 #if BUILD_Y8950
2221
2222 static FM_OPL *OPL_Y8950[MAX_OPL_CHIPS]; /* array of pointers to the Y8950's */
2223 static int Y8950NumChips = 0; /* number of chips */
2224
Y8950Init(int num,int clock,int rate)2225 int Y8950Init(int num, int clock, int rate)
2226 {
2227 int i;
2228
2229 if (Y8950NumChips)
2230 return -1; /* duplicate init. */
2231
2232 Y8950NumChips = num;
2233
2234 for (i = 0;i < Y8950NumChips; i++)
2235 {
2236 /* emulator create */
2237 OPL_Y8950[i] = OPLCreate(OPL_TYPE_Y8950,clock,rate);
2238 if(OPL_Y8950[i] == NULL)
2239 {
2240 /* it's really bad - we run out of memeory */
2241 Y8950NumChips = 0;
2242 return -1;
2243 }
2244 }
2245
2246 return 0;
2247 }
2248
Y8950Shutdown(void)2249 void Y8950Shutdown(void)
2250 {
2251 int i;
2252
2253 for (i = 0;i < Y8950NumChips; i++)
2254 {
2255 /* emulator shutdown */
2256 OPLDestroy(OPL_Y8950[i]);
2257 OPL_Y8950[i] = NULL;
2258 }
2259 Y8950NumChips = 0;
2260 }
Y8950ResetChip(int which)2261 void Y8950ResetChip(int which)
2262 {
2263 OPLResetChip(OPL_Y8950[which]);
2264 }
2265
Y8950Write(int which,int a,int v)2266 int Y8950Write(int which, int a, int v)
2267 {
2268 return OPLWrite(OPL_Y8950[which], a, v);
2269 }
2270
Y8950Read(int which,int a)2271 unsigned char Y8950Read(int which, int a)
2272 {
2273 return OPLRead(OPL_Y8950[which], a);
2274 }
Y8950TimerOver(int which,int c)2275 int Y8950TimerOver(int which, int c)
2276 {
2277 return OPLTimerOver(OPL_Y8950[which], c);
2278 }
2279
Y8950SetTimerHandler(int which,OPL_TIMERHANDLER TimerHandler,int channelOffset)2280 void Y8950SetTimerHandler(int which, OPL_TIMERHANDLER TimerHandler, int channelOffset)
2281 {
2282 OPLSetTimerHandler(OPL_Y8950[which], TimerHandler, channelOffset);
2283 }
Y8950SetIRQHandler(int which,OPL_IRQHANDLER IRQHandler,int param)2284 void Y8950SetIRQHandler(int which,OPL_IRQHANDLER IRQHandler,int param)
2285 {
2286 OPLSetIRQHandler(OPL_Y8950[which], IRQHandler, param);
2287 }
Y8950SetUpdateHandler(int which,OPL_UPDATEHANDLER UpdateHandler,int param)2288 void Y8950SetUpdateHandler(int which,OPL_UPDATEHANDLER UpdateHandler,int param)
2289 {
2290 OPLSetUpdateHandler(OPL_Y8950[which], UpdateHandler, param);
2291 }
2292
Y8950SetDeltaTMemory(int which,void * deltat_rom,int deltat_rom_size)2293 void Y8950SetDeltaTMemory(int which, void * deltat_rom, int deltat_rom_size )
2294 {
2295 FM_OPL *OPL = OPL_Y8950[which];
2296 OPL->deltat->memory = (uint8 *)(deltat_rom);
2297 OPL->deltat->memory_size = deltat_rom_size;
2298 }
2299
2300 /*
2301 ** Generate samples for one of the Y8950's
2302 **
2303 ** 'which' is the virtual Y8950 number
2304 ** '*buffer' is the output buffer pointer
2305 ** 'length' is the number of samples that should be generated
2306 */
Y8950UpdateOne(int which,int16 * buffer,int length)2307 void Y8950UpdateOne(int which, int16 *buffer, int length)
2308 {
2309 int i;
2310 FM_OPL *OPL = OPL_Y8950[which];
2311 uint8 rhythm = OPL->rhythm&0x20;
2312 YM_DELTAT *DELTAT = OPL->deltat;
2313 OPLSAMPLE *buf = buffer;
2314
2315 /* setup DELTA-T unit */
2316 YM_DELTAT_DECODE_PRESET(DELTAT);
2317
2318 if( (void *)OPL != cur_chip ){
2319 cur_chip = (void *)OPL;
2320 /* rhythm slots */
2321 SLOT7_1 = &OPL->P_CH[7].SLOT[SLOT1];
2322 SLOT7_2 = &OPL->P_CH[7].SLOT[SLOT2];
2323 SLOT8_1 = &OPL->P_CH[8].SLOT[SLOT1];
2324 SLOT8_2 = &OPL->P_CH[8].SLOT[SLOT2];
2325
2326 }
2327 for( i=0; i < length ; i++ )
2328 {
2329 int lt;
2330
2331 output[0] = 0;
2332 output_deltat[0] = 0;
2333
2334 advance_lfo(OPL);
2335
2336 /* deltaT ADPCM */
2337 if( DELTAT->portstate )
2338 YM_DELTAT_ADPCM_CALC(DELTAT);
2339
2340 /* FM part */
2341 OPL_CALC_CH(&OPL->P_CH[0]);
2342 OPL_CALC_CH(&OPL->P_CH[1]);
2343 OPL_CALC_CH(&OPL->P_CH[2]);
2344 OPL_CALC_CH(&OPL->P_CH[3]);
2345 OPL_CALC_CH(&OPL->P_CH[4]);
2346 OPL_CALC_CH(&OPL->P_CH[5]);
2347
2348 if(!rhythm)
2349 {
2350 OPL_CALC_CH(&OPL->P_CH[6]);
2351 OPL_CALC_CH(&OPL->P_CH[7]);
2352 OPL_CALC_CH(&OPL->P_CH[8]);
2353 }
2354 else /* Rhythm part */
2355 {
2356 OPL_CALC_RH(&OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
2357 }
2358
2359 lt = output[0] + (output_deltat[0]>>11);
2360
2361 lt >>= FINAL_SH;
2362
2363 /* limit check */
2364 lt = limit( lt , MAXOUT, MINOUT );
2365
2366 #ifdef SAVE_SAMPLE
2367 SAVE_ALL_CHANNELS
2368 #endif
2369
2370 /* store to sound buffer */
2371 buf[i] = lt;
2372
2373 advance(OPL);
2374 }
2375
2376 /* deltaT START flag */
2377 if( !DELTAT->portstate )
2378 OPL->status &= 0xfe;
2379
2380 if( DELTAT->eos ) //AT: set bit 4 of OPL status register on EOS
2381 {
2382 DELTAT->eos = 0;
2383 OPL->status |= 0x10;
2384 }
2385 }
2386
Y8950SetPortHandler(int which,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,int param)2387 void Y8950SetPortHandler(int which,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,int param)
2388 {
2389 FM_OPL *OPL = OPL_Y8950[which];
2390 OPL->porthandler_w = PortHandler_w;
2391 OPL->porthandler_r = PortHandler_r;
2392 OPL->port_param = param;
2393 }
2394
Y8950SetKeyboardHandler(int which,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,int param)2395 void Y8950SetKeyboardHandler(int which,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,int param)
2396 {
2397 FM_OPL *OPL = OPL_Y8950[which];
2398 OPL->keyboardhandler_w = KeyboardHandler_w;
2399 OPL->keyboardhandler_r = KeyboardHandler_r;
2400 OPL->keyboard_param = param;
2401 }
2402
2403 #endif
2404
2405 } // End of namespace Nuvie
2406 } // End of namespace Ultima
2407