1 /**************************************************************************
2  *
3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice (including the
15  * next paragraph) shall be included in all copies or substantial portions
16  * of the Software.
17  *
18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25  *
26  **************************************************************************/
27 
28 #ifndef CAIRO_DRM_INTEL_COMMAND_PRIVATE_H
29 #define CAIRO_DRM_INTEL_COMMAND_PRIVATE_H
30 
31 #include "cairo-types-private.h"
32 
33 #define CMD_MI				(0x0 << 29)
34 #define CMD_misc			(0x1 << 29)
35 #define CMD_2D				(0x2 << 29)
36 #define CMD_3D				(0x3 << 29)
37 /* 4-7 reserved */
38 
39 #define MI_NOOP				(CMD_MI | 0)
40 /* Batch */
41 #define MI_BATCH_BUFFER		        (CMD_MI | (0x30 << 23) | 1)
42 #define MI_BATCH_BUFFER_START	        (CMD_MI | (0x31 << 23))
43 #define MI_BATCH_BUFFER_END		(CMD_MI | (0x0a << 23))
44 #define MI_BATCH_NON_SECURE		(1)
45 #define MI_BATCH_NON_SECURE_I965	(1 << 8)
46 /* Flush */
47 #define MI_FLUSH			(CMD_MI | (0x04 << 23))
48 #define MI_WRITE_DIRTY_STATE		(1<<4)
49 #define MI_END_SCENE			(1<<3)
50 #define MI_GLOBAL_SNAPSHOT_COUNT_RESET	(1<<3)
51 #define MI_INHIBIT_RENDER_CACHE_FLUSH	(1<<2)
52 #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1)
53 #define MI_INVALIDATE_MAP_CACHE		(1<<0)
54 
55 #define PRIM3D				(CMD_3D | (0x1f<<24))
56 #define PRIM3D_TRILIST			(PRIM3D | (0x0<<18))
57 #define PRIM3D_TRISTRIP			(PRIM3D | (0x1<<18))
58 #define PRIM3D_TRISTRIP_RVRSE		(PRIM3D | (0x2<<18))
59 #define PRIM3D_TRIFAN			(PRIM3D | (0x3<<18))
60 #define PRIM3D_POLY			(PRIM3D | (0x4<<18))
61 #define PRIM3D_LINELIST			(PRIM3D | (0x5<<18))
62 #define PRIM3D_LINESTRIP		(PRIM3D | (0x6<<18))
63 #define PRIM3D_RECTLIST			(PRIM3D | (0x7<<18))
64 #define PRIM3D_POINTLIST		(PRIM3D | (0x8<<18))
65 #define PRIM3D_DIB			(PRIM3D | (0x9<<18))
66 #define PRIM3D_CLEAR_RECT		(PRIM3D | (0xa<<18))
67 #define PRIM3D_ZONE_INIT		(PRIM3D | (0xd<<18))
68 #define PRIM3D_MASK			(0x1f<<18)
69 #define PRIM3D_INDIRECT_SEQUENTIAL	((1<<23) | (0<<17))
70 #define PRIM3D_INDIRECT_ELTS		((1<<23) | (1<<17))
71 
72 /* p137 */
73 #define _3DSTATE_AA_CMD			(CMD_3D | (0x06<<24))
74 #define AA_LINE_ECAAR_WIDTH_ENABLE	(1<<16)
75 #define AA_LINE_ECAAR_WIDTH_0_5		0
76 #define AA_LINE_ECAAR_WIDTH_1_0		(1<<14)
77 #define AA_LINE_ECAAR_WIDTH_2_0		(2<<14)
78 #define AA_LINE_ECAAR_WIDTH_4_0		(3<<14)
79 #define AA_LINE_REGION_WIDTH_ENABLE	(1<<8)
80 #define AA_LINE_REGION_WIDTH_0_5	0
81 #define AA_LINE_REGION_WIDTH_1_0	(1<<6)
82 #define AA_LINE_REGION_WIDTH_2_0	(2<<6)
83 #define AA_LINE_REGION_WIDTH_4_0	(3<<6)
84 
85 /* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/
86 #define _3DSTATE_BACKFACE_STENCIL_OPS    (CMD_3D | (0x8<<24))
87 #define BFO_ENABLE_STENCIL_REF          (1<<23)
88 #define BFO_STENCIL_REF_SHIFT           15
89 #define BFO_STENCIL_REF_MASK            (0xff<<15)
90 #define BFO_ENABLE_STENCIL_FUNCS        (1<<14)
91 #define BFO_STENCIL_TEST_SHIFT          11
92 #define BFO_STENCIL_TEST_MASK           (0x7<<11)
93 #define BFO_STENCIL_FAIL_SHIFT          8
94 #define BFO_STENCIL_FAIL_MASK           (0x7<<8)
95 #define BFO_STENCIL_PASS_Z_FAIL_SHIFT   5
96 #define BFO_STENCIL_PASS_Z_FAIL_MASK    (0x7<<5)
97 #define BFO_STENCIL_PASS_Z_PASS_SHIFT   2
98 #define BFO_STENCIL_PASS_Z_PASS_MASK    (0x7<<2)
99 #define BFO_ENABLE_STENCIL_TWO_SIDE     (1<<1)
100 #define BFO_STENCIL_TWO_SIDE            (1<<0)
101 
102 /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */
103 #define _3DSTATE_BACKFACE_STENCIL_MASKS    (CMD_3D | (0x9<<24))
104 #define BFM_ENABLE_STENCIL_TEST_MASK      (1<<17)
105 #define BFM_ENABLE_STENCIL_WRITE_MASK     (1<<16)
106 #define BFM_STENCIL_TEST_MASK_SHIFT       8
107 #define BFM_STENCIL_TEST_MASK_MASK        (0xff<<8)
108 #define BFM_STENCIL_WRITE_MASK_SHIFT      0
109 #define BFM_STENCIL_WRITE_MASK_MASK       (0xff<<0)
110 
111 /* 3DSTATE_BIN_CONTROL p141 */
112 
113 /* p143 */
114 #define _3DSTATE_BUF_INFO_CMD	(CMD_3D | (0x1d<<24) | (0x8e<<16) | 1)
115 /* Dword 1 */
116 #define BUF_3D_ID_COLOR_BACK	(0x3<<24)
117 #define BUF_3D_ID_DEPTH		(0x7<<24)
118 #define BUF_3D_USE_FENCE	(1<<23)
119 #define BUF_3D_TILED_SURFACE	(1<<22)
120 #define BUF_3D_TILE_WALK_X	0
121 #define BUF_3D_TILE_WALK_Y	(1<<21)
122 #define BUF_3D_PITCH(x)         (x)
123 /* Dword 2 */
124 #define BUF_3D_ADDR(x)		((x) & ~0x3)
125 
126 /* 3DSTATE_CHROMA_KEY */
127 
128 /* 3DSTATE_CLEAR_PARAMETERS, p150 */
129 #define _3DSTATE_CLEAR_PARAMETERS   (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5)
130 /* Dword 1 */
131 #define CLEARPARAM_CLEAR_RECT	    (1 << 16)
132 #define CLEARPARAM_ZONE_INIT	    (0 << 16)
133 #define CLEARPARAM_WRITE_COLOR	    (1 << 2)
134 #define CLEARPARAM_WRITE_DEPTH	    (1 << 1)
135 #define CLEARPARAM_WRITE_STENCIL    (1 << 0)
136 
137 /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
138 #define _3DSTATE_CONST_BLEND_COLOR_CMD	(CMD_3D | (0x1d<<24) | (0x88<<16))
139 
140 /* 3DSTATE_COORD_SET_BINDINGS, p154 */
141 #define _3DSTATE_COORD_SET_BINDINGS      (CMD_3D | (0x16<<24))
142 #define CSB_TCB(iunit, eunit)           ((eunit)<<(iunit*3))
143 
144 /* p156 */
145 #define _3DSTATE_DFLT_DIFFUSE_CMD	(CMD_3D | (0x1d<<24) | (0x99<<16))
146 
147 /* p157 */
148 #define _3DSTATE_DFLT_SPEC_CMD		(CMD_3D | (0x1d<<24) | (0x9a<<16))
149 
150 /* p158 */
151 #define _3DSTATE_DFLT_Z_CMD		(CMD_3D | (0x1d<<24) | (0x98<<16))
152 
153 /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */
154 #define _3DSTATE_DEPTH_OFFSET_SCALE       (CMD_3D | (0x1d<<24) | (0x97<<16))
155 /* scale in dword 1 */
156 
157 /* The depth subrectangle is not supported, but must be disabled. */
158 /* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */
159 #define _3DSTATE_DEPTH_SUBRECT_DISABLE	(CMD_3D | (0x1c<<24) | (0x11<<19) | (1 << 1) | (0 << 0))
160 
161 /* p161 */
162 #define _3DSTATE_DST_BUF_VARS_CMD	(CMD_3D | (0x1d<<24) | (0x85<<16))
163 /* Dword 1 */
164 #define TEX_DEFAULT_COLOR_OGL           (0<<30)
165 #define TEX_DEFAULT_COLOR_D3D           (1<<30)
166 #define ZR_EARLY_DEPTH                  (1<<29)
167 #define LOD_PRECLAMP_OGL                (1<<28)
168 #define LOD_PRECLAMP_D3D                (0<<28)
169 #define DITHER_FULL_ALWAYS              (0<<26)
170 #define DITHER_FULL_ON_FB_BLEND         (1<<26)
171 #define DITHER_CLAMPED_ALWAYS           (2<<26)
172 #define LINEAR_GAMMA_BLEND_32BPP        (1<<25)
173 #define DEBUG_DISABLE_ENH_DITHER        (1<<24)
174 #define DSTORG_HORT_BIAS(x)		((x)<<20)
175 #define DSTORG_VERT_BIAS(x)		((x)<<16)
176 #define COLOR_4_2_2_CHNL_WRT_ALL	0
177 #define COLOR_4_2_2_CHNL_WRT_Y		(1<<12)
178 #define COLOR_4_2_2_CHNL_WRT_CR		(2<<12)
179 #define COLOR_4_2_2_CHNL_WRT_CB		(3<<12)
180 #define COLOR_4_2_2_CHNL_WRT_CRCB	(4<<12)
181 #define COLR_BUF_8BIT			0
182 #define COLR_BUF_RGB555			(1<<8)
183 #define COLR_BUF_RGB565			(2<<8)
184 #define COLR_BUF_ARGB8888		(3<<8)
185 #define COLR_BUF_ARGB4444		(8<<8)
186 #define COLR_BUF_ARGB1555		(9<<8)
187 #define COLR_BUF_ARGB2AAA		(0xa<<8)
188 #define DEPTH_FRMT_16_FIXED		0
189 #define DEPTH_FRMT_16_FLOAT		(1<<2)
190 #define DEPTH_FRMT_24_FIXED_8_OTHER	(2<<2)
191 #define VERT_LINE_STRIDE_1		(1<<1)
192 #define VERT_LINE_STRIDE_0		(0<<1)
193 #define VERT_LINE_STRIDE_OFS_1		1
194 #define VERT_LINE_STRIDE_OFS_0		0
195 
196 /* p166 */
197 #define _3DSTATE_DRAW_RECT_CMD		(CMD_3D|(0x1d<<24)|(0x80<<16)|3)
198 /* Dword 1 */
199 #define DRAW_RECT_DIS_DEPTH_OFS		(1<<30)
200 #define DRAW_DITHER_OFS_X(x)		((x)<<26)
201 #define DRAW_DITHER_OFS_Y(x)		((x)<<24)
202 /* Dword 2 */
203 #define DRAW_YMIN(x)			((x)<<16)
204 #define DRAW_XMIN(x)			(x)
205 /* Dword 3 */
206 #define DRAW_YMAX(x)			((x-1)<<16)
207 #define DRAW_XMAX(x)			(x-1)
208 /* Dword 4 */
209 #define DRAW_YORG(x)			((x)<<16)
210 #define DRAW_XORG(x)			(x)
211 
212 /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */
213 
214 /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */
215 
216 /* _3DSTATE_FOG_COLOR, p173 */
217 #define _3DSTATE_FOG_COLOR_CMD		(CMD_3D|(0x15<<24))
218 #define FOG_COLOR_RED(x)		((x)<<16)
219 #define FOG_COLOR_GREEN(x)		((x)<<8)
220 #define FOG_COLOR_BLUE(x)		(x)
221 
222 /* _3DSTATE_FOG_MODE, p174 */
223 #define _3DSTATE_FOG_MODE_CMD		(CMD_3D|(0x1d<<24)|(0x89<<16)|2)
224 /* Dword 1 */
225 #define FMC1_FOGFUNC_MODIFY_ENABLE	(1<<31)
226 #define FMC1_FOGFUNC_VERTEX		(0<<28)
227 #define FMC1_FOGFUNC_PIXEL_EXP		(1<<28)
228 #define FMC1_FOGFUNC_PIXEL_EXP2		(2<<28)
229 #define FMC1_FOGFUNC_PIXEL_LINEAR	(3<<28)
230 #define FMC1_FOGFUNC_MASK		(3<<28)
231 #define FMC1_FOGINDEX_MODIFY_ENABLE     (1<<27)
232 #define FMC1_FOGINDEX_Z		        (0<<25)
233 #define FMC1_FOGINDEX_W			(1<<25)
234 #define FMC1_C1_C2_MODIFY_ENABLE	(1<<24)
235 #define FMC1_DENSITY_MODIFY_ENABLE	(1<<23)
236 #define FMC1_C1_ONE		        (1<<13)
237 #define FMC1_C1_MASK		        (0xffff<<4)
238 /* Dword 2 */
239 #define FMC2_C2_ONE		        (1<<16)
240 /* Dword 3 */
241 #define FMC3_D_ONE			(1<<16)
242 
243 /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */
244 #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD	(CMD_3D|(0x0b<<24))
245 #define IAB_MODIFY_ENABLE	        (1<<23)
246 #define IAB_ENABLE		        (1<<22)
247 #define IAB_MODIFY_FUNC			(1<<21)
248 #define IAB_FUNC_SHIFT			16
249 #define IAB_MODIFY_SRC_FACTOR		(1<<11)
250 #define IAB_SRC_FACTOR_SHIFT		6
251 #define IAB_SRC_FACTOR_MASK		(BLENDFACT_MASK<<6)
252 #define IAB_MODIFY_DST_FACTOR	        (1<<5)
253 #define IAB_DST_FACTOR_SHIFT		0
254 #define IAB_DST_FACTOR_MASK		(BLENDFACT_MASK<<0)
255 
256 #define BLENDFACT_ZERO			0x01
257 #define BLENDFACT_ONE			0x02
258 #define BLENDFACT_SRC_COLR		0x03
259 #define BLENDFACT_INV_SRC_COLR		0x04
260 #define BLENDFACT_SRC_ALPHA		0x05
261 #define BLENDFACT_INV_SRC_ALPHA		0x06
262 #define BLENDFACT_DST_ALPHA		0x07
263 #define BLENDFACT_INV_DST_ALPHA		0x08
264 #define BLENDFACT_DST_COLR		0x09
265 #define BLENDFACT_INV_DST_COLR		0x0a
266 #define BLENDFACT_SRC_ALPHA_SATURATE	0x0b
267 #define BLENDFACT_CONST_COLOR		0x0c
268 #define BLENDFACT_INV_CONST_COLOR	0x0d
269 #define BLENDFACT_CONST_ALPHA		0x0e
270 #define BLENDFACT_INV_CONST_ALPHA	0x0f
271 #define BLENDFACT_MASK			0x0f
272 
273 #define BLENDFUNC_ADD			0x0
274 #define BLENDFUNC_SUBTRACT		0x1
275 #define BLENDFUNC_REVERSE_SUBTRACT	0x2
276 #define BLENDFUNC_MIN			0x3
277 #define BLENDFUNC_MAX			0x4
278 #define BLENDFUNC_MASK			0x7
279 
280 /* 3DSTATE_LOAD_INDIRECT, p180 */
281 
282 #define _3DSTATE_LOAD_INDIRECT	        (CMD_3D|(0x1d<<24)|(0x7<<16))
283 #define LI0_STATE_STATIC_INDIRECT       (0x01<<8)
284 #define LI0_STATE_DYNAMIC_INDIRECT      (0x02<<8)
285 #define LI0_STATE_SAMPLER               (0x04<<8)
286 #define LI0_STATE_MAP                   (0x08<<8)
287 #define LI0_STATE_PROGRAM               (0x10<<8)
288 #define LI0_STATE_CONSTANTS             (0x20<<8)
289 
290 #define SIS0_BUFFER_ADDRESS(x)          ((x)&~0x3)
291 #define SIS0_FORCE_LOAD                 (1<<1)
292 #define SIS0_BUFFER_VALID               (1<<0)
293 #define SIS1_BUFFER_LENGTH(x)           ((x)&0xff)
294 
295 #define DIS0_BUFFER_ADDRESS(x)          ((x)&~0x3)
296 #define DIS0_BUFFER_RESET               (1<<1)
297 #define DIS0_BUFFER_VALID               (1<<0)
298 
299 #define SSB0_BUFFER_ADDRESS(x)          ((x)&~0x3)
300 #define SSB0_FORCE_LOAD                 (1<<1)
301 #define SSB0_BUFFER_VALID               (1<<0)
302 #define SSB1_BUFFER_LENGTH(x)           ((x)&0xff)
303 
304 #define MSB0_BUFFER_ADDRESS(x)          ((x)&~0x3)
305 #define MSB0_FORCE_LOAD                 (1<<1)
306 #define MSB0_BUFFER_VALID               (1<<0)
307 #define MSB1_BUFFER_LENGTH(x)           ((x)&0xff)
308 
309 #define PSP0_BUFFER_ADDRESS(x)          ((x)&~0x3)
310 #define PSP0_FORCE_LOAD                 (1<<1)
311 #define PSP0_BUFFER_VALID               (1<<0)
312 #define PSP1_BUFFER_LENGTH(x)           ((x)&0xff)
313 
314 #define PSC0_BUFFER_ADDRESS(x)          ((x)&~0x3)
315 #define PSC0_FORCE_LOAD                 (1<<1)
316 #define PSC0_BUFFER_VALID               (1<<0)
317 #define PSC1_BUFFER_LENGTH(x)           ((x)&0xff)
318 
319 /* _3DSTATE_RASTERIZATION_RULES */
320 #define _3DSTATE_RASTER_RULES_CMD	(CMD_3D|(0x07<<24))
321 #define ENABLE_POINT_RASTER_RULE	(1<<15)
322 #define OGL_POINT_RASTER_RULE		(1<<13)
323 #define ENABLE_TEXKILL_3D_4D            (1<<10)
324 #define TEXKILL_3D                      (0<<9)
325 #define TEXKILL_4D                      (1<<9)
326 #define ENABLE_LINE_STRIP_PROVOKE_VRTX	(1<<8)
327 #define ENABLE_TRI_FAN_PROVOKE_VRTX	(1<<5)
328 #define LINE_STRIP_PROVOKE_VRTX(x)	((x)<<6)
329 #define TRI_FAN_PROVOKE_VRTX(x)		((x)<<3)
330 
331 /* _3DSTATE_SCISSOR_ENABLE, p256 */
332 #define _3DSTATE_SCISSOR_ENABLE_CMD	(CMD_3D|(0x1c<<24)|(0x10<<19))
333 #define ENABLE_SCISSOR_RECT		((1<<1) | 1)
334 #define DISABLE_SCISSOR_RECT		(1<<1)
335 
336 /* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */
337 #define _3DSTATE_SCISSOR_RECT_0_CMD	(CMD_3D|(0x1d<<24)|(0x81<<16)|1)
338 /* Dword 1 */
339 #define SCISSOR_RECT_0_YMIN(x)		((x)<<16)
340 #define SCISSOR_RECT_0_XMIN(x)		(x)
341 /* Dword 2 */
342 #define SCISSOR_RECT_0_YMAX(x)		((x)<<16)
343 #define SCISSOR_RECT_0_XMAX(x)		(x)
344 
345 /* p189 */
346 #define _3DSTATE_LOAD_STATE_IMMEDIATE_1   (CMD_3D | (0x1d<<24) | (0x04<<16))
347 #define I1_LOAD_S(n)                      (1<<(4+n))
348 
349 #define S0_VB_OFFSET_MASK              0xffffffc
350 #define S0_AUTO_CACHE_INV_DISABLE      (1<<0)
351 
352 #define S1_VERTEX_WIDTH_SHIFT          24
353 #define S1_VERTEX_WIDTH_MASK           (0x3f<<24)
354 #define S1_VERTEX_PITCH_SHIFT          16
355 #define S1_VERTEX_PITCH_MASK           (0x3f<<16)
356 
357 #define TEXCOORDFMT_2D                 0x0
358 #define TEXCOORDFMT_3D                 0x1
359 #define TEXCOORDFMT_4D                 0x2
360 #define TEXCOORDFMT_1D                 0x3
361 #define TEXCOORDFMT_2D_16              0x4
362 #define TEXCOORDFMT_4D_16              0x5
363 #define TEXCOORDFMT_NOT_PRESENT        0xf
364 #define S2_TEXCOORD_FMT0_MASK            0xf
365 #define S2_TEXCOORD_FMT1_SHIFT           4
366 #define S2_TEXCOORD_FMT(unit, type)    ((type)<<(unit*4))
367 #define S2_TEXCOORD_NONE               (~0U)
368 
369 #define TEXCOORD_WRAP_SHORTEST_TCX	8
370 #define TEXCOORD_WRAP_SHORTEST_TCY	4
371 #define TEXCOORD_WRAP_SHORTEST_TCZ	2
372 #define TEXCOORD_PERSPECTIVE_DISABLE	1
373 
374 #define S3_WRAP_SHORTEST_TCX(unit)	(TEXCOORD_WRAP_SHORTEST_TCX << ((unit) * 4))
375 #define S3_WRAP_SHORTEST_TCY(unit)	(TEXCOORD_WRAP_SHORTEST_TCY << ((unit) * 4))
376 #define S3_WRAP_SHORTEST_TCZ(unit)	(TEXCOORD_WRAP_SHORTEST_TCZ << ((unit) * 4))
377 #define S3_PERSPECTIVE_DISABLE(unit)	(TEXCOORD_PERSPECTIVE_DISABLE << ((unit) * 4))
378 
379 /* S3 not interesting */
380 
381 #define S4_POINT_WIDTH_SHIFT           23
382 #define S4_POINT_WIDTH_MASK            (0x1ff<<23)
383 #define S4_LINE_WIDTH_SHIFT            19
384 #define S4_LINE_WIDTH_ONE              (0x2<<19)
385 #define S4_LINE_WIDTH_MASK             (0xf<<19)
386 #define S4_FLATSHADE_ALPHA             (1<<18)
387 #define S4_FLATSHADE_FOG               (1<<17)
388 #define S4_FLATSHADE_SPECULAR          (1<<16)
389 #define S4_FLATSHADE_COLOR             (1<<15)
390 #define S4_CULLMODE_BOTH	       (0<<13)
391 #define S4_CULLMODE_NONE	       (1<<13)
392 #define S4_CULLMODE_CW		       (2<<13)
393 #define S4_CULLMODE_CCW		       (3<<13)
394 #define S4_CULLMODE_MASK	       (3<<13)
395 #define S4_VFMT_POINT_WIDTH            (1<<12)
396 #define S4_VFMT_SPEC_FOG               (1<<11)
397 #define S4_VFMT_COLOR                  (1<<10)
398 #define S4_VFMT_DEPTH_OFFSET           (1<<9)
399 #define S4_VFMT_XYZ		       (1<<6)
400 #define S4_VFMT_XYZW		       (2<<6)
401 #define S4_VFMT_XY		       (3<<6)
402 #define S4_VFMT_XYW		       (4<<6)
403 #define S4_VFMT_XYZW_MASK              (7<<6)
404 #define S4_FORCE_DEFAULT_DIFFUSE       (1<<5)
405 #define S4_FORCE_DEFAULT_SPECULAR      (1<<4)
406 #define S4_LOCAL_DEPTH_OFFSET_ENABLE   (1<<3)
407 #define S4_VFMT_FOG_PARAM              (1<<2)
408 #define S4_SPRITE_POINT_ENABLE         (1<<1)
409 #define S4_LINE_ANTIALIAS_ENABLE       (1<<0)
410 
411 #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH   |	\
412 		      S4_VFMT_SPEC_FOG      |	\
413 		      S4_VFMT_COLOR         |	\
414 		      S4_VFMT_DEPTH_OFFSET  |	\
415 		      S4_VFMT_XYZW_MASK     |	\
416 		      S4_VFMT_FOG_PARAM)
417 
418 #define S5_WRITEDISABLE_ALPHA          (1<<31)
419 #define S5_WRITEDISABLE_RED            (1<<30)
420 #define S5_WRITEDISABLE_GREEN          (1<<29)
421 #define S5_WRITEDISABLE_BLUE           (1<<28)
422 #define S5_WRITEDISABLE_MASK           (0xf<<28)
423 #define S5_FORCE_DEFAULT_POINT_SIZE    (1<<27)
424 #define S5_LAST_PIXEL_ENABLE           (1<<26)
425 #define S5_GLOBAL_DEPTH_OFFSET_ENABLE  (1<<25)
426 #define S5_FOG_ENABLE                  (1<<24)
427 #define S5_STENCIL_REF_SHIFT           16
428 #define S5_STENCIL_REF_MASK            (0xff<<16)
429 #define S5_STENCIL_TEST_FUNC_SHIFT     13
430 #define S5_STENCIL_TEST_FUNC_MASK      (0x7<<13)
431 #define S5_STENCIL_FAIL_SHIFT          10
432 #define S5_STENCIL_FAIL_MASK           (0x7<<10)
433 #define S5_STENCIL_PASS_Z_FAIL_SHIFT   7
434 #define S5_STENCIL_PASS_Z_FAIL_MASK    (0x7<<7)
435 #define S5_STENCIL_PASS_Z_PASS_SHIFT   4
436 #define S5_STENCIL_PASS_Z_PASS_MASK    (0x7<<4)
437 #define S5_STENCIL_WRITE_ENABLE        (1<<3)
438 #define S5_STENCIL_TEST_ENABLE         (1<<2)
439 #define S5_COLOR_DITHER_ENABLE         (1<<1)
440 #define S5_LOGICOP_ENABLE              (1<<0)
441 
442 #define COMPAREFUNC_ALWAYS		0
443 #define COMPAREFUNC_NEVER		0x1
444 #define COMPAREFUNC_LESS		0x2
445 #define COMPAREFUNC_EQUAL		0x3
446 #define COMPAREFUNC_LEQUAL		0x4
447 #define COMPAREFUNC_GREATER		0x5
448 #define COMPAREFUNC_NOTEQUAL		0x6
449 #define COMPAREFUNC_GEQUAL		0x7
450 
451 #define STENCILOP_KEEP			0
452 #define STENCILOP_ZERO			0x1
453 #define STENCILOP_REPLACE		0x2
454 #define STENCILOP_INCRSAT		0x3
455 #define STENCILOP_DECRSAT		0x4
456 #define STENCILOP_INCR			0x5
457 #define STENCILOP_DECR			0x6
458 #define STENCILOP_INVERT		0x7
459 
460 #define S6_ALPHA_TEST_ENABLE           (1<<31)
461 #define S6_ALPHA_TEST_FUNC_SHIFT       28
462 #define S6_ALPHA_TEST_FUNC_MASK        (0x7<<28)
463 #define S6_ALPHA_REF_SHIFT             20
464 #define S6_ALPHA_REF_MASK              (0xff<<20)
465 #define S6_DEPTH_TEST_ENABLE           (1<<19)
466 #define S6_DEPTH_TEST_FUNC_SHIFT       16
467 #define S6_DEPTH_TEST_FUNC_MASK        (0x7<<16)
468 #define S6_CBUF_BLEND_ENABLE           (1<<15)
469 #define S6_CBUF_BLEND_FUNC_SHIFT       12
470 #define S6_CBUF_BLEND_FUNC_MASK        (0x7<<12)
471 #define S6_CBUF_SRC_BLEND_FACT_SHIFT   8
472 #define S6_CBUF_SRC_BLEND_FACT_MASK    (0xf<<8)
473 #define S6_CBUF_DST_BLEND_FACT_SHIFT   4
474 #define S6_CBUF_DST_BLEND_FACT_MASK    (0xf<<4)
475 #define S6_DEPTH_WRITE_ENABLE          (1<<3)
476 #define S6_COLOR_WRITE_ENABLE          (1<<2)
477 #define S6_TRISTRIP_PV_SHIFT           0
478 #define S6_TRISTRIP_PV_MASK            (0x3<<0)
479 
480 #define S7_DEPTH_OFFSET_CONST_MASK     ~0
481 
482 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */
483 /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
484 
485 /* _3DSTATE_MODES_4, p218 */
486 #define _3DSTATE_MODES_4_CMD		(CMD_3D|(0x0d<<24))
487 #define ENABLE_LOGIC_OP_FUNC		(1<<23)
488 #define LOGIC_OP_FUNC(x)		((x)<<18)
489 #define LOGICOP_MASK			(0xf<<18)
490 #define LOGICOP_COPY			0xc
491 #define MODE4_ENABLE_STENCIL_TEST_MASK	((1<<17)|(0xff00))
492 #define ENABLE_STENCIL_TEST_MASK	(1<<17)
493 #define STENCIL_TEST_MASK(x)		((x)<<8)
494 #define MODE4_ENABLE_STENCIL_WRITE_MASK	((1<<16)|(0x00ff))
495 #define ENABLE_STENCIL_WRITE_MASK	(1<<16)
496 #define STENCIL_WRITE_MASK(x)		((x)&0xff)
497 
498 /* _3DSTATE_MODES_5, p220 */
499 #define _3DSTATE_MODES_5_CMD		(CMD_3D|(0x0c<<24))
500 #define PIPELINE_FLUSH_RENDER_CACHE	(1<<18)
501 #define PIPELINE_FLUSH_TEXTURE_CACHE	(1<<16)
502 
503 /* p221 */
504 #define _3DSTATE_PIXEL_SHADER_CONSTANTS  (CMD_3D|(0x1d<<24)|(0x6<<16))
505 #define PS1_REG(n)                      (1<<(n))
506 #define PS2_CONST_X(n)                  (n)
507 #define PS3_CONST_Y(n)                  (n)
508 #define PS4_CONST_Z(n)                  (n)
509 #define PS5_CONST_W(n)                  (n)
510 
511 /* p222 */
512 
513 #define I915_MAX_TEX_INDIRECT 4
514 #define I915_MAX_TEX_INSN     32
515 #define I915_MAX_ALU_INSN     64
516 #define I915_MAX_DECL_INSN    27
517 #define I915_MAX_TEMPORARY    16
518 
519 /* Each instruction is 3 dwords long, though most don't require all
520  * this space.  Maximum of 123 instructions.  Smaller maxes per insn
521  * type.
522  */
523 #define _3DSTATE_PIXEL_SHADER_PROGRAM    (CMD_3D|(0x1d<<24)|(0x5<<16))
524 
525 #define REG_TYPE_R                 0 /* temporary regs, no need to
526 				      * dcl, must be written before
527 				      * read -- Preserved between
528 				      * phases.
529 				      */
530 #define REG_TYPE_T                 1 /* Interpolated values, must be
531 				      * dcl'ed before use.
532 				      *
533 				      * 0..7: texture coord,
534 				      * 8: diffuse spec,
535 				      * 9: specular color,
536 				      * 10: fog parameter in w.
537 				      */
538 #define REG_TYPE_CONST             2 /* Restriction: only one const
539 				      * can be referenced per
540 				      * instruction, though it may be
541 				      * selected for multiple inputs.
542 				      * Constants not initialized
543 				      * default to zero.
544 				      */
545 #define REG_TYPE_S                 3 /* sampler */
546 #define REG_TYPE_OC                4 /* output color (rgba) */
547 #define REG_TYPE_OD                5 /* output depth (w), xyz are
548 				      * temporaries.  If not written,
549 				      * interpolated depth is used?
550 				      */
551 #define REG_TYPE_U                 6 /* unpreserved temporaries */
552 #define REG_TYPE_MASK              0x7
553 #define REG_NR_MASK                0xf
554 
555 /* REG_TYPE_T:
556  */
557 #define T_TEX0     0
558 #define T_TEX1     1
559 #define T_TEX2     2
560 #define T_TEX3     3
561 #define T_TEX4     4
562 #define T_TEX5     5
563 #define T_TEX6     6
564 #define T_TEX7     7
565 #define T_DIFFUSE  8
566 #define T_SPECULAR 9
567 #define T_FOG_W    10		/* interpolated fog is in W coord */
568 
569 /* Arithmetic instructions */
570 
571 /* .replicate_swizzle == selection and replication of a particular
572  * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
573  */
574 #define A0_NOP    (0x0<<24)		/* no operation */
575 #define A0_ADD    (0x1<<24)		/* dst = src0 + src1 */
576 #define A0_MOV    (0x2<<24)		/* dst = src0 */
577 #define A0_MUL    (0x3<<24)		/* dst = src0 * src1 */
578 #define A0_MAD    (0x4<<24)		/* dst = src0 * src1 + src2 */
579 #define A0_DP2ADD (0x5<<24)		/* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
580 #define A0_DP3    (0x6<<24)		/* dst.xyzw = src0.xyz dot src1.xyz */
581 #define A0_DP4    (0x7<<24)		/* dst.xyzw = src0.xyzw dot src1.xyzw */
582 #define A0_FRC    (0x8<<24)		/* dst = src0 - floor(src0) */
583 #define A0_RCP    (0x9<<24)		/* dst.xyzw = 1/(src0.replicate_swizzle) */
584 #define A0_RSQ    (0xa<<24)		/* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
585 #define A0_EXP    (0xb<<24)		/* dst.xyzw = exp2(src0.replicate_swizzle) */
586 #define A0_LOG    (0xc<<24)		/* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
587 #define A0_CMP    (0xd<<24)		/* dst = (src0 >= 0.0) ? src1 : src2 */
588 #define A0_MIN    (0xe<<24)		/* dst = (src0 < src1) ? src0 : src1 */
589 #define A0_MAX    (0xf<<24)		/* dst = (src0 >= src1) ? src0 : src1 */
590 #define A0_FLR    (0x10<<24)		/* dst = floor(src0) */
591 #define A0_MOD    (0x11<<24)		/* dst = src0 fmod 1.0 */
592 #define A0_TRC    (0x12<<24)		/* dst = int(src0) */
593 #define A0_SGE    (0x13<<24)		/* dst = src0 >= src1 ? 1.0 : 0.0 */
594 #define A0_SLT    (0x14<<24)		/* dst = src0 < src1 ? 1.0 : 0.0 */
595 #define A0_DEST_SATURATE                 (1<<22)
596 #define A0_DEST_TYPE_SHIFT                19
597 /* Allow: R, OC, OD, U */
598 #define A0_DEST_NR_SHIFT                 14
599 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
600 #define A0_DEST_CHANNEL_X                (1<<10)
601 #define A0_DEST_CHANNEL_Y                (2<<10)
602 #define A0_DEST_CHANNEL_Z                (4<<10)
603 #define A0_DEST_CHANNEL_W                (8<<10)
604 #define A0_DEST_CHANNEL_ALL              (0xf<<10)
605 #define A0_DEST_CHANNEL_SHIFT            10
606 #define A0_SRC0_TYPE_SHIFT               7
607 #define A0_SRC0_NR_SHIFT                 2
608 
609 #define A0_DEST_CHANNEL_XY              (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y)
610 #define A0_DEST_CHANNEL_XYZ             (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z)
611 
612 #define SRC_X        0
613 #define SRC_Y        1
614 #define SRC_Z        2
615 #define SRC_W        3
616 #define SRC_ZERO     4
617 #define SRC_ONE      5
618 
619 #define A1_SRC0_CHANNEL_X_NEGATE         (1<<31)
620 #define A1_SRC0_CHANNEL_X_SHIFT          28
621 #define A1_SRC0_CHANNEL_Y_NEGATE         (1<<27)
622 #define A1_SRC0_CHANNEL_Y_SHIFT          24
623 #define A1_SRC0_CHANNEL_Z_NEGATE         (1<<23)
624 #define A1_SRC0_CHANNEL_Z_SHIFT          20
625 #define A1_SRC0_CHANNEL_W_NEGATE         (1<<19)
626 #define A1_SRC0_CHANNEL_W_SHIFT          16
627 #define A1_SRC1_TYPE_SHIFT               13
628 #define A1_SRC1_NR_SHIFT                 8
629 #define A1_SRC1_CHANNEL_X_NEGATE         (1<<7)
630 #define A1_SRC1_CHANNEL_X_SHIFT          4
631 #define A1_SRC1_CHANNEL_Y_NEGATE         (1<<3)
632 #define A1_SRC1_CHANNEL_Y_SHIFT          0
633 
634 #define A2_SRC1_CHANNEL_Z_NEGATE         (1<<31)
635 #define A2_SRC1_CHANNEL_Z_SHIFT          28
636 #define A2_SRC1_CHANNEL_W_NEGATE         (1<<27)
637 #define A2_SRC1_CHANNEL_W_SHIFT          24
638 #define A2_SRC2_TYPE_SHIFT               21
639 #define A2_SRC2_NR_SHIFT                 16
640 #define A2_SRC2_CHANNEL_X_NEGATE         (1<<15)
641 #define A2_SRC2_CHANNEL_X_SHIFT          12
642 #define A2_SRC2_CHANNEL_Y_NEGATE         (1<<11)
643 #define A2_SRC2_CHANNEL_Y_SHIFT          8
644 #define A2_SRC2_CHANNEL_Z_NEGATE         (1<<7)
645 #define A2_SRC2_CHANNEL_Z_SHIFT          4
646 #define A2_SRC2_CHANNEL_W_NEGATE         (1<<3)
647 #define A2_SRC2_CHANNEL_W_SHIFT          0
648 
649 /* Texture instructions */
650 #define T0_TEXLD     (0x15<<24)	/* Sample texture using predeclared
651 				 * sampler and address, and output
652 				 * filtered texel data to destination
653 				 * register */
654 #define T0_TEXLDP    (0x16<<24)	/* Same as texld but performs a
655 				 * perspective divide of the texture
656 				 * coordinate .xyz values by .w before
657 				 * sampling. */
658 #define T0_TEXLDB    (0x17<<24)	/* Same as texld but biases the
659 				 * computed LOD by w.  Only S4.6 two's
660 				 * comp is used.  This implies that a
661 				 * float to fixed conversion is
662 				 * done. */
663 #define T0_TEXKILL   (0x18<<24)	/* Does not perform a sampling
664 				 * operation.  Simply kills the pixel
665 				 * if any channel of the address
666 				 * register is < 0.0. */
667 #define T0_DEST_TYPE_SHIFT                19
668 /* Allow: R, OC, OD, U */
669 /* Note: U (unpreserved) regs do not retain their values between
670  * phases (cannot be used for feedback)
671  *
672  * Note: oC and OD registers can only be used as the destination of a
673  * texture instruction once per phase (this is an implementation
674  * restriction).
675  */
676 #define T0_DEST_NR_SHIFT                 14
677 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
678 #define T0_SAMPLER_NR_SHIFT              0 /* This field ignored for TEXKILL */
679 #define T0_SAMPLER_NR_MASK               (0xf<<0)
680 
681 #define T1_ADDRESS_REG_TYPE_SHIFT        24 /* Reg to use as texture coord */
682 /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
683 #define T1_ADDRESS_REG_NR_SHIFT          17
684 #define T2_MBZ                           0
685 
686 /* Declaration instructions */
687 #define D0_DCL       (0x19<<24)	/* Declare a t (interpolated attrib)
688 				 * register or an s (sampler)
689 				 * register. */
690 #define D0_SAMPLE_TYPE_SHIFT              22
691 #define D0_SAMPLE_TYPE_2D                 (0x0<<22)
692 #define D0_SAMPLE_TYPE_CUBE               (0x1<<22)
693 #define D0_SAMPLE_TYPE_VOLUME             (0x2<<22)
694 #define D0_SAMPLE_TYPE_MASK               (0x3<<22)
695 
696 #define D0_TYPE_SHIFT                19
697 /* Allow: T, S */
698 #define D0_NR_SHIFT                  14
699 /* Allow T: 0..10, S: 0..15 */
700 #define D0_CHANNEL_X                (1<<10)
701 #define D0_CHANNEL_Y                (2<<10)
702 #define D0_CHANNEL_Z                (4<<10)
703 #define D0_CHANNEL_W                (8<<10)
704 #define D0_CHANNEL_ALL              (0xf<<10)
705 #define D0_CHANNEL_NONE             (0<<10)
706 
707 #define D0_CHANNEL_XY               (D0_CHANNEL_X|D0_CHANNEL_Y)
708 #define D0_CHANNEL_XYZ              (D0_CHANNEL_XY|D0_CHANNEL_Z)
709 
710 /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse
711  * or specular declarations.
712  *
713  * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw)
714  *
715  * Must be zero for S (sampler) dcls
716  */
717 #define D1_MBZ                          0
718 #define D2_MBZ                          0
719 
720 /* p207.
721  * The DWORD count is 3 times the number of bits set in MS1_MAPMASK_MASK
722  */
723 #define _3DSTATE_MAP_STATE               (CMD_3D|(0x1d<<24)|(0x0<<16))
724 
725 #define MS1_MAPMASK_SHIFT               0
726 #define MS1_MAPMASK_MASK                (0x8fff<<0)
727 
728 #define MS2_UNTRUSTED_SURFACE           (1<<31)
729 #define MS2_ADDRESS_MASK                0xfffffffc
730 #define MS2_VERTICAL_LINE_STRIDE        (1<<1)
731 #define MS2_VERTICAL_OFFSET             (1<<1)
732 
733 #define MS3_HEIGHT_SHIFT              21
734 #define MS3_WIDTH_SHIFT               10
735 #define MS3_PALETTE_SELECT            (1<<9)
736 #define MS3_MAPSURF_FORMAT_SHIFT      7
737 #define MS3_MAPSURF_FORMAT_MASK       (0x7<<7)
738 #define    MAPSURF_8BIT			   (1<<7)
739 #define    MAPSURF_16BIT		   (2<<7)
740 #define    MAPSURF_32BIT		   (3<<7)
741 #define    MAPSURF_422			   (5<<7)
742 #define    MAPSURF_COMPRESSED		   (6<<7)
743 #define    MAPSURF_4BIT_INDEXED		   (7<<7)
744 #define MS3_MT_FORMAT_MASK         (0x7 << 3)
745 #define MS3_MT_FORMAT_SHIFT        3
746 #define    MT_4BIT_IDX_ARGB8888	           (7<<3) /* SURFACE_4BIT_INDEXED */
747 #define    MT_8BIT_I8		           (0<<3) /* SURFACE_8BIT */
748 #define    MT_8BIT_L8		           (1<<3)
749 #define    MT_8BIT_A8		           (4<<3)
750 #define    MT_8BIT_MONO8	           (5<<3)
751 #define    MT_16BIT_RGB565		   (0<<3) /* SURFACE_16BIT */
752 #define    MT_16BIT_ARGB1555		   (1<<3)
753 #define    MT_16BIT_ARGB4444		   (2<<3)
754 #define    MT_16BIT_AY88		   (3<<3)
755 #define    MT_16BIT_88DVDU	           (5<<3)
756 #define    MT_16BIT_BUMP_655LDVDU	   (6<<3)
757 #define    MT_16BIT_I16	                   (7<<3)
758 #define    MT_16BIT_L16	                   (8<<3)
759 #define    MT_16BIT_A16	                   (9<<3)
760 #define    MT_32BIT_ARGB8888		   (0<<3) /* SURFACE_32BIT */
761 #define    MT_32BIT_ABGR8888		   (1<<3)
762 #define    MT_32BIT_XRGB8888		   (2<<3)
763 #define    MT_32BIT_XBGR8888		   (3<<3)
764 #define    MT_32BIT_QWVU8888		   (4<<3)
765 #define    MT_32BIT_AXVU8888		   (5<<3)
766 #define    MT_32BIT_LXVU8888	           (6<<3)
767 #define    MT_32BIT_XLVU8888	           (7<<3)
768 #define    MT_32BIT_ARGB2101010	           (8<<3)
769 #define    MT_32BIT_ABGR2101010	           (9<<3)
770 #define    MT_32BIT_AWVU2101010	           (0xA<<3)
771 #define    MT_32BIT_GR1616	           (0xB<<3)
772 #define    MT_32BIT_VU1616	           (0xC<<3)
773 #define    MT_32BIT_xI824	           (0xD<<3)
774 #define    MT_32BIT_xA824	           (0xE<<3)
775 #define    MT_32BIT_xL824	           (0xF<<3)
776 #define    MT_422_YCRCB_SWAPY	           (0<<3) /* SURFACE_422 */
777 #define    MT_422_YCRCB_NORMAL	           (1<<3)
778 #define    MT_422_YCRCB_SWAPUV	           (2<<3)
779 #define    MT_422_YCRCB_SWAPUVY	           (3<<3)
780 #define    MT_COMPRESS_DXT1		   (0<<3) /* SURFACE_COMPRESSED */
781 #define    MT_COMPRESS_DXT2_3	           (1<<3)
782 #define    MT_COMPRESS_DXT4_5	           (2<<3)
783 #define    MT_COMPRESS_FXT1		   (3<<3)
784 #define    MT_COMPRESS_DXT1_RGB		   (4<<3)
785 #define MS3_USE_FENCE_REGS              (1<<2)
786 #define MS3_TILED_SURFACE             (1<<1)
787 #define MS3_TILE_WALK                 (1<<0)
788 
789 /* The pitch is the pitch measured in DWORDS, minus 1 */
790 #define MS4_PITCH_SHIFT                 21
791 #define MS4_CUBE_FACE_ENA_NEGX          (1<<20)
792 #define MS4_CUBE_FACE_ENA_POSX          (1<<19)
793 #define MS4_CUBE_FACE_ENA_NEGY          (1<<18)
794 #define MS4_CUBE_FACE_ENA_POSY          (1<<17)
795 #define MS4_CUBE_FACE_ENA_NEGZ          (1<<16)
796 #define MS4_CUBE_FACE_ENA_POSZ          (1<<15)
797 #define MS4_CUBE_FACE_ENA_MASK          (0x3f<<15)
798 #define MS4_MAX_LOD_SHIFT		9
799 #define MS4_MAX_LOD_MASK		(0x3f<<9)
800 #define MS4_MIP_LAYOUT_LEGACY           (0<<8)
801 #define MS4_MIP_LAYOUT_BELOW_LPT        (0<<8)
802 #define MS4_MIP_LAYOUT_RIGHT_LPT        (1<<8)
803 #define MS4_VOLUME_DEPTH_SHIFT          0
804 #define MS4_VOLUME_DEPTH_MASK           (0xff<<0)
805 
806 /* p244.
807  * The DWORD count is 3 times the number of bits set in SS1_MAPMASK_MASK.
808  */
809 #define _3DSTATE_SAMPLER_STATE         (CMD_3D|(0x1d<<24)|(0x1<<16))
810 
811 #define SS1_MAPMASK_SHIFT               0
812 #define SS1_MAPMASK_MASK                (0x8fff<<0)
813 
814 #define SS2_REVERSE_GAMMA_ENABLE        (1<<31)
815 #define SS2_PACKED_TO_PLANAR_ENABLE     (1<<30)
816 #define SS2_COLORSPACE_CONVERSION       (1<<29)
817 #define SS2_CHROMAKEY_SHIFT             27
818 #define SS2_BASE_MIP_LEVEL_SHIFT        22
819 #define SS2_BASE_MIP_LEVEL_MASK         (0x1f<<22)
820 #define SS2_MIP_FILTER_SHIFT            20
821 #define SS2_MIP_FILTER_MASK             (0x3<<20)
822 #define   MIPFILTER_NONE	0
823 #define   MIPFILTER_NEAREST	1
824 #define   MIPFILTER_LINEAR	3
825 #define SS2_MAG_FILTER_SHIFT          17
826 #define SS2_MAG_FILTER_MASK           (0x7<<17)
827 #define   FILTER_NEAREST	0
828 #define   FILTER_LINEAR		1
829 #define   FILTER_ANISOTROPIC	2
830 #define   FILTER_4X4_1		3
831 #define   FILTER_4X4_2		4
832 #define   FILTER_4X4_FLAT	5
833 #define   FILTER_6X5_MONO	6 /* XXX - check */
834 #define SS2_MIN_FILTER_SHIFT          14
835 #define SS2_MIN_FILTER_MASK           (0x7<<14)
836 #define SS2_LOD_BIAS_SHIFT            5
837 #define SS2_LOD_BIAS_ONE              (0x10<<5)
838 #define SS2_LOD_BIAS_MASK             (0x1ff<<5)
839 /* Shadow requires:
840  *  MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format
841  *  FILTER_4X4_x  MIN and MAG filters
842  */
843 #define SS2_SHADOW_ENABLE             (1<<4)
844 #define SS2_MAX_ANISO_MASK            (1<<3)
845 #define SS2_MAX_ANISO_2               (0<<3)
846 #define SS2_MAX_ANISO_4               (1<<3)
847 #define SS2_SHADOW_FUNC_SHIFT         0
848 #define SS2_SHADOW_FUNC_MASK          (0x7<<0)
849 /* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */
850 
851 #define SS3_MIN_LOD_SHIFT            24
852 #define SS3_MIN_LOD_ONE              (0x10<<24)
853 #define SS3_MIN_LOD_MASK             (0xff<<24)
854 #define SS3_KILL_PIXEL_ENABLE        (1<<17)
855 #define SS3_TCX_ADDR_MODE_SHIFT      12
856 #define SS3_TCX_ADDR_MODE_MASK       (0x7<<12)
857 #define   TEXCOORDMODE_WRAP		0
858 #define   TEXCOORDMODE_MIRROR		1
859 #define   TEXCOORDMODE_CLAMP_EDGE	2
860 #define   TEXCOORDMODE_CUBE		3
861 #define   TEXCOORDMODE_CLAMP_BORDER	4
862 #define   TEXCOORDMODE_MIRROR_ONCE      5
863 #define SS3_TCY_ADDR_MODE_SHIFT      9
864 #define SS3_TCY_ADDR_MODE_MASK       (0x7<<9)
865 #define SS3_TCZ_ADDR_MODE_SHIFT      6
866 #define SS3_TCZ_ADDR_MODE_MASK       (0x7<<6)
867 #define SS3_NORMALIZED_COORDS        (1<<5)
868 #define SS3_TEXTUREMAP_INDEX_SHIFT   1
869 #define SS3_TEXTUREMAP_INDEX_MASK    (0xf<<1)
870 #define SS3_DEINTERLACER_ENABLE      (1<<0)
871 
872 #define SS4_BORDER_COLOR_MASK        (~0)
873 
874 /* 3DSTATE_SPAN_STIPPLE, p258
875  */
876 #define _3DSTATE_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
877 #define ST1_ENABLE               (1<<16)
878 #define ST1_MASK                 (0xffff)
879 
880 #define FLUSH_MAP_CACHE    (1<<0)
881 #define FLUSH_RENDER_CACHE (1<<1)
882 
883 /* BLT commands */
884 #define COLOR_BLT_CMD		        (CMD_2D | (0x40 << 22) | 3)
885 #define XY_COLOR_BLT_CMD		(CMD_2D | (0x50 << 22) | 4)
886 #define XY_SETUP_CLIP_BLT_CMD		(CMD_2D | (0x03 << 22) | 1)
887 #define XY_SRC_COPY_BLT_CMD             (CMD_2D | (0x53 << 22) | 6)
888 #define SRC_COPY_BLT_CMD		(CMD_2D | (0x43 << 22) | 4)
889 
890 #define XY_MONO_PAT_BLT_CMD		(CMD_2D  | (0x52<<22)|0x7)
891 #define XY_MONO_PAT_VERT_SEED		((1<<10) | (1<<9)|(1<<8))
892 #define XY_MONO_PAT_HORT_SEED		((1<<14) | (1<<13)|(1<<12))
893 #define XY_MONO_SRC_BLT_CMD		(CMD_2D  | (0x54<<22)|(0x6))
894 
895 #define XY_SETUP_BLT_CMD		(CMD_2D | (0x01 << 22) | 6)
896 #define XY_TEXT_IMMEDIATE_BLIT_CMD	(CMD_2D | (0x31 << 22))
897 #define XY_TEXT_BYTE_PACKED		(1 << 16)
898 
899 /* BR00 */
900 #define XY_BLT_WRITE_ALPHA	(1 << 21)
901 #define XY_BLT_WRITE_RGB	(1 << 20)
902 #define XY_SRC_TILED		(1 << 15)
903 #define XY_DST_TILED		(1 << 11)
904 
905 /* BR13 */
906 #define BR13_565		(0x1 << 24)
907 #define BR13_8888		(0x3 << 24)
908 
909 #endif /* CAIRO_DRM_INTEL_COMMAND_PRIVATE_H */
910