1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24 #ifndef _AMDGPU_TEST_H_
25 #define _AMDGPU_TEST_H_
26
27 #include "amdgpu.h"
28 #include "amdgpu_drm.h"
29
30 /**
31 * Define max. number of card in system which we are able to handle
32 */
33 #define MAX_CARDS_SUPPORTED 128
34
35 /* Forward reference for array to keep "drm" handles */
36 extern int drm_amdgpu[MAX_CARDS_SUPPORTED];
37
38 /* Global variables */
39 extern int open_render_node;
40
41 /************************* Basic test suite ********************************/
42
43 /*
44 * Define basic test suite to serve as the starting point for future testing
45 */
46
47 /**
48 * Initialize basic test suite
49 */
50 int suite_basic_tests_init();
51
52 /**
53 * Deinitialize basic test suite
54 */
55 int suite_basic_tests_clean();
56
57 /**
58 * Decide if the suite is enabled by default or not.
59 */
60 CU_BOOL suite_basic_tests_enable(void);
61
62 /**
63 * Tests in basic test suite
64 */
65 extern CU_TestInfo basic_tests[];
66
67 /**
68 * Initialize bo test suite
69 */
70 int suite_bo_tests_init();
71
72 /**
73 * Deinitialize bo test suite
74 */
75 int suite_bo_tests_clean();
76
77 /**
78 * Tests in bo test suite
79 */
80 extern CU_TestInfo bo_tests[];
81
82 /**
83 * Initialize cs test suite
84 */
85 int suite_cs_tests_init();
86
87 /**
88 * Deinitialize cs test suite
89 */
90 int suite_cs_tests_clean();
91
92 /**
93 * Decide if the suite is enabled by default or not.
94 */
95 CU_BOOL suite_cs_tests_enable(void);
96
97 /**
98 * Tests in cs test suite
99 */
100 extern CU_TestInfo cs_tests[];
101
102 /**
103 * Initialize vce test suite
104 */
105 int suite_vce_tests_init();
106
107 /**
108 * Deinitialize vce test suite
109 */
110 int suite_vce_tests_clean();
111
112 /**
113 * Decide if the suite is enabled by default or not.
114 */
115 CU_BOOL suite_vce_tests_enable(void);
116
117 /**
118 * Tests in vce test suite
119 */
120 extern CU_TestInfo vce_tests[];
121
122 /**
123 + * Initialize vcn test suite
124 + */
125 int suite_vcn_tests_init();
126
127 /**
128 + * Deinitialize vcn test suite
129 + */
130 int suite_vcn_tests_clean();
131
132 /**
133 * Decide if the suite is enabled by default or not.
134 */
135 CU_BOOL suite_vcn_tests_enable(void);
136
137 /**
138 + * Tests in vcn test suite
139 + */
140 extern CU_TestInfo vcn_tests[];
141
142 /**
143 + * Initialize jpeg test suite
144 + */
145 int suite_jpeg_tests_init();
146
147 /**
148 + * Deinitialize jpeg test suite
149 + */
150 int suite_jpeg_tests_clean();
151
152 /**
153 * Decide if the suite is enabled by default or not.
154 */
155 CU_BOOL suite_jpeg_tests_enable(void);
156
157 /**
158 + * Tests in vcn test suite
159 + */
160 extern CU_TestInfo jpeg_tests[];
161
162 /**
163 * Initialize uvd enc test suite
164 */
165 int suite_uvd_enc_tests_init();
166
167 /**
168 * Deinitialize uvd enc test suite
169 */
170 int suite_uvd_enc_tests_clean();
171
172 /**
173 * Decide if the suite is enabled by default or not.
174 */
175 CU_BOOL suite_uvd_enc_tests_enable(void);
176
177 /**
178 * Tests in uvd enc test suite
179 */
180 extern CU_TestInfo uvd_enc_tests[];
181
182 /**
183 * Initialize deadlock test suite
184 */
185 int suite_deadlock_tests_init();
186
187 /**
188 * Deinitialize deadlock test suite
189 */
190 int suite_deadlock_tests_clean();
191
192 /**
193 * Decide if the suite is enabled by default or not.
194 */
195 CU_BOOL suite_deadlock_tests_enable(void);
196
197 /**
198 * Tests in uvd enc test suite
199 */
200 extern CU_TestInfo deadlock_tests[];
201
202 /**
203 * Initialize vm test suite
204 */
205 int suite_vm_tests_init();
206
207 /**
208 * Deinitialize deadlock test suite
209 */
210 int suite_vm_tests_clean();
211
212 /**
213 * Decide if the suite is enabled by default or not.
214 */
215 CU_BOOL suite_vm_tests_enable(void);
216
217 /**
218 * Tests in vm test suite
219 */
220 extern CU_TestInfo vm_tests[];
221
222
223 /**
224 * Initialize ras test suite
225 */
226 int suite_ras_tests_init();
227
228 /**
229 * Deinitialize deadlock test suite
230 */
231 int suite_ras_tests_clean();
232
233 /**
234 * Decide if the suite is enabled by default or not.
235 */
236 CU_BOOL suite_ras_tests_enable(void);
237
238 /**
239 * Tests in ras test suite
240 */
241 extern CU_TestInfo ras_tests[];
242
243
244 /**
245 * Initialize syncobj timeline test suite
246 */
247 int suite_syncobj_timeline_tests_init();
248
249 /**
250 * Deinitialize syncobj timeline test suite
251 */
252 int suite_syncobj_timeline_tests_clean();
253
254 /**
255 * Decide if the suite is enabled by default or not.
256 */
257 CU_BOOL suite_syncobj_timeline_tests_enable(void);
258
259 /**
260 * Tests in syncobj timeline test suite
261 */
262 extern CU_TestInfo syncobj_timeline_tests[];
263
264 void amdgpu_dispatch_hang_helper(amdgpu_device_handle device_handle, uint32_t ip_type);
265 void amdgpu_dispatch_hang_slow_helper(amdgpu_device_handle device_handle, uint32_t ip_type);
266 void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring,
267 int hang);
268 void amdgpu_memcpy_draw_hang_slow_test(amdgpu_device_handle device_handle, uint32_t ring);
269
270 /**
271 * Initialize security test suite
272 */
273 int suite_security_tests_init();
274
275 /**
276 * Deinitialize security test suite
277 */
278 int suite_security_tests_clean();
279
280 /**
281 * Decide if the suite is enabled by default or not.
282 */
283 CU_BOOL suite_security_tests_enable(void);
284
285 /**
286 * Tests in security test suite
287 */
288 extern CU_TestInfo security_tests[];
289
290 extern void
291 amdgpu_command_submission_write_linear_helper_with_secure(amdgpu_device_handle
292 device,
293 unsigned ip_type,
294 bool secure);
295
296
297
298 /**
299 * Initialize hotunplug test suite
300 */
301 int suite_hotunplug_tests_init();
302
303 /**
304 * Deinitialize hotunplug test suite
305 */
306 int suite_hotunplug_tests_clean();
307
308 /**
309 * Decide if the suite is enabled by default or not.
310 */
311 CU_BOOL suite_hotunplug_tests_enable(void);
312
313 /**
314 * Tests in uvd enc test suite
315 */
316 extern CU_TestInfo hotunplug_tests[];
317
318
319 /**
320 * Helper functions
321 */
gpu_mem_alloc(amdgpu_device_handle device_handle,uint64_t size,uint64_t alignment,uint32_t type,uint64_t flags,uint64_t * vmc_addr,amdgpu_va_handle * va_handle)322 static inline amdgpu_bo_handle gpu_mem_alloc(
323 amdgpu_device_handle device_handle,
324 uint64_t size,
325 uint64_t alignment,
326 uint32_t type,
327 uint64_t flags,
328 uint64_t *vmc_addr,
329 amdgpu_va_handle *va_handle)
330 {
331 struct amdgpu_bo_alloc_request req = {0};
332 amdgpu_bo_handle buf_handle = NULL;
333 int r;
334
335 req.alloc_size = size;
336 req.phys_alignment = alignment;
337 req.preferred_heap = type;
338 req.flags = flags;
339
340 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
341 CU_ASSERT_EQUAL(r, 0);
342 if (r)
343 return NULL;
344
345 if (vmc_addr && va_handle) {
346 r = amdgpu_va_range_alloc(device_handle,
347 amdgpu_gpu_va_range_general,
348 size, alignment, 0, vmc_addr,
349 va_handle, 0);
350 CU_ASSERT_EQUAL(r, 0);
351 if (r)
352 goto error_free_bo;
353
354 r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0,
355 AMDGPU_VA_OP_MAP);
356 CU_ASSERT_EQUAL(r, 0);
357 if (r)
358 goto error_free_va;
359 }
360
361 return buf_handle;
362
363 error_free_va:
364 r = amdgpu_va_range_free(*va_handle);
365 CU_ASSERT_EQUAL(r, 0);
366
367 error_free_bo:
368 r = amdgpu_bo_free(buf_handle);
369 CU_ASSERT_EQUAL(r, 0);
370
371 return NULL;
372 }
373
gpu_mem_free(amdgpu_bo_handle bo,amdgpu_va_handle va_handle,uint64_t vmc_addr,uint64_t size)374 static inline int gpu_mem_free(amdgpu_bo_handle bo,
375 amdgpu_va_handle va_handle,
376 uint64_t vmc_addr,
377 uint64_t size)
378 {
379 int r;
380
381 if (!bo)
382 return 0;
383
384 if (va_handle) {
385 r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0,
386 AMDGPU_VA_OP_UNMAP);
387 CU_ASSERT_EQUAL(r, 0);
388 if (r)
389 return r;
390
391 r = amdgpu_va_range_free(va_handle);
392 CU_ASSERT_EQUAL(r, 0);
393 if (r)
394 return r;
395 }
396
397 r = amdgpu_bo_free(bo);
398 CU_ASSERT_EQUAL(r, 0);
399
400 return r;
401 }
402
403 static inline int
amdgpu_bo_alloc_wrap(amdgpu_device_handle dev,unsigned size,unsigned alignment,unsigned heap,uint64_t flags,amdgpu_bo_handle * bo)404 amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size,
405 unsigned alignment, unsigned heap, uint64_t flags,
406 amdgpu_bo_handle *bo)
407 {
408 struct amdgpu_bo_alloc_request request = {};
409 amdgpu_bo_handle buf_handle;
410 int r;
411
412 request.alloc_size = size;
413 request.phys_alignment = alignment;
414 request.preferred_heap = heap;
415 request.flags = flags;
416
417 r = amdgpu_bo_alloc(dev, &request, &buf_handle);
418 if (r)
419 return r;
420
421 *bo = buf_handle;
422
423 return 0;
424 }
425
426 int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size,
427 unsigned alignment, unsigned heap, uint64_t alloc_flags,
428 uint64_t mapping_flags, amdgpu_bo_handle *bo, void **cpu,
429 uint64_t *mc_address,
430 amdgpu_va_handle *va_handle);
431
432 static inline int
amdgpu_bo_alloc_and_map(amdgpu_device_handle dev,unsigned size,unsigned alignment,unsigned heap,uint64_t alloc_flags,amdgpu_bo_handle * bo,void ** cpu,uint64_t * mc_address,amdgpu_va_handle * va_handle)433 amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size,
434 unsigned alignment, unsigned heap, uint64_t alloc_flags,
435 amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address,
436 amdgpu_va_handle *va_handle)
437 {
438 return amdgpu_bo_alloc_and_map_raw(dev, size, alignment, heap,
439 alloc_flags, 0, bo, cpu, mc_address, va_handle);
440 }
441
442 static inline int
amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo,amdgpu_va_handle va_handle,uint64_t mc_addr,uint64_t size)443 amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle,
444 uint64_t mc_addr, uint64_t size)
445 {
446 amdgpu_bo_cpu_unmap(bo);
447 amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP);
448 amdgpu_va_range_free(va_handle);
449 amdgpu_bo_free(bo);
450
451 return 0;
452
453 }
454
455 static inline int
amdgpu_get_bo_list(amdgpu_device_handle dev,amdgpu_bo_handle bo1,amdgpu_bo_handle bo2,amdgpu_bo_list_handle * list)456 amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1,
457 amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list)
458 {
459 amdgpu_bo_handle resources[] = {bo1, bo2};
460
461 return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list);
462 }
463
464
amdgpu_set_suite_active(const char * suite_name,CU_BOOL active)465 static inline CU_ErrorCode amdgpu_set_suite_active(const char *suite_name,
466 CU_BOOL active)
467 {
468 CU_ErrorCode r = CU_set_suite_active(CU_get_suite(suite_name), active);
469
470 if (r != CUE_SUCCESS)
471 fprintf(stderr, "Failed to obtain suite %s\n", suite_name);
472
473 return r;
474 }
475
amdgpu_set_test_active(const char * suite_name,const char * test_name,CU_BOOL active)476 static inline CU_ErrorCode amdgpu_set_test_active(const char *suite_name,
477 const char *test_name, CU_BOOL active)
478 {
479 CU_ErrorCode r;
480 CU_pSuite pSuite = CU_get_suite(suite_name);
481
482 if (!pSuite) {
483 fprintf(stderr, "Failed to obtain suite %s\n",
484 suite_name);
485 return CUE_NOSUITE;
486 }
487
488 r = CU_set_test_active(CU_get_test(pSuite, test_name), active);
489 if (r != CUE_SUCCESS)
490 fprintf(stderr, "Failed to obtain test %s\n", test_name);
491
492 return r;
493 }
494
495
asic_is_gfx_pipe_removed(uint32_t family_id,uint32_t chip_id,uint32_t chip_rev)496 static inline bool asic_is_gfx_pipe_removed(uint32_t family_id, uint32_t chip_id, uint32_t chip_rev)
497 {
498
499 if (family_id != AMDGPU_FAMILY_AI)
500 return false;
501
502 switch (chip_id - chip_rev) {
503 /* Arcturus */
504 case 0x32:
505 /* Aldebaran */
506 case 0x3c:
507 return true;
508 default:
509 return false;
510 }
511 }
512
513 void amdgpu_test_exec_cs_helper_raw(amdgpu_device_handle device_handle,
514 amdgpu_context_handle context_handle,
515 unsigned ip_type, int instance, int pm4_dw,
516 uint32_t *pm4_src, int res_cnt,
517 amdgpu_bo_handle *resources,
518 struct amdgpu_cs_ib_info *ib_info,
519 struct amdgpu_cs_request *ibs_request,
520 bool secure);
521
522 void amdgpu_close_devices();
523 int amdgpu_open_device_on_test_index(int render_node);
524 char *amdgpu_get_device_from_fd(int fd);
525
526 #endif /* #ifdef _AMDGPU_TEST_H_ */
527