1 /************************************************************************** 2 * 3 * Copyright 2017 Advanced Micro Devices, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef _RADEON_VCN_DEC_H 29 #define _RADEON_VCN_DEC_H 30 31 #include "radeon_video.h" 32 #include "util/list.h" 33 34 #define RDECODE_PKT_TYPE_S(x) (((unsigned)(x)&0x3) << 30) 35 #define RDECODE_PKT_TYPE_G(x) (((x) >> 30) & 0x3) 36 #define RDECODE_PKT_TYPE_C 0x3FFFFFFF 37 #define RDECODE_PKT_COUNT_S(x) (((unsigned)(x)&0x3FFF) << 16) 38 #define RDECODE_PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) 39 #define RDECODE_PKT_COUNT_C 0xC000FFFF 40 #define RDECODE_PKT0_BASE_INDEX_S(x) (((unsigned)(x)&0xFFFF) << 0) 41 #define RDECODE_PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) 42 #define RDECODE_PKT0_BASE_INDEX_C 0xFFFF0000 43 #define RDECODE_PKT0(index, count) \ 44 (RDECODE_PKT_TYPE_S(0) | RDECODE_PKT0_BASE_INDEX_S(index) | RDECODE_PKT_COUNT_S(count)) 45 46 #define RDECODE_PKT2() (RDECODE_PKT_TYPE_S(2)) 47 48 #define RDECODE_PKT_REG_J(x) ((unsigned)(x)&0x3FFFF) 49 #define RDECODE_PKT_RES_J(x) (((unsigned)(x)&0x3F) << 18) 50 #define RDECODE_PKT_COND_J(x) (((unsigned)(x)&0xF) << 24) 51 #define RDECODE_PKT_TYPE_J(x) (((unsigned)(x)&0xF) << 28) 52 #define RDECODE_PKTJ(reg, cond, type) \ 53 (RDECODE_PKT_REG_J(reg) | RDECODE_PKT_RES_J(0) | RDECODE_PKT_COND_J(cond) | \ 54 RDECODE_PKT_TYPE_J(type)) 55 56 #define RDECODE_CMD_MSG_BUFFER 0x00000000 57 #define RDECODE_CMD_DPB_BUFFER 0x00000001 58 #define RDECODE_CMD_DECODING_TARGET_BUFFER 0x00000002 59 #define RDECODE_CMD_FEEDBACK_BUFFER 0x00000003 60 #define RDECODE_CMD_PROB_TBL_BUFFER 0x00000004 61 #define RDECODE_CMD_SESSION_CONTEXT_BUFFER 0x00000005 62 #define RDECODE_CMD_BITSTREAM_BUFFER 0x00000100 63 #define RDECODE_CMD_IT_SCALING_TABLE_BUFFER 0x00000204 64 #define RDECODE_CMD_CONTEXT_BUFFER 0x00000206 65 66 #define RDECODE_MSG_CREATE 0x00000000 67 #define RDECODE_MSG_DECODE 0x00000001 68 #define RDECODE_MSG_DESTROY 0x00000002 69 70 #define RDECODE_CODEC_H264 0x00000000 71 #define RDECODE_CODEC_VC1 0x00000001 72 #define RDECODE_CODEC_MPEG2_VLD 0x00000003 73 #define RDECODE_CODEC_MPEG4 0x00000004 74 #define RDECODE_CODEC_H264_PERF 0x00000007 75 #define RDECODE_CODEC_JPEG 0x00000008 76 #define RDECODE_CODEC_H265 0x00000010 77 #define RDECODE_CODEC_VP9 0x00000011 78 #define RDECODE_CODEC_AV1 0x00000013 79 80 #define RDECODE_ARRAY_MODE_LINEAR 0x00000000 81 #define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED 0x00000001 82 #define RDECODE_ARRAY_MODE_1D_THIN 0x00000002 83 #define RDECODE_ARRAY_MODE_2D_THIN 0x00000004 84 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR 0x00000004 85 #define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED 0x00000005 86 87 #define RDECODE_H264_PROFILE_BASELINE 0x00000000 88 #define RDECODE_H264_PROFILE_MAIN 0x00000001 89 #define RDECODE_H264_PROFILE_HIGH 0x00000002 90 #define RDECODE_H264_PROFILE_STEREO_HIGH 0x00000003 91 #define RDECODE_H264_PROFILE_MVC 0x00000004 92 93 #define RDECODE_VC1_PROFILE_SIMPLE 0x00000000 94 #define RDECODE_VC1_PROFILE_MAIN 0x00000001 95 #define RDECODE_VC1_PROFILE_ADVANCED 0x00000002 96 97 #define RDECODE_SW_MODE_LINEAR 0x00000000 98 #define RDECODE_256B_S 0x00000001 99 #define RDECODE_256B_D 0x00000002 100 #define RDECODE_4KB_S 0x00000005 101 #define RDECODE_4KB_D 0x00000006 102 #define RDECODE_64KB_S 0x00000009 103 #define RDECODE_64KB_D 0x0000000A 104 #define RDECODE_4KB_S_X 0x00000015 105 #define RDECODE_4KB_D_X 0x00000016 106 #define RDECODE_64KB_S_X 0x00000019 107 #define RDECODE_64KB_D_X 0x0000001A 108 109 #define RDECODE_MESSAGE_NOT_SUPPORTED 0x00000000 110 #define RDECODE_MESSAGE_CREATE 0x00000001 111 #define RDECODE_MESSAGE_DECODE 0x00000002 112 #define RDECODE_MESSAGE_DRM 0x00000003 113 #define RDECODE_MESSAGE_AVC 0x00000006 114 #define RDECODE_MESSAGE_VC1 0x00000007 115 #define RDECODE_MESSAGE_MPEG2_VLD 0x0000000A 116 #define RDECODE_MESSAGE_MPEG4_ASP_VLD 0x0000000B 117 #define RDECODE_MESSAGE_HEVC 0x0000000D 118 #define RDECODE_MESSAGE_VP9 0x0000000E 119 #define RDECODE_MESSAGE_DYNAMIC_DPB 0x00000010 120 #define RDECODE_MESSAGE_AV1 0x00000011 121 122 #define RDECODE_FEEDBACK_PROFILING 0x00000001 123 124 #define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7 125 126 #define NUM_BUFFERS 4 127 128 #define RDECODE_VP9_PROBS_DATA_SIZE 2304 129 130 #define mmUVD_JPEG_CNTL 0x0200 131 #define mmUVD_JPEG_CNTL_BASE_IDX 1 132 #define mmUVD_JPEG_RB_BASE 0x0201 133 #define mmUVD_JPEG_RB_BASE_BASE_IDX 1 134 #define mmUVD_JPEG_RB_WPTR 0x0202 135 #define mmUVD_JPEG_RB_WPTR_BASE_IDX 1 136 #define mmUVD_JPEG_RB_RPTR 0x0203 137 #define mmUVD_JPEG_RB_RPTR_BASE_IDX 1 138 #define mmUVD_JPEG_RB_SIZE 0x0204 139 #define mmUVD_JPEG_RB_SIZE_BASE_IDX 1 140 #define mmUVD_JPEG_TIER_CNTL2 0x021a 141 #define mmUVD_JPEG_TIER_CNTL2_BASE_IDX 1 142 #define mmUVD_JPEG_UV_TILING_CTRL 0x021c 143 #define mmUVD_JPEG_UV_TILING_CTRL_BASE_IDX 1 144 #define mmUVD_JPEG_TILING_CTRL 0x021e 145 #define mmUVD_JPEG_TILING_CTRL_BASE_IDX 1 146 #define mmUVD_JPEG_OUTBUF_RPTR 0x0220 147 #define mmUVD_JPEG_OUTBUF_RPTR_BASE_IDX 1 148 #define mmUVD_JPEG_OUTBUF_WPTR 0x0221 149 #define mmUVD_JPEG_OUTBUF_WPTR_BASE_IDX 1 150 #define mmUVD_JPEG_PITCH 0x0222 151 #define mmUVD_JPEG_PITCH_BASE_IDX 1 152 #define mmUVD_JPEG_INT_EN 0x0229 153 #define mmUVD_JPEG_INT_EN_BASE_IDX 1 154 #define mmUVD_JPEG_UV_PITCH 0x022b 155 #define mmUVD_JPEG_UV_PITCH_BASE_IDX 1 156 #define mmUVD_JPEG_INDEX 0x023e 157 #define mmUVD_JPEG_INDEX_BASE_IDX 1 158 #define mmUVD_JPEG_DATA 0x023f 159 #define mmUVD_JPEG_DATA_BASE_IDX 1 160 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH 0x0438 161 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_BASE_IDX 1 162 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW 0x0439 163 #define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_BASE_IDX 1 164 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH 0x045a 165 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_BASE_IDX 1 166 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW 0x045b 167 #define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW_BASE_IDX 1 168 #define mmUVD_CTX_INDEX 0x0528 169 #define mmUVD_CTX_INDEX_BASE_IDX 1 170 #define mmUVD_CTX_DATA 0x0529 171 #define mmUVD_CTX_DATA_BASE_IDX 1 172 #define mmUVD_SOFT_RESET 0x05a0 173 #define mmUVD_SOFT_RESET_BASE_IDX 1 174 175 #define vcnipUVD_JPEG_DEC_SOFT_RST 0x402f 176 #define vcnipUVD_JRBC_IB_COND_RD_TIMER 0x408e 177 #define vcnipUVD_JRBC_IB_REF_DATA 0x408f 178 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH 0x40e1 179 #define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW 0x40e0 180 #define vcnipUVD_JPEG_RB_BASE 0x4001 181 #define vcnipUVD_JPEG_RB_SIZE 0x4004 182 #define vcnipUVD_JPEG_RB_WPTR 0x4002 183 #define vcnipUVD_JPEG_PITCH 0x401f 184 #define vcnipUVD_JPEG_UV_PITCH 0x4020 185 #define vcnipJPEG_DEC_ADDR_MODE 0x4027 186 #define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE 0x4024 187 #define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE 0x4025 188 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH 0x40e3 189 #define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW 0x40e2 190 #define vcnipUVD_JPEG_INDEX 0x402c 191 #define vcnipUVD_JPEG_DATA 0x402d 192 #define vcnipUVD_JPEG_TIER_CNTL2 0x400f 193 #define vcnipUVD_JPEG_OUTBUF_RPTR 0x401e 194 #define vcnipUVD_JPEG_OUTBUF_CNTL 0x401c 195 #define vcnipUVD_JPEG_INT_EN 0x400a 196 #define vcnipUVD_JPEG_CNTL 0x4000 197 #define vcnipUVD_JPEG_RB_RPTR 0x4003 198 #define vcnipUVD_JPEG_OUTBUF_WPTR 0x401d 199 200 #define UVD_BASE_INST0_SEG0 0x00007800 201 #define UVD_BASE_INST0_SEG1 0x00007E00 202 #define UVD_BASE_INST0_SEG2 0 203 #define UVD_BASE_INST0_SEG3 0 204 #define UVD_BASE_INST0_SEG4 0 205 206 #define SOC15_REG_ADDR(reg) (UVD_BASE_INST0_SEG1 + reg) 207 208 #define COND0 0 209 #define COND1 1 210 #define COND2 2 211 #define COND3 3 212 #define COND4 4 213 #define COND5 5 214 #define COND6 6 215 #define COND7 7 216 217 #define TYPE0 0 218 #define TYPE1 1 219 #define TYPE2 2 220 #define TYPE3 3 221 #define TYPE4 4 222 #define TYPE5 5 223 #define TYPE6 6 224 #define TYPE7 7 225 226 /* VP9 Frame header flags */ 227 #define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_SHIFT (14) 228 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT (13) 229 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT (12) 230 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT (11) 231 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_SHIFT (10) 232 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (9) 233 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT (8) 234 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT (7) 235 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT (6) 236 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT (5) 237 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT (4) 238 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT (3) 239 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT (2) 240 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT (1) 241 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_SHIFT (0) 242 243 244 #define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_MASK (0x00004000) 245 #define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK (0x00002000) 246 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK (0x00001000) 247 #define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK (0x00000800) 248 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_MASK (0x00000400) 249 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x00000200) 250 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK (0x00000100) 251 #define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK (0x00000080) 252 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK (0x00000040) 253 #define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK (0x00000020) 254 #define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK (0x00000010) 255 #define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK (0x00000008) 256 #define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK (0x00000004) 257 #define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK (0x00000002) 258 #define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_MASK (0x00000001) 259 260 /* Drm definitions */ 261 #define DRM_CMD_KEY_SHIFT 0 262 #define DRM_CMD_CNT_KEY_SHIFT 1 263 #define DRM_CMD_CNT_DATA_SHIFT 2 264 #define DRM_CMD_OFFSET_SHIFT 3 265 #define DRM_CMD_SESSION_SEL_SHIFT 4 266 #define DRM_CMD_UNWRAP_KEY_SHIFT 8 267 #define DRM_CMD_GEN_MASK_SHIFT 9 268 #define DRM_CMD_ALGORITHM_SHIFT 10 269 #define DRM_CMD_BYTE_MASK_SHIFT 16 270 #define DRM_CMD_DRM_BYPASS_SHIFT 31 271 272 #define DRM_CMD_KEY_MASK (0x00000001) 273 #define DRM_CMD_CNT_KEY_MASK (0x00000002) 274 #define DRM_CMD_CNT_DATA_MASK (0x00000004) 275 #define DRM_CMD_OFFSET_MASK (0x00000008) 276 #define DRM_CMD_SESSION_SEL_MASK (0x000000F0) 277 #define DRM_CMD_UNWRAP_KEY_MASK (0x00000100) 278 #define DRM_CMD_GEN_MASK_MASK (0x00000200) 279 #define DRM_CMD_ALGORITHM_MASK (0x00000C00) 280 #define DRM_CMD_BYTE_MASK_MASK (0x00FF0000) 281 #define DRM_CMD_DRM_BYPASS_MASK (0x80000000) 282 283 /* Drm_cntl definitions */ 284 #define DRM_CNTL_ENC_BYTECNT_SHIFT (6) 285 #define DRM_CNTL_CLR_BYTECNT_SHIFT (16) 286 #define DRM_CNTL_BYPASS_SHIFT (24) 287 #define DRM_CNTL_PARTIAL_MODE_SHIFT (25) 288 #define DRM_CNTL_OFFSET_MODE_SHIFT (26) 289 #define DRM_CNTL_HEADER_MODE_SHIFT (27) 290 #define DRM_CNTL_HEADER_BYTECNT_SHIFT (28) 291 292 #define DRM_CNTL_ENC_BYTECNT_MASK (0x00000FC0) 293 #define DRM_CNTL_CLR_BYTECNT_MASK (0x003F0000) 294 #define DRM_CNTL_BYPASS_MASK (0x01000000) 295 #define DRM_CNTL_PARTIAL_MODE_MASK (0x02000000) 296 #define DRM_CNTL_OFFSET_MODE_MASK (0x04000000) 297 #define DRM_CNTL_HEADER_MODE_MASK (0x08000000) 298 #define DRM_CNTL_HEADER_BYTECNT_MASK (0xF0000000) 299 300 #define SAMU_DRM_DISABLE 0x00000000 301 #define SAMU_DRM_ENABLE 0x00000001 302 303 /* AV1 Frame header flags */ 304 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_SHIFT (31) 305 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_SHIFT (30) 306 #define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_SHIFT (29) 307 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_SHIFT (28) 308 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (27) 309 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_SHIFT (26) 310 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_SHIFT (25) 311 #define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_SHIFT (24) 312 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_SHIFT (23) 313 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_SHIFT (22) 314 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_SHIFT (21) 315 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_SHIFT (20) 316 #define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_SHIFT (19) 317 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_SHIFT (18) 318 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_SHIFT (17) 319 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_SHIFT (16) 320 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_SHIFT (15) 321 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_SHIFT (14) 322 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_SHIFT (13) 323 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_SHIFT (12) 324 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_SHIFT (11) 325 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_SHIFT (10) 326 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_SHIFT (9) 327 #define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_SHIFT (8) 328 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_SHIFT (7) 329 #define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_SHIFT (6) 330 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_SHIFT (5) 331 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_SHIFT (4) 332 #define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_SHIFT (3) 333 #define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_SHIFT (2) 334 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_SHIFT (1) 335 #define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_SHIFT (0) 336 337 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_MASK (0x80000000) 338 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_MASK (0x40000000) 339 #define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_MASK (0x20000000) 340 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_MASK (0x10000000) 341 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x08000000) 342 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_MASK (0x04000000) 343 #define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_MASK (0x02000000) 344 #define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_MASK (0x01000000) 345 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_MASK (0x00800000) 346 #define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_MASK (0x00400000) 347 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_MASK (0x00200000) 348 #define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_MASK (0x00100000) 349 #define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_MASK (0x00080000) 350 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_MASK (0x00040000) 351 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_MASK (0x00020000) 352 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_MASK (0x00010000) 353 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_MASK (0x00008000) 354 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_MASK (0x00004000) 355 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_MASK (0x00002000) 356 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_MASK (0x00001000) 357 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_MASK (0x00000800) 358 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_MASK (0x00000400) 359 #define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_MASK (0x00000200) 360 #define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_MASK (0x00000100) 361 #define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_MASK (0x00000080) 362 #define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_MASK (0x08000040) 363 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_MASK (0x00000020) 364 #define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_MASK (0x00000010) 365 #define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_MASK (0x00000008) 366 #define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_MASK (0x00000004) 367 #define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_MASK (0x00000002) 368 #define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_MASK (0x00000001) 369 370 typedef struct rvcn_dec_message_index_s { 371 unsigned int message_id; 372 unsigned int offset; 373 unsigned int size; 374 unsigned int filled; 375 } rvcn_dec_message_index_t; 376 377 typedef struct rvcn_dec_message_header_s { 378 unsigned int header_size; 379 unsigned int total_size; 380 unsigned int num_buffers; 381 unsigned int msg_type; 382 unsigned int stream_handle; 383 unsigned int status_report_feedback_number; 384 385 rvcn_dec_message_index_t index[1]; 386 } rvcn_dec_message_header_t; 387 388 typedef struct rvcn_dec_message_create_s { 389 unsigned int stream_type; 390 unsigned int session_flags; 391 unsigned int width_in_samples; 392 unsigned int height_in_samples; 393 } rvcn_dec_message_create_t; 394 395 typedef struct rvcn_dec_message_decode_s { 396 unsigned int stream_type; 397 unsigned int decode_flags; 398 unsigned int width_in_samples; 399 unsigned int height_in_samples; 400 401 unsigned int bsd_size; 402 unsigned int dpb_size; 403 unsigned int dt_size; 404 unsigned int sct_size; 405 unsigned int sc_coeff_size; 406 unsigned int hw_ctxt_size; 407 unsigned int sw_ctxt_size; 408 unsigned int pic_param_size; 409 unsigned int mb_cntl_size; 410 unsigned int reserved0[4]; 411 unsigned int decode_buffer_flags; 412 413 unsigned int db_pitch; 414 unsigned int db_aligned_height; 415 unsigned int db_tiling_mode; 416 unsigned int db_swizzle_mode; 417 unsigned int db_array_mode; 418 unsigned int db_field_mode; 419 unsigned int db_surf_tile_config; 420 421 unsigned int dt_pitch; 422 unsigned int dt_uv_pitch; 423 unsigned int dt_tiling_mode; 424 unsigned int dt_swizzle_mode; 425 unsigned int dt_array_mode; 426 unsigned int dt_field_mode; 427 unsigned int dt_out_format; 428 unsigned int dt_surf_tile_config; 429 unsigned int dt_uv_surf_tile_config; 430 unsigned int dt_luma_top_offset; 431 unsigned int dt_luma_bottom_offset; 432 unsigned int dt_chroma_top_offset; 433 unsigned int dt_chroma_bottom_offset; 434 unsigned int dt_chromaV_top_offset; 435 unsigned int dt_chromaV_bottom_offset; 436 437 unsigned int mif_wrc_en; 438 unsigned int db_pitch_uv; 439 440 unsigned char reserved1[20]; 441 } rvcn_dec_message_decode_t; 442 443 typedef struct rvcn_dec_message_drm_s { 444 unsigned int drm_key[4]; 445 unsigned int drm_counter[4]; 446 unsigned int drm_wrapped_key[4]; 447 unsigned int drm_offset; 448 unsigned int drm_cmd; 449 unsigned int drm_cntl; 450 unsigned int drm_reserved; 451 } rvcn_dec_message_drm_t; 452 453 typedef struct rvcn_dec_message_dynamic_dpb_s { 454 unsigned int dpbConfigFlags; 455 unsigned int dpbLumaPitch; 456 unsigned int dpbLumaAlignedHeight; 457 unsigned int dpbLumaAlignedSize; 458 unsigned int dpbChromaPitch; 459 unsigned int dpbChromaAlignedHeight; 460 unsigned int dpbChromaAlignedSize; 461 462 unsigned char dpbArraySize; 463 unsigned char dpbCurArraySlice; 464 unsigned char dpbRefArraySlice[16]; 465 unsigned char dpbReserved0[2]; 466 467 unsigned int dpbCurrOffset; 468 unsigned int dpbAddrOffset[16]; 469 } rvcn_dec_message_dynamic_dpb_t; 470 471 typedef struct rvcn_dec_message_dynamic_dpb_t2_s { 472 unsigned int dpbConfigFlags; 473 unsigned int dpbLumaPitch; 474 unsigned int dpbLumaAlignedHeight; 475 unsigned int dpbLumaAlignedSize; 476 unsigned int dpbChromaPitch; 477 unsigned int dpbChromaAlignedHeight; 478 unsigned int dpbChromaAlignedSize; 479 unsigned int dpbArraySize; 480 481 unsigned int dpbCurrLo; 482 unsigned int dpbCurrHi; 483 unsigned int dpbAddrLo[16]; 484 unsigned int dpbAddrHi[16]; 485 } rvcn_dec_message_dynamic_dpb_t2_t; 486 487 typedef struct { 488 unsigned short viewOrderIndex; 489 unsigned short viewId; 490 unsigned short numOfAnchorRefsInL0; 491 unsigned short viewIdOfAnchorRefsInL0[15]; 492 unsigned short numOfAnchorRefsInL1; 493 unsigned short viewIdOfAnchorRefsInL1[15]; 494 unsigned short numOfNonAnchorRefsInL0; 495 unsigned short viewIdOfNonAnchorRefsInL0[15]; 496 unsigned short numOfNonAnchorRefsInL1; 497 unsigned short viewIdOfNonAnchorRefsInL1[15]; 498 } radeon_mvcElement_t; 499 500 typedef struct rvcn_dec_message_avc_s { 501 unsigned int profile; 502 unsigned int level; 503 504 unsigned int sps_info_flags; 505 unsigned int pps_info_flags; 506 unsigned char chroma_format; 507 unsigned char bit_depth_luma_minus8; 508 unsigned char bit_depth_chroma_minus8; 509 unsigned char log2_max_frame_num_minus4; 510 511 unsigned char pic_order_cnt_type; 512 unsigned char log2_max_pic_order_cnt_lsb_minus4; 513 unsigned char num_ref_frames; 514 unsigned char reserved_8bit; 515 516 signed char pic_init_qp_minus26; 517 signed char pic_init_qs_minus26; 518 signed char chroma_qp_index_offset; 519 signed char second_chroma_qp_index_offset; 520 521 unsigned char num_slice_groups_minus1; 522 unsigned char slice_group_map_type; 523 unsigned char num_ref_idx_l0_active_minus1; 524 unsigned char num_ref_idx_l1_active_minus1; 525 526 unsigned short slice_group_change_rate_minus1; 527 unsigned short reserved_16bit_1; 528 529 unsigned char scaling_list_4x4[6][16]; 530 unsigned char scaling_list_8x8[2][64]; 531 532 unsigned int frame_num; 533 unsigned int frame_num_list[16]; 534 int curr_field_order_cnt_list[2]; 535 int field_order_cnt_list[16][2]; 536 537 unsigned int decoded_pic_idx; 538 unsigned int curr_pic_ref_frame_num; 539 unsigned char ref_frame_list[16]; 540 541 unsigned int reserved[122]; 542 543 struct { 544 unsigned int numViews; 545 unsigned int viewId0; 546 radeon_mvcElement_t mvcElements[1]; 547 } mvc; 548 549 } rvcn_dec_message_avc_t; 550 551 typedef struct rvcn_dec_message_vc1_s { 552 unsigned int profile; 553 unsigned int level; 554 unsigned int sps_info_flags; 555 unsigned int pps_info_flags; 556 unsigned int pic_structure; 557 unsigned int chroma_format; 558 unsigned short decoded_pic_idx; 559 unsigned short deblocked_pic_idx; 560 unsigned short forward_ref_idx; 561 unsigned short backward_ref_idx; 562 unsigned int cached_frame_flag; 563 } rvcn_dec_message_vc1_t; 564 565 typedef struct rvcn_dec_message_mpeg2_vld_s { 566 unsigned int decoded_pic_idx; 567 unsigned int forward_ref_pic_idx; 568 unsigned int backward_ref_pic_idx; 569 570 unsigned char load_intra_quantiser_matrix; 571 unsigned char load_nonintra_quantiser_matrix; 572 unsigned char reserved_quantiser_alignement[2]; 573 unsigned char intra_quantiser_matrix[64]; 574 unsigned char nonintra_quantiser_matrix[64]; 575 576 unsigned char profile_and_level_indication; 577 unsigned char chroma_format; 578 579 unsigned char picture_coding_type; 580 581 unsigned char reserved_1; 582 583 unsigned char f_code[2][2]; 584 unsigned char intra_dc_precision; 585 unsigned char pic_structure; 586 unsigned char top_field_first; 587 unsigned char frame_pred_frame_dct; 588 unsigned char concealment_motion_vectors; 589 unsigned char q_scale_type; 590 unsigned char intra_vlc_format; 591 unsigned char alternate_scan; 592 } rvcn_dec_message_mpeg2_vld_t; 593 594 typedef struct rvcn_dec_message_mpeg4_asp_vld_s { 595 unsigned int decoded_pic_idx; 596 unsigned int forward_ref_pic_idx; 597 unsigned int backward_ref_pic_idx; 598 599 unsigned int variant_type; 600 unsigned char profile_and_level_indication; 601 602 unsigned char video_object_layer_verid; 603 unsigned char video_object_layer_shape; 604 605 unsigned char reserved_1; 606 607 unsigned short video_object_layer_width; 608 unsigned short video_object_layer_height; 609 610 unsigned short vop_time_increment_resolution; 611 612 unsigned short reserved_2; 613 614 struct { 615 unsigned int short_video_header : 1; 616 unsigned int obmc_disable : 1; 617 unsigned int interlaced : 1; 618 unsigned int load_intra_quant_mat : 1; 619 unsigned int load_nonintra_quant_mat : 1; 620 unsigned int quarter_sample : 1; 621 unsigned int complexity_estimation_disable : 1; 622 unsigned int resync_marker_disable : 1; 623 unsigned int data_partitioned : 1; 624 unsigned int reversible_vlc : 1; 625 unsigned int newpred_enable : 1; 626 unsigned int reduced_resolution_vop_enable : 1; 627 unsigned int scalability : 1; 628 unsigned int is_object_layer_identifier : 1; 629 unsigned int fixed_vop_rate : 1; 630 unsigned int newpred_segment_type : 1; 631 unsigned int reserved_bits : 16; 632 }; 633 634 unsigned char quant_type; 635 unsigned char reserved_3[3]; 636 unsigned char intra_quant_mat[64]; 637 unsigned char nonintra_quant_mat[64]; 638 639 struct { 640 unsigned char sprite_enable; 641 642 unsigned char reserved_4[3]; 643 644 unsigned short sprite_width; 645 unsigned short sprite_height; 646 short sprite_left_coordinate; 647 short sprite_top_coordinate; 648 649 unsigned char no_of_sprite_warping_points; 650 unsigned char sprite_warping_accuracy; 651 unsigned char sprite_brightness_change; 652 unsigned char low_latency_sprite_enable; 653 } sprite_config; 654 655 struct { 656 struct { 657 unsigned int check_skip : 1; 658 unsigned int switch_rounding : 1; 659 unsigned int t311 : 1; 660 unsigned int reserved_bits : 29; 661 }; 662 663 unsigned char vol_mode; 664 665 unsigned char reserved_5[3]; 666 } divx_311_config; 667 668 struct { 669 unsigned char vop_data_present; 670 unsigned char vop_coding_type; 671 unsigned char vop_quant; 672 unsigned char vop_coded; 673 unsigned char vop_rounding_type; 674 unsigned char intra_dc_vlc_thr; 675 unsigned char top_field_first; 676 unsigned char alternate_vertical_scan_flag; 677 unsigned char vop_fcode_forward; 678 unsigned char vop_fcode_backward; 679 unsigned int TRB[2]; 680 unsigned int TRD[2]; 681 } vop; 682 683 } rvcn_dec_message_mpeg4_asp_vld_t; 684 685 typedef struct rvcn_dec_message_hevc_s { 686 unsigned int sps_info_flags; 687 unsigned int pps_info_flags; 688 unsigned char chroma_format; 689 unsigned char bit_depth_luma_minus8; 690 unsigned char bit_depth_chroma_minus8; 691 unsigned char log2_max_pic_order_cnt_lsb_minus4; 692 693 unsigned char sps_max_dec_pic_buffering_minus1; 694 unsigned char log2_min_luma_coding_block_size_minus3; 695 unsigned char log2_diff_max_min_luma_coding_block_size; 696 unsigned char log2_min_transform_block_size_minus2; 697 698 unsigned char log2_diff_max_min_transform_block_size; 699 unsigned char max_transform_hierarchy_depth_inter; 700 unsigned char max_transform_hierarchy_depth_intra; 701 unsigned char pcm_sample_bit_depth_luma_minus1; 702 703 unsigned char pcm_sample_bit_depth_chroma_minus1; 704 unsigned char log2_min_pcm_luma_coding_block_size_minus3; 705 unsigned char log2_diff_max_min_pcm_luma_coding_block_size; 706 unsigned char num_extra_slice_header_bits; 707 708 unsigned char num_short_term_ref_pic_sets; 709 unsigned char num_long_term_ref_pic_sps; 710 unsigned char num_ref_idx_l0_default_active_minus1; 711 unsigned char num_ref_idx_l1_default_active_minus1; 712 713 signed char pps_cb_qp_offset; 714 signed char pps_cr_qp_offset; 715 signed char pps_beta_offset_div2; 716 signed char pps_tc_offset_div2; 717 718 unsigned char diff_cu_qp_delta_depth; 719 unsigned char num_tile_columns_minus1; 720 unsigned char num_tile_rows_minus1; 721 unsigned char log2_parallel_merge_level_minus2; 722 723 unsigned short column_width_minus1[19]; 724 unsigned short row_height_minus1[21]; 725 726 signed char init_qp_minus26; 727 unsigned char num_delta_pocs_ref_rps_idx; 728 unsigned char curr_idx; 729 unsigned char reserved[1]; 730 int curr_poc; 731 unsigned char ref_pic_list[16]; 732 int poc_list[16]; 733 unsigned char ref_pic_set_st_curr_before[8]; 734 unsigned char ref_pic_set_st_curr_after[8]; 735 unsigned char ref_pic_set_lt_curr[8]; 736 737 unsigned char ucScalingListDCCoefSizeID2[6]; 738 unsigned char ucScalingListDCCoefSizeID3[2]; 739 740 unsigned char highestTid; 741 unsigned char isNonRef; 742 743 unsigned char p010_mode; 744 unsigned char msb_mode; 745 unsigned char luma_10to8; 746 unsigned char chroma_10to8; 747 748 unsigned char hevc_reserved[2]; 749 750 unsigned char direct_reflist[2][15]; 751 unsigned int st_rps_bits; 752 } rvcn_dec_message_hevc_t; 753 754 typedef struct rvcn_dec_message_vp9_s { 755 unsigned int frame_header_flags; 756 757 unsigned char frame_context_idx; 758 unsigned char reset_frame_context; 759 760 unsigned char curr_pic_idx; 761 unsigned char interp_filter; 762 763 unsigned char filter_level; 764 unsigned char sharpness_level; 765 unsigned char lf_adj_level[8][4][2]; 766 unsigned char base_qindex; 767 signed char y_dc_delta_q; 768 signed char uv_ac_delta_q; 769 signed char uv_dc_delta_q; 770 771 unsigned char log2_tile_cols; 772 unsigned char log2_tile_rows; 773 unsigned char tx_mode; 774 unsigned char reference_mode; 775 unsigned char chroma_format; 776 777 unsigned char ref_frame_map[8]; 778 779 unsigned char frame_refs[3]; 780 unsigned char ref_frame_sign_bias[3]; 781 unsigned char frame_to_show; 782 unsigned char bit_depth_luma_minus8; 783 unsigned char bit_depth_chroma_minus8; 784 785 unsigned char p010_mode; 786 unsigned char msb_mode; 787 unsigned char luma_10to8; 788 unsigned char chroma_10to8; 789 790 unsigned int vp9_frame_size; 791 unsigned int compressed_header_size; 792 unsigned int uncompressed_header_size; 793 } rvcn_dec_message_vp9_t; 794 795 typedef enum { 796 RVCN_DEC_AV1_IDENTITY = 0, 797 RVCN_DEC_AV1_TRANSLATION = 1, 798 RVCN_DEC_AV1_ROTZOOM = 2, 799 RVCN_DEC_AV1_AFFINE = 3, 800 RVCN_DEC_AV1_HORTRAPEZOID = 4, 801 RVCN_DEC_AV1_VERTRAPEZOID = 5, 802 RVCN_DEC_AV1_HOMOGRAPHY = 6, 803 RVCN_DEC_AV1_TRANS_TYPES = 7, 804 } rvcn_dec_transformation_type_e; 805 806 typedef struct { 807 rvcn_dec_transformation_type_e wmtype; 808 int wmmat[8]; 809 short alpha, beta, gamma, delta; 810 } rvcn_dec_warped_motion_params_t; 811 812 typedef struct { 813 unsigned char apply_grain; 814 unsigned char scaling_points_y[14][2]; 815 unsigned char num_y_points; 816 unsigned char scaling_points_cb[10][2]; 817 unsigned char num_cb_points; 818 unsigned char scaling_points_cr[10][2]; 819 unsigned char num_cr_points; 820 unsigned char scaling_shift; 821 unsigned char ar_coeff_lag; 822 signed char ar_coeffs_y[24]; 823 signed char ar_coeffs_cb[25]; 824 signed char ar_coeffs_cr[25]; 825 unsigned char ar_coeff_shift; 826 unsigned char cb_mult; 827 unsigned char cb_luma_mult; 828 unsigned short cb_offset; 829 unsigned char cr_mult; 830 unsigned char cr_luma_mult; 831 unsigned short cr_offset; 832 unsigned char overlap_flag; 833 unsigned char clip_to_restricted_range; 834 unsigned char bit_depth_minus_8; 835 unsigned char chroma_scaling_from_luma; 836 unsigned char grain_scale_shift; 837 unsigned short random_seed; 838 } rvcn_dec_film_grain_params_t; 839 840 typedef struct rvcn_dec_av1_tile_info_s { 841 unsigned int offset; 842 unsigned int size; 843 } rvcn_dec_av1_tile_info_t; 844 845 typedef struct rvcn_dec_message_av1_s { 846 unsigned int frame_header_flags; 847 unsigned int current_frame_id; 848 unsigned int frame_offset; 849 850 unsigned char profile; 851 unsigned char is_annexb; 852 unsigned char frame_type; 853 unsigned char primary_ref_frame; 854 unsigned char curr_pic_idx; 855 856 unsigned char sb_size; 857 unsigned char interp_filter; 858 unsigned char filter_level[2]; 859 unsigned char filter_level_u; 860 unsigned char filter_level_v; 861 unsigned char sharpness_level; 862 signed char ref_deltas[8]; 863 signed char mode_deltas[2]; 864 unsigned char base_qindex; 865 signed char y_dc_delta_q; 866 signed char u_dc_delta_q; 867 signed char v_dc_delta_q; 868 signed char u_ac_delta_q; 869 signed char v_ac_delta_q; 870 signed char qm_y; 871 signed char qm_u; 872 signed char qm_v; 873 signed char delta_q_res; 874 signed char delta_lf_res; 875 876 unsigned char tile_cols; 877 unsigned char tile_rows; 878 unsigned char tx_mode; 879 unsigned char reference_mode; 880 unsigned char chroma_format; 881 unsigned int tile_size_bytes; 882 unsigned int context_update_tile_id; 883 unsigned int tile_col_start_sb[65]; 884 unsigned int tile_row_start_sb[65]; 885 unsigned int max_width; 886 unsigned int max_height; 887 unsigned int width; 888 unsigned int height; 889 unsigned int superres_upscaled_width; 890 unsigned char superres_scale_denominator; 891 unsigned char order_hint_bits; 892 893 unsigned char ref_frame_map[8]; 894 unsigned int ref_frame_offset[8]; 895 unsigned char frame_refs[7]; 896 unsigned char ref_frame_sign_bias[7]; 897 898 unsigned char bit_depth_luma_minus8; 899 unsigned char bit_depth_chroma_minus8; 900 901 int feature_data[8][8]; 902 unsigned char feature_mask[8]; 903 904 unsigned char cdef_damping; 905 unsigned char cdef_bits; 906 unsigned short cdef_strengths[16]; 907 unsigned short cdef_uv_strengths[16]; 908 unsigned char frame_restoration_type[3]; 909 unsigned char log2_restoration_unit_size_minus5[3]; 910 911 unsigned char p010_mode; 912 unsigned char msb_mode; 913 unsigned char luma_10to8; 914 unsigned char chroma_10to8; 915 unsigned char preskip_segid; 916 unsigned char last_active_segid; 917 unsigned char seg_lossless_flag; 918 unsigned char coded_lossless; 919 rvcn_dec_film_grain_params_t film_grain; 920 unsigned int uncompressed_header_size; 921 rvcn_dec_warped_motion_params_t global_motion[8]; 922 rvcn_dec_av1_tile_info_t tile_info[256]; 923 } rvcn_dec_message_av1_t; 924 925 typedef struct rvcn_dec_feature_index_s { 926 unsigned int feature_id; 927 unsigned int offset; 928 unsigned int size; 929 unsigned int filled; 930 } rvcn_dec_feature_index_t; 931 932 typedef struct rvcn_dec_feedback_header_s { 933 unsigned int header_size; 934 unsigned int total_size; 935 unsigned int num_buffers; 936 unsigned int status_report_feedback_number; 937 unsigned int status; 938 unsigned int value; 939 unsigned int errorBits; 940 rvcn_dec_feature_index_t index[1]; 941 } rvcn_dec_feedback_header_t; 942 943 typedef struct rvcn_dec_feedback_profiling_s { 944 unsigned int size; 945 946 unsigned int decodingTime; 947 unsigned int decodePlusOverhead; 948 unsigned int masterTimerHits; 949 unsigned int uvdLBSIREWaitCount; 950 951 unsigned int avgMPCMemLatency; 952 unsigned int maxMPCMemLatency; 953 unsigned int uvdMPCLumaHits; 954 unsigned int uvdMPCLumaHitPend; 955 unsigned int uvdMPCLumaSearch; 956 unsigned int uvdMPCChromaHits; 957 unsigned int uvdMPCChromaHitPend; 958 unsigned int uvdMPCChromaSearch; 959 960 unsigned int uvdLMIPerfCountLo; 961 unsigned int uvdLMIPerfCountHi; 962 unsigned int uvdLMIAvgLatCntrEnvHit; 963 unsigned int uvdLMILatCntr; 964 965 unsigned int frameCRC0; 966 unsigned int frameCRC1; 967 unsigned int frameCRC2; 968 unsigned int frameCRC3; 969 970 unsigned int uvdLMIPerfMonCtrl; 971 unsigned int uvdLMILatCtrl; 972 unsigned int uvdMPCCntl; 973 unsigned int reserved0[4]; 974 unsigned int decoderID; 975 unsigned int codec; 976 977 unsigned int dmaHwCrc32Enable; 978 unsigned int dmaHwCrc32Value; 979 unsigned int dmaHwCrc32Value2; 980 } rvcn_dec_feedback_profiling_t; 981 982 typedef struct rvcn_dec_vp9_nmv_ctx_mask_s { 983 unsigned short classes_mask[2]; 984 unsigned short bits_mask[2]; 985 unsigned char joints_mask; 986 unsigned char sign_mask[2]; 987 unsigned char class0_mask[2]; 988 unsigned char class0_fp_mask[2]; 989 unsigned char fp_mask[2]; 990 unsigned char class0_hp_mask[2]; 991 unsigned char hp_mask[2]; 992 unsigned char reserve[11]; 993 } rvcn_dec_vp9_nmv_ctx_mask_t; 994 995 typedef struct rvcn_dec_vp9_nmv_component_s { 996 unsigned char sign; 997 unsigned char classes[10]; 998 unsigned char class0[1]; 999 unsigned char bits[10]; 1000 unsigned char class0_fp[2][3]; 1001 unsigned char fp[3]; 1002 unsigned char class0_hp; 1003 unsigned char hp; 1004 } rvcn_dec_vp9_nmv_component_t; 1005 1006 typedef struct rvcn_dec_vp9_probs_s { 1007 rvcn_dec_vp9_nmv_ctx_mask_t nmvc_mask; 1008 unsigned char coef_probs[4][2][2][6][6][3]; 1009 unsigned char y_mode_prob[4][9]; 1010 unsigned char uv_mode_prob[10][9]; 1011 unsigned char single_ref_prob[5][2]; 1012 unsigned char switchable_interp_prob[4][2]; 1013 unsigned char partition_prob[16][3]; 1014 unsigned char inter_mode_probs[7][3]; 1015 unsigned char mbskip_probs[3]; 1016 unsigned char intra_inter_prob[4]; 1017 unsigned char comp_inter_prob[5]; 1018 unsigned char comp_ref_prob[5]; 1019 unsigned char tx_probs_32x32[2][3]; 1020 unsigned char tx_probs_16x16[2][2]; 1021 unsigned char tx_probs_8x8[2][1]; 1022 unsigned char mv_joints[3]; 1023 rvcn_dec_vp9_nmv_component_t mv_comps[2]; 1024 } rvcn_dec_vp9_probs_t; 1025 1026 typedef struct rvcn_dec_vp9_probs_segment_s { 1027 union { 1028 rvcn_dec_vp9_probs_t probs; 1029 unsigned char probs_data[RDECODE_VP9_PROBS_DATA_SIZE]; 1030 }; 1031 1032 union { 1033 struct { 1034 unsigned int feature_data[8]; 1035 unsigned char tree_probs[7]; 1036 unsigned char pred_probs[3]; 1037 unsigned char abs_delta; 1038 unsigned char feature_mask[8]; 1039 } seg; 1040 unsigned char segment_data[256]; 1041 }; 1042 } rvcn_dec_vp9_probs_segment_t; 1043 1044 typedef struct rvcn_dec_av1_fg_init_buf_s { 1045 short luma_grain_block[64][96]; 1046 short cb_grain_block[32][48]; 1047 short cr_grain_block[32][48]; 1048 short scaling_lut_y[256]; 1049 short scaling_lut_cb[256]; 1050 short scaling_lut_cr[256]; 1051 unsigned short temp_tile_left_seed[256]; 1052 } rvcn_dec_av1_fg_init_buf_t; 1053 1054 typedef struct rvcn_dec_av1_segment_fg_s { 1055 union { 1056 struct { 1057 unsigned char feature_data[128]; 1058 unsigned char feature_mask[8]; 1059 } seg; 1060 unsigned char segment_data[256]; 1061 }; 1062 rvcn_dec_av1_fg_init_buf_t fg_buf; 1063 } rvcn_dec_av1_segment_fg_t; 1064 1065 struct jpeg_params { 1066 unsigned bsd_size; 1067 unsigned dt_pitch; 1068 unsigned dt_uv_pitch; 1069 unsigned dt_luma_top_offset; 1070 unsigned dt_chroma_top_offset; 1071 bool direct_reg; 1072 }; 1073 1074 struct rvcn_dec_dynamic_dpb_t2 { 1075 struct list_head list; 1076 uint8_t index; 1077 struct rvid_buffer dpb; 1078 }; 1079 1080 struct radeon_decoder { 1081 struct pipe_video_codec base; 1082 1083 unsigned stream_handle; 1084 unsigned stream_type; 1085 unsigned frame_number; 1086 unsigned db_alignment; 1087 unsigned dpb_size; 1088 unsigned last_width; 1089 unsigned last_height; 1090 1091 struct pipe_screen *screen; 1092 struct radeon_winsys *ws; 1093 struct radeon_cmdbuf cs; 1094 1095 void *msg; 1096 uint32_t *fb; 1097 uint8_t *it; 1098 uint8_t *probs; 1099 void *bs_ptr; 1100 1101 struct rvid_buffer msg_fb_it_probs_buffers[NUM_BUFFERS]; 1102 struct rvid_buffer bs_buffers[NUM_BUFFERS]; 1103 struct rvid_buffer dpb; 1104 struct rvid_buffer ctx; 1105 struct rvid_buffer sessionctx; 1106 1107 unsigned bs_size; 1108 unsigned cur_buffer; 1109 void *render_pic_list[32]; 1110 bool show_frame; 1111 unsigned ref_idx; 1112 bool tmz_ctx; 1113 struct { 1114 unsigned data0; 1115 unsigned data1; 1116 unsigned cmd; 1117 unsigned cntl; 1118 } reg; 1119 struct jpeg_params jpg; 1120 enum { 1121 DPB_MAX_RES = 0, 1122 DPB_DYNAMIC_TIER_1, 1123 DPB_DYNAMIC_TIER_2 1124 } dpb_type; 1125 1126 struct { 1127 enum { 1128 CODEC_8_BITS = 0, 1129 CODEC_10_BITS 1130 } bts; 1131 uint8_t index; 1132 unsigned ref_size; 1133 uint8_t ref_list[16]; 1134 } ref_codec; 1135 1136 struct list_head dpb_ref_list; 1137 struct list_head dpb_unref_list; 1138 1139 void (*send_cmd)(struct radeon_decoder *dec, struct pipe_video_buffer *target, 1140 struct pipe_picture_desc *picture); 1141 }; 1142 1143 void send_cmd_dec(struct radeon_decoder *dec, struct pipe_video_buffer *target, 1144 struct pipe_picture_desc *picture); 1145 1146 void send_cmd_jpeg(struct radeon_decoder *dec, struct pipe_video_buffer *target, 1147 struct pipe_picture_desc *picture); 1148 1149 struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context, 1150 const struct pipe_video_codec *templat); 1151 1152 #endif 1153