1; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -verify-machineinstrs < %s | FileCheck --check-prefixes=SI,FUNC %s 2; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck --check-prefixes=VI,FUNC %s 3; RUN: llc -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=redwood < %s | FileCheck --check-prefixes=R600,FUNC %s 4 5; FUNC-LABEL: {{^}}fneg_fabs_fadd_f32: 6; SI-NOT: and 7; SI: v_sub_f32_e64 {{v[0-9]+}}, {{s[0-9]+}}, |{{v[0-9]+}}| 8define amdgpu_kernel void @fneg_fabs_fadd_f32(float addrspace(1)* %out, float %x, float %y) { 9 %fabs = call float @llvm.fabs.f32(float %x) 10 %fsub = fsub float -0.000000e+00, %fabs 11 %fadd = fadd float %y, %fsub 12 store float %fadd, float addrspace(1)* %out, align 4 13 ret void 14} 15 16; FUNC-LABEL: {{^}}fneg_fabs_fmul_f32: 17; SI-NOT: and 18; SI: v_mul_f32_e64 {{v[0-9]+}}, {{s[0-9]+}}, -|{{v[0-9]+}}| 19; SI-NOT: and 20define amdgpu_kernel void @fneg_fabs_fmul_f32(float addrspace(1)* %out, float %x, float %y) { 21 %fabs = call float @llvm.fabs.f32(float %x) 22 %fsub = fsub float -0.000000e+00, %fabs 23 %fmul = fmul float %y, %fsub 24 store float %fmul, float addrspace(1)* %out, align 4 25 ret void 26} 27 28; DAGCombiner will transform: 29; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF)) 30; unless isFabsFree returns true 31 32; FUNC-LABEL: {{^}}fneg_fabs_free_f32: 33; R600-NOT: AND 34; R600: |PV.{{[XYZW]}}| 35; R600: -PV 36 37; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000 38; VI: s_bitset1_b32 s{{[0-9]+}}, 31 39define amdgpu_kernel void @fneg_fabs_free_f32(float addrspace(1)* %out, i32 %in) { 40 %bc = bitcast i32 %in to float 41 %fabs = call float @llvm.fabs.f32(float %bc) 42 %fsub = fsub float -0.000000e+00, %fabs 43 store float %fsub, float addrspace(1)* %out 44 ret void 45} 46 47; FUNC-LABEL: {{^}}fneg_fabs_fn_free_f32: 48; R600-NOT: AND 49; R600: |PV.{{[XYZW]}}| 50; R600: -PV 51 52; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000 53define amdgpu_kernel void @fneg_fabs_fn_free_f32(float addrspace(1)* %out, i32 %in) { 54 %bc = bitcast i32 %in to float 55 %fabs = call float @fabs(float %bc) 56 %fsub = fsub float -0.000000e+00, %fabs 57 store float %fsub, float addrspace(1)* %out 58 ret void 59} 60 61; FUNC-LABEL: {{^}}fneg_fabs_f32: 62; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, 0x80000000 63define amdgpu_kernel void @fneg_fabs_f32(float addrspace(1)* %out, float %in) { 64 %fabs = call float @llvm.fabs.f32(float %in) 65 %fsub = fsub float -0.000000e+00, %fabs 66 store float %fsub, float addrspace(1)* %out, align 4 67 ret void 68} 69 70; FUNC-LABEL: {{^}}v_fneg_fabs_f32: 71; SI: v_or_b32_e32 v{{[0-9]+}}, 0x80000000, v{{[0-9]+}} 72define amdgpu_kernel void @v_fneg_fabs_f32(float addrspace(1)* %out, float addrspace(1)* %in) { 73 %val = load float, float addrspace(1)* %in, align 4 74 %fabs = call float @llvm.fabs.f32(float %val) 75 %fsub = fsub float -0.000000e+00, %fabs 76 store float %fsub, float addrspace(1)* %out, align 4 77 ret void 78} 79 80; FUNC-LABEL: {{^}}fneg_fabs_v2f32: 81; R600: |{{(PV|T[0-9])\.[XYZW]}}| 82; R600: -PV 83; R600: |{{(PV|T[0-9])\.[XYZW]}}| 84; R600: -PV 85 86; FIXME: In this case two uses of the constant should be folded 87; SI: s_brev_b32 [[SIGNBITK:s[0-9]+]], 1{{$}} 88; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, [[SIGNBITK]] 89; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, [[SIGNBITK]] 90define amdgpu_kernel void @fneg_fabs_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %in) { 91 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in) 92 %fsub = fsub <2 x float> <float -0.000000e+00, float -0.000000e+00>, %fabs 93 store <2 x float> %fsub, <2 x float> addrspace(1)* %out 94 ret void 95} 96 97; FUNC-LABEL: {{^}}fneg_fabs_v4f32: 98; SI: s_brev_b32 [[SIGNBITK:s[0-9]+]], 1{{$}} 99; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, [[SIGNBITK]] 100; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, [[SIGNBITK]] 101; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, [[SIGNBITK]] 102; SI: s_or_b32 s{{[0-9]+}}, s{{[0-9]+}}, [[SIGNBITK]] 103define amdgpu_kernel void @fneg_fabs_v4f32(<4 x float> addrspace(1)* %out, <4 x float> %in) { 104 %fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in) 105 %fsub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %fabs 106 store <4 x float> %fsub, <4 x float> addrspace(1)* %out 107 ret void 108} 109 110declare float @fabs(float) readnone 111declare float @llvm.fabs.f32(float) readnone 112declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone 113declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone 114