1; RUN: not --crash llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s --check-prefix=BASELINE
2; RUN: llc < %s -mtriple=thumbv8m.main-none-eabi -mattr=+dsp 2>&1 | FileCheck %s --check-prefix=MAINLINE
3
4; BASELINE: LLVM ERROR: Invalid register name "faultmask_ns".
5
6define i32 @read_mclass_registers() nounwind {
7entry:
8  ; MAINLINE-LABEL: read_mclass_registers:
9  ; MAINLINE:   mrs r0, apsr
10  ; MAINLINE:   mrs r1, iapsr
11  ; MAINLINE:   mrs r1, eapsr
12  ; MAINLINE:   mrs r1, xpsr
13  ; MAINLINE:   mrs r1, ipsr
14  ; MAINLINE:   mrs r1, epsr
15  ; MAINLINE:   mrs r1, iepsr
16  ; MAINLINE:   mrs r1, msp
17  ; MAINLINE:   mrs r1, psp
18  ; MAINLINE:   mrs r1, primask
19  ; MAINLINE:   mrs r1, basepri
20  ; MAINLINE:   mrs r1, basepri_max
21  ; MAINLINE:   mrs r1, faultmask
22  ; MAINLINE:   mrs r1, control
23  ; MAINLINE:   mrs r1, msplim
24  ; MAINLINE:   mrs r1, psplim
25  ; MAINLINE:   mrs r1, msp_ns
26  ; MAINLINE:   mrs r1, psp_ns
27  ; MAINLINE:   mrs r1, msplim_ns
28  ; MAINLINE:   mrs r1, psplim_ns
29  ; MAINLINE:   mrs r1, primask_ns
30  ; MAINLINE:   mrs r1, basepri_ns
31  ; MAINLINE:   mrs r1, faultmask_ns
32  ; MAINLINE:   mrs r1, control_ns
33  ; MAINLINE:   mrs r1, sp_ns
34
35  %0 = call i32 @llvm.read_register.i32(metadata !0)
36  %1 = call i32 @llvm.read_register.i32(metadata !4)
37  %add1 = add i32 %1, %0
38  %2 = call i32 @llvm.read_register.i32(metadata !8)
39  %add2 = add i32 %add1, %2
40  %3 = call i32 @llvm.read_register.i32(metadata !12)
41  %add3 = add i32 %add2, %3
42  %4 = call i32 @llvm.read_register.i32(metadata !16)
43  %add4 = add i32 %add3, %4
44  %5 = call i32 @llvm.read_register.i32(metadata !17)
45  %add5 = add i32 %add4, %5
46  %6 = call i32 @llvm.read_register.i32(metadata !18)
47  %add6 = add i32 %add5, %6
48  %7 = call i32 @llvm.read_register.i32(metadata !19)
49  %add7 = add i32 %add6, %7
50  %8 = call i32 @llvm.read_register.i32(metadata !20)
51  %add8 = add i32 %add7, %8
52  %9 = call i32 @llvm.read_register.i32(metadata !21)
53  %add9 = add i32 %add8, %9
54  %10 = call i32 @llvm.read_register.i32(metadata !22)
55  %add10 = add i32 %add9, %10
56  %11 = call i32 @llvm.read_register.i32(metadata !23)
57  %add11 = add i32 %add10, %11
58  %12 = call i32 @llvm.read_register.i32(metadata !24)
59  %add12 = add i32 %add11, %12
60  %13 = call i32 @llvm.read_register.i32(metadata !25)
61  %add13 = add i32 %add12, %13
62  %14 = call i32 @llvm.read_register.i32(metadata !26)
63  %add14 = add i32 %add13, %14
64  %15 = call i32 @llvm.read_register.i32(metadata !27)
65  %add15 = add i32 %add14, %15
66  %16 = call i32 @llvm.read_register.i32(metadata !28)
67  %add16 = add i32 %add15, %16
68  %17 = call i32 @llvm.read_register.i32(metadata !29)
69  %add17 = add i32 %add16, %17
70  %18 = call i32 @llvm.read_register.i32(metadata !30)
71  %add18 = add i32 %add17, %18
72  %19 = call i32 @llvm.read_register.i32(metadata !31)
73  %add19 = add i32 %add18, %19
74  %20 = call i32 @llvm.read_register.i32(metadata !32)
75  %add20 = add i32 %add19, %20
76  %21 = call i32 @llvm.read_register.i32(metadata !33)
77  %add21 = add i32 %add20, %21
78  %22 = call i32 @llvm.read_register.i32(metadata !34)
79  %add22 = add i32 %add21, %22
80  %23 = call i32 @llvm.read_register.i32(metadata !35)
81  %add23 = add i32 %add22, %23
82  %24 = call i32 @llvm.read_register.i32(metadata !36)
83  %add24 = add i32 %add23, %24
84  ret i32 %add24
85}
86
87define void @write_mclass_registers(i32 %x) nounwind {
88entry:
89  ; MAINLINE-LABEL: write_mclass_registers:
90  ; MAINLINE:   msr apsr_nzcvq, r0
91  ; MAINLINE:   msr apsr_nzcvq, r0
92  ; MAINLINE:   msr apsr_g, r0
93  ; MAINLINE:   msr apsr_nzcvqg, r0
94  ; MAINLINE:   msr iapsr_nzcvq, r0
95  ; MAINLINE:   msr iapsr_nzcvq, r0
96  ; MAINLINE:   msr iapsr_g, r0
97  ; MAINLINE:   msr iapsr_nzcvqg, r0
98  ; MAINLINE:   msr eapsr_nzcvq, r0
99  ; MAINLINE:   msr eapsr_nzcvq, r0
100  ; MAINLINE:   msr eapsr_g, r0
101  ; MAINLINE:   msr eapsr_nzcvqg, r0
102  ; MAINLINE:   msr xpsr_nzcvq, r0
103  ; MAINLINE:   msr xpsr_nzcvq, r0
104  ; MAINLINE:   msr xpsr_g, r0
105  ; MAINLINE:   msr xpsr_nzcvqg, r0
106  ; MAINLINE:   msr ipsr, r0
107  ; MAINLINE:   msr epsr, r0
108  ; MAINLINE:   msr iepsr, r0
109  ; MAINLINE:   msr msp, r0
110  ; MAINLINE:   msr psp, r0
111  ; MAINLINE:   msr primask, r0
112  ; MAINLINE:   msr basepri, r0
113  ; MAINLINE:   msr basepri_max, r0
114  ; MAINLINE:   msr faultmask, r0
115  ; MAINLINE:   msr control, r0
116  ; MAINLINE:   msr msplim, r0
117  ; MAINLINE:   msr psplim, r0
118  ; MAINLINE:   msr msp_ns, r0
119  ; MAINLINE:   msr psp_ns, r0
120  ; MAINLINE:   msr msplim_ns, r0
121  ; MAINLINE:   msr psplim_ns, r0
122  ; MAINLINE:   msr primask_ns, r0
123  ; MAINLINE:   msr basepri_ns, r0
124  ; MAINLINE:   msr faultmask_ns, r0
125  ; MAINLINE:   msr control_ns, r0
126  ; MAINLINE:   msr sp_ns, r0
127
128  call void @llvm.write_register.i32(metadata !0, i32 %x)
129  call void @llvm.write_register.i32(metadata !1, i32 %x)
130  call void @llvm.write_register.i32(metadata !2, i32 %x)
131  call void @llvm.write_register.i32(metadata !3, i32 %x)
132  call void @llvm.write_register.i32(metadata !4, i32 %x)
133  call void @llvm.write_register.i32(metadata !5, i32 %x)
134  call void @llvm.write_register.i32(metadata !6, i32 %x)
135  call void @llvm.write_register.i32(metadata !7, i32 %x)
136  call void @llvm.write_register.i32(metadata !8, i32 %x)
137  call void @llvm.write_register.i32(metadata !9, i32 %x)
138  call void @llvm.write_register.i32(metadata !10, i32 %x)
139  call void @llvm.write_register.i32(metadata !11, i32 %x)
140  call void @llvm.write_register.i32(metadata !12, i32 %x)
141  call void @llvm.write_register.i32(metadata !13, i32 %x)
142  call void @llvm.write_register.i32(metadata !14, i32 %x)
143  call void @llvm.write_register.i32(metadata !15, i32 %x)
144  call void @llvm.write_register.i32(metadata !16, i32 %x)
145  call void @llvm.write_register.i32(metadata !17, i32 %x)
146  call void @llvm.write_register.i32(metadata !18, i32 %x)
147  call void @llvm.write_register.i32(metadata !19, i32 %x)
148  call void @llvm.write_register.i32(metadata !20, i32 %x)
149  call void @llvm.write_register.i32(metadata !21, i32 %x)
150  call void @llvm.write_register.i32(metadata !22, i32 %x)
151  call void @llvm.write_register.i32(metadata !23, i32 %x)
152  call void @llvm.write_register.i32(metadata !24, i32 %x)
153  call void @llvm.write_register.i32(metadata !25, i32 %x)
154  call void @llvm.write_register.i32(metadata !26, i32 %x)
155  call void @llvm.write_register.i32(metadata !27, i32 %x)
156  call void @llvm.write_register.i32(metadata !28, i32 %x)
157  call void @llvm.write_register.i32(metadata !29, i32 %x)
158  call void @llvm.write_register.i32(metadata !30, i32 %x)
159  call void @llvm.write_register.i32(metadata !31, i32 %x)
160  call void @llvm.write_register.i32(metadata !32, i32 %x)
161  call void @llvm.write_register.i32(metadata !33, i32 %x)
162  call void @llvm.write_register.i32(metadata !34, i32 %x)
163  call void @llvm.write_register.i32(metadata !35, i32 %x)
164  call void @llvm.write_register.i32(metadata !36, i32 %x)
165  ret void
166}
167
168declare i32 @llvm.read_register.i32(metadata) nounwind
169declare void @llvm.write_register.i32(metadata, i32) nounwind
170
171!0 = !{!"apsr"}
172!1 = !{!"apsr_nzcvq"}
173!2 = !{!"apsr_g"}
174!3 = !{!"apsr_nzcvqg"}
175!4 = !{!"iapsr"}
176!5 = !{!"iapsr_nzcvq"}
177!6 = !{!"iapsr_g"}
178!7 = !{!"iapsr_nzcvqg"}
179!8 = !{!"eapsr"}
180!9 = !{!"eapsr_nzcvq"}
181!10 = !{!"eapsr_g"}
182!11 = !{!"eapsr_nzcvqg"}
183!12 = !{!"xpsr"}
184!13 = !{!"xpsr_nzcvq"}
185!14 = !{!"xpsr_g"}
186!15 = !{!"xpsr_nzcvqg"}
187!16 = !{!"ipsr"}
188!17 = !{!"epsr"}
189!18 = !{!"iepsr"}
190!19 = !{!"msp"}
191!20 = !{!"psp"}
192!21 = !{!"primask"}
193!22 = !{!"basepri"}
194!23 = !{!"basepri_max"}
195!24 = !{!"faultmask"}
196!25 = !{!"control"}
197!26 = !{!"msplim"}
198!27 = !{!"psplim"}
199!28 = !{!"msp_ns"}
200!29 = !{!"psp_ns"}
201!30 = !{!"msplim_ns"}
202!31 = !{!"psplim_ns"}
203!32 = !{!"primask_ns"}
204!33 = !{!"basepri_ns"}
205!34 = !{!"faultmask_ns"}
206!35 = !{!"control_ns"}
207!36 = !{!"sp_ns"}
208
209