1; RUN: llc -march=hexagon -O2 < %s | FileCheck %s
2; We do not want to see a new value compare after the convert
3; CHECK: r{{[0-9]+}} = convert_df2w
4; CHECK-NOT: if (!cmp.eq(r{{[0-9]+}}.new,r{{[0-9]+}})jump
5; r3 = convert_df2w(r1:0):chop
6; if (!cmp.eq(r3.new, r2)) jump:nt .LBB0_13
7
8target triple = "hexagon"
9
10%s.0 = type { %s.1, i8*, i8* }
11%s.1 = type { i16, i16, i32 }
12%s.2 = type { i8, i32, i32, i16, i16, i16, i32, i8, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, %s.3* }
13%s.3 = type { [2 x i16], i16, i16, i16, i16, [13 x i16], i16, i16, [2 x i16*], [25 x i16], [49 x i16], [6 x i16], [49 x i16] }
14
15@g0 = internal constant %s.0 { %s.1 { i16 705, i16 0, i32 16 }, i8* getelementptr inbounds ([110 x i8], [110 x i8]* @g1, i32 0, i32 0), i8* getelementptr inbounds ([13 x i8], [13 x i8]* @g2, i32 0, i32 0) }, align 4
16@g1 = private unnamed_addr constant [110 x i8] c"Assertion ............................................................................................ failed\00", align 1
17@g2 = private unnamed_addr constant [13 x i8] c"............\00", align 1
18
19define signext i16 @f0(%s.2* %a0) #0 {
20b0:
21  %v0 = alloca i16, align 2
22  %v1 = alloca i16, align 2
23  %v2 = getelementptr inbounds %s.2, %s.2* %a0, i32 0, i32 19
24  %v3 = load %s.3*, %s.3** %v2, align 4, !tbaa !0
25  %v4 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 12, i32 0
26  %v5 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 2
27  %v6 = call signext i16 @f1(i16* %v4, i16* %v5, %s.2* %a0)
28  %v7 = icmp eq i16 %v6, 0
29  br i1 %v7, label %b1, label %b13
30
31b1:                                               ; preds = %b0
32  %v8 = getelementptr inbounds %s.2, %s.2* %a0, i32 0, i32 11
33  %v9 = load i16, i16* %v8, align 2, !tbaa !4
34  %v10 = sext i16 %v9 to i32
35  %v11 = load i16, i16* %v5, align 2, !tbaa !4
36  %v12 = sext i16 %v11 to i32
37  %v13 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v10, i32 %v12)
38  %v14 = trunc i32 %v13 to i16
39  %v15 = icmp sgt i16 %v14, 0
40  br i1 %v15, label %b13, label %b2
41
42b2:                                               ; preds = %b1
43  %v16 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 8, i32 1
44  %v17 = load i16*, i16** %v16, align 4, !tbaa !0
45  call void @f2(i16* %v17, i16* %v1, i16* %v4, i16 signext %v11, i16 signext %v9)
46  %v18 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 8, i32 0
47  %v19 = load i16*, i16** %v18, align 4, !tbaa !0
48  %v20 = load i16*, i16** %v16, align 4, !tbaa !0
49  %v21 = load i16, i16* %v1, align 2, !tbaa !4
50  call void @f3(i16* %v19, i16* %v0, i16* %v20, i16 signext %v21)
51  %v22 = load i16, i16* %v0, align 2, !tbaa !4
52  %v23 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 0, i32 0
53  store i16 %v22, i16* %v23, align 2, !tbaa !4
54  %v24 = load i16, i16* %v1, align 2, !tbaa !4
55  %v25 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 0, i32 1
56  store i16 %v24, i16* %v25, align 2, !tbaa !4
57  %v26 = load i16, i16* %v0, align 2, !tbaa !4
58  %v27 = sext i16 %v26 to i32
59  %v28 = icmp slt i16 %v26, 1
60  br i1 %v28, label %b13, label %b3
61
62b3:                                               ; preds = %b2
63  %v29 = call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 48, i32 1)
64  %v30 = call i32 @llvm.hexagon.A2.sath(i32 %v29)
65  %v31 = shl i32 %v30, 16
66  %v32 = ashr exact i32 %v31, 16
67  %v33 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v27, i32 %v32)
68  %v34 = trunc i32 %v33 to i16
69  %v35 = icmp sgt i16 %v34, 0
70  br i1 %v35, label %b13, label %b4
71
72b4:                                               ; preds = %b3
73  %v36 = load i16*, i16** %v18, align 4, !tbaa !0
74  %v37 = load i16, i16* %v36, align 2, !tbaa !4
75  %v38 = getelementptr inbounds i16, i16* %v36, i32 %v27
76  %v39 = load i16, i16* %v38, align 2, !tbaa !4
77  %v40 = sext i16 %v37 to i32
78  %v41 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v40, i32 32)
79  %v42 = trunc i32 %v41 to i16
80  %v43 = icmp sgt i16 %v42, 0
81  br i1 %v43, label %b13, label %b5
82
83b5:                                               ; preds = %b4
84  %v44 = sext i16 %v39 to i32
85  %v45 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v40, i32 %v44)
86  %v46 = and i32 %v45, 32768
87  %v47 = icmp eq i32 %v46, 0
88  br i1 %v47, label %b13, label %b6
89
90b6:                                               ; preds = %b5
91  %v48 = load i16, i16* %v1, align 2, !tbaa !4
92  %v49 = sext i16 %v48 to i32
93  %v50 = load i16*, i16** %v16, align 4, !tbaa !0
94  %v51 = getelementptr inbounds i16, i16* %v50, i32 %v49
95  %v52 = load i16, i16* %v51, align 2, !tbaa !4
96  %v53 = getelementptr inbounds %s.2, %s.2* %a0, i32 0, i32 14
97  %v54 = load i16, i16* %v53, align 2, !tbaa !4
98  %v55 = icmp eq i16 %v54, 0
99  br i1 %v55, label %b7, label %b8
100
101b7:                                               ; preds = %b6
102  %v56 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 1
103  store i16 1, i16* %v56, align 2, !tbaa !4
104  br label %b11
105
106b8:                                               ; preds = %b6
107  %v57 = load i16, i16* %v50, align 2, !tbaa !4
108  %v58 = sext i16 %v57 to i32
109  %v59 = sext i16 %v52 to i32
110  %v60 = call signext i16 @f4(i32 %v58, i32 %v59)
111  %v61 = sext i16 %v60 to i32
112  %v62 = call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 %v61, i32 2)
113  %v63 = call i32 @llvm.hexagon.A2.sath(i32 %v62)
114  %v64 = shl i32 %v63, 16
115  %v65 = ashr exact i32 %v64, 16
116  %v66 = load i16, i16* %v53, align 2, !tbaa !4
117  %v67 = sext i16 %v66 to i32
118  %v68 = call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 1024, i32 %v65, i32 %v67)
119  %v69 = shl i32 %v68, 16
120  %v70 = ashr exact i32 %v69, 16
121  %v71 = call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 %v70, i32 1)
122  %v72 = call i32 @llvm.hexagon.A2.sath(i32 %v71)
123  %v73 = shl i32 %v72, 16
124  %v74 = ashr exact i32 %v73, 16
125  %v75 = call i32 @llvm.hexagon.S2.asr.r.r.sat(i32 %v74, i32 10)
126  %v76 = call i32 @llvm.hexagon.A2.sath(i32 %v75)
127  %v77 = shl i32 %v76, 16
128  %v78 = ashr exact i32 %v77, 16
129  %v79 = sitofp i16 %v66 to float
130  %v80 = sitofp i16 %v52 to float
131  %v81 = sitofp i16 %v57 to float
132  %v82 = fdiv float %v80, %v81
133  %v83 = call float @f7(float %v82, i32 0)
134  %v84 = fmul float %v79, %v83
135  %v85 = fdiv float %v84, 0x3FE62E4300000000
136  %v86 = fpext float %v85 to double
137  %v87 = fadd double %v86, 5.000000e-01
138  %v88 = fptosi double %v87 to i32
139  %v89 = icmp eq i32 %v78, %v88
140  br i1 %v89, label %b10, label %b9
141
142b9:                                               ; preds = %b8
143  call void @f5(%s.0* @g0) #2
144  unreachable
145
146b10:                                              ; preds = %b8
147  %v90 = trunc i32 %v76 to i16
148  %v91 = icmp eq i32 %v78, 0
149  %v92 = select i1 %v91, i16 1, i16 %v90
150  %v93 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 1
151  store i16 %v92, i16* %v93, align 2, !tbaa !4
152  br label %b11
153
154b11:                                              ; preds = %b10, %b7
155  %v94 = phi i16 [ %v92, %b10 ], [ 1, %b7 ]
156  %v95 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 7
157  store i16 %v94, i16* %v95, align 2, !tbaa !4
158  %v96 = sext i16 %v94 to i32
159  %v97 = call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v96, i32 5)
160  %v98 = trunc i32 %v97 to i16
161  %v99 = icmp sgt i16 %v98, 0
162  br i1 %v99, label %b13, label %b12
163
164b12:                                              ; preds = %b11
165  %v100 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 11, i32 0
166  %v101 = load i16*, i16** %v18, align 4, !tbaa !0
167  %v102 = load i16, i16* %v0, align 2, !tbaa !4
168  call void @f6(i16* %v100, i16 signext %v94, i16* %v101, i16 signext %v102)
169  %v103 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 3
170  store i16 %v37, i16* %v103, align 2, !tbaa !4
171  %v104 = getelementptr inbounds %s.3, %s.3* %v3, i32 0, i32 4
172  store i16 %v39, i16* %v104, align 2, !tbaa !4
173  br label %b13
174
175b13:                                              ; preds = %b12, %b11, %b5, %b4, %b3, %b2, %b1, %b0
176  %v105 = phi i16 [ 0, %b12 ], [ -1, %b1 ], [ -1, %b0 ], [ -1, %b3 ], [ -1, %b2 ], [ -1, %b5 ], [ -1, %b4 ], [ -1, %b11 ]
177  ret i16 %v105
178}
179
180declare signext i16 @f1(i16*, i16*, %s.2*) #0
181
182; Function Attrs: nounwind readnone
183declare i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32, i32) #1
184
185declare void @f2(i16*, i16*, i16*, i16 signext, i16 signext) #0
186
187declare void @f3(i16*, i16*, i16*, i16 signext) #0
188
189; Function Attrs: nounwind readnone
190declare i32 @llvm.hexagon.A2.sath(i32) #1
191
192; Function Attrs: nounwind readnone
193declare i32 @llvm.hexagon.S2.asr.r.r.sat(i32, i32) #1
194
195declare signext i16 @f4(i32, i32) #0
196
197; Function Attrs: nounwind readnone
198declare i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32, i32, i32) #1
199
200; Function Attrs: noreturn
201declare void @f5(%s.0*) #2
202
203declare void @f6(i16*, i16 signext, i16*, i16 signext) #0
204
205declare float @f7(float, i32) #0
206
207attributes #0 = { nounwind "target-cpu"="hexagonv55" }
208attributes #1 = { nounwind readnone }
209attributes #2 = { noreturn }
210
211!0 = !{!1, !1, i64 0}
212!1 = !{!"any pointer", !2}
213!2 = !{!"omnipotent char", !3}
214!3 = !{!"Simple C/C++ TBAA"}
215!4 = !{!5, !5, i64 0}
216!5 = !{!"short", !2}
217