1; RUN: llc -march=hexagon < %s | FileCheck %s
2
3; Check that this doesn't fail to select instructions.
4; CHECK: vsplath
5
6define <8 x i8> @fred(i16 %a0) #0 {
7  %t0 = insertelement <4 x i16> undef, i16 %a0, i32 0
8  %t1 = shufflevector <4 x i16> %t0, <4 x i16> undef, <4 x i32> zeroinitializer
9  %t2 = bitcast <4 x i16> %t1 to <8 x i8>
10  ret <8 x i8> %t2
11}
12
13attributes #0 = { readnone nounwind "target-cpu"="hexagonv62" }
14