1; RUN: llc -march=hexagon -enable-pipeliner=false < %s | FileCheck %s
2; RUN: llc -march=hexagon -enable-pipeliner < %s
3; REQUIRES: asserts
4; CHECK-NOT: and(
5; CHECK-NOT: or(
6; CHECK-NOT: combine(0
7; CHECK: add
8; CHECK: add(
9; CHECK-NEXT: memuh(
10; CHECK-NEXT: endloop
11
12%s.22 = type { i64 }
13
14@g0 = common global i32 0, align 4
15
16; Function Attrs: nounwind
17define i64 @f0(%s.22* nocapture %a0, i32 %a1) #0 {
18b0:
19  %v0 = bitcast %s.22* %a0 to i16*
20  %v1 = load i16, i16* %v0, align 2, !tbaa !0
21  %v2 = zext i16 %v1 to i64
22  %v3 = icmp sgt i32 %a1, 0
23  br i1 %v3, label %b1, label %b4
24
25b1:                                               ; preds = %b0
26  br label %b2
27
28b2:                                               ; preds = %b2, %b1
29  %v4 = phi i16* [ %v8, %b2 ], [ %v0, %b1 ]
30  %v5 = phi i32 [ %v10, %b2 ], [ undef, %b1 ]
31  %v6 = phi i32 [ %v15, %b2 ], [ 0, %b1 ]
32  %v7 = phi i64 [ %v14, %b2 ], [ %v2, %b1 ]
33  %v8 = getelementptr inbounds i16, i16* %v4, i32 1
34  %v9 = trunc i64 %v7 to i32
35  %v10 = add i32 %v5, %v9
36  %v11 = load i16, i16* %v8, align 2, !tbaa !0
37  %v12 = zext i16 %v11 to i64
38  %v13 = and i64 %v7, -4294967296
39  %v14 = or i64 %v12, %v13
40  %v15 = add nsw i32 %v6, 1
41  %v16 = icmp eq i32 %v15, %a1
42  br i1 %v16, label %b3, label %b2
43
44b3:                                               ; preds = %b2
45  br label %b4
46
47b4:                                               ; preds = %b3, %b0
48  %v17 = phi i32 [ undef, %b0 ], [ %v10, %b3 ]
49  %v18 = phi i64 [ %v2, %b0 ], [ %v14, %b3 ]
50  store volatile i32 %v17, i32* @g0, align 4, !tbaa !4
51  ret i64 %v18
52}
53
54attributes #0 = { nounwind }
55
56!0 = !{!1, !1, i64 0}
57!1 = !{!"short", !2}
58!2 = !{!"omnipotent char", !3}
59!3 = !{!"Simple C/C++ TBAA"}
60!4 = !{!5, !5, i64 0}
61!5 = !{!"long", !2}
62