1; RUN: llc -march=hexagon -enable-pipeliner -debug-only=pipeliner < %s -o - 2>&1 > /dev/null | FileCheck %s
2; REQUIRES: asserts
3
4; Fix bug when pipelining xxh benchmark at O3, mv55, and with vectorization.
5; The problem is choosing the correct name for the Phis in the epilog.
6
7; CHECK: New block
8; CHECK: %{{.*}}, %[[REG:([0-9]+)]]{{.*}} = L2_loadri_pi
9; CHECK: epilog:
10; CHECK: = PHI
11; CHECK-NOT: = PHI %{{[0-9]+}}, {{.*}}, %[[REG]]
12; CHECK: = PHI
13
14; Function Attrs: nounwind
15define void @f0(i32 %a0, i32* %a1) #0 {
16b0:
17  %v0 = ashr i32 %a0, 1
18  br label %b1
19
20b1:                                               ; preds = %b1, %b0
21  %v1 = phi i64 [ %v8, %b1 ], [ undef, %b0 ]
22  %v2 = phi i32 [ %v9, %b1 ], [ 0, %b0 ]
23  %v3 = phi i32 [ %v7, %b1 ], [ undef, %b0 ]
24  %v4 = inttoptr i32 %v3 to i32*
25  %v5 = load i32, i32* %v4, align 4, !tbaa !0
26  %v6 = tail call i64 @llvm.hexagon.S2.packhl(i32 %v5, i32 undef)
27  %v7 = add nsw i32 %v3, -16
28  %v8 = tail call i64 @llvm.hexagon.M2.vdmacs.s0(i64 %v1, i64 undef, i64 %v6)
29  %v9 = add nsw i32 %v2, 1
30  %v10 = icmp eq i32 %v9, %v0
31  br i1 %v10, label %b2, label %b1
32
33b2:                                               ; preds = %b1
34  %v11 = trunc i64 %v8 to i32
35  %v12 = getelementptr inbounds i32, i32* %a1, i32 8
36  store i32 %v11, i32* %v12, align 4, !tbaa !0
37  call void @llvm.trap()
38  unreachable
39}
40
41; Function Attrs: nounwind readnone
42declare i64 @llvm.hexagon.M2.vdmacs.s0(i64, i64, i64) #1
43
44; Function Attrs: nounwind readnone
45declare i64 @llvm.hexagon.S2.packhl(i32, i32) #1
46
47; Function Attrs: noreturn nounwind
48declare void @llvm.trap() #2
49
50attributes #0 = { nounwind "target-cpu"="hexagonv55" }
51attributes #1 = { nounwind readnone }
52attributes #2 = { noreturn nounwind }
53
54!0 = !{!1, !1, i64 0}
55!1 = !{!"int", !2, i64 0}
56!2 = !{!"omnipotent char", !3, i64 0}
57!3 = !{!"Simple C/C++ TBAA"}
58