1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
2
3;;; Test vector floating add intrinsic instructions
4;;;
5;;; Note:
6;;;   We test VFADD*vvl, VFADD*vvl_v, VFADD*rvl, VFADD*rvl_v, VFADD*vvml_v,
7;;;   VFADD*rvml_v, PVFADD*vvl, PVFADD*vvl_v, PVFADD*rvl, PVFADD*rvl_v,
8;;;   PVFADD*vvml_v, and PVFADD*rvml_v instructions.
9
10; Function Attrs: nounwind readnone
11define fastcc <256 x double> @vfaddd_vvvl(<256 x double> %0, <256 x double> %1) {
12; CHECK-LABEL: vfaddd_vvvl:
13; CHECK:       # %bb.0:
14; CHECK-NEXT:    lea %s0, 256
15; CHECK-NEXT:    lvl %s0
16; CHECK-NEXT:    vfadd.d %v0, %v0, %v1
17; CHECK-NEXT:    b.l.t (, %s10)
18  %3 = tail call fast <256 x double> @llvm.ve.vl.vfaddd.vvvl(<256 x double> %0, <256 x double> %1, i32 256)
19  ret <256 x double> %3
20}
21
22; Function Attrs: nounwind readnone
23declare <256 x double> @llvm.ve.vl.vfaddd.vvvl(<256 x double>, <256 x double>, i32)
24
25; Function Attrs: nounwind readnone
26define fastcc <256 x double> @vfaddd_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {
27; CHECK-LABEL: vfaddd_vvvvl:
28; CHECK:       # %bb.0:
29; CHECK-NEXT:    lea %s0, 128
30; CHECK-NEXT:    lvl %s0
31; CHECK-NEXT:    vfadd.d %v2, %v0, %v1
32; CHECK-NEXT:    lea %s16, 256
33; CHECK-NEXT:    lvl %s16
34; CHECK-NEXT:    vor %v0, (0)1, %v2
35; CHECK-NEXT:    b.l.t (, %s10)
36  %4 = tail call fast <256 x double> @llvm.ve.vl.vfaddd.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)
37  ret <256 x double> %4
38}
39
40; Function Attrs: nounwind readnone
41declare <256 x double> @llvm.ve.vl.vfaddd.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
42
43; Function Attrs: nounwind readnone
44define fastcc <256 x double> @vfaddd_vsvl(double %0, <256 x double> %1) {
45; CHECK-LABEL: vfaddd_vsvl:
46; CHECK:       # %bb.0:
47; CHECK-NEXT:    lea %s1, 256
48; CHECK-NEXT:    lvl %s1
49; CHECK-NEXT:    vfadd.d %v0, %s0, %v0
50; CHECK-NEXT:    b.l.t (, %s10)
51  %3 = tail call fast <256 x double> @llvm.ve.vl.vfaddd.vsvl(double %0, <256 x double> %1, i32 256)
52  ret <256 x double> %3
53}
54
55; Function Attrs: nounwind readnone
56declare <256 x double> @llvm.ve.vl.vfaddd.vsvl(double, <256 x double>, i32)
57
58; Function Attrs: nounwind readnone
59define fastcc <256 x double> @vfaddd_vsvvl(double %0, <256 x double> %1, <256 x double> %2) {
60; CHECK-LABEL: vfaddd_vsvvl:
61; CHECK:       # %bb.0:
62; CHECK-NEXT:    lea %s1, 128
63; CHECK-NEXT:    lvl %s1
64; CHECK-NEXT:    vfadd.d %v1, %s0, %v0
65; CHECK-NEXT:    lea %s16, 256
66; CHECK-NEXT:    lvl %s16
67; CHECK-NEXT:    vor %v0, (0)1, %v1
68; CHECK-NEXT:    b.l.t (, %s10)
69  %4 = tail call fast <256 x double> @llvm.ve.vl.vfaddd.vsvvl(double %0, <256 x double> %1, <256 x double> %2, i32 128)
70  ret <256 x double> %4
71}
72
73; Function Attrs: nounwind readnone
74declare <256 x double> @llvm.ve.vl.vfaddd.vsvvl(double, <256 x double>, <256 x double>, i32)
75
76; Function Attrs: nounwind readnone
77define fastcc <256 x double> @vfaddd_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {
78; CHECK-LABEL: vfaddd_vvvmvl:
79; CHECK:       # %bb.0:
80; CHECK-NEXT:    lea %s0, 128
81; CHECK-NEXT:    lvl %s0
82; CHECK-NEXT:    vfadd.d %v2, %v0, %v1, %vm1
83; CHECK-NEXT:    lea %s16, 256
84; CHECK-NEXT:    lvl %s16
85; CHECK-NEXT:    vor %v0, (0)1, %v2
86; CHECK-NEXT:    b.l.t (, %s10)
87  %5 = tail call fast <256 x double> @llvm.ve.vl.vfaddd.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)
88  ret <256 x double> %5
89}
90
91; Function Attrs: nounwind readnone
92declare <256 x double> @llvm.ve.vl.vfaddd.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)
93
94; Function Attrs: nounwind readnone
95define fastcc <256 x double> @vfaddd_vsvmvl(double %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {
96; CHECK-LABEL: vfaddd_vsvmvl:
97; CHECK:       # %bb.0:
98; CHECK-NEXT:    lea %s1, 128
99; CHECK-NEXT:    lvl %s1
100; CHECK-NEXT:    vfadd.d %v1, %s0, %v0, %vm1
101; CHECK-NEXT:    lea %s16, 256
102; CHECK-NEXT:    lvl %s16
103; CHECK-NEXT:    vor %v0, (0)1, %v1
104; CHECK-NEXT:    b.l.t (, %s10)
105  %5 = tail call fast <256 x double> @llvm.ve.vl.vfaddd.vsvmvl(double %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)
106  ret <256 x double> %5
107}
108
109; Function Attrs: nounwind readnone
110declare <256 x double> @llvm.ve.vl.vfaddd.vsvmvl(double, <256 x double>, <256 x i1>, <256 x double>, i32)
111
112; Function Attrs: nounwind readnone
113define fastcc <256 x double> @vfadds_vvvl(<256 x double> %0, <256 x double> %1) {
114; CHECK-LABEL: vfadds_vvvl:
115; CHECK:       # %bb.0:
116; CHECK-NEXT:    lea %s0, 256
117; CHECK-NEXT:    lvl %s0
118; CHECK-NEXT:    vfadd.s %v0, %v0, %v1
119; CHECK-NEXT:    b.l.t (, %s10)
120  %3 = tail call fast <256 x double> @llvm.ve.vl.vfadds.vvvl(<256 x double> %0, <256 x double> %1, i32 256)
121  ret <256 x double> %3
122}
123
124; Function Attrs: nounwind readnone
125declare <256 x double> @llvm.ve.vl.vfadds.vvvl(<256 x double>, <256 x double>, i32)
126
127; Function Attrs: nounwind readnone
128define fastcc <256 x double> @vfadds_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {
129; CHECK-LABEL: vfadds_vvvvl:
130; CHECK:       # %bb.0:
131; CHECK-NEXT:    lea %s0, 128
132; CHECK-NEXT:    lvl %s0
133; CHECK-NEXT:    vfadd.s %v2, %v0, %v1
134; CHECK-NEXT:    lea %s16, 256
135; CHECK-NEXT:    lvl %s16
136; CHECK-NEXT:    vor %v0, (0)1, %v2
137; CHECK-NEXT:    b.l.t (, %s10)
138  %4 = tail call fast <256 x double> @llvm.ve.vl.vfadds.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)
139  ret <256 x double> %4
140}
141
142; Function Attrs: nounwind readnone
143declare <256 x double> @llvm.ve.vl.vfadds.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
144
145; Function Attrs: nounwind readnone
146define fastcc <256 x double> @vfadds_vsvl(float %0, <256 x double> %1) {
147; CHECK-LABEL: vfadds_vsvl:
148; CHECK:       # %bb.0:
149; CHECK-NEXT:    lea %s1, 256
150; CHECK-NEXT:    lvl %s1
151; CHECK-NEXT:    vfadd.s %v0, %s0, %v0
152; CHECK-NEXT:    b.l.t (, %s10)
153  %3 = tail call fast <256 x double> @llvm.ve.vl.vfadds.vsvl(float %0, <256 x double> %1, i32 256)
154  ret <256 x double> %3
155}
156
157; Function Attrs: nounwind readnone
158declare <256 x double> @llvm.ve.vl.vfadds.vsvl(float, <256 x double>, i32)
159
160; Function Attrs: nounwind readnone
161define fastcc <256 x double> @vfadds_vsvvl(float %0, <256 x double> %1, <256 x double> %2) {
162; CHECK-LABEL: vfadds_vsvvl:
163; CHECK:       # %bb.0:
164; CHECK-NEXT:    lea %s1, 128
165; CHECK-NEXT:    lvl %s1
166; CHECK-NEXT:    vfadd.s %v1, %s0, %v0
167; CHECK-NEXT:    lea %s16, 256
168; CHECK-NEXT:    lvl %s16
169; CHECK-NEXT:    vor %v0, (0)1, %v1
170; CHECK-NEXT:    b.l.t (, %s10)
171  %4 = tail call fast <256 x double> @llvm.ve.vl.vfadds.vsvvl(float %0, <256 x double> %1, <256 x double> %2, i32 128)
172  ret <256 x double> %4
173}
174
175; Function Attrs: nounwind readnone
176declare <256 x double> @llvm.ve.vl.vfadds.vsvvl(float, <256 x double>, <256 x double>, i32)
177
178; Function Attrs: nounwind readnone
179define fastcc <256 x double> @vfadds_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {
180; CHECK-LABEL: vfadds_vvvmvl:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    lea %s0, 128
183; CHECK-NEXT:    lvl %s0
184; CHECK-NEXT:    vfadd.s %v2, %v0, %v1, %vm1
185; CHECK-NEXT:    lea %s16, 256
186; CHECK-NEXT:    lvl %s16
187; CHECK-NEXT:    vor %v0, (0)1, %v2
188; CHECK-NEXT:    b.l.t (, %s10)
189  %5 = tail call fast <256 x double> @llvm.ve.vl.vfadds.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)
190  ret <256 x double> %5
191}
192
193; Function Attrs: nounwind readnone
194declare <256 x double> @llvm.ve.vl.vfadds.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)
195
196; Function Attrs: nounwind readnone
197define fastcc <256 x double> @vfadds_vsvmvl(float %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) {
198; CHECK-LABEL: vfadds_vsvmvl:
199; CHECK:       # %bb.0:
200; CHECK-NEXT:    lea %s1, 128
201; CHECK-NEXT:    lvl %s1
202; CHECK-NEXT:    vfadd.s %v1, %s0, %v0, %vm1
203; CHECK-NEXT:    lea %s16, 256
204; CHECK-NEXT:    lvl %s16
205; CHECK-NEXT:    vor %v0, (0)1, %v1
206; CHECK-NEXT:    b.l.t (, %s10)
207  %5 = tail call fast <256 x double> @llvm.ve.vl.vfadds.vsvmvl(float %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128)
208  ret <256 x double> %5
209}
210
211; Function Attrs: nounwind readnone
212declare <256 x double> @llvm.ve.vl.vfadds.vsvmvl(float, <256 x double>, <256 x i1>, <256 x double>, i32)
213
214; Function Attrs: nounwind readnone
215define fastcc <256 x double> @pvfadd_vvvl(<256 x double> %0, <256 x double> %1) {
216; CHECK-LABEL: pvfadd_vvvl:
217; CHECK:       # %bb.0:
218; CHECK-NEXT:    lea %s0, 256
219; CHECK-NEXT:    lvl %s0
220; CHECK-NEXT:    pvfadd %v0, %v0, %v1
221; CHECK-NEXT:    b.l.t (, %s10)
222  %3 = tail call fast <256 x double> @llvm.ve.vl.pvfadd.vvvl(<256 x double> %0, <256 x double> %1, i32 256)
223  ret <256 x double> %3
224}
225
226; Function Attrs: nounwind readnone
227declare <256 x double> @llvm.ve.vl.pvfadd.vvvl(<256 x double>, <256 x double>, i32)
228
229; Function Attrs: nounwind readnone
230define fastcc <256 x double> @pvfadd_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {
231; CHECK-LABEL: pvfadd_vvvvl:
232; CHECK:       # %bb.0:
233; CHECK-NEXT:    lea %s0, 128
234; CHECK-NEXT:    lvl %s0
235; CHECK-NEXT:    pvfadd %v2, %v0, %v1
236; CHECK-NEXT:    lea %s16, 256
237; CHECK-NEXT:    lvl %s16
238; CHECK-NEXT:    vor %v0, (0)1, %v2
239; CHECK-NEXT:    b.l.t (, %s10)
240  %4 = tail call fast <256 x double> @llvm.ve.vl.pvfadd.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128)
241  ret <256 x double> %4
242}
243
244; Function Attrs: nounwind readnone
245declare <256 x double> @llvm.ve.vl.pvfadd.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
246
247; Function Attrs: nounwind readnone
248define fastcc <256 x double> @pvfadd_vsvl(i64 %0, <256 x double> %1) {
249; CHECK-LABEL: pvfadd_vsvl:
250; CHECK:       # %bb.0:
251; CHECK-NEXT:    lea %s1, 256
252; CHECK-NEXT:    lvl %s1
253; CHECK-NEXT:    pvfadd %v0, %s0, %v0
254; CHECK-NEXT:    b.l.t (, %s10)
255  %3 = tail call fast <256 x double> @llvm.ve.vl.pvfadd.vsvl(i64 %0, <256 x double> %1, i32 256)
256  ret <256 x double> %3
257}
258
259; Function Attrs: nounwind readnone
260declare <256 x double> @llvm.ve.vl.pvfadd.vsvl(i64, <256 x double>, i32)
261
262; Function Attrs: nounwind readnone
263define fastcc <256 x double> @pvfadd_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {
264; CHECK-LABEL: pvfadd_vsvvl:
265; CHECK:       # %bb.0:
266; CHECK-NEXT:    lea %s1, 128
267; CHECK-NEXT:    lvl %s1
268; CHECK-NEXT:    pvfadd %v1, %s0, %v0
269; CHECK-NEXT:    lea %s16, 256
270; CHECK-NEXT:    lvl %s16
271; CHECK-NEXT:    vor %v0, (0)1, %v1
272; CHECK-NEXT:    b.l.t (, %s10)
273  %4 = tail call fast <256 x double> @llvm.ve.vl.pvfadd.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128)
274  ret <256 x double> %4
275}
276
277; Function Attrs: nounwind readnone
278declare <256 x double> @llvm.ve.vl.pvfadd.vsvvl(i64, <256 x double>, <256 x double>, i32)
279
280; Function Attrs: nounwind readnone
281define fastcc <256 x double> @pvfadd_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {
282; CHECK-LABEL: pvfadd_vvvMvl:
283; CHECK:       # %bb.0:
284; CHECK-NEXT:    lea %s0, 128
285; CHECK-NEXT:    lvl %s0
286; CHECK-NEXT:    pvfadd %v2, %v0, %v1, %vm2
287; CHECK-NEXT:    lea %s16, 256
288; CHECK-NEXT:    lvl %s16
289; CHECK-NEXT:    vor %v0, (0)1, %v2
290; CHECK-NEXT:    b.l.t (, %s10)
291  %5 = tail call fast <256 x double> @llvm.ve.vl.pvfadd.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)
292  ret <256 x double> %5
293}
294
295; Function Attrs: nounwind readnone
296declare <256 x double> @llvm.ve.vl.pvfadd.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)
297
298; Function Attrs: nounwind readnone
299define fastcc <256 x double> @pvfadd_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) {
300; CHECK-LABEL: pvfadd_vsvMvl:
301; CHECK:       # %bb.0:
302; CHECK-NEXT:    lea %s1, 128
303; CHECK-NEXT:    lvl %s1
304; CHECK-NEXT:    pvfadd %v1, %s0, %v0, %vm2
305; CHECK-NEXT:    lea %s16, 256
306; CHECK-NEXT:    lvl %s16
307; CHECK-NEXT:    vor %v0, (0)1, %v1
308; CHECK-NEXT:    b.l.t (, %s10)
309  %5 = tail call fast <256 x double> @llvm.ve.vl.pvfadd.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128)
310  ret <256 x double> %5
311}
312
313; Function Attrs: nounwind readnone
314declare <256 x double> @llvm.ve.vl.pvfadd.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32)
315