1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -slp-vectorizer -S -slp-max-vf=1 < %s | FileCheck -check-prefix=MAX32 %s
3; RUN: opt -slp-vectorizer -S -slp-max-vf=8 < %s | FileCheck -check-prefix=MAX256 %s
4; RUN: opt -slp-vectorizer -S -slp-max-vf=32 < %s | FileCheck -check-prefix=MAX1024 %s
5; RUN: opt -slp-vectorizer -S < %s | FileCheck -check-prefix=MAX1024 %s
6
7; Make sure we do not vectorize to create PHI wider than requested.
8; On AMDGPU target wider vectorization will result in a higher register pressure,
9; spilling, or even inability to allocate registers.
10
11define void @phi_float32(half %hval, float %fval) {
12; MAX32-LABEL: @phi_float32(
13; MAX32-NEXT:  bb:
14; MAX32-NEXT:    br label [[BB1:%.*]]
15; MAX32:       bb1:
16; MAX32-NEXT:    [[I:%.*]] = fpext half [[HVAL:%.*]] to float
17; MAX32-NEXT:    [[I1:%.*]] = fmul float [[I]], [[FVAL:%.*]]
18; MAX32-NEXT:    [[I2:%.*]] = fadd float 0.000000e+00, [[I1]]
19; MAX32-NEXT:    [[I3:%.*]] = fpext half [[HVAL]] to float
20; MAX32-NEXT:    [[I4:%.*]] = fmul float [[I3]], [[FVAL]]
21; MAX32-NEXT:    [[I5:%.*]] = fadd float 0.000000e+00, [[I4]]
22; MAX32-NEXT:    [[I6:%.*]] = fpext half [[HVAL]] to float
23; MAX32-NEXT:    [[I7:%.*]] = fmul float [[I6]], [[FVAL]]
24; MAX32-NEXT:    [[I8:%.*]] = fadd float 0.000000e+00, [[I7]]
25; MAX32-NEXT:    [[I9:%.*]] = fpext half [[HVAL]] to float
26; MAX32-NEXT:    [[I10:%.*]] = fmul float [[I9]], [[FVAL]]
27; MAX32-NEXT:    [[I11:%.*]] = fadd float 0.000000e+00, [[I10]]
28; MAX32-NEXT:    [[I12:%.*]] = fmul float [[I]], [[FVAL]]
29; MAX32-NEXT:    [[I13:%.*]] = fadd float 0.000000e+00, [[I12]]
30; MAX32-NEXT:    [[I14:%.*]] = fmul float [[I3]], [[FVAL]]
31; MAX32-NEXT:    [[I15:%.*]] = fadd float 0.000000e+00, [[I14]]
32; MAX32-NEXT:    [[I16:%.*]] = fmul float [[I6]], [[FVAL]]
33; MAX32-NEXT:    [[I17:%.*]] = fadd float 0.000000e+00, [[I16]]
34; MAX32-NEXT:    [[I18:%.*]] = fmul float [[I9]], [[FVAL]]
35; MAX32-NEXT:    [[I19:%.*]] = fadd float 0.000000e+00, [[I18]]
36; MAX32-NEXT:    [[I20:%.*]] = fmul float [[I]], [[FVAL]]
37; MAX32-NEXT:    [[I21:%.*]] = fadd float 0.000000e+00, [[I20]]
38; MAX32-NEXT:    [[I22:%.*]] = fmul float [[I3]], [[FVAL]]
39; MAX32-NEXT:    [[I23:%.*]] = fadd float 0.000000e+00, [[I22]]
40; MAX32-NEXT:    [[I24:%.*]] = fmul float [[I6]], [[FVAL]]
41; MAX32-NEXT:    [[I25:%.*]] = fadd float 0.000000e+00, [[I24]]
42; MAX32-NEXT:    [[I26:%.*]] = fmul float [[I9]], [[FVAL]]
43; MAX32-NEXT:    [[I27:%.*]] = fadd float 0.000000e+00, [[I26]]
44; MAX32-NEXT:    [[I28:%.*]] = fmul float [[I]], [[FVAL]]
45; MAX32-NEXT:    [[I29:%.*]] = fadd float 0.000000e+00, [[I28]]
46; MAX32-NEXT:    [[I30:%.*]] = fmul float [[I3]], [[FVAL]]
47; MAX32-NEXT:    [[I31:%.*]] = fadd float 0.000000e+00, [[I30]]
48; MAX32-NEXT:    [[I32:%.*]] = fmul float [[I6]], [[FVAL]]
49; MAX32-NEXT:    [[I33:%.*]] = fadd float 0.000000e+00, [[I32]]
50; MAX32-NEXT:    [[I34:%.*]] = fmul float [[I9]], [[FVAL]]
51; MAX32-NEXT:    [[I35:%.*]] = fadd float 0.000000e+00, [[I34]]
52; MAX32-NEXT:    [[I36:%.*]] = fmul float [[I]], [[FVAL]]
53; MAX32-NEXT:    [[I37:%.*]] = fadd float 0.000000e+00, [[I36]]
54; MAX32-NEXT:    [[I38:%.*]] = fmul float [[I3]], [[FVAL]]
55; MAX32-NEXT:    [[I39:%.*]] = fadd float 0.000000e+00, [[I38]]
56; MAX32-NEXT:    [[I40:%.*]] = fmul float [[I6]], [[FVAL]]
57; MAX32-NEXT:    [[I41:%.*]] = fadd float 0.000000e+00, [[I40]]
58; MAX32-NEXT:    [[I42:%.*]] = fmul float [[I9]], [[FVAL]]
59; MAX32-NEXT:    [[I43:%.*]] = fadd float 0.000000e+00, [[I42]]
60; MAX32-NEXT:    [[I44:%.*]] = fmul float [[I]], [[FVAL]]
61; MAX32-NEXT:    [[I45:%.*]] = fadd float 0.000000e+00, [[I44]]
62; MAX32-NEXT:    [[I46:%.*]] = fmul float [[I3]], [[FVAL]]
63; MAX32-NEXT:    [[I47:%.*]] = fadd float 0.000000e+00, [[I46]]
64; MAX32-NEXT:    [[I48:%.*]] = fmul float [[I6]], [[FVAL]]
65; MAX32-NEXT:    [[I49:%.*]] = fadd float 0.000000e+00, [[I48]]
66; MAX32-NEXT:    [[I50:%.*]] = fmul float [[I9]], [[FVAL]]
67; MAX32-NEXT:    [[I51:%.*]] = fadd float 0.000000e+00, [[I50]]
68; MAX32-NEXT:    [[I52:%.*]] = fmul float [[I]], [[FVAL]]
69; MAX32-NEXT:    [[I53:%.*]] = fadd float 0.000000e+00, [[I52]]
70; MAX32-NEXT:    [[I54:%.*]] = fmul float [[I3]], [[FVAL]]
71; MAX32-NEXT:    [[I55:%.*]] = fadd float 0.000000e+00, [[I54]]
72; MAX32-NEXT:    [[I56:%.*]] = fmul float [[I6]], [[FVAL]]
73; MAX32-NEXT:    [[I57:%.*]] = fadd float 0.000000e+00, [[I56]]
74; MAX32-NEXT:    [[I58:%.*]] = fmul float [[I9]], [[FVAL]]
75; MAX32-NEXT:    [[I59:%.*]] = fadd float 0.000000e+00, [[I58]]
76; MAX32-NEXT:    [[I60:%.*]] = fmul float [[I]], [[FVAL]]
77; MAX32-NEXT:    [[I61:%.*]] = fadd float 0.000000e+00, [[I60]]
78; MAX32-NEXT:    [[I62:%.*]] = fmul float [[I3]], [[FVAL]]
79; MAX32-NEXT:    [[I63:%.*]] = fadd float 0.000000e+00, [[I62]]
80; MAX32-NEXT:    [[I64:%.*]] = fmul float [[I6]], [[FVAL]]
81; MAX32-NEXT:    [[I65:%.*]] = fadd float 0.000000e+00, [[I64]]
82; MAX32-NEXT:    [[I66:%.*]] = fmul float [[I9]], [[FVAL]]
83; MAX32-NEXT:    [[I67:%.*]] = fadd float 0.000000e+00, [[I66]]
84; MAX32-NEXT:    switch i32 undef, label [[BB5:%.*]] [
85; MAX32-NEXT:    i32 0, label [[BB2:%.*]]
86; MAX32-NEXT:    i32 1, label [[BB3:%.*]]
87; MAX32-NEXT:    i32 2, label [[BB4:%.*]]
88; MAX32-NEXT:    ]
89; MAX32:       bb3:
90; MAX32-NEXT:    br label [[BB2]]
91; MAX32:       bb4:
92; MAX32-NEXT:    br label [[BB2]]
93; MAX32:       bb5:
94; MAX32-NEXT:    br label [[BB2]]
95; MAX32:       bb2:
96; MAX32-NEXT:    [[PHI1:%.*]] = phi float [ [[I19]], [[BB3]] ], [ [[I19]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I19]], [[BB1]] ]
97; MAX32-NEXT:    [[PHI2:%.*]] = phi float [ [[I17]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I17]], [[BB5]] ], [ [[I17]], [[BB1]] ]
98; MAX32-NEXT:    [[PHI3:%.*]] = phi float [ [[I15]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
99; MAX32-NEXT:    [[PHI4:%.*]] = phi float [ [[I13]], [[BB3]] ], [ [[I13]], [[BB4]] ], [ [[I13]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
100; MAX32-NEXT:    [[PHI5:%.*]] = phi float [ [[I11]], [[BB3]] ], [ [[I11]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I11]], [[BB1]] ]
101; MAX32-NEXT:    [[PHI6:%.*]] = phi float [ [[I8]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I8]], [[BB5]] ], [ [[I8]], [[BB1]] ]
102; MAX32-NEXT:    [[PHI7:%.*]] = phi float [ [[I5]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
103; MAX32-NEXT:    [[PHI8:%.*]] = phi float [ [[I2]], [[BB3]] ], [ [[I2]], [[BB4]] ], [ [[I2]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
104; MAX32-NEXT:    [[PHI9:%.*]] = phi float [ [[I21]], [[BB3]] ], [ [[I21]], [[BB4]] ], [ [[I21]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
105; MAX32-NEXT:    [[PHI10:%.*]] = phi float [ [[I23]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
106; MAX32-NEXT:    [[PHI11:%.*]] = phi float [ [[I25]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I25]], [[BB5]] ], [ [[I25]], [[BB1]] ]
107; MAX32-NEXT:    [[PHI12:%.*]] = phi float [ [[I27]], [[BB3]] ], [ [[I27]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I27]], [[BB1]] ]
108; MAX32-NEXT:    [[PHI13:%.*]] = phi float [ [[I29]], [[BB3]] ], [ [[I29]], [[BB4]] ], [ [[I29]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
109; MAX32-NEXT:    [[PHI14:%.*]] = phi float [ [[I31]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
110; MAX32-NEXT:    [[PHI15:%.*]] = phi float [ [[I33]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I33]], [[BB5]] ], [ [[I33]], [[BB1]] ]
111; MAX32-NEXT:    [[PHI16:%.*]] = phi float [ [[I35]], [[BB3]] ], [ [[I35]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I35]], [[BB1]] ]
112; MAX32-NEXT:    [[PHI17:%.*]] = phi float [ [[I37]], [[BB3]] ], [ [[I37]], [[BB4]] ], [ [[I37]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
113; MAX32-NEXT:    [[PHI18:%.*]] = phi float [ [[I39]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
114; MAX32-NEXT:    [[PHI19:%.*]] = phi float [ [[I41]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I41]], [[BB5]] ], [ [[I41]], [[BB1]] ]
115; MAX32-NEXT:    [[PHI20:%.*]] = phi float [ [[I43]], [[BB3]] ], [ [[I43]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I43]], [[BB1]] ]
116; MAX32-NEXT:    [[PHI21:%.*]] = phi float [ [[I45]], [[BB3]] ], [ [[I45]], [[BB4]] ], [ [[I45]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
117; MAX32-NEXT:    [[PHI22:%.*]] = phi float [ [[I47]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
118; MAX32-NEXT:    [[PHI23:%.*]] = phi float [ [[I49]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I49]], [[BB5]] ], [ [[I49]], [[BB1]] ]
119; MAX32-NEXT:    [[PHI24:%.*]] = phi float [ [[I51]], [[BB3]] ], [ [[I51]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I51]], [[BB1]] ]
120; MAX32-NEXT:    [[PHI25:%.*]] = phi float [ [[I53]], [[BB3]] ], [ [[I53]], [[BB4]] ], [ [[I53]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
121; MAX32-NEXT:    [[PHI26:%.*]] = phi float [ [[I55]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
122; MAX32-NEXT:    [[PHI27:%.*]] = phi float [ [[I57]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I57]], [[BB5]] ], [ [[I57]], [[BB1]] ]
123; MAX32-NEXT:    [[PHI28:%.*]] = phi float [ [[I59]], [[BB3]] ], [ [[I59]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I59]], [[BB1]] ]
124; MAX32-NEXT:    [[PHI29:%.*]] = phi float [ [[I61]], [[BB3]] ], [ [[I61]], [[BB4]] ], [ [[I61]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
125; MAX32-NEXT:    [[PHI30:%.*]] = phi float [ [[I63]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[FVAL]], [[BB1]] ]
126; MAX32-NEXT:    [[PHI31:%.*]] = phi float [ [[I65]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I65]], [[BB5]] ], [ [[I65]], [[BB1]] ]
127; MAX32-NEXT:    [[PHI32:%.*]] = phi float [ [[I67]], [[BB3]] ], [ [[I67]], [[BB4]] ], [ [[FVAL]], [[BB5]] ], [ [[I67]], [[BB1]] ]
128; MAX32-NEXT:    store float [[PHI31]], float* undef, align 4
129; MAX32-NEXT:    ret void
130;
131; MAX256-LABEL: @phi_float32(
132; MAX256-NEXT:  bb:
133; MAX256-NEXT:    br label [[BB1:%.*]]
134; MAX256:       bb1:
135; MAX256-NEXT:    [[I:%.*]] = fpext half [[HVAL:%.*]] to float
136; MAX256-NEXT:    [[I3:%.*]] = fpext half [[HVAL]] to float
137; MAX256-NEXT:    [[I6:%.*]] = fpext half [[HVAL]] to float
138; MAX256-NEXT:    [[I9:%.*]] = fpext half [[HVAL]] to float
139; MAX256-NEXT:    [[TMP0:%.*]] = insertelement <8 x float> poison, float [[I]], i32 0
140; MAX256-NEXT:    [[TMP1:%.*]] = insertelement <8 x float> [[TMP0]], float [[I]], i32 1
141; MAX256-NEXT:    [[TMP2:%.*]] = insertelement <8 x float> [[TMP1]], float [[I]], i32 2
142; MAX256-NEXT:    [[TMP3:%.*]] = insertelement <8 x float> [[TMP2]], float [[I]], i32 3
143; MAX256-NEXT:    [[TMP4:%.*]] = insertelement <8 x float> [[TMP3]], float [[I]], i32 4
144; MAX256-NEXT:    [[TMP5:%.*]] = insertelement <8 x float> [[TMP4]], float [[I]], i32 5
145; MAX256-NEXT:    [[TMP6:%.*]] = insertelement <8 x float> [[TMP5]], float [[I]], i32 6
146; MAX256-NEXT:    [[TMP7:%.*]] = insertelement <8 x float> [[TMP6]], float [[I]], i32 7
147; MAX256-NEXT:    [[TMP8:%.*]] = insertelement <8 x float> poison, float [[FVAL:%.*]], i32 0
148; MAX256-NEXT:    [[TMP9:%.*]] = insertelement <8 x float> [[TMP8]], float [[FVAL]], i32 1
149; MAX256-NEXT:    [[TMP10:%.*]] = insertelement <8 x float> [[TMP9]], float [[FVAL]], i32 2
150; MAX256-NEXT:    [[TMP11:%.*]] = insertelement <8 x float> [[TMP10]], float [[FVAL]], i32 3
151; MAX256-NEXT:    [[TMP12:%.*]] = insertelement <8 x float> [[TMP11]], float [[FVAL]], i32 4
152; MAX256-NEXT:    [[TMP13:%.*]] = insertelement <8 x float> [[TMP12]], float [[FVAL]], i32 5
153; MAX256-NEXT:    [[TMP14:%.*]] = insertelement <8 x float> [[TMP13]], float [[FVAL]], i32 6
154; MAX256-NEXT:    [[TMP15:%.*]] = insertelement <8 x float> [[TMP14]], float [[FVAL]], i32 7
155; MAX256-NEXT:    [[TMP16:%.*]] = fmul <8 x float> [[TMP7]], [[TMP15]]
156; MAX256-NEXT:    [[TMP17:%.*]] = fadd <8 x float> zeroinitializer, [[TMP16]]
157; MAX256-NEXT:    [[TMP18:%.*]] = insertelement <8 x float> poison, float [[I3]], i32 0
158; MAX256-NEXT:    [[TMP19:%.*]] = insertelement <8 x float> [[TMP18]], float [[I3]], i32 1
159; MAX256-NEXT:    [[TMP20:%.*]] = insertelement <8 x float> [[TMP19]], float [[I3]], i32 2
160; MAX256-NEXT:    [[TMP21:%.*]] = insertelement <8 x float> [[TMP20]], float [[I3]], i32 3
161; MAX256-NEXT:    [[TMP22:%.*]] = insertelement <8 x float> [[TMP21]], float [[I3]], i32 4
162; MAX256-NEXT:    [[TMP23:%.*]] = insertelement <8 x float> [[TMP22]], float [[I3]], i32 5
163; MAX256-NEXT:    [[TMP24:%.*]] = insertelement <8 x float> [[TMP23]], float [[I3]], i32 6
164; MAX256-NEXT:    [[TMP25:%.*]] = insertelement <8 x float> [[TMP24]], float [[I3]], i32 7
165; MAX256-NEXT:    [[TMP26:%.*]] = fmul <8 x float> [[TMP25]], [[TMP15]]
166; MAX256-NEXT:    [[TMP27:%.*]] = fadd <8 x float> zeroinitializer, [[TMP26]]
167; MAX256-NEXT:    [[TMP28:%.*]] = insertelement <8 x float> poison, float [[I6]], i32 0
168; MAX256-NEXT:    [[TMP29:%.*]] = insertelement <8 x float> [[TMP28]], float [[I6]], i32 1
169; MAX256-NEXT:    [[TMP30:%.*]] = insertelement <8 x float> [[TMP29]], float [[I6]], i32 2
170; MAX256-NEXT:    [[TMP31:%.*]] = insertelement <8 x float> [[TMP30]], float [[I6]], i32 3
171; MAX256-NEXT:    [[TMP32:%.*]] = insertelement <8 x float> [[TMP31]], float [[I6]], i32 4
172; MAX256-NEXT:    [[TMP33:%.*]] = insertelement <8 x float> [[TMP32]], float [[I6]], i32 5
173; MAX256-NEXT:    [[TMP34:%.*]] = insertelement <8 x float> [[TMP33]], float [[I6]], i32 6
174; MAX256-NEXT:    [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[I6]], i32 7
175; MAX256-NEXT:    [[TMP36:%.*]] = fmul <8 x float> [[TMP35]], [[TMP15]]
176; MAX256-NEXT:    [[TMP37:%.*]] = fadd <8 x float> zeroinitializer, [[TMP36]]
177; MAX256-NEXT:    [[TMP38:%.*]] = insertelement <8 x float> poison, float [[I9]], i32 0
178; MAX256-NEXT:    [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[I9]], i32 1
179; MAX256-NEXT:    [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[I9]], i32 2
180; MAX256-NEXT:    [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[I9]], i32 3
181; MAX256-NEXT:    [[TMP42:%.*]] = insertelement <8 x float> [[TMP41]], float [[I9]], i32 4
182; MAX256-NEXT:    [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[I9]], i32 5
183; MAX256-NEXT:    [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[I9]], i32 6
184; MAX256-NEXT:    [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[I9]], i32 7
185; MAX256-NEXT:    [[TMP46:%.*]] = fmul <8 x float> [[TMP45]], [[TMP15]]
186; MAX256-NEXT:    [[TMP47:%.*]] = fadd <8 x float> zeroinitializer, [[TMP46]]
187; MAX256-NEXT:    switch i32 undef, label [[BB5:%.*]] [
188; MAX256-NEXT:    i32 0, label [[BB2:%.*]]
189; MAX256-NEXT:    i32 1, label [[BB3:%.*]]
190; MAX256-NEXT:    i32 2, label [[BB4:%.*]]
191; MAX256-NEXT:    ]
192; MAX256:       bb3:
193; MAX256-NEXT:    br label [[BB2]]
194; MAX256:       bb4:
195; MAX256-NEXT:    br label [[BB2]]
196; MAX256:       bb5:
197; MAX256-NEXT:    br label [[BB2]]
198; MAX256:       bb2:
199; MAX256-NEXT:    [[TMP48:%.*]] = phi <8 x float> [ [[TMP27]], [[BB3]] ], [ [[TMP15]], [[BB4]] ], [ [[TMP15]], [[BB5]] ], [ [[TMP15]], [[BB1]] ]
200; MAX256-NEXT:    [[TMP49:%.*]] = phi <8 x float> [ [[TMP37]], [[BB3]] ], [ [[TMP15]], [[BB4]] ], [ [[TMP37]], [[BB5]] ], [ [[TMP37]], [[BB1]] ]
201; MAX256-NEXT:    [[TMP50:%.*]] = phi <8 x float> [ [[TMP47]], [[BB3]] ], [ [[TMP47]], [[BB4]] ], [ [[TMP15]], [[BB5]] ], [ [[TMP47]], [[BB1]] ]
202; MAX256-NEXT:    [[TMP51:%.*]] = phi <8 x float> [ [[TMP17]], [[BB3]] ], [ [[TMP17]], [[BB4]] ], [ [[TMP17]], [[BB5]] ], [ [[TMP15]], [[BB1]] ]
203; MAX256-NEXT:    [[TMP52:%.*]] = extractelement <8 x float> [[TMP49]], i32 7
204; MAX256-NEXT:    store float [[TMP52]], float* undef, align 4
205; MAX256-NEXT:    ret void
206;
207; MAX1024-LABEL: @phi_float32(
208; MAX1024-NEXT:  bb:
209; MAX1024-NEXT:    br label [[BB1:%.*]]
210; MAX1024:       bb1:
211; MAX1024-NEXT:    [[I:%.*]] = fpext half [[HVAL:%.*]] to float
212; MAX1024-NEXT:    [[I3:%.*]] = fpext half [[HVAL]] to float
213; MAX1024-NEXT:    [[I6:%.*]] = fpext half [[HVAL]] to float
214; MAX1024-NEXT:    [[I9:%.*]] = fpext half [[HVAL]] to float
215; MAX1024-NEXT:    [[TMP0:%.*]] = insertelement <8 x float> poison, float [[I]], i32 0
216; MAX1024-NEXT:    [[TMP1:%.*]] = insertelement <8 x float> [[TMP0]], float [[I]], i32 1
217; MAX1024-NEXT:    [[TMP2:%.*]] = insertelement <8 x float> [[TMP1]], float [[I]], i32 2
218; MAX1024-NEXT:    [[TMP3:%.*]] = insertelement <8 x float> [[TMP2]], float [[I]], i32 3
219; MAX1024-NEXT:    [[TMP4:%.*]] = insertelement <8 x float> [[TMP3]], float [[I]], i32 4
220; MAX1024-NEXT:    [[TMP5:%.*]] = insertelement <8 x float> [[TMP4]], float [[I]], i32 5
221; MAX1024-NEXT:    [[TMP6:%.*]] = insertelement <8 x float> [[TMP5]], float [[I]], i32 6
222; MAX1024-NEXT:    [[TMP7:%.*]] = insertelement <8 x float> [[TMP6]], float [[I]], i32 7
223; MAX1024-NEXT:    [[TMP8:%.*]] = insertelement <8 x float> poison, float [[FVAL:%.*]], i32 0
224; MAX1024-NEXT:    [[TMP9:%.*]] = insertelement <8 x float> [[TMP8]], float [[FVAL]], i32 1
225; MAX1024-NEXT:    [[TMP10:%.*]] = insertelement <8 x float> [[TMP9]], float [[FVAL]], i32 2
226; MAX1024-NEXT:    [[TMP11:%.*]] = insertelement <8 x float> [[TMP10]], float [[FVAL]], i32 3
227; MAX1024-NEXT:    [[TMP12:%.*]] = insertelement <8 x float> [[TMP11]], float [[FVAL]], i32 4
228; MAX1024-NEXT:    [[TMP13:%.*]] = insertelement <8 x float> [[TMP12]], float [[FVAL]], i32 5
229; MAX1024-NEXT:    [[TMP14:%.*]] = insertelement <8 x float> [[TMP13]], float [[FVAL]], i32 6
230; MAX1024-NEXT:    [[TMP15:%.*]] = insertelement <8 x float> [[TMP14]], float [[FVAL]], i32 7
231; MAX1024-NEXT:    [[TMP16:%.*]] = fmul <8 x float> [[TMP7]], [[TMP15]]
232; MAX1024-NEXT:    [[TMP17:%.*]] = fadd <8 x float> zeroinitializer, [[TMP16]]
233; MAX1024-NEXT:    [[TMP18:%.*]] = insertelement <8 x float> poison, float [[I3]], i32 0
234; MAX1024-NEXT:    [[TMP19:%.*]] = insertelement <8 x float> [[TMP18]], float [[I3]], i32 1
235; MAX1024-NEXT:    [[TMP20:%.*]] = insertelement <8 x float> [[TMP19]], float [[I3]], i32 2
236; MAX1024-NEXT:    [[TMP21:%.*]] = insertelement <8 x float> [[TMP20]], float [[I3]], i32 3
237; MAX1024-NEXT:    [[TMP22:%.*]] = insertelement <8 x float> [[TMP21]], float [[I3]], i32 4
238; MAX1024-NEXT:    [[TMP23:%.*]] = insertelement <8 x float> [[TMP22]], float [[I3]], i32 5
239; MAX1024-NEXT:    [[TMP24:%.*]] = insertelement <8 x float> [[TMP23]], float [[I3]], i32 6
240; MAX1024-NEXT:    [[TMP25:%.*]] = insertelement <8 x float> [[TMP24]], float [[I3]], i32 7
241; MAX1024-NEXT:    [[TMP26:%.*]] = fmul <8 x float> [[TMP25]], [[TMP15]]
242; MAX1024-NEXT:    [[TMP27:%.*]] = fadd <8 x float> zeroinitializer, [[TMP26]]
243; MAX1024-NEXT:    [[TMP28:%.*]] = insertelement <8 x float> poison, float [[I6]], i32 0
244; MAX1024-NEXT:    [[TMP29:%.*]] = insertelement <8 x float> [[TMP28]], float [[I6]], i32 1
245; MAX1024-NEXT:    [[TMP30:%.*]] = insertelement <8 x float> [[TMP29]], float [[I6]], i32 2
246; MAX1024-NEXT:    [[TMP31:%.*]] = insertelement <8 x float> [[TMP30]], float [[I6]], i32 3
247; MAX1024-NEXT:    [[TMP32:%.*]] = insertelement <8 x float> [[TMP31]], float [[I6]], i32 4
248; MAX1024-NEXT:    [[TMP33:%.*]] = insertelement <8 x float> [[TMP32]], float [[I6]], i32 5
249; MAX1024-NEXT:    [[TMP34:%.*]] = insertelement <8 x float> [[TMP33]], float [[I6]], i32 6
250; MAX1024-NEXT:    [[TMP35:%.*]] = insertelement <8 x float> [[TMP34]], float [[I6]], i32 7
251; MAX1024-NEXT:    [[TMP36:%.*]] = fmul <8 x float> [[TMP35]], [[TMP15]]
252; MAX1024-NEXT:    [[TMP37:%.*]] = fadd <8 x float> zeroinitializer, [[TMP36]]
253; MAX1024-NEXT:    [[TMP38:%.*]] = insertelement <8 x float> poison, float [[I9]], i32 0
254; MAX1024-NEXT:    [[TMP39:%.*]] = insertelement <8 x float> [[TMP38]], float [[I9]], i32 1
255; MAX1024-NEXT:    [[TMP40:%.*]] = insertelement <8 x float> [[TMP39]], float [[I9]], i32 2
256; MAX1024-NEXT:    [[TMP41:%.*]] = insertelement <8 x float> [[TMP40]], float [[I9]], i32 3
257; MAX1024-NEXT:    [[TMP42:%.*]] = insertelement <8 x float> [[TMP41]], float [[I9]], i32 4
258; MAX1024-NEXT:    [[TMP43:%.*]] = insertelement <8 x float> [[TMP42]], float [[I9]], i32 5
259; MAX1024-NEXT:    [[TMP44:%.*]] = insertelement <8 x float> [[TMP43]], float [[I9]], i32 6
260; MAX1024-NEXT:    [[TMP45:%.*]] = insertelement <8 x float> [[TMP44]], float [[I9]], i32 7
261; MAX1024-NEXT:    [[TMP46:%.*]] = fmul <8 x float> [[TMP45]], [[TMP15]]
262; MAX1024-NEXT:    [[TMP47:%.*]] = fadd <8 x float> zeroinitializer, [[TMP46]]
263; MAX1024-NEXT:    switch i32 undef, label [[BB5:%.*]] [
264; MAX1024-NEXT:    i32 0, label [[BB2:%.*]]
265; MAX1024-NEXT:    i32 1, label [[BB3:%.*]]
266; MAX1024-NEXT:    i32 2, label [[BB4:%.*]]
267; MAX1024-NEXT:    ]
268; MAX1024:       bb3:
269; MAX1024-NEXT:    br label [[BB2]]
270; MAX1024:       bb4:
271; MAX1024-NEXT:    br label [[BB2]]
272; MAX1024:       bb5:
273; MAX1024-NEXT:    br label [[BB2]]
274; MAX1024:       bb2:
275; MAX1024-NEXT:    [[TMP48:%.*]] = phi <8 x float> [ [[TMP27]], [[BB3]] ], [ [[TMP15]], [[BB4]] ], [ [[TMP15]], [[BB5]] ], [ [[TMP15]], [[BB1]] ]
276; MAX1024-NEXT:    [[TMP49:%.*]] = phi <8 x float> [ [[TMP37]], [[BB3]] ], [ [[TMP15]], [[BB4]] ], [ [[TMP37]], [[BB5]] ], [ [[TMP37]], [[BB1]] ]
277; MAX1024-NEXT:    [[TMP50:%.*]] = phi <8 x float> [ [[TMP47]], [[BB3]] ], [ [[TMP47]], [[BB4]] ], [ [[TMP15]], [[BB5]] ], [ [[TMP47]], [[BB1]] ]
278; MAX1024-NEXT:    [[TMP51:%.*]] = phi <8 x float> [ [[TMP17]], [[BB3]] ], [ [[TMP17]], [[BB4]] ], [ [[TMP17]], [[BB5]] ], [ [[TMP15]], [[BB1]] ]
279; MAX1024-NEXT:    [[TMP52:%.*]] = extractelement <8 x float> [[TMP49]], i32 7
280; MAX1024-NEXT:    store float [[TMP52]], float* undef, align 4
281; MAX1024-NEXT:    ret void
282;
283bb:
284  br label %bb1
285
286bb1:
287  %i = fpext half %hval to float
288  %i1 = fmul float %i, %fval
289  %i2 = fadd float 0.000000e+00, %i1
290  %i3 = fpext half %hval to float
291  %i4 = fmul float %i3, %fval
292  %i5 = fadd float 0.000000e+00, %i4
293  %i6 = fpext half %hval to float
294  %i7 = fmul float %i6, %fval
295  %i8 = fadd float 0.000000e+00, %i7
296  %i9 = fpext half %hval to float
297  %i10 = fmul float %i9, %fval
298  %i11 = fadd float 0.000000e+00, %i10
299  %i12 = fmul float %i, %fval
300  %i13 = fadd float 0.000000e+00, %i12
301  %i14 = fmul float %i3, %fval
302  %i15 = fadd float 0.000000e+00, %i14
303  %i16 = fmul float %i6, %fval
304  %i17 = fadd float 0.000000e+00, %i16
305  %i18 = fmul float %i9, %fval
306  %i19 = fadd float 0.000000e+00, %i18
307  %i20 = fmul float %i, %fval
308  %i21 = fadd float 0.000000e+00, %i20
309  %i22 = fmul float %i3, %fval
310  %i23 = fadd float 0.000000e+00, %i22
311  %i24 = fmul float %i6, %fval
312  %i25 = fadd float 0.000000e+00, %i24
313  %i26 = fmul float %i9, %fval
314  %i27 = fadd float 0.000000e+00, %i26
315  %i28 = fmul float %i, %fval
316  %i29 = fadd float 0.000000e+00, %i28
317  %i30 = fmul float %i3, %fval
318  %i31 = fadd float 0.000000e+00, %i30
319  %i32 = fmul float %i6, %fval
320  %i33 = fadd float 0.000000e+00, %i32
321  %i34 = fmul float %i9, %fval
322  %i35 = fadd float 0.000000e+00, %i34
323  %i36 = fmul float %i, %fval
324  %i37 = fadd float 0.000000e+00, %i36
325  %i38 = fmul float %i3, %fval
326  %i39 = fadd float 0.000000e+00, %i38
327  %i40 = fmul float %i6, %fval
328  %i41 = fadd float 0.000000e+00, %i40
329  %i42 = fmul float %i9, %fval
330  %i43 = fadd float 0.000000e+00, %i42
331  %i44 = fmul float %i, %fval
332  %i45 = fadd float 0.000000e+00, %i44
333  %i46 = fmul float %i3, %fval
334  %i47 = fadd float 0.000000e+00, %i46
335  %i48 = fmul float %i6, %fval
336  %i49 = fadd float 0.000000e+00, %i48
337  %i50 = fmul float %i9, %fval
338  %i51 = fadd float 0.000000e+00, %i50
339  %i52 = fmul float %i, %fval
340  %i53 = fadd float 0.000000e+00, %i52
341  %i54 = fmul float %i3, %fval
342  %i55 = fadd float 0.000000e+00, %i54
343  %i56 = fmul float %i6, %fval
344  %i57 = fadd float 0.000000e+00, %i56
345  %i58 = fmul float %i9, %fval
346  %i59 = fadd float 0.000000e+00, %i58
347  %i60 = fmul float %i, %fval
348  %i61 = fadd float 0.000000e+00, %i60
349  %i62 = fmul float %i3, %fval
350  %i63 = fadd float 0.000000e+00, %i62
351  %i64 = fmul float %i6, %fval
352  %i65 = fadd float 0.000000e+00, %i64
353  %i66 = fmul float %i9, %fval
354  %i67 = fadd float 0.000000e+00, %i66
355  switch i32 undef, label %bb5 [
356  i32 0, label %bb2
357  i32 1, label %bb3
358  i32 2, label %bb4
359  ]
360
361bb3:
362  br label %bb2
363
364bb4:
365  br label %bb2
366
367bb5:
368  br label %bb2
369
370bb2:
371  %phi1 = phi float [ %i19, %bb3 ], [ %i19, %bb4 ], [ %fval, %bb5 ], [ %i19, %bb1 ]
372  %phi2 = phi float [ %i17, %bb3 ], [ %fval, %bb4 ], [ %i17, %bb5 ], [ %i17, %bb1 ]
373  %phi3 = phi float [ %i15, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ]
374  %phi4 = phi float [ %i13, %bb3 ], [ %i13, %bb4 ], [ %i13, %bb5 ], [ %fval, %bb1 ]
375  %phi5 = phi float [ %i11, %bb3 ], [ %i11, %bb4 ], [ %fval, %bb5 ], [ %i11, %bb1 ]
376  %phi6 = phi float [ %i8, %bb3 ], [ %fval, %bb4 ], [ %i8, %bb5 ], [ %i8, %bb1 ]
377  %phi7 = phi float [ %i5, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ]
378  %phi8 = phi float [ %i2, %bb3 ], [ %i2, %bb4 ], [ %i2, %bb5 ], [ %fval, %bb1 ]
379  %phi9 = phi float [ %i21, %bb3 ], [ %i21, %bb4 ], [ %i21, %bb5 ], [ %fval, %bb1 ]
380  %phi10 = phi float [ %i23, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ]
381  %phi11 = phi float [ %i25, %bb3 ], [ %fval, %bb4 ], [ %i25, %bb5 ], [ %i25, %bb1 ]
382  %phi12 = phi float [ %i27, %bb3 ], [ %i27, %bb4 ], [ %fval, %bb5 ], [ %i27, %bb1 ]
383  %phi13 = phi float [ %i29, %bb3 ], [ %i29, %bb4 ], [ %i29, %bb5 ], [ %fval, %bb1 ]
384  %phi14 = phi float [ %i31, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ]
385  %phi15 = phi float [ %i33, %bb3 ], [ %fval, %bb4 ], [ %i33, %bb5 ], [ %i33, %bb1 ]
386  %phi16 = phi float [ %i35, %bb3 ], [ %i35, %bb4 ], [ %fval, %bb5 ], [ %i35, %bb1 ]
387  %phi17 = phi float [ %i37, %bb3 ], [ %i37, %bb4 ], [ %i37, %bb5 ], [ %fval, %bb1 ]
388  %phi18 = phi float [ %i39, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ]
389  %phi19 = phi float [ %i41, %bb3 ], [ %fval, %bb4 ], [ %i41, %bb5 ], [ %i41, %bb1 ]
390  %phi20 = phi float [ %i43, %bb3 ], [ %i43, %bb4 ], [ %fval, %bb5 ], [ %i43, %bb1 ]
391  %phi21 = phi float [ %i45, %bb3 ], [ %i45, %bb4 ], [ %i45, %bb5 ], [ %fval, %bb1 ]
392  %phi22 = phi float [ %i47, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ]
393  %phi23 = phi float [ %i49, %bb3 ], [ %fval, %bb4 ], [ %i49, %bb5 ], [ %i49, %bb1 ]
394  %phi24 = phi float [ %i51, %bb3 ], [ %i51, %bb4 ], [ %fval, %bb5 ], [ %i51, %bb1 ]
395  %phi25 = phi float [ %i53, %bb3 ], [ %i53, %bb4 ], [ %i53, %bb5 ], [ %fval, %bb1 ]
396  %phi26 = phi float [ %i55, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ]
397  %phi27 = phi float [ %i57, %bb3 ], [ %fval, %bb4 ], [ %i57, %bb5 ], [ %i57, %bb1 ]
398  %phi28 = phi float [ %i59, %bb3 ], [ %i59, %bb4 ], [ %fval, %bb5 ], [ %i59, %bb1 ]
399  %phi29 = phi float [ %i61, %bb3 ], [ %i61, %bb4 ], [ %i61, %bb5 ], [ %fval, %bb1 ]
400  %phi30 = phi float [ %i63, %bb3 ], [ %fval, %bb4 ], [ %fval, %bb5 ], [ %fval, %bb1 ]
401  %phi31 = phi float [ %i65, %bb3 ], [ %fval, %bb4 ], [ %i65, %bb5 ], [ %i65, %bb1 ]
402  %phi32 = phi float [ %i67, %bb3 ], [ %i67, %bb4 ], [ %fval, %bb5 ], [ %i67, %bb1 ]
403  store float %phi31, float* undef
404  ret void
405}
406