1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 /**
24 * @file crocus_program.c
25 *
26 * This file contains the driver interface for compiling shaders.
27 *
28 * See crocus_program_cache.c for the in-memory program cache where the
29 * compiled shaders are stored.
30 */
31
32 #include <stdio.h>
33 #include <errno.h>
34 #include "pipe/p_defines.h"
35 #include "pipe/p_state.h"
36 #include "pipe/p_context.h"
37 #include "pipe/p_screen.h"
38 #include "util/u_atomic.h"
39 #include "util/u_upload_mgr.h"
40 #include "util/debug.h"
41 #include "util/u_prim.h"
42 #include "compiler/nir/nir.h"
43 #include "compiler/nir/nir_builder.h"
44 #include "compiler/nir/nir_serialize.h"
45 #include "intel/compiler/brw_compiler.h"
46 #include "intel/compiler/brw_nir.h"
47 #include "crocus_context.h"
48 #include "nir/tgsi_to_nir.h"
49
50 #define KEY_INIT_NO_ID() \
51 .base.subgroup_size_type = BRW_SUBGROUP_SIZE_UNIFORM, \
52 .base.tex.swizzles[0 ... MAX_SAMPLERS - 1] = 0x688, \
53 .base.tex.compressed_multisample_layout_mask = ~0
54 #define KEY_INIT() .base.program_string_id = ish->program_id, KEY_INIT_NO_ID()
55
56 static void
crocus_sanitize_tex_key(struct brw_sampler_prog_key_data * key)57 crocus_sanitize_tex_key(struct brw_sampler_prog_key_data *key)
58 {
59 key->gather_channel_quirk_mask = 0;
60 for (unsigned s = 0; s < MAX_SAMPLERS; s++) {
61 key->swizzles[s] = SWIZZLE_NOOP;
62 key->gfx6_gather_wa[s] = 0;
63 }
64 }
65
66 static uint32_t
crocus_get_texture_swizzle(const struct crocus_context * ice,const struct crocus_sampler_view * t)67 crocus_get_texture_swizzle(const struct crocus_context *ice,
68 const struct crocus_sampler_view *t)
69 {
70 uint32_t swiz = 0;
71
72 for (int i = 0; i < 4; i++) {
73 swiz |= t->swizzle[i] << (i * 3);
74 }
75 return swiz;
76 }
77
can_push_ubo(const struct intel_device_info * devinfo)78 static inline bool can_push_ubo(const struct intel_device_info *devinfo)
79 {
80 /* push works for everyone except SNB at the moment */
81 return devinfo->ver != 6;
82 }
83
84 static uint8_t
gfx6_gather_workaround(enum pipe_format pformat)85 gfx6_gather_workaround(enum pipe_format pformat)
86 {
87 switch (pformat) {
88 case PIPE_FORMAT_R8_SINT: return WA_SIGN | WA_8BIT;
89 case PIPE_FORMAT_R8_UINT: return WA_8BIT;
90 case PIPE_FORMAT_R16_SINT: return WA_SIGN | WA_16BIT;
91 case PIPE_FORMAT_R16_UINT: return WA_16BIT;
92 default:
93 /* Note that even though PIPE_FORMAT_R32_SINT and
94 * PIPE_FORMAT_R32_UINThave format overrides in
95 * the surface state, there is no shader w/a required.
96 */
97 return 0;
98 }
99 }
100
101 static const unsigned crocus_gfx6_swizzle_for_offset[4] = {
102 BRW_SWIZZLE4(0, 1, 2, 3),
103 BRW_SWIZZLE4(1, 2, 3, 3),
104 BRW_SWIZZLE4(2, 3, 3, 3),
105 BRW_SWIZZLE4(3, 3, 3, 3)
106 };
107
108 static void
gfx6_gs_xfb_setup(const struct pipe_stream_output_info * so_info,struct brw_gs_prog_data * gs_prog_data)109 gfx6_gs_xfb_setup(const struct pipe_stream_output_info *so_info,
110 struct brw_gs_prog_data *gs_prog_data)
111 {
112 /* Make sure that the VUE slots won't overflow the unsigned chars in
113 * prog_data->transform_feedback_bindings[].
114 */
115 STATIC_ASSERT(BRW_VARYING_SLOT_COUNT <= 256);
116
117 /* Make sure that we don't need more binding table entries than we've
118 * set aside for use in transform feedback. (We shouldn't, since we
119 * set aside enough binding table entries to have one per component).
120 */
121 assert(so_info->num_outputs <= BRW_MAX_SOL_BINDINGS);
122
123 gs_prog_data->num_transform_feedback_bindings = so_info->num_outputs;
124 for (unsigned i = 0; i < so_info->num_outputs; i++) {
125 gs_prog_data->transform_feedback_bindings[i] =
126 so_info->output[i].register_index;
127 gs_prog_data->transform_feedback_swizzles[i] =
128 crocus_gfx6_swizzle_for_offset[so_info->output[i].start_component];
129 }
130 }
131
132 static void
gfx6_ff_gs_xfb_setup(const struct pipe_stream_output_info * so_info,struct brw_ff_gs_prog_key * key)133 gfx6_ff_gs_xfb_setup(const struct pipe_stream_output_info *so_info,
134 struct brw_ff_gs_prog_key *key)
135 {
136 key->num_transform_feedback_bindings = so_info->num_outputs;
137 for (unsigned i = 0; i < so_info->num_outputs; i++) {
138 key->transform_feedback_bindings[i] =
139 so_info->output[i].register_index;
140 key->transform_feedback_swizzles[i] =
141 crocus_gfx6_swizzle_for_offset[so_info->output[i].start_component];
142 }
143 }
144
145 static void
crocus_populate_sampler_prog_key_data(struct crocus_context * ice,const struct intel_device_info * devinfo,gl_shader_stage stage,struct crocus_uncompiled_shader * ish,bool uses_texture_gather,struct brw_sampler_prog_key_data * key)146 crocus_populate_sampler_prog_key_data(struct crocus_context *ice,
147 const struct intel_device_info *devinfo,
148 gl_shader_stage stage,
149 struct crocus_uncompiled_shader *ish,
150 bool uses_texture_gather,
151 struct brw_sampler_prog_key_data *key)
152 {
153 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
154 uint32_t mask = ish->nir->info.textures_used[0];
155
156 while (mask) {
157 const int s = u_bit_scan(&mask);
158
159 struct crocus_sampler_view *texture = ice->state.shaders[stage].textures[s];
160 key->swizzles[s] = SWIZZLE_NOOP;
161 key->scale_factors[s] = 0.0f;
162
163 if (!texture)
164 continue;
165 if (texture->base.target == PIPE_BUFFER)
166 continue;
167 if (devinfo->verx10 < 75) {
168 key->swizzles[s] = crocus_get_texture_swizzle(ice, texture);
169 }
170
171 screen->vtbl.fill_clamp_mask(ice->state.shaders[stage].samplers[s], s, key->gl_clamp_mask);
172
173 /* gather4 for RG32* is broken in multiple ways on Gen7. */
174 if (devinfo->ver == 7 && uses_texture_gather) {
175 switch (texture->base.format) {
176 case PIPE_FORMAT_R32G32_UINT:
177 case PIPE_FORMAT_R32G32_SINT: {
178 /* We have to override the format to R32G32_FLOAT_LD.
179 * This means that SCS_ALPHA and SCS_ONE will return 0x3f8
180 * (1.0) rather than integer 1. This needs shader hacks.
181 *
182 * On Ivybridge, we whack W (alpha) to ONE in our key's
183 * swizzle. On Haswell, we look at the original texture
184 * swizzle, and use XYZW with channels overridden to ONE,
185 * leaving normal texture swizzling to SCS.
186 */
187 unsigned src_swizzle = key->swizzles[s];
188 for (int i = 0; i < 4; i++) {
189 unsigned src_comp = GET_SWZ(src_swizzle, i);
190 if (src_comp == SWIZZLE_ONE || src_comp == SWIZZLE_W) {
191 key->swizzles[i] &= ~(0x7 << (3 * i));
192 key->swizzles[i] |= SWIZZLE_ONE << (3 * i);
193 }
194 }
195 }
196 FALLTHROUGH;
197 case PIPE_FORMAT_R32G32_FLOAT:
198 /* The channel select for green doesn't work - we have to
199 * request blue. Haswell can use SCS for this, but Ivybridge
200 * needs a shader workaround.
201 */
202 if (devinfo->verx10 < 75)
203 key->gather_channel_quirk_mask |= 1 << s;
204 break;
205 default:
206 break;
207 }
208 }
209 if (devinfo->ver == 6 && uses_texture_gather) {
210 key->gfx6_gather_wa[s] = gfx6_gather_workaround(texture->base.format);
211 }
212 }
213 }
214
215 static void
crocus_lower_swizzles(struct nir_shader * nir,const struct brw_sampler_prog_key_data * key_tex)216 crocus_lower_swizzles(struct nir_shader *nir,
217 const struct brw_sampler_prog_key_data *key_tex)
218 {
219 struct nir_lower_tex_options tex_options = { 0 };
220 uint32_t mask = nir->info.textures_used[0];
221
222 while (mask) {
223 const int s = u_bit_scan(&mask);
224
225 if (key_tex->swizzles[s] == SWIZZLE_NOOP)
226 continue;
227
228 tex_options.swizzle_result |= (1 << s);
229 for (unsigned c = 0; c < 4; c++)
230 tex_options.swizzles[s][c] = GET_SWZ(key_tex->swizzles[s], c);
231 }
232 if (tex_options.swizzle_result)
233 nir_lower_tex(nir, &tex_options);
234 }
235
236 static unsigned
get_new_program_id(struct crocus_screen * screen)237 get_new_program_id(struct crocus_screen *screen)
238 {
239 return p_atomic_inc_return(&screen->program_id);
240 }
241
242 static nir_ssa_def *
get_aoa_deref_offset(nir_builder * b,nir_deref_instr * deref,unsigned elem_size)243 get_aoa_deref_offset(nir_builder *b,
244 nir_deref_instr *deref,
245 unsigned elem_size)
246 {
247 unsigned array_size = elem_size;
248 nir_ssa_def *offset = nir_imm_int(b, 0);
249
250 while (deref->deref_type != nir_deref_type_var) {
251 assert(deref->deref_type == nir_deref_type_array);
252
253 /* This level's element size is the previous level's array size */
254 nir_ssa_def *index = nir_ssa_for_src(b, deref->arr.index, 1);
255 assert(deref->arr.index.ssa);
256 offset = nir_iadd(b, offset,
257 nir_imul(b, index, nir_imm_int(b, array_size)));
258
259 deref = nir_deref_instr_parent(deref);
260 assert(glsl_type_is_array(deref->type));
261 array_size *= glsl_get_length(deref->type);
262 }
263
264 /* Accessing an invalid surface index with the dataport can result in a
265 * hang. According to the spec "if the index used to select an individual
266 * element is negative or greater than or equal to the size of the array,
267 * the results of the operation are undefined but may not lead to
268 * termination" -- which is one of the possible outcomes of the hang.
269 * Clamp the index to prevent access outside of the array bounds.
270 */
271 return nir_umin(b, offset, nir_imm_int(b, array_size - elem_size));
272 }
273
274 static void
crocus_lower_storage_image_derefs(nir_shader * nir)275 crocus_lower_storage_image_derefs(nir_shader *nir)
276 {
277 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
278
279 nir_builder b;
280 nir_builder_init(&b, impl);
281
282 nir_foreach_block(block, impl) {
283 nir_foreach_instr_safe(instr, block) {
284 if (instr->type != nir_instr_type_intrinsic)
285 continue;
286
287 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
288 switch (intrin->intrinsic) {
289 case nir_intrinsic_image_deref_load:
290 case nir_intrinsic_image_deref_store:
291 case nir_intrinsic_image_deref_atomic_add:
292 case nir_intrinsic_image_deref_atomic_imin:
293 case nir_intrinsic_image_deref_atomic_umin:
294 case nir_intrinsic_image_deref_atomic_imax:
295 case nir_intrinsic_image_deref_atomic_umax:
296 case nir_intrinsic_image_deref_atomic_and:
297 case nir_intrinsic_image_deref_atomic_or:
298 case nir_intrinsic_image_deref_atomic_xor:
299 case nir_intrinsic_image_deref_atomic_exchange:
300 case nir_intrinsic_image_deref_atomic_comp_swap:
301 case nir_intrinsic_image_deref_size:
302 case nir_intrinsic_image_deref_samples:
303 case nir_intrinsic_image_deref_load_raw_intel:
304 case nir_intrinsic_image_deref_store_raw_intel: {
305 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
306 nir_variable *var = nir_deref_instr_get_variable(deref);
307
308 b.cursor = nir_before_instr(&intrin->instr);
309 nir_ssa_def *index =
310 nir_iadd(&b, nir_imm_int(&b, var->data.driver_location),
311 get_aoa_deref_offset(&b, deref, 1));
312 nir_rewrite_image_intrinsic(intrin, index, false);
313 break;
314 }
315
316 default:
317 break;
318 }
319 }
320 }
321 }
322
323 // XXX: need unify_interfaces() at link time...
324
325 /**
326 * Undo nir_lower_passthrough_edgeflags but keep the inputs_read flag.
327 */
328 static bool
crocus_fix_edge_flags(nir_shader * nir)329 crocus_fix_edge_flags(nir_shader *nir)
330 {
331 if (nir->info.stage != MESA_SHADER_VERTEX) {
332 nir_shader_preserve_all_metadata(nir);
333 return false;
334 }
335
336 nir_variable *var = nir_find_variable_with_location(nir, nir_var_shader_out,
337 VARYING_SLOT_EDGE);
338 if (!var) {
339 nir_shader_preserve_all_metadata(nir);
340 return false;
341 }
342
343 var->data.mode = nir_var_shader_temp;
344 nir->info.outputs_written &= ~VARYING_BIT_EDGE;
345 nir->info.inputs_read &= ~VERT_BIT_EDGEFLAG;
346 nir_fixup_deref_modes(nir);
347
348 nir_foreach_function(f, nir) {
349 if (f->impl) {
350 nir_metadata_preserve(f->impl, nir_metadata_block_index |
351 nir_metadata_dominance |
352 nir_metadata_live_ssa_defs |
353 nir_metadata_loop_analysis);
354 } else {
355 nir_metadata_preserve(f->impl, nir_metadata_all);
356 }
357 }
358
359 return true;
360 }
361
362 /**
363 * Fix an uncompiled shader's stream output info.
364 *
365 * Core Gallium stores output->register_index as a "slot" number, where
366 * slots are assigned consecutively to all outputs in info->outputs_written.
367 * This naive packing of outputs doesn't work for us - we too have slots,
368 * but the layout is defined by the VUE map, which we won't have until we
369 * compile a specific shader variant. So, we remap these and simply store
370 * VARYING_SLOT_* in our copy's output->register_index fields.
371 *
372 * We also fix up VARYING_SLOT_{LAYER,VIEWPORT,PSIZ} to select the Y/Z/W
373 * components of our VUE header. See brw_vue_map.c for the layout.
374 */
375 static void
update_so_info(struct pipe_stream_output_info * so_info,uint64_t outputs_written)376 update_so_info(struct pipe_stream_output_info *so_info,
377 uint64_t outputs_written)
378 {
379 uint8_t reverse_map[64] = {};
380 unsigned slot = 0;
381 while (outputs_written) {
382 reverse_map[slot++] = u_bit_scan64(&outputs_written);
383 }
384
385 for (unsigned i = 0; i < so_info->num_outputs; i++) {
386 struct pipe_stream_output *output = &so_info->output[i];
387
388 /* Map Gallium's condensed "slots" back to real VARYING_SLOT_* enums */
389 output->register_index = reverse_map[output->register_index];
390
391 /* The VUE header contains three scalar fields packed together:
392 * - gl_PointSize is stored in VARYING_SLOT_PSIZ.w
393 * - gl_Layer is stored in VARYING_SLOT_PSIZ.y
394 * - gl_ViewportIndex is stored in VARYING_SLOT_PSIZ.z
395 */
396 switch (output->register_index) {
397 case VARYING_SLOT_LAYER:
398 assert(output->num_components == 1);
399 output->register_index = VARYING_SLOT_PSIZ;
400 output->start_component = 1;
401 break;
402 case VARYING_SLOT_VIEWPORT:
403 assert(output->num_components == 1);
404 output->register_index = VARYING_SLOT_PSIZ;
405 output->start_component = 2;
406 break;
407 case VARYING_SLOT_PSIZ:
408 assert(output->num_components == 1);
409 output->start_component = 3;
410 break;
411 }
412
413 //info->outputs_written |= 1ull << output->register_index;
414 }
415 }
416
417 static void
setup_vec4_image_sysval(uint32_t * sysvals,uint32_t idx,unsigned offset,unsigned n)418 setup_vec4_image_sysval(uint32_t *sysvals, uint32_t idx,
419 unsigned offset, unsigned n)
420 {
421 assert(offset % sizeof(uint32_t) == 0);
422
423 for (unsigned i = 0; i < n; ++i)
424 sysvals[i] = BRW_PARAM_IMAGE(idx, offset / sizeof(uint32_t) + i);
425
426 for (unsigned i = n; i < 4; ++i)
427 sysvals[i] = BRW_PARAM_BUILTIN_ZERO;
428 }
429
430 /**
431 * Associate NIR uniform variables with the prog_data->param[] mechanism
432 * used by the backend. Also, decide which UBOs we'd like to push in an
433 * ideal situation (though the backend can reduce this).
434 */
435 static void
crocus_setup_uniforms(const struct brw_compiler * compiler,void * mem_ctx,nir_shader * nir,struct brw_stage_prog_data * prog_data,enum brw_param_builtin ** out_system_values,unsigned * out_num_system_values,unsigned * out_num_cbufs)436 crocus_setup_uniforms(const struct brw_compiler *compiler,
437 void *mem_ctx,
438 nir_shader *nir,
439 struct brw_stage_prog_data *prog_data,
440 enum brw_param_builtin **out_system_values,
441 unsigned *out_num_system_values,
442 unsigned *out_num_cbufs)
443 {
444 UNUSED const struct intel_device_info *devinfo = compiler->devinfo;
445
446 const unsigned CROCUS_MAX_SYSTEM_VALUES =
447 PIPE_MAX_SHADER_IMAGES * BRW_IMAGE_PARAM_SIZE;
448 enum brw_param_builtin *system_values =
449 rzalloc_array(mem_ctx, enum brw_param_builtin, CROCUS_MAX_SYSTEM_VALUES);
450 unsigned num_system_values = 0;
451
452 unsigned patch_vert_idx = -1;
453 unsigned ucp_idx[CROCUS_MAX_CLIP_PLANES];
454 unsigned img_idx[PIPE_MAX_SHADER_IMAGES];
455 unsigned variable_group_size_idx = -1;
456 memset(ucp_idx, -1, sizeof(ucp_idx));
457 memset(img_idx, -1, sizeof(img_idx));
458
459 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
460
461 nir_builder b;
462 nir_builder_init(&b, impl);
463
464 b.cursor = nir_before_block(nir_start_block(impl));
465 nir_ssa_def *temp_ubo_name = nir_ssa_undef(&b, 1, 32);
466 nir_ssa_def *temp_const_ubo_name = NULL;
467
468 /* Turn system value intrinsics into uniforms */
469 nir_foreach_block(block, impl) {
470 nir_foreach_instr_safe(instr, block) {
471 if (instr->type != nir_instr_type_intrinsic)
472 continue;
473
474 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
475 nir_ssa_def *offset;
476
477 switch (intrin->intrinsic) {
478 case nir_intrinsic_load_constant: {
479 /* This one is special because it reads from the shader constant
480 * data and not cbuf0 which gallium uploads for us.
481 */
482 b.cursor = nir_before_instr(instr);
483 nir_ssa_def *offset =
484 nir_iadd_imm(&b, nir_ssa_for_src(&b, intrin->src[0], 1),
485 nir_intrinsic_base(intrin));
486
487 if (temp_const_ubo_name == NULL)
488 temp_const_ubo_name = nir_imm_int(&b, 0);
489
490 nir_intrinsic_instr *load_ubo =
491 nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_ubo);
492 load_ubo->num_components = intrin->num_components;
493 load_ubo->src[0] = nir_src_for_ssa(temp_const_ubo_name);
494 load_ubo->src[1] = nir_src_for_ssa(offset);
495 nir_intrinsic_set_align(load_ubo, 4, 0);
496 nir_intrinsic_set_range_base(load_ubo, 0);
497 nir_intrinsic_set_range(load_ubo, ~0);
498 nir_ssa_dest_init(&load_ubo->instr, &load_ubo->dest,
499 intrin->dest.ssa.num_components,
500 intrin->dest.ssa.bit_size,
501 NULL);
502 nir_builder_instr_insert(&b, &load_ubo->instr);
503
504 nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
505 &load_ubo->dest.ssa);
506 nir_instr_remove(&intrin->instr);
507 continue;
508 }
509 case nir_intrinsic_load_user_clip_plane: {
510 unsigned ucp = nir_intrinsic_ucp_id(intrin);
511
512 if (ucp_idx[ucp] == -1) {
513 ucp_idx[ucp] = num_system_values;
514 num_system_values += 4;
515 }
516
517 for (int i = 0; i < 4; i++) {
518 system_values[ucp_idx[ucp] + i] =
519 BRW_PARAM_BUILTIN_CLIP_PLANE(ucp, i);
520 }
521
522 b.cursor = nir_before_instr(instr);
523 offset = nir_imm_int(&b, ucp_idx[ucp] * sizeof(uint32_t));
524 break;
525 }
526 case nir_intrinsic_load_patch_vertices_in:
527 if (patch_vert_idx == -1)
528 patch_vert_idx = num_system_values++;
529
530 system_values[patch_vert_idx] =
531 BRW_PARAM_BUILTIN_PATCH_VERTICES_IN;
532
533 b.cursor = nir_before_instr(instr);
534 offset = nir_imm_int(&b, patch_vert_idx * sizeof(uint32_t));
535 break;
536 case nir_intrinsic_image_deref_load_param_intel: {
537 assert(devinfo->ver < 9);
538 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
539 nir_variable *var = nir_deref_instr_get_variable(deref);
540
541 if (img_idx[var->data.binding] == -1) {
542 /* GL only allows arrays of arrays of images. */
543 assert(glsl_type_is_image(glsl_without_array(var->type)));
544 unsigned num_images = MAX2(1, glsl_get_aoa_size(var->type));
545
546 for (int i = 0; i < num_images; i++) {
547 const unsigned img = var->data.binding + i;
548
549 img_idx[img] = num_system_values;
550 num_system_values += BRW_IMAGE_PARAM_SIZE;
551
552 uint32_t *img_sv = &system_values[img_idx[img]];
553
554 setup_vec4_image_sysval(
555 img_sv + BRW_IMAGE_PARAM_OFFSET_OFFSET, img,
556 offsetof(struct brw_image_param, offset), 2);
557 setup_vec4_image_sysval(
558 img_sv + BRW_IMAGE_PARAM_SIZE_OFFSET, img,
559 offsetof(struct brw_image_param, size), 3);
560 setup_vec4_image_sysval(
561 img_sv + BRW_IMAGE_PARAM_STRIDE_OFFSET, img,
562 offsetof(struct brw_image_param, stride), 4);
563 setup_vec4_image_sysval(
564 img_sv + BRW_IMAGE_PARAM_TILING_OFFSET, img,
565 offsetof(struct brw_image_param, tiling), 3);
566 setup_vec4_image_sysval(
567 img_sv + BRW_IMAGE_PARAM_SWIZZLING_OFFSET, img,
568 offsetof(struct brw_image_param, swizzling), 2);
569 }
570 }
571
572 b.cursor = nir_before_instr(instr);
573 offset = nir_iadd(&b,
574 get_aoa_deref_offset(&b, deref, BRW_IMAGE_PARAM_SIZE * 4),
575 nir_imm_int(&b, img_idx[var->data.binding] * 4 +
576 nir_intrinsic_base(intrin) * 16));
577 break;
578 }
579 case nir_intrinsic_load_workgroup_size: {
580 assert(nir->info.workgroup_size_variable);
581 if (variable_group_size_idx == -1) {
582 variable_group_size_idx = num_system_values;
583 num_system_values += 3;
584 for (int i = 0; i < 3; i++) {
585 system_values[variable_group_size_idx + i] =
586 BRW_PARAM_BUILTIN_WORK_GROUP_SIZE_X + i;
587 }
588 }
589
590 b.cursor = nir_before_instr(instr);
591 offset = nir_imm_int(&b,
592 variable_group_size_idx * sizeof(uint32_t));
593 break;
594 }
595 default:
596 continue;
597 }
598
599 unsigned comps = nir_intrinsic_dest_components(intrin);
600
601 nir_intrinsic_instr *load =
602 nir_intrinsic_instr_create(nir, nir_intrinsic_load_ubo);
603 load->num_components = comps;
604 load->src[0] = nir_src_for_ssa(temp_ubo_name);
605 load->src[1] = nir_src_for_ssa(offset);
606 nir_intrinsic_set_align(load, 4, 0);
607 nir_intrinsic_set_range_base(load, 0);
608 nir_intrinsic_set_range(load, ~0);
609 nir_ssa_dest_init(&load->instr, &load->dest, comps, 32, NULL);
610 nir_builder_instr_insert(&b, &load->instr);
611 nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
612 &load->dest.ssa);
613 nir_instr_remove(instr);
614 }
615 }
616
617 nir_validate_shader(nir, "before remapping");
618
619 /* Uniforms are stored in constant buffer 0, the
620 * user-facing UBOs are indexed by one. So if any constant buffer is
621 * needed, the constant buffer 0 will be needed, so account for it.
622 */
623 unsigned num_cbufs = nir->info.num_ubos;
624 if (num_cbufs || nir->num_uniforms)
625 num_cbufs++;
626
627 /* Place the new params in a new cbuf. */
628 if (num_system_values > 0) {
629 unsigned sysval_cbuf_index = num_cbufs;
630 num_cbufs++;
631
632 system_values = reralloc(mem_ctx, system_values, enum brw_param_builtin,
633 num_system_values);
634
635 nir_foreach_block(block, impl) {
636 nir_foreach_instr_safe(instr, block) {
637 if (instr->type != nir_instr_type_intrinsic)
638 continue;
639
640 nir_intrinsic_instr *load = nir_instr_as_intrinsic(instr);
641
642 if (load->intrinsic != nir_intrinsic_load_ubo)
643 continue;
644
645 b.cursor = nir_before_instr(instr);
646
647 assert(load->src[0].is_ssa);
648
649 if (load->src[0].ssa == temp_ubo_name) {
650 nir_ssa_def *imm = nir_imm_int(&b, sysval_cbuf_index);
651 nir_instr_rewrite_src(instr, &load->src[0],
652 nir_src_for_ssa(imm));
653 }
654 }
655 }
656
657 /* We need to fold the new iadds for brw_nir_analyze_ubo_ranges */
658 nir_opt_constant_folding(nir);
659 } else {
660 ralloc_free(system_values);
661 system_values = NULL;
662 }
663
664 assert(num_cbufs < PIPE_MAX_CONSTANT_BUFFERS);
665 nir_validate_shader(nir, "after remap");
666
667 /* We don't use params[] but gallium leaves num_uniforms set. We use this
668 * to detect when cbuf0 exists but we don't need it anymore when we get
669 * here. Instead, zero it out so that the back-end doesn't get confused
670 * when nr_params * 4 != num_uniforms != nr_params * 4.
671 */
672 nir->num_uniforms = 0;
673
674 /* Constant loads (if any) need to go at the end of the constant buffers so
675 * we need to know num_cbufs before we can lower to them.
676 */
677 if (temp_const_ubo_name != NULL) {
678 nir_load_const_instr *const_ubo_index =
679 nir_instr_as_load_const(temp_const_ubo_name->parent_instr);
680 assert(const_ubo_index->def.bit_size == 32);
681 const_ubo_index->value[0].u32 = num_cbufs;
682 }
683
684 *out_system_values = system_values;
685 *out_num_system_values = num_system_values;
686 *out_num_cbufs = num_cbufs;
687 }
688
689 static const char *surface_group_names[] = {
690 [CROCUS_SURFACE_GROUP_RENDER_TARGET] = "render target",
691 [CROCUS_SURFACE_GROUP_RENDER_TARGET_READ] = "non-coherent render target read",
692 [CROCUS_SURFACE_GROUP_SOL] = "streamout",
693 [CROCUS_SURFACE_GROUP_CS_WORK_GROUPS] = "CS work groups",
694 [CROCUS_SURFACE_GROUP_TEXTURE] = "texture",
695 [CROCUS_SURFACE_GROUP_TEXTURE_GATHER] = "texture gather",
696 [CROCUS_SURFACE_GROUP_UBO] = "ubo",
697 [CROCUS_SURFACE_GROUP_SSBO] = "ssbo",
698 [CROCUS_SURFACE_GROUP_IMAGE] = "image",
699 };
700
701 static void
crocus_print_binding_table(FILE * fp,const char * name,const struct crocus_binding_table * bt)702 crocus_print_binding_table(FILE *fp, const char *name,
703 const struct crocus_binding_table *bt)
704 {
705 STATIC_ASSERT(ARRAY_SIZE(surface_group_names) == CROCUS_SURFACE_GROUP_COUNT);
706
707 uint32_t total = 0;
708 uint32_t compacted = 0;
709
710 for (int i = 0; i < CROCUS_SURFACE_GROUP_COUNT; i++) {
711 uint32_t size = bt->sizes[i];
712 total += size;
713 if (size)
714 compacted += util_bitcount64(bt->used_mask[i]);
715 }
716
717 if (total == 0) {
718 fprintf(fp, "Binding table for %s is empty\n\n", name);
719 return;
720 }
721
722 if (total != compacted) {
723 fprintf(fp, "Binding table for %s "
724 "(compacted to %u entries from %u entries)\n",
725 name, compacted, total);
726 } else {
727 fprintf(fp, "Binding table for %s (%u entries)\n", name, total);
728 }
729
730 uint32_t entry = 0;
731 for (int i = 0; i < CROCUS_SURFACE_GROUP_COUNT; i++) {
732 uint64_t mask = bt->used_mask[i];
733 while (mask) {
734 int index = u_bit_scan64(&mask);
735 fprintf(fp, " [%u] %s #%d\n", entry++, surface_group_names[i], index);
736 }
737 }
738 fprintf(fp, "\n");
739 }
740
741 enum {
742 /* Max elements in a surface group. */
743 SURFACE_GROUP_MAX_ELEMENTS = 64,
744 };
745
746 static void
rewrite_src_with_bti(nir_builder * b,struct crocus_binding_table * bt,nir_instr * instr,nir_src * src,enum crocus_surface_group group)747 rewrite_src_with_bti(nir_builder *b, struct crocus_binding_table *bt,
748 nir_instr *instr, nir_src *src,
749 enum crocus_surface_group group)
750 {
751 assert(bt->sizes[group] > 0);
752
753 b->cursor = nir_before_instr(instr);
754 nir_ssa_def *bti;
755 if (nir_src_is_const(*src)) {
756 uint32_t index = nir_src_as_uint(*src);
757 bti = nir_imm_intN_t(b, crocus_group_index_to_bti(bt, group, index),
758 src->ssa->bit_size);
759 } else {
760 /* Indirect usage makes all the surfaces of the group to be available,
761 * so we can just add the base.
762 */
763 assert(bt->used_mask[group] == BITFIELD64_MASK(bt->sizes[group]));
764 bti = nir_iadd_imm(b, src->ssa, bt->offsets[group]);
765 }
766 nir_instr_rewrite_src(instr, src, nir_src_for_ssa(bti));
767 }
768
769 static void
mark_used_with_src(struct crocus_binding_table * bt,nir_src * src,enum crocus_surface_group group)770 mark_used_with_src(struct crocus_binding_table *bt, nir_src *src,
771 enum crocus_surface_group group)
772 {
773 assert(bt->sizes[group] > 0);
774
775 if (nir_src_is_const(*src)) {
776 uint64_t index = nir_src_as_uint(*src);
777 assert(index < bt->sizes[group]);
778 bt->used_mask[group] |= 1ull << index;
779 } else {
780 /* There's an indirect usage, we need all the surfaces. */
781 bt->used_mask[group] = BITFIELD64_MASK(bt->sizes[group]);
782 }
783 }
784
785 static bool
skip_compacting_binding_tables(void)786 skip_compacting_binding_tables(void)
787 {
788 static int skip = -1;
789 if (skip < 0)
790 skip = env_var_as_boolean("INTEL_DISABLE_COMPACT_BINDING_TABLE", false);
791 return skip;
792 }
793
794 /**
795 * Set up the binding table indices and apply to the shader.
796 */
797 static void
crocus_setup_binding_table(const struct intel_device_info * devinfo,struct nir_shader * nir,struct crocus_binding_table * bt,unsigned num_render_targets,unsigned num_system_values,unsigned num_cbufs,const struct brw_sampler_prog_key_data * key)798 crocus_setup_binding_table(const struct intel_device_info *devinfo,
799 struct nir_shader *nir,
800 struct crocus_binding_table *bt,
801 unsigned num_render_targets,
802 unsigned num_system_values,
803 unsigned num_cbufs,
804 const struct brw_sampler_prog_key_data *key)
805 {
806 const struct shader_info *info = &nir->info;
807
808 memset(bt, 0, sizeof(*bt));
809
810 /* Set the sizes for each surface group. For some groups, we already know
811 * upfront how many will be used, so mark them.
812 */
813 if (info->stage == MESA_SHADER_FRAGMENT) {
814 bt->sizes[CROCUS_SURFACE_GROUP_RENDER_TARGET] = num_render_targets;
815 /* All render targets used. */
816 bt->used_mask[CROCUS_SURFACE_GROUP_RENDER_TARGET] =
817 BITFIELD64_MASK(num_render_targets);
818
819 /* Setup render target read surface group in order to support non-coherent
820 * framebuffer fetch on Gfx7
821 */
822 if (devinfo->ver >= 6 && info->outputs_read) {
823 bt->sizes[CROCUS_SURFACE_GROUP_RENDER_TARGET_READ] = num_render_targets;
824 bt->used_mask[CROCUS_SURFACE_GROUP_RENDER_TARGET_READ] =
825 BITFIELD64_MASK(num_render_targets);
826 }
827 } else if (info->stage == MESA_SHADER_COMPUTE) {
828 bt->sizes[CROCUS_SURFACE_GROUP_CS_WORK_GROUPS] = 1;
829 } else if (info->stage == MESA_SHADER_GEOMETRY) {
830 /* In gfx6 we reserve the first BRW_MAX_SOL_BINDINGS entries for transform
831 * feedback surfaces.
832 */
833 if (devinfo->ver == 6) {
834 bt->sizes[CROCUS_SURFACE_GROUP_SOL] = BRW_MAX_SOL_BINDINGS;
835 bt->used_mask[CROCUS_SURFACE_GROUP_SOL] = (uint64_t)-1;
836 }
837 }
838
839 bt->sizes[CROCUS_SURFACE_GROUP_TEXTURE] = BITSET_LAST_BIT(info->textures_used);
840 bt->used_mask[CROCUS_SURFACE_GROUP_TEXTURE] = info->textures_used[0];
841
842 if (info->uses_texture_gather && devinfo->ver < 8) {
843 bt->sizes[CROCUS_SURFACE_GROUP_TEXTURE_GATHER] = BITSET_LAST_BIT(info->textures_used);
844 bt->used_mask[CROCUS_SURFACE_GROUP_TEXTURE_GATHER] = info->textures_used[0];
845 }
846
847 bt->sizes[CROCUS_SURFACE_GROUP_IMAGE] = info->num_images;
848
849 /* Allocate an extra slot in the UBO section for NIR constants.
850 * Binding table compaction will remove it if unnecessary.
851 *
852 * We don't include them in crocus_compiled_shader::num_cbufs because
853 * they are uploaded separately from shs->constbufs[], but from a shader
854 * point of view, they're another UBO (at the end of the section).
855 */
856 bt->sizes[CROCUS_SURFACE_GROUP_UBO] = num_cbufs + 1;
857
858 bt->sizes[CROCUS_SURFACE_GROUP_SSBO] = info->num_ssbos;
859
860 for (int i = 0; i < CROCUS_SURFACE_GROUP_COUNT; i++)
861 assert(bt->sizes[i] <= SURFACE_GROUP_MAX_ELEMENTS);
862
863 /* Mark surfaces used for the cases we don't have the information available
864 * upfront.
865 */
866 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
867 nir_foreach_block (block, impl) {
868 nir_foreach_instr (instr, block) {
869 if (instr->type != nir_instr_type_intrinsic)
870 continue;
871
872 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
873 switch (intrin->intrinsic) {
874 case nir_intrinsic_load_num_workgroups:
875 bt->used_mask[CROCUS_SURFACE_GROUP_CS_WORK_GROUPS] = 1;
876 break;
877
878 case nir_intrinsic_load_output:
879 if (devinfo->ver >= 6) {
880 mark_used_with_src(bt, &intrin->src[0],
881 CROCUS_SURFACE_GROUP_RENDER_TARGET_READ);
882 }
883 break;
884
885 case nir_intrinsic_image_size:
886 case nir_intrinsic_image_load:
887 case nir_intrinsic_image_store:
888 case nir_intrinsic_image_atomic_add:
889 case nir_intrinsic_image_atomic_imin:
890 case nir_intrinsic_image_atomic_umin:
891 case nir_intrinsic_image_atomic_imax:
892 case nir_intrinsic_image_atomic_umax:
893 case nir_intrinsic_image_atomic_and:
894 case nir_intrinsic_image_atomic_or:
895 case nir_intrinsic_image_atomic_xor:
896 case nir_intrinsic_image_atomic_exchange:
897 case nir_intrinsic_image_atomic_comp_swap:
898 case nir_intrinsic_image_load_raw_intel:
899 case nir_intrinsic_image_store_raw_intel:
900 mark_used_with_src(bt, &intrin->src[0], CROCUS_SURFACE_GROUP_IMAGE);
901 break;
902
903 case nir_intrinsic_load_ubo:
904 mark_used_with_src(bt, &intrin->src[0], CROCUS_SURFACE_GROUP_UBO);
905 break;
906
907 case nir_intrinsic_store_ssbo:
908 mark_used_with_src(bt, &intrin->src[1], CROCUS_SURFACE_GROUP_SSBO);
909 break;
910
911 case nir_intrinsic_get_ssbo_size:
912 case nir_intrinsic_ssbo_atomic_add:
913 case nir_intrinsic_ssbo_atomic_imin:
914 case nir_intrinsic_ssbo_atomic_umin:
915 case nir_intrinsic_ssbo_atomic_imax:
916 case nir_intrinsic_ssbo_atomic_umax:
917 case nir_intrinsic_ssbo_atomic_and:
918 case nir_intrinsic_ssbo_atomic_or:
919 case nir_intrinsic_ssbo_atomic_xor:
920 case nir_intrinsic_ssbo_atomic_exchange:
921 case nir_intrinsic_ssbo_atomic_comp_swap:
922 case nir_intrinsic_ssbo_atomic_fmin:
923 case nir_intrinsic_ssbo_atomic_fmax:
924 case nir_intrinsic_ssbo_atomic_fcomp_swap:
925 case nir_intrinsic_load_ssbo:
926 mark_used_with_src(bt, &intrin->src[0], CROCUS_SURFACE_GROUP_SSBO);
927 break;
928
929 default:
930 break;
931 }
932 }
933 }
934
935 /* When disable we just mark everything as used. */
936 if (unlikely(skip_compacting_binding_tables())) {
937 for (int i = 0; i < CROCUS_SURFACE_GROUP_COUNT; i++)
938 bt->used_mask[i] = BITFIELD64_MASK(bt->sizes[i]);
939 }
940
941 /* Calculate the offsets and the binding table size based on the used
942 * surfaces. After this point, the functions to go between "group indices"
943 * and binding table indices can be used.
944 */
945 uint32_t next = 0;
946 for (int i = 0; i < CROCUS_SURFACE_GROUP_COUNT; i++) {
947 if (bt->used_mask[i] != 0) {
948 bt->offsets[i] = next;
949 next += util_bitcount64(bt->used_mask[i]);
950 }
951 }
952 bt->size_bytes = next * 4;
953
954 if (INTEL_DEBUG(DEBUG_BT)) {
955 crocus_print_binding_table(stderr, gl_shader_stage_name(info->stage), bt);
956 }
957
958 /* Apply the binding table indices. The backend compiler is not expected
959 * to change those, as we haven't set any of the *_start entries in brw
960 * binding_table.
961 */
962 nir_builder b;
963 nir_builder_init(&b, impl);
964
965 nir_foreach_block (block, impl) {
966 nir_foreach_instr (instr, block) {
967 if (instr->type == nir_instr_type_tex) {
968 nir_tex_instr *tex = nir_instr_as_tex(instr);
969 bool is_gather = devinfo->ver < 8 && tex->op == nir_texop_tg4;
970
971 /* rewrite the tg4 component from green to blue before replacing the
972 texture index */
973 if (devinfo->verx10 == 70) {
974 if (tex->component == 1)
975 if (key->gather_channel_quirk_mask & (1 << tex->texture_index))
976 tex->component = 2;
977 }
978
979 if (is_gather && devinfo->ver == 6 && key->gfx6_gather_wa[tex->texture_index]) {
980 b.cursor = nir_after_instr(instr);
981 enum gfx6_gather_sampler_wa wa = key->gfx6_gather_wa[tex->texture_index];
982 int width = (wa & WA_8BIT) ? 8 : 16;
983
984 nir_ssa_def *val = nir_fmul_imm(&b, &tex->dest.ssa, (1 << width) - 1);
985 val = nir_f2u32(&b, val);
986 if (wa & WA_SIGN) {
987 val = nir_ishl(&b, val, nir_imm_int(&b, 32 - width));
988 val = nir_ishr(&b, val, nir_imm_int(&b, 32 - width));
989 }
990 nir_ssa_def_rewrite_uses_after(&tex->dest.ssa, val, val->parent_instr);
991 }
992
993 tex->texture_index =
994 crocus_group_index_to_bti(bt, is_gather ? CROCUS_SURFACE_GROUP_TEXTURE_GATHER : CROCUS_SURFACE_GROUP_TEXTURE,
995 tex->texture_index);
996 continue;
997 }
998
999 if (instr->type != nir_instr_type_intrinsic)
1000 continue;
1001
1002 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
1003 switch (intrin->intrinsic) {
1004 case nir_intrinsic_image_size:
1005 case nir_intrinsic_image_load:
1006 case nir_intrinsic_image_store:
1007 case nir_intrinsic_image_atomic_add:
1008 case nir_intrinsic_image_atomic_imin:
1009 case nir_intrinsic_image_atomic_umin:
1010 case nir_intrinsic_image_atomic_imax:
1011 case nir_intrinsic_image_atomic_umax:
1012 case nir_intrinsic_image_atomic_and:
1013 case nir_intrinsic_image_atomic_or:
1014 case nir_intrinsic_image_atomic_xor:
1015 case nir_intrinsic_image_atomic_exchange:
1016 case nir_intrinsic_image_atomic_comp_swap:
1017 case nir_intrinsic_image_load_raw_intel:
1018 case nir_intrinsic_image_store_raw_intel:
1019 rewrite_src_with_bti(&b, bt, instr, &intrin->src[0],
1020 CROCUS_SURFACE_GROUP_IMAGE);
1021 break;
1022
1023 case nir_intrinsic_load_ubo:
1024 rewrite_src_with_bti(&b, bt, instr, &intrin->src[0],
1025 CROCUS_SURFACE_GROUP_UBO);
1026 break;
1027
1028 case nir_intrinsic_store_ssbo:
1029 rewrite_src_with_bti(&b, bt, instr, &intrin->src[1],
1030 CROCUS_SURFACE_GROUP_SSBO);
1031 break;
1032
1033 case nir_intrinsic_load_output:
1034 if (devinfo->ver >= 6) {
1035 rewrite_src_with_bti(&b, bt, instr, &intrin->src[0],
1036 CROCUS_SURFACE_GROUP_RENDER_TARGET_READ);
1037 }
1038 break;
1039
1040 case nir_intrinsic_get_ssbo_size:
1041 case nir_intrinsic_ssbo_atomic_add:
1042 case nir_intrinsic_ssbo_atomic_imin:
1043 case nir_intrinsic_ssbo_atomic_umin:
1044 case nir_intrinsic_ssbo_atomic_imax:
1045 case nir_intrinsic_ssbo_atomic_umax:
1046 case nir_intrinsic_ssbo_atomic_and:
1047 case nir_intrinsic_ssbo_atomic_or:
1048 case nir_intrinsic_ssbo_atomic_xor:
1049 case nir_intrinsic_ssbo_atomic_exchange:
1050 case nir_intrinsic_ssbo_atomic_comp_swap:
1051 case nir_intrinsic_ssbo_atomic_fmin:
1052 case nir_intrinsic_ssbo_atomic_fmax:
1053 case nir_intrinsic_ssbo_atomic_fcomp_swap:
1054 case nir_intrinsic_load_ssbo:
1055 rewrite_src_with_bti(&b, bt, instr, &intrin->src[0],
1056 CROCUS_SURFACE_GROUP_SSBO);
1057 break;
1058
1059 default:
1060 break;
1061 }
1062 }
1063 }
1064 }
1065
1066 static void
crocus_debug_recompile(struct crocus_context * ice,struct shader_info * info,const struct brw_base_prog_key * key)1067 crocus_debug_recompile(struct crocus_context *ice,
1068 struct shader_info *info,
1069 const struct brw_base_prog_key *key)
1070 {
1071 struct crocus_screen *screen = (struct crocus_screen *) ice->ctx.screen;
1072 const struct brw_compiler *c = screen->compiler;
1073
1074 if (!info)
1075 return;
1076
1077 brw_shader_perf_log(c, &ice->dbg, "Recompiling %s shader for program %s: %s\n",
1078 _mesa_shader_stage_to_string(info->stage),
1079 info->name ? info->name : "(no identifier)",
1080 info->label ? info->label : "");
1081
1082 const void *old_key =
1083 crocus_find_previous_compile(ice, info->stage, key->program_string_id);
1084
1085 brw_debug_key_recompile(c, &ice->dbg, info->stage, old_key, key);
1086 }
1087
1088 /**
1089 * Get the shader for the last enabled geometry stage.
1090 *
1091 * This stage is the one which will feed stream output and the rasterizer.
1092 */
1093 static gl_shader_stage
last_vue_stage(struct crocus_context * ice)1094 last_vue_stage(struct crocus_context *ice)
1095 {
1096 if (ice->shaders.uncompiled[MESA_SHADER_GEOMETRY])
1097 return MESA_SHADER_GEOMETRY;
1098
1099 if (ice->shaders.uncompiled[MESA_SHADER_TESS_EVAL])
1100 return MESA_SHADER_TESS_EVAL;
1101
1102 return MESA_SHADER_VERTEX;
1103 }
1104
1105 static GLbitfield64
crocus_vs_outputs_written(struct crocus_context * ice,const struct brw_vs_prog_key * key,GLbitfield64 user_varyings)1106 crocus_vs_outputs_written(struct crocus_context *ice,
1107 const struct brw_vs_prog_key *key,
1108 GLbitfield64 user_varyings)
1109 {
1110 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1111 const struct intel_device_info *devinfo = &screen->devinfo;
1112 GLbitfield64 outputs_written = user_varyings;
1113
1114 if (devinfo->ver < 6) {
1115
1116 if (key->copy_edgeflag)
1117 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
1118
1119 /* Put dummy slots into the VUE for the SF to put the replaced
1120 * point sprite coords in. We shouldn't need these dummy slots,
1121 * which take up precious URB space, but it would mean that the SF
1122 * doesn't get nice aligned pairs of input coords into output
1123 * coords, which would be a pain to handle.
1124 */
1125 for (unsigned i = 0; i < 8; i++) {
1126 if (key->point_coord_replace & (1 << i))
1127 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
1128 }
1129
1130 /* if back colors are written, allocate slots for front colors too */
1131 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
1132 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0);
1133 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
1134 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1);
1135 }
1136
1137 /* In order for legacy clipping to work, we need to populate the clip
1138 * distance varying slots whenever clipping is enabled, even if the vertex
1139 * shader doesn't write to gl_ClipDistance.
1140 */
1141 if (key->nr_userclip_plane_consts > 0) {
1142 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0);
1143 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
1144 }
1145
1146 return outputs_written;
1147 }
1148
1149 /*
1150 * If no edgeflags come from the user, gen4/5
1151 * require giving the clip shader a default edgeflag.
1152 *
1153 * This will always be 1.0.
1154 */
1155 static void
crocus_lower_default_edgeflags(struct nir_shader * nir)1156 crocus_lower_default_edgeflags(struct nir_shader *nir)
1157 {
1158 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
1159
1160 nir_builder b;
1161 nir_builder_init(&b, impl);
1162
1163 b.cursor = nir_after_cf_list(&b.impl->body);
1164 nir_variable *var = nir_variable_create(nir, nir_var_shader_out,
1165 glsl_float_type(),
1166 "edgeflag");
1167 var->data.location = VARYING_SLOT_EDGE;
1168 nir_store_var(&b, var, nir_imm_float(&b, 1.0), 0x1);
1169 }
1170
1171 /**
1172 * Compile a vertex shader, and upload the assembly.
1173 */
1174 static struct crocus_compiled_shader *
crocus_compile_vs(struct crocus_context * ice,struct crocus_uncompiled_shader * ish,const struct brw_vs_prog_key * key)1175 crocus_compile_vs(struct crocus_context *ice,
1176 struct crocus_uncompiled_shader *ish,
1177 const struct brw_vs_prog_key *key)
1178 {
1179 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1180 const struct brw_compiler *compiler = screen->compiler;
1181 const struct intel_device_info *devinfo = &screen->devinfo;
1182 void *mem_ctx = ralloc_context(NULL);
1183 struct brw_vs_prog_data *vs_prog_data =
1184 rzalloc(mem_ctx, struct brw_vs_prog_data);
1185 struct brw_vue_prog_data *vue_prog_data = &vs_prog_data->base;
1186 struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
1187 enum brw_param_builtin *system_values;
1188 unsigned num_system_values;
1189 unsigned num_cbufs;
1190
1191 nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir);
1192
1193 if (key->nr_userclip_plane_consts) {
1194 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
1195 nir_lower_clip_vs(nir, (1 << key->nr_userclip_plane_consts) - 1, true,
1196 false, NULL);
1197 nir_lower_io_to_temporaries(nir, impl, true, false);
1198 nir_lower_global_vars_to_local(nir);
1199 nir_lower_vars_to_ssa(nir);
1200 nir_shader_gather_info(nir, impl);
1201 }
1202
1203 if (key->clamp_pointsize)
1204 nir_lower_point_size(nir, 1.0, 255.0);
1205
1206 prog_data->use_alt_mode = nir->info.is_arb_asm;
1207
1208 crocus_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
1209 &num_system_values, &num_cbufs);
1210
1211 crocus_lower_swizzles(nir, &key->base.tex);
1212
1213 if (devinfo->ver <= 5 &&
1214 !(nir->info.inputs_read & BITFIELD64_BIT(VERT_ATTRIB_EDGEFLAG)))
1215 crocus_lower_default_edgeflags(nir);
1216
1217 struct crocus_binding_table bt;
1218 crocus_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0,
1219 num_system_values, num_cbufs, &key->base.tex);
1220
1221 if (can_push_ubo(devinfo))
1222 brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges);
1223
1224 uint64_t outputs_written =
1225 crocus_vs_outputs_written(ice, key, nir->info.outputs_written);
1226 brw_compute_vue_map(devinfo,
1227 &vue_prog_data->vue_map, outputs_written,
1228 nir->info.separate_shader, /* pos slots */ 1);
1229
1230 /* Don't tell the backend about our clip plane constants, we've already
1231 * lowered them in NIR and we don't want it doing it again.
1232 */
1233 struct brw_vs_prog_key key_no_ucp = *key;
1234 key_no_ucp.nr_userclip_plane_consts = 0;
1235 key_no_ucp.copy_edgeflag = false;
1236 crocus_sanitize_tex_key(&key_no_ucp.base.tex);
1237
1238 struct brw_compile_vs_params params = {
1239 .nir = nir,
1240 .key = &key_no_ucp,
1241 .prog_data = vs_prog_data,
1242 .edgeflag_is_last = devinfo->ver < 6,
1243 .log_data = &ice->dbg,
1244 };
1245 const unsigned *program =
1246 brw_compile_vs(compiler, mem_ctx, ¶ms);
1247 if (program == NULL) {
1248 dbg_printf("Failed to compile vertex shader: %s\n", params.error_str);
1249 ralloc_free(mem_ctx);
1250 return false;
1251 }
1252
1253 if (ish->compiled_once) {
1254 crocus_debug_recompile(ice, &nir->info, &key->base);
1255 } else {
1256 ish->compiled_once = true;
1257 }
1258
1259 uint32_t *so_decls = NULL;
1260 if (devinfo->ver > 6)
1261 so_decls = screen->vtbl.create_so_decl_list(&ish->stream_output,
1262 &vue_prog_data->vue_map);
1263
1264 struct crocus_compiled_shader *shader =
1265 crocus_upload_shader(ice, CROCUS_CACHE_VS, sizeof(*key), key, program,
1266 prog_data->program_size,
1267 prog_data, sizeof(*vs_prog_data), so_decls,
1268 system_values, num_system_values,
1269 num_cbufs, &bt);
1270
1271 crocus_disk_cache_store(screen->disk_cache, ish, shader,
1272 ice->shaders.cache_bo_map,
1273 key, sizeof(*key));
1274
1275 ralloc_free(mem_ctx);
1276 return shader;
1277 }
1278
1279 /**
1280 * Update the current vertex shader variant.
1281 *
1282 * Fill out the key, look in the cache, compile and bind if needed.
1283 */
1284 static void
crocus_update_compiled_vs(struct crocus_context * ice)1285 crocus_update_compiled_vs(struct crocus_context *ice)
1286 {
1287 struct crocus_shader_state *shs = &ice->state.shaders[MESA_SHADER_VERTEX];
1288 struct crocus_uncompiled_shader *ish =
1289 ice->shaders.uncompiled[MESA_SHADER_VERTEX];
1290 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1291 const struct intel_device_info *devinfo = &screen->devinfo;
1292 struct brw_vs_prog_key key = { KEY_INIT() };
1293
1294 if (ish->nos & (1ull << CROCUS_NOS_TEXTURES))
1295 crocus_populate_sampler_prog_key_data(ice, devinfo, MESA_SHADER_VERTEX, ish,
1296 ish->nir->info.uses_texture_gather, &key.base.tex);
1297 screen->vtbl.populate_vs_key(ice, &ish->nir->info, last_vue_stage(ice), &key);
1298
1299 struct crocus_compiled_shader *old = ice->shaders.prog[CROCUS_CACHE_VS];
1300 struct crocus_compiled_shader *shader =
1301 crocus_find_cached_shader(ice, CROCUS_CACHE_VS, sizeof(key), &key);
1302
1303 if (!shader)
1304 shader = crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key));
1305
1306 if (!shader)
1307 shader = crocus_compile_vs(ice, ish, &key);
1308
1309 if (old != shader) {
1310 ice->shaders.prog[CROCUS_CACHE_VS] = shader;
1311 if (devinfo->ver == 8)
1312 ice->state.dirty |= CROCUS_DIRTY_GEN8_VF_SGVS;
1313 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_VS |
1314 CROCUS_STAGE_DIRTY_BINDINGS_VS |
1315 CROCUS_STAGE_DIRTY_CONSTANTS_VS;
1316 shs->sysvals_need_upload = true;
1317
1318 const struct brw_vs_prog_data *vs_prog_data =
1319 (void *) shader->prog_data;
1320 const bool uses_draw_params = vs_prog_data->uses_firstvertex ||
1321 vs_prog_data->uses_baseinstance;
1322 const bool uses_derived_draw_params = vs_prog_data->uses_drawid ||
1323 vs_prog_data->uses_is_indexed_draw;
1324 const bool needs_sgvs_element = uses_draw_params ||
1325 vs_prog_data->uses_instanceid ||
1326 vs_prog_data->uses_vertexid;
1327
1328 if (ice->state.vs_uses_draw_params != uses_draw_params ||
1329 ice->state.vs_uses_derived_draw_params != uses_derived_draw_params ||
1330 ice->state.vs_needs_edge_flag != ish->needs_edge_flag ||
1331 ice->state.vs_uses_vertexid != vs_prog_data->uses_vertexid ||
1332 ice->state.vs_uses_instanceid != vs_prog_data->uses_instanceid) {
1333 ice->state.dirty |= CROCUS_DIRTY_VERTEX_BUFFERS |
1334 CROCUS_DIRTY_VERTEX_ELEMENTS;
1335 }
1336 ice->state.vs_uses_draw_params = uses_draw_params;
1337 ice->state.vs_uses_derived_draw_params = uses_derived_draw_params;
1338 ice->state.vs_needs_sgvs_element = needs_sgvs_element;
1339 ice->state.vs_needs_edge_flag = ish->needs_edge_flag;
1340 ice->state.vs_uses_vertexid = vs_prog_data->uses_vertexid;
1341 ice->state.vs_uses_instanceid = vs_prog_data->uses_instanceid;
1342 }
1343 }
1344
1345 /**
1346 * Get the shader_info for a given stage, or NULL if the stage is disabled.
1347 */
1348 const struct shader_info *
crocus_get_shader_info(const struct crocus_context * ice,gl_shader_stage stage)1349 crocus_get_shader_info(const struct crocus_context *ice, gl_shader_stage stage)
1350 {
1351 const struct crocus_uncompiled_shader *ish = ice->shaders.uncompiled[stage];
1352
1353 if (!ish)
1354 return NULL;
1355
1356 const nir_shader *nir = ish->nir;
1357 return &nir->info;
1358 }
1359
1360 /**
1361 * Get the union of TCS output and TES input slots.
1362 *
1363 * TCS and TES need to agree on a common URB entry layout. In particular,
1364 * the data for all patch vertices is stored in a single URB entry (unlike
1365 * GS which has one entry per input vertex). This means that per-vertex
1366 * array indexing needs a stride.
1367 *
1368 * SSO requires locations to match, but doesn't require the number of
1369 * outputs/inputs to match (in fact, the TCS often has extra outputs).
1370 * So, we need to take the extra step of unifying these on the fly.
1371 */
1372 static void
get_unified_tess_slots(const struct crocus_context * ice,uint64_t * per_vertex_slots,uint32_t * per_patch_slots)1373 get_unified_tess_slots(const struct crocus_context *ice,
1374 uint64_t *per_vertex_slots,
1375 uint32_t *per_patch_slots)
1376 {
1377 const struct shader_info *tcs =
1378 crocus_get_shader_info(ice, MESA_SHADER_TESS_CTRL);
1379 const struct shader_info *tes =
1380 crocus_get_shader_info(ice, MESA_SHADER_TESS_EVAL);
1381
1382 *per_vertex_slots = tes->inputs_read;
1383 *per_patch_slots = tes->patch_inputs_read;
1384
1385 if (tcs) {
1386 *per_vertex_slots |= tcs->outputs_written;
1387 *per_patch_slots |= tcs->patch_outputs_written;
1388 }
1389 }
1390
1391 /**
1392 * Compile a tessellation control shader, and upload the assembly.
1393 */
1394 static struct crocus_compiled_shader *
crocus_compile_tcs(struct crocus_context * ice,struct crocus_uncompiled_shader * ish,const struct brw_tcs_prog_key * key)1395 crocus_compile_tcs(struct crocus_context *ice,
1396 struct crocus_uncompiled_shader *ish,
1397 const struct brw_tcs_prog_key *key)
1398 {
1399 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1400 const struct brw_compiler *compiler = screen->compiler;
1401 const struct nir_shader_compiler_options *options =
1402 compiler->nir_options[MESA_SHADER_TESS_CTRL];
1403 void *mem_ctx = ralloc_context(NULL);
1404 struct brw_tcs_prog_data *tcs_prog_data =
1405 rzalloc(mem_ctx, struct brw_tcs_prog_data);
1406 struct brw_vue_prog_data *vue_prog_data = &tcs_prog_data->base;
1407 struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
1408 const struct intel_device_info *devinfo = &screen->devinfo;
1409 enum brw_param_builtin *system_values = NULL;
1410 unsigned num_system_values = 0;
1411 unsigned num_cbufs = 0;
1412
1413 nir_shader *nir;
1414
1415 struct crocus_binding_table bt;
1416
1417 if (ish) {
1418 nir = nir_shader_clone(mem_ctx, ish->nir);
1419
1420 crocus_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
1421 &num_system_values, &num_cbufs);
1422
1423 crocus_lower_swizzles(nir, &key->base.tex);
1424 crocus_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0,
1425 num_system_values, num_cbufs, &key->base.tex);
1426 if (can_push_ubo(devinfo))
1427 brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges);
1428 } else {
1429 nir = brw_nir_create_passthrough_tcs(mem_ctx, compiler, options, key);
1430
1431 /* Reserve space for passing the default tess levels as constants. */
1432 num_cbufs = 1;
1433 num_system_values = 8;
1434 system_values =
1435 rzalloc_array(mem_ctx, enum brw_param_builtin, num_system_values);
1436 prog_data->param = rzalloc_array(mem_ctx, uint32_t, num_system_values);
1437 prog_data->nr_params = num_system_values;
1438
1439 if (key->_tes_primitive_mode == TESS_PRIMITIVE_QUADS) {
1440 for (int i = 0; i < 4; i++)
1441 system_values[7 - i] = BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X + i;
1442
1443 system_values[3] = BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_X;
1444 system_values[2] = BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_Y;
1445 } else if (key->_tes_primitive_mode == TESS_PRIMITIVE_TRIANGLES) {
1446 for (int i = 0; i < 3; i++)
1447 system_values[7 - i] = BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X + i;
1448
1449 system_values[4] = BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_X;
1450 } else {
1451 assert(key->_tes_primitive_mode == TESS_PRIMITIVE_ISOLINES);
1452 system_values[7] = BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_Y;
1453 system_values[6] = BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X;
1454 }
1455
1456 /* Manually setup the TCS binding table. */
1457 memset(&bt, 0, sizeof(bt));
1458 bt.sizes[CROCUS_SURFACE_GROUP_UBO] = 1;
1459 bt.used_mask[CROCUS_SURFACE_GROUP_UBO] = 1;
1460 bt.size_bytes = 4;
1461
1462 prog_data->ubo_ranges[0].length = 1;
1463 }
1464
1465 struct brw_tcs_prog_key key_clean = *key;
1466 crocus_sanitize_tex_key(&key_clean.base.tex);
1467
1468 struct brw_compile_tcs_params params = {
1469 .nir = nir,
1470 .key = &key_clean,
1471 .prog_data = tcs_prog_data,
1472 .log_data = &ice->dbg,
1473 };
1474
1475 const unsigned *program = brw_compile_tcs(compiler, mem_ctx, ¶ms);
1476 if (program == NULL) {
1477 dbg_printf("Failed to compile control shader: %s\n", params.error_str);
1478 ralloc_free(mem_ctx);
1479 return false;
1480 }
1481
1482 if (ish) {
1483 if (ish->compiled_once) {
1484 crocus_debug_recompile(ice, &nir->info, &key->base);
1485 } else {
1486 ish->compiled_once = true;
1487 }
1488 }
1489
1490 struct crocus_compiled_shader *shader =
1491 crocus_upload_shader(ice, CROCUS_CACHE_TCS, sizeof(*key), key, program,
1492 prog_data->program_size,
1493 prog_data, sizeof(*tcs_prog_data), NULL,
1494 system_values, num_system_values,
1495 num_cbufs, &bt);
1496
1497 if (ish)
1498 crocus_disk_cache_store(screen->disk_cache, ish, shader,
1499 ice->shaders.cache_bo_map,
1500 key, sizeof(*key));
1501
1502 ralloc_free(mem_ctx);
1503 return shader;
1504 }
1505
1506 /**
1507 * Update the current tessellation control shader variant.
1508 *
1509 * Fill out the key, look in the cache, compile and bind if needed.
1510 */
1511 static void
crocus_update_compiled_tcs(struct crocus_context * ice)1512 crocus_update_compiled_tcs(struct crocus_context *ice)
1513 {
1514 struct crocus_shader_state *shs = &ice->state.shaders[MESA_SHADER_TESS_CTRL];
1515 struct crocus_uncompiled_shader *tcs =
1516 ice->shaders.uncompiled[MESA_SHADER_TESS_CTRL];
1517 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1518 const struct intel_device_info *devinfo = &screen->devinfo;
1519
1520 const struct shader_info *tes_info =
1521 crocus_get_shader_info(ice, MESA_SHADER_TESS_EVAL);
1522 struct brw_tcs_prog_key key = {
1523 KEY_INIT_NO_ID(),
1524 .base.program_string_id = tcs ? tcs->program_id : 0,
1525 ._tes_primitive_mode = tes_info->tess._primitive_mode,
1526 .input_vertices = ice->state.vertices_per_patch,
1527 .quads_workaround = tes_info->tess._primitive_mode == TESS_PRIMITIVE_QUADS &&
1528 tes_info->tess.spacing == TESS_SPACING_EQUAL,
1529 };
1530
1531 if (tcs && tcs->nos & (1ull << CROCUS_NOS_TEXTURES))
1532 crocus_populate_sampler_prog_key_data(ice, devinfo, MESA_SHADER_TESS_CTRL, tcs,
1533 tcs->nir->info.uses_texture_gather, &key.base.tex);
1534 get_unified_tess_slots(ice, &key.outputs_written,
1535 &key.patch_outputs_written);
1536 screen->vtbl.populate_tcs_key(ice, &key);
1537
1538 struct crocus_compiled_shader *old = ice->shaders.prog[CROCUS_CACHE_TCS];
1539 struct crocus_compiled_shader *shader =
1540 crocus_find_cached_shader(ice, CROCUS_CACHE_TCS, sizeof(key), &key);
1541
1542 if (tcs && !shader)
1543 shader = crocus_disk_cache_retrieve(ice, tcs, &key, sizeof(key));
1544
1545 if (!shader)
1546 shader = crocus_compile_tcs(ice, tcs, &key);
1547
1548 if (old != shader) {
1549 ice->shaders.prog[CROCUS_CACHE_TCS] = shader;
1550 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_TCS |
1551 CROCUS_STAGE_DIRTY_BINDINGS_TCS |
1552 CROCUS_STAGE_DIRTY_CONSTANTS_TCS;
1553 shs->sysvals_need_upload = true;
1554 }
1555 }
1556
1557 /**
1558 * Compile a tessellation evaluation shader, and upload the assembly.
1559 */
1560 static struct crocus_compiled_shader *
crocus_compile_tes(struct crocus_context * ice,struct crocus_uncompiled_shader * ish,const struct brw_tes_prog_key * key)1561 crocus_compile_tes(struct crocus_context *ice,
1562 struct crocus_uncompiled_shader *ish,
1563 const struct brw_tes_prog_key *key)
1564 {
1565 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1566 const struct brw_compiler *compiler = screen->compiler;
1567 void *mem_ctx = ralloc_context(NULL);
1568 struct brw_tes_prog_data *tes_prog_data =
1569 rzalloc(mem_ctx, struct brw_tes_prog_data);
1570 struct brw_vue_prog_data *vue_prog_data = &tes_prog_data->base;
1571 struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
1572 enum brw_param_builtin *system_values;
1573 const struct intel_device_info *devinfo = &screen->devinfo;
1574 unsigned num_system_values;
1575 unsigned num_cbufs;
1576
1577 nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir);
1578
1579 if (key->nr_userclip_plane_consts) {
1580 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
1581 nir_lower_clip_vs(nir, (1 << key->nr_userclip_plane_consts) - 1, true,
1582 false, NULL);
1583 nir_lower_io_to_temporaries(nir, impl, true, false);
1584 nir_lower_global_vars_to_local(nir);
1585 nir_lower_vars_to_ssa(nir);
1586 nir_shader_gather_info(nir, impl);
1587 }
1588
1589 if (key->clamp_pointsize)
1590 nir_lower_point_size(nir, 1.0, 255.0);
1591
1592 crocus_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
1593 &num_system_values, &num_cbufs);
1594 crocus_lower_swizzles(nir, &key->base.tex);
1595 struct crocus_binding_table bt;
1596 crocus_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0,
1597 num_system_values, num_cbufs, &key->base.tex);
1598
1599 if (can_push_ubo(devinfo))
1600 brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges);
1601
1602 struct brw_vue_map input_vue_map;
1603 brw_compute_tess_vue_map(&input_vue_map, key->inputs_read,
1604 key->patch_inputs_read);
1605
1606 struct brw_tes_prog_key key_clean = *key;
1607 crocus_sanitize_tex_key(&key_clean.base.tex);
1608
1609 struct brw_compile_tes_params params = {
1610 .nir = nir,
1611 .key = &key_clean,
1612 .prog_data = tes_prog_data,
1613 .input_vue_map = &input_vue_map,
1614 .log_data = &ice->dbg,
1615 };
1616
1617 const unsigned *program = brw_compile_tes(compiler, mem_ctx, ¶ms);
1618 if (program == NULL) {
1619 dbg_printf("Failed to compile evaluation shader: %s\n", params.error_str);
1620 ralloc_free(mem_ctx);
1621 return false;
1622 }
1623
1624 if (ish->compiled_once) {
1625 crocus_debug_recompile(ice, &nir->info, &key->base);
1626 } else {
1627 ish->compiled_once = true;
1628 }
1629
1630 uint32_t *so_decls = NULL;
1631 if (devinfo->ver > 6)
1632 so_decls = screen->vtbl.create_so_decl_list(&ish->stream_output,
1633 &vue_prog_data->vue_map);
1634
1635 struct crocus_compiled_shader *shader =
1636 crocus_upload_shader(ice, CROCUS_CACHE_TES, sizeof(*key), key, program,
1637 prog_data->program_size,
1638 prog_data, sizeof(*tes_prog_data), so_decls,
1639 system_values, num_system_values,
1640 num_cbufs, &bt);
1641
1642 crocus_disk_cache_store(screen->disk_cache, ish, shader,
1643 ice->shaders.cache_bo_map,
1644 key, sizeof(*key));
1645
1646 ralloc_free(mem_ctx);
1647 return shader;
1648 }
1649
1650 /**
1651 * Update the current tessellation evaluation shader variant.
1652 *
1653 * Fill out the key, look in the cache, compile and bind if needed.
1654 */
1655 static void
crocus_update_compiled_tes(struct crocus_context * ice)1656 crocus_update_compiled_tes(struct crocus_context *ice)
1657 {
1658 struct crocus_shader_state *shs = &ice->state.shaders[MESA_SHADER_TESS_EVAL];
1659 struct crocus_uncompiled_shader *ish =
1660 ice->shaders.uncompiled[MESA_SHADER_TESS_EVAL];
1661 struct brw_tes_prog_key key = { KEY_INIT() };
1662 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1663 const struct intel_device_info *devinfo = &screen->devinfo;
1664
1665 if (ish->nos & (1ull << CROCUS_NOS_TEXTURES))
1666 crocus_populate_sampler_prog_key_data(ice, devinfo, MESA_SHADER_TESS_EVAL, ish,
1667 ish->nir->info.uses_texture_gather, &key.base.tex);
1668 get_unified_tess_slots(ice, &key.inputs_read, &key.patch_inputs_read);
1669 screen->vtbl.populate_tes_key(ice, &ish->nir->info, last_vue_stage(ice), &key);
1670
1671 struct crocus_compiled_shader *old = ice->shaders.prog[CROCUS_CACHE_TES];
1672 struct crocus_compiled_shader *shader =
1673 crocus_find_cached_shader(ice, CROCUS_CACHE_TES, sizeof(key), &key);
1674
1675 if (!shader)
1676 shader = crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key));
1677
1678 if (!shader)
1679 shader = crocus_compile_tes(ice, ish, &key);
1680
1681 if (old != shader) {
1682 ice->shaders.prog[CROCUS_CACHE_TES] = shader;
1683 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_TES |
1684 CROCUS_STAGE_DIRTY_BINDINGS_TES |
1685 CROCUS_STAGE_DIRTY_CONSTANTS_TES;
1686 shs->sysvals_need_upload = true;
1687 }
1688
1689 /* TODO: Could compare and avoid flagging this. */
1690 const struct shader_info *tes_info = &ish->nir->info;
1691 if (BITSET_TEST(tes_info->system_values_read, SYSTEM_VALUE_VERTICES_IN)) {
1692 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_CONSTANTS_TES;
1693 ice->state.shaders[MESA_SHADER_TESS_EVAL].sysvals_need_upload = true;
1694 }
1695 }
1696
1697 /**
1698 * Compile a geometry shader, and upload the assembly.
1699 */
1700 static struct crocus_compiled_shader *
crocus_compile_gs(struct crocus_context * ice,struct crocus_uncompiled_shader * ish,const struct brw_gs_prog_key * key)1701 crocus_compile_gs(struct crocus_context *ice,
1702 struct crocus_uncompiled_shader *ish,
1703 const struct brw_gs_prog_key *key)
1704 {
1705 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1706 const struct brw_compiler *compiler = screen->compiler;
1707 const struct intel_device_info *devinfo = &screen->devinfo;
1708 void *mem_ctx = ralloc_context(NULL);
1709 struct brw_gs_prog_data *gs_prog_data =
1710 rzalloc(mem_ctx, struct brw_gs_prog_data);
1711 struct brw_vue_prog_data *vue_prog_data = &gs_prog_data->base;
1712 struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
1713 enum brw_param_builtin *system_values;
1714 unsigned num_system_values;
1715 unsigned num_cbufs;
1716
1717 nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir);
1718
1719 if (key->nr_userclip_plane_consts) {
1720 nir_function_impl *impl = nir_shader_get_entrypoint(nir);
1721 nir_lower_clip_gs(nir, (1 << key->nr_userclip_plane_consts) - 1, false,
1722 NULL);
1723 nir_lower_io_to_temporaries(nir, impl, true, false);
1724 nir_lower_global_vars_to_local(nir);
1725 nir_lower_vars_to_ssa(nir);
1726 nir_shader_gather_info(nir, impl);
1727 }
1728
1729 if (key->clamp_pointsize)
1730 nir_lower_point_size(nir, 1.0, 255.0);
1731
1732 crocus_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
1733 &num_system_values, &num_cbufs);
1734 crocus_lower_swizzles(nir, &key->base.tex);
1735 struct crocus_binding_table bt;
1736 crocus_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0,
1737 num_system_values, num_cbufs, &key->base.tex);
1738
1739 if (can_push_ubo(devinfo))
1740 brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges);
1741
1742 brw_compute_vue_map(devinfo,
1743 &vue_prog_data->vue_map, nir->info.outputs_written,
1744 nir->info.separate_shader, /* pos slots */ 1);
1745
1746 if (devinfo->ver == 6)
1747 gfx6_gs_xfb_setup(&ish->stream_output, gs_prog_data);
1748 struct brw_gs_prog_key key_clean = *key;
1749 crocus_sanitize_tex_key(&key_clean.base.tex);
1750
1751 struct brw_compile_gs_params params = {
1752 .nir = nir,
1753 .key = &key_clean,
1754 .prog_data = gs_prog_data,
1755 .log_data = &ice->dbg,
1756 };
1757
1758 const unsigned *program = brw_compile_gs(compiler, mem_ctx, ¶ms);
1759 if (program == NULL) {
1760 dbg_printf("Failed to compile geometry shader: %s\n", params.error_str);
1761 ralloc_free(mem_ctx);
1762 return false;
1763 }
1764
1765 if (ish->compiled_once) {
1766 crocus_debug_recompile(ice, &nir->info, &key->base);
1767 } else {
1768 ish->compiled_once = true;
1769 }
1770
1771 uint32_t *so_decls = NULL;
1772 if (devinfo->ver > 6)
1773 so_decls = screen->vtbl.create_so_decl_list(&ish->stream_output,
1774 &vue_prog_data->vue_map);
1775
1776 struct crocus_compiled_shader *shader =
1777 crocus_upload_shader(ice, CROCUS_CACHE_GS, sizeof(*key), key, program,
1778 prog_data->program_size,
1779 prog_data, sizeof(*gs_prog_data), so_decls,
1780 system_values, num_system_values,
1781 num_cbufs, &bt);
1782
1783 crocus_disk_cache_store(screen->disk_cache, ish, shader,
1784 ice->shaders.cache_bo_map,
1785 key, sizeof(*key));
1786
1787 ralloc_free(mem_ctx);
1788 return shader;
1789 }
1790
1791 /**
1792 * Update the current geometry shader variant.
1793 *
1794 * Fill out the key, look in the cache, compile and bind if needed.
1795 */
1796 static void
crocus_update_compiled_gs(struct crocus_context * ice)1797 crocus_update_compiled_gs(struct crocus_context *ice)
1798 {
1799 struct crocus_shader_state *shs = &ice->state.shaders[MESA_SHADER_GEOMETRY];
1800 struct crocus_uncompiled_shader *ish =
1801 ice->shaders.uncompiled[MESA_SHADER_GEOMETRY];
1802 struct crocus_compiled_shader *old = ice->shaders.prog[CROCUS_CACHE_GS];
1803 struct crocus_compiled_shader *shader = NULL;
1804
1805 if (ish) {
1806 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1807 const struct intel_device_info *devinfo = &screen->devinfo;
1808 struct brw_gs_prog_key key = { KEY_INIT() };
1809
1810 if (ish->nos & (1ull << CROCUS_NOS_TEXTURES))
1811 crocus_populate_sampler_prog_key_data(ice, devinfo, MESA_SHADER_GEOMETRY, ish,
1812 ish->nir->info.uses_texture_gather, &key.base.tex);
1813 screen->vtbl.populate_gs_key(ice, &ish->nir->info, last_vue_stage(ice), &key);
1814
1815 shader =
1816 crocus_find_cached_shader(ice, CROCUS_CACHE_GS, sizeof(key), &key);
1817
1818 if (!shader)
1819 shader = crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key));
1820
1821 if (!shader)
1822 shader = crocus_compile_gs(ice, ish, &key);
1823 }
1824
1825 if (old != shader) {
1826 ice->shaders.prog[CROCUS_CACHE_GS] = shader;
1827 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_GS |
1828 CROCUS_STAGE_DIRTY_BINDINGS_GS |
1829 CROCUS_STAGE_DIRTY_CONSTANTS_GS;
1830 shs->sysvals_need_upload = true;
1831 }
1832 }
1833
1834 /**
1835 * Compile a fragment (pixel) shader, and upload the assembly.
1836 */
1837 static struct crocus_compiled_shader *
crocus_compile_fs(struct crocus_context * ice,struct crocus_uncompiled_shader * ish,const struct brw_wm_prog_key * key,struct brw_vue_map * vue_map)1838 crocus_compile_fs(struct crocus_context *ice,
1839 struct crocus_uncompiled_shader *ish,
1840 const struct brw_wm_prog_key *key,
1841 struct brw_vue_map *vue_map)
1842 {
1843 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1844 const struct brw_compiler *compiler = screen->compiler;
1845 void *mem_ctx = ralloc_context(NULL);
1846 struct brw_wm_prog_data *fs_prog_data =
1847 rzalloc(mem_ctx, struct brw_wm_prog_data);
1848 struct brw_stage_prog_data *prog_data = &fs_prog_data->base;
1849 enum brw_param_builtin *system_values;
1850 const struct intel_device_info *devinfo = &screen->devinfo;
1851 unsigned num_system_values;
1852 unsigned num_cbufs;
1853
1854 nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir);
1855
1856 prog_data->use_alt_mode = nir->info.is_arb_asm;
1857
1858 crocus_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
1859 &num_system_values, &num_cbufs);
1860
1861 /* Lower output variables to load_output intrinsics before setting up
1862 * binding tables, so crocus_setup_binding_table can map any load_output
1863 * intrinsics to CROCUS_SURFACE_GROUP_RENDER_TARGET_READ on Gen8 for
1864 * non-coherent framebuffer fetches.
1865 */
1866 brw_nir_lower_fs_outputs(nir);
1867
1868 /* lower swizzles before binding table */
1869 crocus_lower_swizzles(nir, &key->base.tex);
1870 int null_rts = 1;
1871
1872 struct crocus_binding_table bt;
1873 crocus_setup_binding_table(devinfo, nir, &bt,
1874 MAX2(key->nr_color_regions, null_rts),
1875 num_system_values, num_cbufs,
1876 &key->base.tex);
1877
1878 if (can_push_ubo(devinfo))
1879 brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges);
1880
1881 struct brw_wm_prog_key key_clean = *key;
1882 crocus_sanitize_tex_key(&key_clean.base.tex);
1883
1884 struct brw_compile_fs_params params = {
1885 .nir = nir,
1886 .key = &key_clean,
1887 .prog_data = fs_prog_data,
1888
1889 .allow_spilling = true,
1890 .vue_map = vue_map,
1891
1892 .log_data = &ice->dbg,
1893 };
1894 const unsigned *program =
1895 brw_compile_fs(compiler, mem_ctx, ¶ms);
1896 if (program == NULL) {
1897 dbg_printf("Failed to compile fragment shader: %s\n", params.error_str);
1898 ralloc_free(mem_ctx);
1899 return false;
1900 }
1901
1902 if (ish->compiled_once) {
1903 crocus_debug_recompile(ice, &nir->info, &key->base);
1904 } else {
1905 ish->compiled_once = true;
1906 }
1907
1908 struct crocus_compiled_shader *shader =
1909 crocus_upload_shader(ice, CROCUS_CACHE_FS, sizeof(*key), key, program,
1910 prog_data->program_size,
1911 prog_data, sizeof(*fs_prog_data), NULL,
1912 system_values, num_system_values,
1913 num_cbufs, &bt);
1914
1915 crocus_disk_cache_store(screen->disk_cache, ish, shader,
1916 ice->shaders.cache_bo_map,
1917 key, sizeof(*key));
1918
1919 ralloc_free(mem_ctx);
1920 return shader;
1921 }
1922
1923 /**
1924 * Update the current fragment shader variant.
1925 *
1926 * Fill out the key, look in the cache, compile and bind if needed.
1927 */
1928 static void
crocus_update_compiled_fs(struct crocus_context * ice)1929 crocus_update_compiled_fs(struct crocus_context *ice)
1930 {
1931 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1932 const struct intel_device_info *devinfo = &screen->devinfo;
1933 struct crocus_shader_state *shs = &ice->state.shaders[MESA_SHADER_FRAGMENT];
1934 struct crocus_uncompiled_shader *ish =
1935 ice->shaders.uncompiled[MESA_SHADER_FRAGMENT];
1936 struct brw_wm_prog_key key = { KEY_INIT() };
1937
1938 if (ish->nos & (1ull << CROCUS_NOS_TEXTURES))
1939 crocus_populate_sampler_prog_key_data(ice, devinfo, MESA_SHADER_FRAGMENT, ish,
1940 ish->nir->info.uses_texture_gather, &key.base.tex);
1941 screen->vtbl.populate_fs_key(ice, &ish->nir->info, &key);
1942
1943 if (ish->nos & (1ull << CROCUS_NOS_LAST_VUE_MAP))
1944 key.input_slots_valid = ice->shaders.last_vue_map->slots_valid;
1945
1946 struct crocus_compiled_shader *old = ice->shaders.prog[CROCUS_CACHE_FS];
1947 struct crocus_compiled_shader *shader =
1948 crocus_find_cached_shader(ice, CROCUS_CACHE_FS, sizeof(key), &key);
1949
1950 if (!shader)
1951 shader = crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key));
1952
1953 if (!shader)
1954 shader = crocus_compile_fs(ice, ish, &key, ice->shaders.last_vue_map);
1955
1956 if (old != shader) {
1957 // XXX: only need to flag CLIP if barycentric has NONPERSPECTIVE
1958 // toggles. might be able to avoid flagging SBE too.
1959 ice->shaders.prog[CROCUS_CACHE_FS] = shader;
1960 ice->state.dirty |= CROCUS_DIRTY_WM;
1961 /* gen4 clip/sf rely on fs prog_data */
1962 if (devinfo->ver < 6)
1963 ice->state.dirty |= CROCUS_DIRTY_GEN4_CLIP_PROG | CROCUS_DIRTY_GEN4_SF_PROG;
1964 else
1965 ice->state.dirty |= CROCUS_DIRTY_CLIP | CROCUS_DIRTY_GEN6_BLEND_STATE;
1966 if (devinfo->ver == 6)
1967 ice->state.dirty |= CROCUS_DIRTY_RASTER;
1968 if (devinfo->ver >= 7)
1969 ice->state.dirty |= CROCUS_DIRTY_GEN7_SBE;
1970 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_FS |
1971 CROCUS_STAGE_DIRTY_BINDINGS_FS |
1972 CROCUS_STAGE_DIRTY_CONSTANTS_FS;
1973 shs->sysvals_need_upload = true;
1974 }
1975 }
1976
1977 /**
1978 * Update the last enabled stage's VUE map.
1979 *
1980 * When the shader feeding the rasterizer's output interface changes, we
1981 * need to re-emit various packets.
1982 */
1983 static void
update_last_vue_map(struct crocus_context * ice,struct brw_stage_prog_data * prog_data)1984 update_last_vue_map(struct crocus_context *ice,
1985 struct brw_stage_prog_data *prog_data)
1986 {
1987 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
1988 const struct intel_device_info *devinfo = &screen->devinfo;
1989 struct brw_vue_prog_data *vue_prog_data = (void *) prog_data;
1990 struct brw_vue_map *vue_map = &vue_prog_data->vue_map;
1991 struct brw_vue_map *old_map = ice->shaders.last_vue_map;
1992 const uint64_t changed_slots =
1993 (old_map ? old_map->slots_valid : 0ull) ^ vue_map->slots_valid;
1994
1995 if (changed_slots & VARYING_BIT_VIEWPORT) {
1996 ice->state.num_viewports =
1997 (vue_map->slots_valid & VARYING_BIT_VIEWPORT) ? CROCUS_MAX_VIEWPORTS : 1;
1998 ice->state.dirty |= CROCUS_DIRTY_SF_CL_VIEWPORT |
1999 CROCUS_DIRTY_CC_VIEWPORT;
2000 if (devinfo->ver < 6)
2001 ice->state.dirty |= CROCUS_DIRTY_GEN4_CLIP_PROG | CROCUS_DIRTY_GEN4_SF_PROG;
2002
2003 if (devinfo->ver <= 6)
2004 ice->state.dirty |= CROCUS_DIRTY_GEN4_FF_GS_PROG;
2005
2006 if (devinfo->ver >= 6)
2007 ice->state.dirty |= CROCUS_DIRTY_CLIP |
2008 CROCUS_DIRTY_GEN6_SCISSOR_RECT;;
2009 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_UNCOMPILED_FS |
2010 ice->state.stage_dirty_for_nos[CROCUS_NOS_LAST_VUE_MAP];
2011 }
2012
2013 if (changed_slots || (old_map && old_map->separate != vue_map->separate)) {
2014 ice->state.dirty |= CROCUS_DIRTY_GEN7_SBE;
2015 if (devinfo->ver < 6)
2016 ice->state.dirty |= CROCUS_DIRTY_GEN4_FF_GS_PROG;
2017 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_UNCOMPILED_FS;
2018 }
2019
2020 ice->shaders.last_vue_map = &vue_prog_data->vue_map;
2021 }
2022
2023 static void
crocus_update_pull_constant_descriptors(struct crocus_context * ice,gl_shader_stage stage)2024 crocus_update_pull_constant_descriptors(struct crocus_context *ice,
2025 gl_shader_stage stage)
2026 {
2027 struct crocus_compiled_shader *shader = ice->shaders.prog[stage];
2028
2029 if (!shader || !shader->prog_data->has_ubo_pull)
2030 return;
2031
2032 struct crocus_shader_state *shs = &ice->state.shaders[stage];
2033 bool any_new_descriptors =
2034 shader->num_system_values > 0 && shs->sysvals_need_upload;
2035
2036 unsigned bound_cbufs = shs->bound_cbufs;
2037
2038 while (bound_cbufs) {
2039 const int i = u_bit_scan(&bound_cbufs);
2040 struct pipe_constant_buffer *cbuf = &shs->constbufs[i];
2041 if (cbuf->buffer) {
2042 any_new_descriptors = true;
2043 }
2044 }
2045
2046 if (any_new_descriptors)
2047 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_BINDINGS_VS << stage;
2048 }
2049
2050 /**
2051 * Get the prog_data for a given stage, or NULL if the stage is disabled.
2052 */
2053 static struct brw_vue_prog_data *
get_vue_prog_data(struct crocus_context * ice,gl_shader_stage stage)2054 get_vue_prog_data(struct crocus_context *ice, gl_shader_stage stage)
2055 {
2056 if (!ice->shaders.prog[stage])
2057 return NULL;
2058
2059 return (void *) ice->shaders.prog[stage]->prog_data;
2060 }
2061
2062 static struct crocus_compiled_shader *
crocus_compile_clip(struct crocus_context * ice,struct brw_clip_prog_key * key)2063 crocus_compile_clip(struct crocus_context *ice, struct brw_clip_prog_key *key)
2064 {
2065 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
2066 const struct brw_compiler *compiler = screen->compiler;
2067 void *mem_ctx;
2068 unsigned program_size;
2069 mem_ctx = ralloc_context(NULL);
2070
2071 struct brw_clip_prog_data *clip_prog_data =
2072 rzalloc(mem_ctx, struct brw_clip_prog_data);
2073
2074 const unsigned *program = brw_compile_clip(compiler, mem_ctx, key, clip_prog_data,
2075 ice->shaders.last_vue_map, &program_size);
2076
2077 if (program == NULL) {
2078 dbg_printf("failed to compile clip shader\n");
2079 ralloc_free(mem_ctx);
2080 return false;
2081 }
2082 struct crocus_binding_table bt;
2083 memset(&bt, 0, sizeof(bt));
2084
2085 struct crocus_compiled_shader *shader =
2086 crocus_upload_shader(ice, CROCUS_CACHE_CLIP, sizeof(*key), key, program,
2087 program_size,
2088 (struct brw_stage_prog_data *)clip_prog_data, sizeof(*clip_prog_data),
2089 NULL, NULL, 0, 0, &bt);
2090 ralloc_free(mem_ctx);
2091 return shader;
2092 }
2093 static void
crocus_update_compiled_clip(struct crocus_context * ice)2094 crocus_update_compiled_clip(struct crocus_context *ice)
2095 {
2096 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
2097 struct brw_clip_prog_key key;
2098 struct crocus_compiled_shader *old = ice->shaders.clip_prog;
2099 memset(&key, 0, sizeof(key));
2100
2101 const struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data);
2102 if (wm_prog_data) {
2103 key.contains_flat_varying = wm_prog_data->contains_flat_varying;
2104 key.contains_noperspective_varying =
2105 wm_prog_data->contains_noperspective_varying;
2106 memcpy(key.interp_mode, wm_prog_data->interp_mode, sizeof(key.interp_mode));
2107 }
2108
2109 key.primitive = ice->state.reduced_prim_mode;
2110 key.attrs = ice->shaders.last_vue_map->slots_valid;
2111
2112 struct pipe_rasterizer_state *rs_state = crocus_get_rast_state(ice);
2113 key.pv_first = rs_state->flatshade_first;
2114
2115 if (rs_state->clip_plane_enable)
2116 key.nr_userclip = util_logbase2(rs_state->clip_plane_enable) + 1;
2117
2118 if (screen->devinfo.ver == 5)
2119 key.clip_mode = BRW_CLIP_MODE_KERNEL_CLIP;
2120 else
2121 key.clip_mode = BRW_CLIP_MODE_NORMAL;
2122
2123 if (key.primitive == PIPE_PRIM_TRIANGLES) {
2124 if (rs_state->cull_face == PIPE_FACE_FRONT_AND_BACK)
2125 key.clip_mode = BRW_CLIP_MODE_REJECT_ALL;
2126 else {
2127 uint32_t fill_front = BRW_CLIP_FILL_MODE_CULL;
2128 uint32_t fill_back = BRW_CLIP_FILL_MODE_CULL;
2129 uint32_t offset_front = 0;
2130 uint32_t offset_back = 0;
2131
2132 if (!(rs_state->cull_face & PIPE_FACE_FRONT)) {
2133 switch (rs_state->fill_front) {
2134 case PIPE_POLYGON_MODE_FILL:
2135 fill_front = BRW_CLIP_FILL_MODE_FILL;
2136 offset_front = 0;
2137 break;
2138 case PIPE_POLYGON_MODE_LINE:
2139 fill_front = BRW_CLIP_FILL_MODE_LINE;
2140 offset_front = rs_state->offset_line;
2141 break;
2142 case PIPE_POLYGON_MODE_POINT:
2143 fill_front = BRW_CLIP_FILL_MODE_POINT;
2144 offset_front = rs_state->offset_point;
2145 break;
2146 }
2147 }
2148
2149 if (!(rs_state->cull_face & PIPE_FACE_BACK)) {
2150 switch (rs_state->fill_back) {
2151 case PIPE_POLYGON_MODE_FILL:
2152 fill_back = BRW_CLIP_FILL_MODE_FILL;
2153 offset_back = 0;
2154 break;
2155 case PIPE_POLYGON_MODE_LINE:
2156 fill_back = BRW_CLIP_FILL_MODE_LINE;
2157 offset_back = rs_state->offset_line;
2158 break;
2159 case PIPE_POLYGON_MODE_POINT:
2160 fill_back = BRW_CLIP_FILL_MODE_POINT;
2161 offset_back = rs_state->offset_point;
2162 break;
2163 }
2164 }
2165
2166 if (rs_state->fill_back != PIPE_POLYGON_MODE_FILL ||
2167 rs_state->fill_front != PIPE_POLYGON_MODE_FILL) {
2168 key.do_unfilled = 1;
2169
2170 /* Most cases the fixed function units will handle. Cases where
2171 * one or more polygon faces are unfilled will require help:
2172 */
2173 key.clip_mode = BRW_CLIP_MODE_CLIP_NON_REJECTED;
2174
2175 if (offset_back || offset_front) {
2176 double mrd = 0.0;
2177 if (ice->state.framebuffer.zsbuf)
2178 mrd = util_get_depth_format_mrd(util_format_description(ice->state.framebuffer.zsbuf->format));
2179 key.offset_units = rs_state->offset_units * mrd * 2;
2180 key.offset_factor = rs_state->offset_scale * mrd;
2181 key.offset_clamp = rs_state->offset_clamp * mrd;
2182 }
2183
2184 if (!(rs_state->front_ccw ^ rs_state->bottom_edge_rule)) {
2185 key.fill_ccw = fill_front;
2186 key.fill_cw = fill_back;
2187 key.offset_ccw = offset_front;
2188 key.offset_cw = offset_back;
2189 if (rs_state->light_twoside &&
2190 key.fill_cw != BRW_CLIP_FILL_MODE_CULL)
2191 key.copy_bfc_cw = 1;
2192 } else {
2193 key.fill_cw = fill_front;
2194 key.fill_ccw = fill_back;
2195 key.offset_cw = offset_front;
2196 key.offset_ccw = offset_back;
2197 if (rs_state->light_twoside &&
2198 key.fill_ccw != BRW_CLIP_FILL_MODE_CULL)
2199 key.copy_bfc_ccw = 1;
2200 }
2201 }
2202 }
2203 }
2204 struct crocus_compiled_shader *shader =
2205 crocus_find_cached_shader(ice, CROCUS_CACHE_CLIP, sizeof(key), &key);
2206
2207 if (!shader)
2208 shader = crocus_compile_clip(ice, &key);
2209
2210 if (old != shader) {
2211 ice->state.dirty |= CROCUS_DIRTY_CLIP;
2212 ice->shaders.clip_prog = shader;
2213 }
2214 }
2215
2216 static struct crocus_compiled_shader *
crocus_compile_sf(struct crocus_context * ice,struct brw_sf_prog_key * key)2217 crocus_compile_sf(struct crocus_context *ice, struct brw_sf_prog_key *key)
2218 {
2219 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
2220 const struct brw_compiler *compiler = screen->compiler;
2221 void *mem_ctx;
2222 unsigned program_size;
2223 mem_ctx = ralloc_context(NULL);
2224
2225 struct brw_sf_prog_data *sf_prog_data =
2226 rzalloc(mem_ctx, struct brw_sf_prog_data);
2227
2228 const unsigned *program = brw_compile_sf(compiler, mem_ctx, key, sf_prog_data,
2229 ice->shaders.last_vue_map, &program_size);
2230
2231 if (program == NULL) {
2232 dbg_printf("failed to compile sf shader\n");
2233 ralloc_free(mem_ctx);
2234 return false;
2235 }
2236
2237 struct crocus_binding_table bt;
2238 memset(&bt, 0, sizeof(bt));
2239 struct crocus_compiled_shader *shader =
2240 crocus_upload_shader(ice, CROCUS_CACHE_SF, sizeof(*key), key, program,
2241 program_size,
2242 (struct brw_stage_prog_data *)sf_prog_data, sizeof(*sf_prog_data),
2243 NULL, NULL, 0, 0, &bt);
2244 ralloc_free(mem_ctx);
2245 return shader;
2246 }
2247
2248 static void
crocus_update_compiled_sf(struct crocus_context * ice)2249 crocus_update_compiled_sf(struct crocus_context *ice)
2250 {
2251 struct brw_sf_prog_key key;
2252 struct crocus_compiled_shader *old = ice->shaders.sf_prog;
2253 memset(&key, 0, sizeof(key));
2254
2255 key.attrs = ice->shaders.last_vue_map->slots_valid;
2256
2257 switch (ice->state.reduced_prim_mode) {
2258 case PIPE_PRIM_TRIANGLES:
2259 default:
2260 if (key.attrs & BITFIELD64_BIT(VARYING_SLOT_EDGE))
2261 key.primitive = BRW_SF_PRIM_UNFILLED_TRIS;
2262 else
2263 key.primitive = BRW_SF_PRIM_TRIANGLES;
2264 break;
2265 case PIPE_PRIM_LINES:
2266 key.primitive = BRW_SF_PRIM_LINES;
2267 break;
2268 case PIPE_PRIM_POINTS:
2269 key.primitive = BRW_SF_PRIM_POINTS;
2270 break;
2271 }
2272
2273 struct pipe_rasterizer_state *rs_state = crocus_get_rast_state(ice);
2274 key.userclip_active = rs_state->clip_plane_enable != 0;
2275 const struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data);
2276 if (wm_prog_data) {
2277 key.contains_flat_varying = wm_prog_data->contains_flat_varying;
2278 memcpy(key.interp_mode, wm_prog_data->interp_mode, sizeof(key.interp_mode));
2279 }
2280
2281 key.do_twoside_color = rs_state->light_twoside;
2282
2283 key.do_point_sprite = rs_state->point_quad_rasterization;
2284 if (key.do_point_sprite) {
2285 key.point_sprite_coord_replace = rs_state->sprite_coord_enable & 0xff;
2286 if (rs_state->sprite_coord_enable & (1 << 8))
2287 key.do_point_coord = 1;
2288 if (wm_prog_data && wm_prog_data->urb_setup[VARYING_SLOT_PNTC] != -1)
2289 key.do_point_coord = 1;
2290 }
2291
2292 key.sprite_origin_lower_left = rs_state->sprite_coord_mode == PIPE_SPRITE_COORD_LOWER_LEFT;
2293
2294 if (key.do_twoside_color) {
2295 key.frontface_ccw = rs_state->front_ccw;
2296 }
2297 struct crocus_compiled_shader *shader =
2298 crocus_find_cached_shader(ice, CROCUS_CACHE_SF, sizeof(key), &key);
2299
2300 if (!shader)
2301 shader = crocus_compile_sf(ice, &key);
2302
2303 if (old != shader) {
2304 ice->state.dirty |= CROCUS_DIRTY_RASTER;
2305 ice->shaders.sf_prog = shader;
2306 }
2307 }
2308
2309 static struct crocus_compiled_shader *
crocus_compile_ff_gs(struct crocus_context * ice,struct brw_ff_gs_prog_key * key)2310 crocus_compile_ff_gs(struct crocus_context *ice, struct brw_ff_gs_prog_key *key)
2311 {
2312 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
2313 struct brw_compiler *compiler = screen->compiler;
2314 void *mem_ctx;
2315 unsigned program_size;
2316 mem_ctx = ralloc_context(NULL);
2317
2318 struct brw_ff_gs_prog_data *ff_gs_prog_data =
2319 rzalloc(mem_ctx, struct brw_ff_gs_prog_data);
2320
2321 const unsigned *program = brw_compile_ff_gs_prog(compiler, mem_ctx, key, ff_gs_prog_data,
2322 ice->shaders.last_vue_map, &program_size);
2323
2324 if (program == NULL) {
2325 dbg_printf("failed to compile sf shader\n");
2326 ralloc_free(mem_ctx);
2327 return false;
2328 }
2329
2330 struct crocus_binding_table bt;
2331 memset(&bt, 0, sizeof(bt));
2332
2333 if (screen->devinfo.ver == 6) {
2334 bt.sizes[CROCUS_SURFACE_GROUP_SOL] = BRW_MAX_SOL_BINDINGS;
2335 bt.used_mask[CROCUS_SURFACE_GROUP_SOL] = (uint64_t)-1;
2336
2337 bt.size_bytes = BRW_MAX_SOL_BINDINGS * 4;
2338 }
2339
2340 struct crocus_compiled_shader *shader =
2341 crocus_upload_shader(ice, CROCUS_CACHE_FF_GS, sizeof(*key), key, program,
2342 program_size,
2343 (struct brw_stage_prog_data *)ff_gs_prog_data, sizeof(*ff_gs_prog_data),
2344 NULL, NULL, 0, 0, &bt);
2345 ralloc_free(mem_ctx);
2346 return shader;
2347 }
2348
2349 static void
crocus_update_compiled_ff_gs(struct crocus_context * ice)2350 crocus_update_compiled_ff_gs(struct crocus_context *ice)
2351 {
2352 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
2353 const struct intel_device_info *devinfo = &screen->devinfo;
2354 struct brw_ff_gs_prog_key key;
2355 struct crocus_compiled_shader *old = ice->shaders.ff_gs_prog;
2356 memset(&key, 0, sizeof(key));
2357
2358 assert(devinfo->ver < 7);
2359
2360 key.attrs = ice->shaders.last_vue_map->slots_valid;
2361
2362 key.primitive = screen->vtbl.translate_prim_type(ice->state.prim_mode, 0);
2363
2364 struct pipe_rasterizer_state *rs_state = crocus_get_rast_state(ice);
2365 key.pv_first = rs_state->flatshade_first;
2366
2367 if (key.primitive == _3DPRIM_QUADLIST && !rs_state->flatshade) {
2368 /* Provide consistenbbbbbt primitive order with brw_set_prim's
2369 * optimization of single quads to trifans.
2370 */
2371 key.pv_first = true;
2372 }
2373
2374 if (devinfo->ver >= 6) {
2375 key.need_gs_prog = ice->state.streamout_active;
2376 if (key.need_gs_prog) {
2377 struct crocus_uncompiled_shader *vs =
2378 ice->shaders.uncompiled[MESA_SHADER_VERTEX];
2379 gfx6_ff_gs_xfb_setup(&vs->stream_output,
2380 &key);
2381 }
2382 } else {
2383 key.need_gs_prog = (key.primitive == _3DPRIM_QUADLIST ||
2384 key.primitive == _3DPRIM_QUADSTRIP ||
2385 key.primitive == _3DPRIM_LINELOOP);
2386 }
2387
2388 struct crocus_compiled_shader *shader = NULL;
2389 if (key.need_gs_prog) {
2390 shader = crocus_find_cached_shader(ice, CROCUS_CACHE_FF_GS,
2391 sizeof(key), &key);
2392 if (!shader)
2393 shader = crocus_compile_ff_gs(ice, &key);
2394 }
2395 if (old != shader) {
2396 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_GS;
2397 if (!!old != !!shader)
2398 ice->state.dirty |= CROCUS_DIRTY_GEN6_URB;
2399 ice->shaders.ff_gs_prog = shader;
2400 if (shader) {
2401 const struct brw_ff_gs_prog_data *gs_prog_data = (struct brw_ff_gs_prog_data *)ice->shaders.ff_gs_prog->prog_data;
2402 ice->state.last_xfb_verts_per_prim = gs_prog_data->svbi_postincrement_value;
2403 }
2404 }
2405 }
2406
2407 // XXX: crocus_compiled_shaders are space-leaking :(
2408 // XXX: do remember to unbind them if deleting them.
2409
2410 /**
2411 * Update the current shader variants for the given state.
2412 *
2413 * This should be called on every draw call to ensure that the correct
2414 * shaders are bound. It will also flag any dirty state triggered by
2415 * swapping out those shaders.
2416 */
2417 bool
crocus_update_compiled_shaders(struct crocus_context * ice)2418 crocus_update_compiled_shaders(struct crocus_context *ice)
2419 {
2420 struct crocus_screen *screen = (void *) ice->ctx.screen;
2421 const uint64_t stage_dirty = ice->state.stage_dirty;
2422
2423 struct brw_vue_prog_data *old_prog_datas[4];
2424 if (!(ice->state.dirty & CROCUS_DIRTY_GEN6_URB)) {
2425 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++)
2426 old_prog_datas[i] = get_vue_prog_data(ice, i);
2427 }
2428
2429 if (stage_dirty & (CROCUS_STAGE_DIRTY_UNCOMPILED_TCS |
2430 CROCUS_STAGE_DIRTY_UNCOMPILED_TES)) {
2431 struct crocus_uncompiled_shader *tes =
2432 ice->shaders.uncompiled[MESA_SHADER_TESS_EVAL];
2433 if (tes) {
2434 crocus_update_compiled_tcs(ice);
2435 crocus_update_compiled_tes(ice);
2436 } else {
2437 ice->shaders.prog[CROCUS_CACHE_TCS] = NULL;
2438 ice->shaders.prog[CROCUS_CACHE_TES] = NULL;
2439 ice->state.stage_dirty |=
2440 CROCUS_STAGE_DIRTY_TCS | CROCUS_STAGE_DIRTY_TES |
2441 CROCUS_STAGE_DIRTY_BINDINGS_TCS | CROCUS_STAGE_DIRTY_BINDINGS_TES |
2442 CROCUS_STAGE_DIRTY_CONSTANTS_TCS | CROCUS_STAGE_DIRTY_CONSTANTS_TES;
2443 }
2444 }
2445
2446 if (stage_dirty & CROCUS_STAGE_DIRTY_UNCOMPILED_VS)
2447 crocus_update_compiled_vs(ice);
2448 if (stage_dirty & CROCUS_STAGE_DIRTY_UNCOMPILED_GS)
2449 crocus_update_compiled_gs(ice);
2450
2451 if (stage_dirty & (CROCUS_STAGE_DIRTY_UNCOMPILED_GS |
2452 CROCUS_STAGE_DIRTY_UNCOMPILED_TES)) {
2453 const struct crocus_compiled_shader *gs =
2454 ice->shaders.prog[MESA_SHADER_GEOMETRY];
2455 const struct crocus_compiled_shader *tes =
2456 ice->shaders.prog[MESA_SHADER_TESS_EVAL];
2457
2458 bool points_or_lines = false;
2459
2460 if (gs) {
2461 const struct brw_gs_prog_data *gs_prog_data = (void *) gs->prog_data;
2462 points_or_lines =
2463 gs_prog_data->output_topology == _3DPRIM_POINTLIST ||
2464 gs_prog_data->output_topology == _3DPRIM_LINESTRIP;
2465 } else if (tes) {
2466 const struct brw_tes_prog_data *tes_data = (void *) tes->prog_data;
2467 points_or_lines =
2468 tes_data->output_topology == BRW_TESS_OUTPUT_TOPOLOGY_LINE ||
2469 tes_data->output_topology == BRW_TESS_OUTPUT_TOPOLOGY_POINT;
2470 }
2471
2472 if (ice->shaders.output_topology_is_points_or_lines != points_or_lines) {
2473 /* Outbound to XY Clip enables */
2474 ice->shaders.output_topology_is_points_or_lines = points_or_lines;
2475 ice->state.dirty |= CROCUS_DIRTY_CLIP;
2476 }
2477 }
2478
2479 if (!ice->shaders.prog[MESA_SHADER_VERTEX])
2480 return false;
2481
2482 gl_shader_stage last_stage = last_vue_stage(ice);
2483 struct crocus_compiled_shader *shader = ice->shaders.prog[last_stage];
2484 struct crocus_uncompiled_shader *ish = ice->shaders.uncompiled[last_stage];
2485 update_last_vue_map(ice, shader->prog_data);
2486 if (ice->state.streamout != shader->streamout) {
2487 ice->state.streamout = shader->streamout;
2488 ice->state.dirty |= CROCUS_DIRTY_SO_DECL_LIST | CROCUS_DIRTY_STREAMOUT;
2489 }
2490
2491 if (ice->state.streamout_active) {
2492 screen->vtbl.update_so_strides(ice, ish->stream_output.stride);
2493 }
2494
2495 /* use ice->state version as last_vue_map can dirty this bit */
2496 if (ice->state.stage_dirty & CROCUS_STAGE_DIRTY_UNCOMPILED_FS)
2497 crocus_update_compiled_fs(ice);
2498
2499 if (screen->devinfo.ver <= 6) {
2500 if (ice->state.dirty & CROCUS_DIRTY_GEN4_FF_GS_PROG &&
2501 !ice->shaders.prog[MESA_SHADER_GEOMETRY])
2502 crocus_update_compiled_ff_gs(ice);
2503 }
2504
2505 if (screen->devinfo.ver < 6) {
2506 if (ice->state.dirty & CROCUS_DIRTY_GEN4_CLIP_PROG)
2507 crocus_update_compiled_clip(ice);
2508 if (ice->state.dirty & CROCUS_DIRTY_GEN4_SF_PROG)
2509 crocus_update_compiled_sf(ice);
2510 }
2511
2512
2513 /* Changing shader interfaces may require a URB configuration. */
2514 if (!(ice->state.dirty & CROCUS_DIRTY_GEN6_URB)) {
2515 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
2516 struct brw_vue_prog_data *old = old_prog_datas[i];
2517 struct brw_vue_prog_data *new = get_vue_prog_data(ice, i);
2518 if (!!old != !!new ||
2519 (new && new->urb_entry_size != old->urb_entry_size)) {
2520 ice->state.dirty |= CROCUS_DIRTY_GEN6_URB;
2521 break;
2522 }
2523 }
2524 }
2525
2526 if (ice->state.stage_dirty & CROCUS_RENDER_STAGE_DIRTY_CONSTANTS) {
2527 for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_FRAGMENT; i++) {
2528 if (ice->state.stage_dirty & (CROCUS_STAGE_DIRTY_CONSTANTS_VS << i))
2529 crocus_update_pull_constant_descriptors(ice, i);
2530 }
2531 }
2532 return true;
2533 }
2534
2535 static struct crocus_compiled_shader *
crocus_compile_cs(struct crocus_context * ice,struct crocus_uncompiled_shader * ish,const struct brw_cs_prog_key * key)2536 crocus_compile_cs(struct crocus_context *ice,
2537 struct crocus_uncompiled_shader *ish,
2538 const struct brw_cs_prog_key *key)
2539 {
2540 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
2541 const struct brw_compiler *compiler = screen->compiler;
2542 void *mem_ctx = ralloc_context(NULL);
2543 struct brw_cs_prog_data *cs_prog_data =
2544 rzalloc(mem_ctx, struct brw_cs_prog_data);
2545 struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
2546 enum brw_param_builtin *system_values;
2547 const struct intel_device_info *devinfo = &screen->devinfo;
2548 unsigned num_system_values;
2549 unsigned num_cbufs;
2550
2551 nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir);
2552
2553 NIR_PASS_V(nir, brw_nir_lower_cs_intrinsics);
2554
2555 crocus_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
2556 &num_system_values, &num_cbufs);
2557 crocus_lower_swizzles(nir, &key->base.tex);
2558 struct crocus_binding_table bt;
2559 crocus_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0,
2560 num_system_values, num_cbufs, &key->base.tex);
2561
2562 struct brw_compile_cs_params params = {
2563 .nir = nir,
2564 .key = key,
2565 .prog_data = cs_prog_data,
2566 .log_data = &ice->dbg,
2567 };
2568
2569 const unsigned *program =
2570 brw_compile_cs(compiler, mem_ctx, ¶ms);
2571 if (program == NULL) {
2572 dbg_printf("Failed to compile compute shader: %s\n", params.error_str);
2573 ralloc_free(mem_ctx);
2574 return false;
2575 }
2576
2577 if (ish->compiled_once) {
2578 crocus_debug_recompile(ice, &nir->info, &key->base);
2579 } else {
2580 ish->compiled_once = true;
2581 }
2582
2583 struct crocus_compiled_shader *shader =
2584 crocus_upload_shader(ice, CROCUS_CACHE_CS, sizeof(*key), key, program,
2585 prog_data->program_size,
2586 prog_data, sizeof(*cs_prog_data), NULL,
2587 system_values, num_system_values,
2588 num_cbufs, &bt);
2589
2590 crocus_disk_cache_store(screen->disk_cache, ish, shader,
2591 ice->shaders.cache_bo_map,
2592 key, sizeof(*key));
2593
2594 ralloc_free(mem_ctx);
2595 return shader;
2596 }
2597
2598 static void
crocus_update_compiled_cs(struct crocus_context * ice)2599 crocus_update_compiled_cs(struct crocus_context *ice)
2600 {
2601 struct crocus_shader_state *shs = &ice->state.shaders[MESA_SHADER_COMPUTE];
2602 struct crocus_uncompiled_shader *ish =
2603 ice->shaders.uncompiled[MESA_SHADER_COMPUTE];
2604 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
2605 const struct intel_device_info *devinfo = &screen->devinfo;
2606 struct brw_cs_prog_key key = { KEY_INIT() };
2607
2608 if (ish->nos & (1ull << CROCUS_NOS_TEXTURES))
2609 crocus_populate_sampler_prog_key_data(ice, devinfo, MESA_SHADER_COMPUTE, ish,
2610 ish->nir->info.uses_texture_gather, &key.base.tex);
2611 screen->vtbl.populate_cs_key(ice, &key);
2612
2613 struct crocus_compiled_shader *old = ice->shaders.prog[CROCUS_CACHE_CS];
2614 struct crocus_compiled_shader *shader =
2615 crocus_find_cached_shader(ice, CROCUS_CACHE_CS, sizeof(key), &key);
2616
2617 if (!shader)
2618 shader = crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key));
2619
2620 if (!shader)
2621 shader = crocus_compile_cs(ice, ish, &key);
2622
2623 if (old != shader) {
2624 ice->shaders.prog[CROCUS_CACHE_CS] = shader;
2625 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_CS |
2626 CROCUS_STAGE_DIRTY_BINDINGS_CS |
2627 CROCUS_STAGE_DIRTY_CONSTANTS_CS;
2628 shs->sysvals_need_upload = true;
2629 }
2630 }
2631
2632 void
crocus_update_compiled_compute_shader(struct crocus_context * ice)2633 crocus_update_compiled_compute_shader(struct crocus_context *ice)
2634 {
2635 if (ice->state.stage_dirty & CROCUS_STAGE_DIRTY_UNCOMPILED_CS)
2636 crocus_update_compiled_cs(ice);
2637
2638 if (ice->state.stage_dirty & CROCUS_STAGE_DIRTY_CONSTANTS_CS)
2639 crocus_update_pull_constant_descriptors(ice, MESA_SHADER_COMPUTE);
2640 }
2641
2642 void
crocus_fill_cs_push_const_buffer(struct brw_cs_prog_data * cs_prog_data,unsigned threads,uint32_t * dst)2643 crocus_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,
2644 unsigned threads,
2645 uint32_t *dst)
2646 {
2647 assert(brw_cs_push_const_total_size(cs_prog_data, threads) > 0);
2648 assert(cs_prog_data->push.cross_thread.size == 0);
2649 assert(cs_prog_data->push.per_thread.dwords == 1);
2650 assert(cs_prog_data->base.param[0] == BRW_PARAM_BUILTIN_SUBGROUP_ID);
2651 for (unsigned t = 0; t < threads; t++)
2652 dst[8 * t] = t;
2653 }
2654
2655 /**
2656 * Allocate scratch BOs as needed for the given per-thread size and stage.
2657 */
2658 struct crocus_bo *
crocus_get_scratch_space(struct crocus_context * ice,unsigned per_thread_scratch,gl_shader_stage stage)2659 crocus_get_scratch_space(struct crocus_context *ice,
2660 unsigned per_thread_scratch,
2661 gl_shader_stage stage)
2662 {
2663 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
2664 struct crocus_bufmgr *bufmgr = screen->bufmgr;
2665 const struct intel_device_info *devinfo = &screen->devinfo;
2666
2667 unsigned encoded_size = ffs(per_thread_scratch) - 11;
2668 assert(encoded_size < (1 << 16));
2669
2670 struct crocus_bo **bop = &ice->shaders.scratch_bos[encoded_size][stage];
2671
2672 if (!*bop) {
2673 assert(stage < ARRAY_SIZE(devinfo->max_scratch_ids));
2674 uint32_t size = per_thread_scratch * devinfo->max_scratch_ids[stage];
2675 *bop = crocus_bo_alloc(bufmgr, "scratch", size);
2676 }
2677
2678 return *bop;
2679 }
2680
2681 /* ------------------------------------------------------------------- */
2682
2683 /**
2684 * The pipe->create_[stage]_state() driver hooks.
2685 *
2686 * Performs basic NIR preprocessing, records any state dependencies, and
2687 * returns an crocus_uncompiled_shader as the Gallium CSO.
2688 *
2689 * Actual shader compilation to assembly happens later, at first use.
2690 */
2691 static void *
crocus_create_uncompiled_shader(struct pipe_context * ctx,nir_shader * nir,const struct pipe_stream_output_info * so_info)2692 crocus_create_uncompiled_shader(struct pipe_context *ctx,
2693 nir_shader *nir,
2694 const struct pipe_stream_output_info *so_info)
2695 {
2696 struct crocus_screen *screen = (struct crocus_screen *)ctx->screen;
2697 const struct intel_device_info *devinfo = &screen->devinfo;
2698 struct crocus_uncompiled_shader *ish =
2699 calloc(1, sizeof(struct crocus_uncompiled_shader));
2700 if (!ish)
2701 return NULL;
2702
2703 if (devinfo->ver >= 6)
2704 NIR_PASS(ish->needs_edge_flag, nir, crocus_fix_edge_flags);
2705 else
2706 ish->needs_edge_flag = false;
2707
2708 brw_preprocess_nir(screen->compiler, nir, NULL);
2709
2710 NIR_PASS_V(nir, brw_nir_lower_storage_image, devinfo);
2711 NIR_PASS_V(nir, crocus_lower_storage_image_derefs);
2712
2713 nir_sweep(nir);
2714
2715 ish->program_id = get_new_program_id(screen);
2716 ish->nir = nir;
2717 if (so_info) {
2718 memcpy(&ish->stream_output, so_info, sizeof(*so_info));
2719 update_so_info(&ish->stream_output, nir->info.outputs_written);
2720 }
2721
2722 if (screen->disk_cache) {
2723 /* Serialize the NIR to a binary blob that we can hash for the disk
2724 * cache. Drop unnecessary information (like variable names)
2725 * so the serialized NIR is smaller, and also to let us detect more
2726 * isomorphic shaders when hashing, increasing cache hits.
2727 */
2728 struct blob blob;
2729 blob_init(&blob);
2730 nir_serialize(&blob, nir, true);
2731 _mesa_sha1_compute(blob.data, blob.size, ish->nir_sha1);
2732 blob_finish(&blob);
2733 }
2734
2735 return ish;
2736 }
2737
2738 static struct crocus_uncompiled_shader *
crocus_create_shader_state(struct pipe_context * ctx,const struct pipe_shader_state * state)2739 crocus_create_shader_state(struct pipe_context *ctx,
2740 const struct pipe_shader_state *state)
2741 {
2742 struct nir_shader *nir;
2743
2744 if (state->type == PIPE_SHADER_IR_TGSI)
2745 nir = tgsi_to_nir(state->tokens, ctx->screen, false);
2746 else
2747 nir = state->ir.nir;
2748
2749 return crocus_create_uncompiled_shader(ctx, nir, &state->stream_output);
2750 }
2751
2752 static void *
crocus_create_vs_state(struct pipe_context * ctx,const struct pipe_shader_state * state)2753 crocus_create_vs_state(struct pipe_context *ctx,
2754 const struct pipe_shader_state *state)
2755 {
2756 struct crocus_context *ice = (void *) ctx;
2757 struct crocus_screen *screen = (void *) ctx->screen;
2758 struct crocus_uncompiled_shader *ish = crocus_create_shader_state(ctx, state);
2759
2760 ish->nos |= (1ull << CROCUS_NOS_TEXTURES);
2761 /* User clip planes or gen5 sprite coord enable */
2762 if (ish->nir->info.clip_distance_array_size == 0 ||
2763 screen->devinfo.ver <= 5)
2764 ish->nos |= (1ull << CROCUS_NOS_RASTERIZER);
2765
2766 if (screen->devinfo.verx10 < 75)
2767 ish->nos |= (1ull << CROCUS_NOS_VERTEX_ELEMENTS);
2768
2769 if (screen->precompile) {
2770 struct brw_vs_prog_key key = { KEY_INIT() };
2771
2772 if (!crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key)))
2773 crocus_compile_vs(ice, ish, &key);
2774 }
2775
2776 return ish;
2777 }
2778
2779 static void *
crocus_create_tcs_state(struct pipe_context * ctx,const struct pipe_shader_state * state)2780 crocus_create_tcs_state(struct pipe_context *ctx,
2781 const struct pipe_shader_state *state)
2782 {
2783 struct crocus_context *ice = (void *) ctx;
2784 struct crocus_screen *screen = (void *) ctx->screen;
2785 struct crocus_uncompiled_shader *ish = crocus_create_shader_state(ctx, state);
2786 struct shader_info *info = &ish->nir->info;
2787
2788 ish->nos |= (1ull << CROCUS_NOS_TEXTURES);
2789 if (screen->precompile) {
2790 struct brw_tcs_prog_key key = {
2791 KEY_INIT(),
2792 // XXX: make sure the linker fills this out from the TES...
2793 ._tes_primitive_mode =
2794 info->tess._primitive_mode ? info->tess._primitive_mode
2795 : TESS_PRIMITIVE_TRIANGLES,
2796 .outputs_written = info->outputs_written,
2797 .patch_outputs_written = info->patch_outputs_written,
2798 };
2799
2800 key.input_vertices = info->tess.tcs_vertices_out;
2801
2802 if (!crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key)))
2803 crocus_compile_tcs(ice, ish, &key);
2804 }
2805
2806 return ish;
2807 }
2808
2809 static void *
crocus_create_tes_state(struct pipe_context * ctx,const struct pipe_shader_state * state)2810 crocus_create_tes_state(struct pipe_context *ctx,
2811 const struct pipe_shader_state *state)
2812 {
2813 struct crocus_context *ice = (void *) ctx;
2814 struct crocus_screen *screen = (void *) ctx->screen;
2815 struct crocus_uncompiled_shader *ish = crocus_create_shader_state(ctx, state);
2816 struct shader_info *info = &ish->nir->info;
2817
2818 ish->nos |= (1ull << CROCUS_NOS_TEXTURES);
2819 /* User clip planes */
2820 if (ish->nir->info.clip_distance_array_size == 0)
2821 ish->nos |= (1ull << CROCUS_NOS_RASTERIZER);
2822
2823 if (screen->precompile) {
2824 struct brw_tes_prog_key key = {
2825 KEY_INIT(),
2826 // XXX: not ideal, need TCS output/TES input unification
2827 .inputs_read = info->inputs_read,
2828 .patch_inputs_read = info->patch_inputs_read,
2829 };
2830
2831 if (!crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key)))
2832 crocus_compile_tes(ice, ish, &key);
2833 }
2834
2835 return ish;
2836 }
2837
2838 static void *
crocus_create_gs_state(struct pipe_context * ctx,const struct pipe_shader_state * state)2839 crocus_create_gs_state(struct pipe_context *ctx,
2840 const struct pipe_shader_state *state)
2841 {
2842 struct crocus_context *ice = (void *) ctx;
2843 struct crocus_screen *screen = (void *) ctx->screen;
2844 struct crocus_uncompiled_shader *ish = crocus_create_shader_state(ctx, state);
2845
2846 ish->nos |= (1ull << CROCUS_NOS_TEXTURES);
2847 /* User clip planes */
2848 if (ish->nir->info.clip_distance_array_size == 0)
2849 ish->nos |= (1ull << CROCUS_NOS_RASTERIZER);
2850
2851 if (screen->precompile) {
2852 struct brw_gs_prog_key key = { KEY_INIT() };
2853
2854 if (!crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key)))
2855 crocus_compile_gs(ice, ish, &key);
2856 }
2857
2858 return ish;
2859 }
2860
2861 static void *
crocus_create_fs_state(struct pipe_context * ctx,const struct pipe_shader_state * state)2862 crocus_create_fs_state(struct pipe_context *ctx,
2863 const struct pipe_shader_state *state)
2864 {
2865 struct crocus_context *ice = (void *) ctx;
2866 struct crocus_screen *screen = (void *) ctx->screen;
2867 struct crocus_uncompiled_shader *ish = crocus_create_shader_state(ctx, state);
2868 struct shader_info *info = &ish->nir->info;
2869
2870 ish->nos |= (1ull << CROCUS_NOS_FRAMEBUFFER) |
2871 (1ull << CROCUS_NOS_DEPTH_STENCIL_ALPHA) |
2872 (1ull << CROCUS_NOS_RASTERIZER) |
2873 (1ull << CROCUS_NOS_TEXTURES) |
2874 (1ull << CROCUS_NOS_BLEND);
2875
2876 /* The program key needs the VUE map if there are > 16 inputs or gen4/5 */
2877 if (screen->devinfo.ver < 6 || util_bitcount64(ish->nir->info.inputs_read &
2878 BRW_FS_VARYING_INPUT_MASK) > 16) {
2879 ish->nos |= (1ull << CROCUS_NOS_LAST_VUE_MAP);
2880 }
2881
2882 if (screen->precompile) {
2883 const uint64_t color_outputs = info->outputs_written &
2884 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
2885 BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
2886 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK));
2887
2888 bool can_rearrange_varyings =
2889 screen->devinfo.ver > 6 && util_bitcount64(info->inputs_read & BRW_FS_VARYING_INPUT_MASK) <= 16;
2890
2891 const struct intel_device_info *devinfo = &screen->devinfo;
2892 struct brw_wm_prog_key key = {
2893 KEY_INIT(),
2894 .nr_color_regions = util_bitcount(color_outputs),
2895 .coherent_fb_fetch = false,
2896 .ignore_sample_mask_out = screen->devinfo.ver < 6 ? 1 : 0,
2897 .input_slots_valid =
2898 can_rearrange_varyings ? 0 : info->inputs_read | VARYING_BIT_POS,
2899 };
2900
2901 struct brw_vue_map vue_map;
2902 if (devinfo->ver < 6) {
2903 brw_compute_vue_map(devinfo, &vue_map,
2904 info->inputs_read | VARYING_BIT_POS,
2905 false, /* pos slots */ 1);
2906 }
2907 if (!crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key)))
2908 crocus_compile_fs(ice, ish, &key, &vue_map);
2909 }
2910
2911 return ish;
2912 }
2913
2914 static void *
crocus_create_compute_state(struct pipe_context * ctx,const struct pipe_compute_state * state)2915 crocus_create_compute_state(struct pipe_context *ctx,
2916 const struct pipe_compute_state *state)
2917 {
2918 assert(state->ir_type == PIPE_SHADER_IR_NIR);
2919
2920 struct crocus_context *ice = (void *) ctx;
2921 struct crocus_screen *screen = (void *) ctx->screen;
2922 struct crocus_uncompiled_shader *ish =
2923 crocus_create_uncompiled_shader(ctx, (void *) state->prog, NULL);
2924
2925 ish->nos |= (1ull << CROCUS_NOS_TEXTURES);
2926 // XXX: disallow more than 64KB of shared variables
2927
2928 if (screen->precompile) {
2929 struct brw_cs_prog_key key = { KEY_INIT() };
2930
2931 if (!crocus_disk_cache_retrieve(ice, ish, &key, sizeof(key)))
2932 crocus_compile_cs(ice, ish, &key);
2933 }
2934
2935 return ish;
2936 }
2937
2938 /**
2939 * The pipe->delete_[stage]_state() driver hooks.
2940 *
2941 * Frees the crocus_uncompiled_shader.
2942 */
2943 static void
crocus_delete_shader_state(struct pipe_context * ctx,void * state,gl_shader_stage stage)2944 crocus_delete_shader_state(struct pipe_context *ctx, void *state, gl_shader_stage stage)
2945 {
2946 struct crocus_uncompiled_shader *ish = state;
2947 struct crocus_context *ice = (void *) ctx;
2948
2949 if (ice->shaders.uncompiled[stage] == ish) {
2950 ice->shaders.uncompiled[stage] = NULL;
2951 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_UNCOMPILED_VS << stage;
2952 }
2953
2954 if (ish->const_data) {
2955 pipe_resource_reference(&ish->const_data, NULL);
2956 pipe_resource_reference(&ish->const_data_state.res, NULL);
2957 }
2958
2959 ralloc_free(ish->nir);
2960 free(ish);
2961 }
2962
2963 static void
crocus_delete_vs_state(struct pipe_context * ctx,void * state)2964 crocus_delete_vs_state(struct pipe_context *ctx, void *state)
2965 {
2966 crocus_delete_shader_state(ctx, state, MESA_SHADER_VERTEX);
2967 }
2968
2969 static void
crocus_delete_tcs_state(struct pipe_context * ctx,void * state)2970 crocus_delete_tcs_state(struct pipe_context *ctx, void *state)
2971 {
2972 crocus_delete_shader_state(ctx, state, MESA_SHADER_TESS_CTRL);
2973 }
2974
2975 static void
crocus_delete_tes_state(struct pipe_context * ctx,void * state)2976 crocus_delete_tes_state(struct pipe_context *ctx, void *state)
2977 {
2978 crocus_delete_shader_state(ctx, state, MESA_SHADER_TESS_EVAL);
2979 }
2980
2981 static void
crocus_delete_gs_state(struct pipe_context * ctx,void * state)2982 crocus_delete_gs_state(struct pipe_context *ctx, void *state)
2983 {
2984 crocus_delete_shader_state(ctx, state, MESA_SHADER_GEOMETRY);
2985 }
2986
2987 static void
crocus_delete_fs_state(struct pipe_context * ctx,void * state)2988 crocus_delete_fs_state(struct pipe_context *ctx, void *state)
2989 {
2990 crocus_delete_shader_state(ctx, state, MESA_SHADER_FRAGMENT);
2991 }
2992
2993 static void
crocus_delete_cs_state(struct pipe_context * ctx,void * state)2994 crocus_delete_cs_state(struct pipe_context *ctx, void *state)
2995 {
2996 crocus_delete_shader_state(ctx, state, MESA_SHADER_COMPUTE);
2997 }
2998
2999 /**
3000 * The pipe->bind_[stage]_state() driver hook.
3001 *
3002 * Binds an uncompiled shader as the current one for a particular stage.
3003 * Updates dirty tracking to account for the shader's NOS.
3004 */
3005 static void
bind_shader_state(struct crocus_context * ice,struct crocus_uncompiled_shader * ish,gl_shader_stage stage)3006 bind_shader_state(struct crocus_context *ice,
3007 struct crocus_uncompiled_shader *ish,
3008 gl_shader_stage stage)
3009 {
3010 uint64_t dirty_bit = CROCUS_STAGE_DIRTY_UNCOMPILED_VS << stage;
3011 const uint64_t nos = ish ? ish->nos : 0;
3012
3013 const struct shader_info *old_info = crocus_get_shader_info(ice, stage);
3014 const struct shader_info *new_info = ish ? &ish->nir->info : NULL;
3015
3016 if ((old_info ? BITSET_LAST_BIT(old_info->textures_used) : 0) !=
3017 (new_info ? BITSET_LAST_BIT(new_info->textures_used) : 0)) {
3018 ice->state.stage_dirty |= CROCUS_STAGE_DIRTY_SAMPLER_STATES_VS << stage;
3019 }
3020
3021 ice->shaders.uncompiled[stage] = ish;
3022 ice->state.stage_dirty |= dirty_bit;
3023
3024 /* Record that CSOs need to mark CROCUS_DIRTY_UNCOMPILED_XS when they change
3025 * (or that they no longer need to do so).
3026 */
3027 for (int i = 0; i < CROCUS_NOS_COUNT; i++) {
3028 if (nos & (1 << i))
3029 ice->state.stage_dirty_for_nos[i] |= dirty_bit;
3030 else
3031 ice->state.stage_dirty_for_nos[i] &= ~dirty_bit;
3032 }
3033 }
3034
3035 static void
crocus_bind_vs_state(struct pipe_context * ctx,void * state)3036 crocus_bind_vs_state(struct pipe_context *ctx, void *state)
3037 {
3038 struct crocus_context *ice = (struct crocus_context *)ctx;
3039 struct crocus_uncompiled_shader *new_ish = state;
3040 struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
3041 const struct intel_device_info *devinfo = &screen->devinfo;
3042
3043 if (new_ish &&
3044 ice->state.window_space_position !=
3045 new_ish->nir->info.vs.window_space_position) {
3046 ice->state.window_space_position =
3047 new_ish->nir->info.vs.window_space_position;
3048
3049 ice->state.dirty |= CROCUS_DIRTY_CLIP |
3050 CROCUS_DIRTY_RASTER |
3051 CROCUS_DIRTY_CC_VIEWPORT;
3052 }
3053
3054 if (devinfo->ver == 6) {
3055 ice->state.stage_dirty |= CROCUS_DIRTY_GEN4_FF_GS_PROG;
3056 }
3057
3058 bind_shader_state((void *) ctx, state, MESA_SHADER_VERTEX);
3059 }
3060
3061 static void
crocus_bind_tcs_state(struct pipe_context * ctx,void * state)3062 crocus_bind_tcs_state(struct pipe_context *ctx, void *state)
3063 {
3064 bind_shader_state((void *) ctx, state, MESA_SHADER_TESS_CTRL);
3065 }
3066
3067 static void
crocus_bind_tes_state(struct pipe_context * ctx,void * state)3068 crocus_bind_tes_state(struct pipe_context *ctx, void *state)
3069 {
3070 struct crocus_context *ice = (struct crocus_context *)ctx;
3071
3072 /* Enabling/disabling optional stages requires a URB reconfiguration. */
3073 if (!!state != !!ice->shaders.uncompiled[MESA_SHADER_TESS_EVAL])
3074 ice->state.dirty |= CROCUS_DIRTY_GEN6_URB;
3075
3076 bind_shader_state((void *) ctx, state, MESA_SHADER_TESS_EVAL);
3077 }
3078
3079 static void
crocus_bind_gs_state(struct pipe_context * ctx,void * state)3080 crocus_bind_gs_state(struct pipe_context *ctx, void *state)
3081 {
3082 struct crocus_context *ice = (struct crocus_context *)ctx;
3083
3084 /* Enabling/disabling optional stages requires a URB reconfiguration. */
3085 if (!!state != !!ice->shaders.uncompiled[MESA_SHADER_GEOMETRY])
3086 ice->state.dirty |= CROCUS_DIRTY_GEN6_URB;
3087
3088 bind_shader_state((void *) ctx, state, MESA_SHADER_GEOMETRY);
3089 }
3090
3091 static void
crocus_bind_fs_state(struct pipe_context * ctx,void * state)3092 crocus_bind_fs_state(struct pipe_context *ctx, void *state)
3093 {
3094 struct crocus_context *ice = (struct crocus_context *) ctx;
3095 struct crocus_screen *screen = (struct crocus_screen *) ctx->screen;
3096 const struct intel_device_info *devinfo = &screen->devinfo;
3097 struct crocus_uncompiled_shader *old_ish =
3098 ice->shaders.uncompiled[MESA_SHADER_FRAGMENT];
3099 struct crocus_uncompiled_shader *new_ish = state;
3100
3101 const unsigned color_bits =
3102 BITFIELD64_BIT(FRAG_RESULT_COLOR) |
3103 BITFIELD64_RANGE(FRAG_RESULT_DATA0, BRW_MAX_DRAW_BUFFERS);
3104
3105 /* Fragment shader outputs influence HasWriteableRT */
3106 if (!old_ish || !new_ish ||
3107 (old_ish->nir->info.outputs_written & color_bits) !=
3108 (new_ish->nir->info.outputs_written & color_bits)) {
3109 if (devinfo->ver == 8)
3110 ice->state.dirty |= CROCUS_DIRTY_GEN8_PS_BLEND;
3111 else
3112 ice->state.dirty |= CROCUS_DIRTY_WM;
3113 }
3114
3115 if (devinfo->ver == 8)
3116 ice->state.dirty |= CROCUS_DIRTY_GEN8_PMA_FIX;
3117 bind_shader_state((void *) ctx, state, MESA_SHADER_FRAGMENT);
3118 }
3119
3120 static void
crocus_bind_cs_state(struct pipe_context * ctx,void * state)3121 crocus_bind_cs_state(struct pipe_context *ctx, void *state)
3122 {
3123 bind_shader_state((void *) ctx, state, MESA_SHADER_COMPUTE);
3124 }
3125
3126 void
crocus_init_program_functions(struct pipe_context * ctx)3127 crocus_init_program_functions(struct pipe_context *ctx)
3128 {
3129 ctx->create_vs_state = crocus_create_vs_state;
3130 ctx->create_tcs_state = crocus_create_tcs_state;
3131 ctx->create_tes_state = crocus_create_tes_state;
3132 ctx->create_gs_state = crocus_create_gs_state;
3133 ctx->create_fs_state = crocus_create_fs_state;
3134 ctx->create_compute_state = crocus_create_compute_state;
3135
3136 ctx->delete_vs_state = crocus_delete_vs_state;
3137 ctx->delete_tcs_state = crocus_delete_tcs_state;
3138 ctx->delete_tes_state = crocus_delete_tes_state;
3139 ctx->delete_gs_state = crocus_delete_gs_state;
3140 ctx->delete_fs_state = crocus_delete_fs_state;
3141 ctx->delete_compute_state = crocus_delete_cs_state;
3142
3143 ctx->bind_vs_state = crocus_bind_vs_state;
3144 ctx->bind_tcs_state = crocus_bind_tcs_state;
3145 ctx->bind_tes_state = crocus_bind_tes_state;
3146 ctx->bind_gs_state = crocus_bind_gs_state;
3147 ctx->bind_fs_state = crocus_bind_fs_state;
3148 ctx->bind_compute_state = crocus_bind_cs_state;
3149 }
3150