1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #include "pipe/p_defines.h"
28 #include "util/format/u_format.h"
29
30 #include "fd2_util.h"
31
32 static enum a2xx_sq_surfaceformat
pipe2surface(enum pipe_format format,struct surface_format * fmt)33 pipe2surface(enum pipe_format format, struct surface_format *fmt)
34 {
35 const struct util_format_description *desc = util_format_description(format);
36
37 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) {
38 switch (format) {
39 /* Compressed textures. */
40 case PIPE_FORMAT_ETC1_RGB8:
41 return FMT_ETC1_RGB;
42 case PIPE_FORMAT_DXT1_RGB:
43 case PIPE_FORMAT_DXT1_RGBA:
44 return FMT_DXT1;
45 case PIPE_FORMAT_DXT3_RGBA:
46 return FMT_DXT2_3;
47 case PIPE_FORMAT_DXT5_RGBA:
48 return FMT_DXT4_5;
49 case PIPE_FORMAT_ATC_RGB:
50 return FMT_ATI_TC_555_565_RGB;
51 case PIPE_FORMAT_ATC_RGBA_EXPLICIT:
52 return FMT_ATI_TC_555_565_RGBA;
53 case PIPE_FORMAT_ATC_RGBA_INTERPOLATED:
54 return FMT_ATI_TC_555_565_RGBA_INTERP;
55 /* YUV buffers. */
56 case PIPE_FORMAT_UYVY:
57 return FMT_Y1_Cr_Y0_Cb;
58 case PIPE_FORMAT_YUYV:
59 return FMT_Cr_Y1_Cb_Y0;
60 default:
61 return ~0;
62 }
63 }
64
65 uint32_t channel_size = 0;
66 for (unsigned i = 0; i < 4; i++)
67 channel_size |= desc->channel[i].size << i*8;
68
69 unsigned i = util_format_get_first_non_void_channel(format);
70 if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED ||
71 desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
72 fmt->sign = SQ_TEX_SIGN_SIGNED;
73 if (!desc->channel[i].normalized)
74 fmt->num_format = SQ_TEX_NUM_FORMAT_INT;
75 if (desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
76 fmt->exp_adjust = -16;
77
78 /* Note: the 3 channel 24bpp/48bpp/96bpp formats are only for vertex fetch
79 * we can use the 4 channel format and ignore the 4th component just isn't used
80 * XXX: is it possible for the extra loaded component to cause a MMU fault?
81 */
82
83 #define CASE(r, g, b, a) case (r | g << 8 | b << 16 | a << 24)
84 if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
85 switch (channel_size) {
86 CASE(16, 0, 0, 0): return FMT_16_FLOAT;
87 CASE(16, 16, 0, 0): return FMT_16_16_FLOAT;
88 CASE(16, 16, 16, 0): return FMT_16_16_16_16_FLOAT; /* Note: only for vertex */
89 CASE(16, 16, 16, 16): return FMT_16_16_16_16_FLOAT;
90 CASE(32, 0, 0, 0): return FMT_32_FLOAT;
91 CASE(32, 32, 0, 0): return FMT_32_32_FLOAT;
92 CASE(32, 32, 32, 0): return FMT_32_32_32_FLOAT;
93 CASE(32, 32, 32, 32): return FMT_32_32_32_32_FLOAT;
94 }
95 } else {
96 switch (channel_size) {
97 CASE( 8, 0, 0, 0): return FMT_8;
98 CASE( 8, 8, 0, 0): return FMT_8_8;
99 CASE( 8, 8, 8, 0): return FMT_8_8_8_8; /* Note: only for vertex */
100 CASE( 8, 8, 8, 8): return FMT_8_8_8_8;
101 CASE(16, 0, 0, 0): return FMT_16;
102 CASE(16, 16, 0, 0): return FMT_16_16;
103 CASE(16, 16, 16, 0): return FMT_16_16_16_16; /* Note: only for vertex */
104 CASE(16, 16, 16, 16): return FMT_16_16_16_16;
105 CASE(32, 0, 0, 0): return FMT_32;
106 CASE(32, 32, 0, 0): return FMT_32_32;
107 CASE(32, 32, 32, 0): return FMT_32_32_32_32; /* Note: only for vertex */
108 CASE(32, 32, 32, 32): return FMT_32_32_32_32;
109 CASE( 4, 4, 4, 4): return FMT_4_4_4_4;
110 CASE( 5, 5, 5, 1): return FMT_1_5_5_5;
111 CASE( 5, 6, 5, 0): return FMT_5_6_5;
112 CASE(10, 10, 10, 2): return FMT_2_10_10_10;
113 CASE( 8, 24, 0, 0): return FMT_24_8;
114 CASE( 2, 3, 3, 0): return FMT_2_3_3; /* Note: R/B swapped */
115 }
116 }
117 #undef CASE
118
119 return ~0;
120 }
121
122 struct surface_format
fd2_pipe2surface(enum pipe_format format)123 fd2_pipe2surface(enum pipe_format format)
124 {
125 struct surface_format fmt = {
126 .sign = SQ_TEX_SIGN_UNSIGNED,
127 .num_format = SQ_TEX_NUM_FORMAT_FRAC,
128 .exp_adjust = 0,
129 };
130 fmt.format = pipe2surface(format, &fmt);
131 return fmt;
132 }
133
134 enum a2xx_colorformatx
fd2_pipe2color(enum pipe_format format)135 fd2_pipe2color(enum pipe_format format)
136 {
137 switch (format) {
138 /* 8-bit buffers. */
139 case PIPE_FORMAT_R8_UNORM:
140 return COLORX_8;
141 case PIPE_FORMAT_B2G3R3_UNORM:
142 return COLORX_2_3_3; /* note: untested */
143
144 /* 16-bit buffers. */
145 case PIPE_FORMAT_B5G6R5_UNORM:
146 return COLORX_5_6_5;
147 case PIPE_FORMAT_B5G5R5A1_UNORM:
148 case PIPE_FORMAT_B5G5R5X1_UNORM:
149 return COLORX_1_5_5_5;
150 case PIPE_FORMAT_B4G4R4A4_UNORM:
151 case PIPE_FORMAT_B4G4R4X4_UNORM:
152 return COLORX_4_4_4_4;
153 case PIPE_FORMAT_R8G8_UNORM:
154 return COLORX_8_8;
155
156 /* 32-bit buffers. */
157 case PIPE_FORMAT_B8G8R8A8_UNORM:
158 case PIPE_FORMAT_B8G8R8X8_UNORM:
159 case PIPE_FORMAT_R8G8B8A8_UNORM:
160 case PIPE_FORMAT_R8G8B8X8_UNORM:
161 return COLORX_8_8_8_8;
162 /* Note: snorm untested */
163 case PIPE_FORMAT_R8G8B8A8_SNORM:
164 case PIPE_FORMAT_R8G8B8X8_SNORM:
165 return COLORX_S8_8_8_8;
166
167 /* float buffers */
168 case PIPE_FORMAT_R16_FLOAT:
169 return COLORX_16_FLOAT;
170 case PIPE_FORMAT_R16G16_FLOAT:
171 return COLORX_16_16_FLOAT;
172 case PIPE_FORMAT_R16G16B16A16_FLOAT:
173 return COLORX_16_16_16_16_FLOAT;
174 case PIPE_FORMAT_R32_FLOAT:
175 return COLORX_32_FLOAT;
176 case PIPE_FORMAT_R32G32_FLOAT:
177 return COLORX_32_32_FLOAT;
178 case PIPE_FORMAT_R32G32B32A32_FLOAT:
179 return COLORX_32_32_32_32_FLOAT;
180
181 default:
182 return ~0;
183 }
184 }
185
186 static inline enum sq_tex_swiz
tex_swiz(unsigned swiz)187 tex_swiz(unsigned swiz)
188 {
189 switch (swiz) {
190 default:
191 case PIPE_SWIZZLE_X: return SQ_TEX_X;
192 case PIPE_SWIZZLE_Y: return SQ_TEX_Y;
193 case PIPE_SWIZZLE_Z: return SQ_TEX_Z;
194 case PIPE_SWIZZLE_W: return SQ_TEX_W;
195 case PIPE_SWIZZLE_0: return SQ_TEX_ZERO;
196 case PIPE_SWIZZLE_1: return SQ_TEX_ONE;
197 }
198 }
199
200 uint32_t
fd2_tex_swiz(enum pipe_format format,unsigned swizzle_r,unsigned swizzle_g,unsigned swizzle_b,unsigned swizzle_a)201 fd2_tex_swiz(enum pipe_format format, unsigned swizzle_r, unsigned swizzle_g,
202 unsigned swizzle_b, unsigned swizzle_a)
203 {
204 const struct util_format_description *desc =
205 util_format_description(format);
206 unsigned char swiz[4] = {
207 swizzle_r, swizzle_g, swizzle_b, swizzle_a,
208 }, rswiz[4];
209
210 util_format_compose_swizzles(desc->swizzle, swiz, rswiz);
211
212 return A2XX_SQ_TEX_3_SWIZ_X(tex_swiz(rswiz[0])) |
213 A2XX_SQ_TEX_3_SWIZ_Y(tex_swiz(rswiz[1])) |
214 A2XX_SQ_TEX_3_SWIZ_Z(tex_swiz(rswiz[2])) |
215 A2XX_SQ_TEX_3_SWIZ_W(tex_swiz(rswiz[3]));
216 }
217
218 uint32_t
fd2_vtx_swiz(enum pipe_format format,unsigned swizzle)219 fd2_vtx_swiz(enum pipe_format format, unsigned swizzle)
220 {
221 const struct util_format_description *desc =
222 util_format_description(format);
223 unsigned char swiz[4], rswiz[4];
224
225 for (unsigned i = 0; i < 4; i++)
226 swiz[i] = (swizzle >> i * 3) & 7;
227
228 util_format_compose_swizzles(desc->swizzle, swiz, rswiz);
229
230 return rswiz[0] | rswiz[1] << 3 | rswiz[2] << 6 | rswiz[3] << 9;
231 }
232