1 /*
2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
3 
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7 
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15 
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19 
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 
28 **************************************************************************/
29 
30 /*
31  * Authors:
32  *   Keith Whitwell <keithw@vmware.com>
33  */
34 
35 #include <stdbool.h>
36 #include "main/glheader.h"
37 #include "main/api_arrayelt.h"
38 #include "main/api_exec.h"
39 #include "main/context.h"
40 
41 #include "main/extensions.h"
42 #include "main/version.h"
43 #include "main/vtxfmt.h"
44 
45 #include "swrast/swrast.h"
46 #include "swrast_setup/swrast_setup.h"
47 #include "vbo/vbo.h"
48 
49 #include "tnl/tnl.h"
50 #include "tnl/t_pipeline.h"
51 
52 #include "drivers/common/driverfuncs.h"
53 
54 #include "r200_context.h"
55 #include "r200_ioctl.h"
56 #include "r200_state.h"
57 #include "r200_tex.h"
58 #include "r200_swtcl.h"
59 #include "r200_tcl.h"
60 #include "r200_vertprog.h"
61 #include "radeon_queryobj.h"
62 #include "r200_blit.h"
63 #include "radeon_fog.h"
64 
65 #include "radeon_span.h"
66 
67 #include "utils.h"
68 #include "util/driconf.h" /* for symbolic values of enum-type options */
69 
70 /* Return various strings for glGetString().
71  */
r200GetString(struct gl_context * ctx,GLenum name)72 static const GLubyte *r200GetString( struct gl_context *ctx, GLenum name )
73 {
74    r200ContextPtr rmesa = R200_CONTEXT(ctx);
75    static char buffer[128];
76    unsigned   offset;
77    GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
78       rmesa->radeon.radeonScreen->AGPMode;
79 
80    switch ( name ) {
81    case GL_VENDOR:
82       return (GLubyte *)"Mesa Project";
83 
84    case GL_RENDERER:
85       offset = driGetRendererString( buffer, "R200", agp_mode );
86 
87       sprintf( & buffer[ offset ], " %sTCL",
88 	       !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
89 	       ? "" : "NO-" );
90 
91       return (GLubyte *)buffer;
92 
93    default:
94       return NULL;
95    }
96 }
97 
98 
99 extern const struct tnl_pipeline_stage _r200_render_stage;
100 extern const struct tnl_pipeline_stage _r200_tcl_stage;
101 
102 static const struct tnl_pipeline_stage *r200_pipeline[] = {
103 
104    /* Try and go straight to t&l
105     */
106    &_r200_tcl_stage,
107 
108    /* Catch any t&l fallbacks
109     */
110    &_tnl_vertex_transform_stage,
111    &_tnl_normal_transform_stage,
112    &_tnl_lighting_stage,
113    &_tnl_fog_coordinate_stage,
114    &_tnl_texgen_stage,
115    &_tnl_texture_transform_stage,
116    &_tnl_point_attenuation_stage,
117    &_tnl_vertex_program_stage,
118    /* Try again to go to tcl?
119     *     - no good for asymmetric-twoside (do with multipass)
120     *     - no good for asymmetric-unfilled (do with multipass)
121     *     - good for material
122     *     - good for texgen
123     *     - need to manipulate a bit of state
124     *
125     * - worth it/not worth it?
126     */
127 
128    /* Else do them here.
129     */
130 /*    &_r200_render_stage,  */ /* FIXME: bugs with ut2003 */
131    &_tnl_render_stage,		/* FALLBACK:  */
132    NULL,
133 };
134 
135 
136 
137 /* Initialize the driver's misc functions.
138  */
r200InitDriverFuncs(struct dd_function_table * functions)139 static void r200InitDriverFuncs( struct dd_function_table *functions )
140 {
141     functions->GetString		= r200GetString;
142 }
143 
144 
r200_emit_query_finish(radeonContextPtr radeon)145 static void r200_emit_query_finish(radeonContextPtr radeon)
146 {
147    BATCH_LOCALS(radeon);
148    struct radeon_query_object *query = radeon->query.current;
149 
150    BEGIN_BATCH(4);
151    OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
152    OUT_BATCH_RELOC(query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
153    END_BATCH();
154    query->curr_offset += sizeof(uint32_t);
155    assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
156    query->emitted_begin = GL_FALSE;
157 }
158 
r200_init_vtbl(radeonContextPtr radeon)159 static void r200_init_vtbl(radeonContextPtr radeon)
160 {
161    radeon->vtbl.swtcl_flush = r200_swtcl_flush;
162    radeon->vtbl.fallback = r200Fallback;
163    radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
164    radeon->vtbl.emit_query_finish = r200_emit_query_finish;
165    radeon->vtbl.check_blit = r200_check_blit;
166    radeon->vtbl.blit = r200_blit;
167    radeon->vtbl.is_format_renderable = radeonIsFormatRenderable;
168    radeon->vtbl.revalidate_all_buffers = r200ValidateBuffers;
169 }
170 
171 
172 /* Create the device specific rendering context.
173  */
r200CreateContext(gl_api api,const struct gl_config * glVisual,__DRIcontext * driContextPriv,const struct __DriverContextConfig * ctx_config,unsigned * error,void * sharedContextPrivate)174 GLboolean r200CreateContext( gl_api api,
175 			     const struct gl_config *glVisual,
176 			     __DRIcontext *driContextPriv,
177 			     const struct __DriverContextConfig *ctx_config,
178 			     unsigned *error,
179 			     void *sharedContextPrivate)
180 {
181    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
182    radeonScreenPtr screen = (radeonScreenPtr)(sPriv->driverPrivate);
183    struct dd_function_table functions;
184    r200ContextPtr rmesa;
185    struct gl_context *ctx;
186    int i;
187    int tcl_mode;
188 
189    if (ctx_config->flags & ~(__DRI_CTX_FLAG_DEBUG | __DRI_CTX_FLAG_NO_ERROR)) {
190       *error = __DRI_CTX_ERROR_UNKNOWN_FLAG;
191       return false;
192    }
193 
194    if (ctx_config->attribute_mask) {
195       *error = __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE;
196       return false;
197    }
198 
199    assert(driContextPriv);
200    assert(screen);
201 
202    /* Allocate the R200 context */
203    rmesa = calloc(1, sizeof(*rmesa));
204    if ( !rmesa ) {
205       *error = __DRI_CTX_ERROR_NO_MEMORY;
206       return GL_FALSE;
207    }
208 
209    rmesa->radeon.radeonScreen = screen;
210    r200_init_vtbl(&rmesa->radeon);
211    /* init exp fog table data */
212    radeonInitStaticFogData();
213 
214    /* Parse configuration files.
215     * Do this here so that initialMaxAnisotropy is set before we create
216     * the default textures.
217     */
218    driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
219 			screen->driScreen->myNum, "r200", NULL, NULL, 0, NULL, 0);
220    rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
221 							"def_max_anisotropy");
222 
223    if (driQueryOptionb( &rmesa->radeon.optionCache, "hyperz"))
224       rmesa->using_hyperz = GL_TRUE;
225 
226    /* Init default driver functions then plug in our R200-specific functions
227     * (the texture functions are especially important)
228     */
229    _mesa_init_driver_functions(&functions);
230    _tnl_init_driver_draw_function(&functions);
231    r200InitDriverFuncs(&functions);
232    r200InitIoctlFuncs(&functions);
233    r200InitStateFuncs(&rmesa->radeon, &functions);
234    r200InitTextureFuncs(&rmesa->radeon, &functions);
235    r200InitShaderFuncs(&functions);
236    radeonInitQueryObjFunctions(&functions);
237 
238    if (!radeonInitContext(&rmesa->radeon, api, &functions,
239 			  glVisual, driContextPriv,
240 			  sharedContextPrivate)) {
241      free(rmesa);
242      *error = __DRI_CTX_ERROR_NO_MEMORY;
243      return GL_FALSE;
244    }
245 
246    rmesa->radeon.swtcl.RenderIndex = ~0;
247    rmesa->radeon.hw.all_dirty = 1;
248 
249    ctx = &rmesa->radeon.glCtx;
250 
251    driContextSetFlags(ctx, ctx_config->flags);
252 
253    /* Initialize the software rasterizer and helper modules.
254     */
255    _swrast_CreateContext( ctx );
256    _vbo_CreateContext( ctx, false );
257    _tnl_CreateContext( ctx );
258    _swsetup_CreateContext( ctx );
259 
260    ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
261 						 "texture_units");
262    ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
263    ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
264 
265    ctx->Const.MaxCombinedTextureImageUnits = ctx->Const.MaxTextureUnits;
266 
267    ctx->Const.StripTextureBorder = GL_TRUE;
268 
269    /* FIXME: When no memory manager is available we should set this
270     * to some reasonable value based on texture memory pool size */
271    ctx->Const.MaxTextureSize = 2048;
272    ctx->Const.Max3DTextureLevels = 9;
273    ctx->Const.MaxCubeTextureLevels = 12;
274    ctx->Const.MaxTextureRectSize = 2048;
275    ctx->Const.MaxRenderbufferSize = 2048;
276 
277    ctx->Const.MaxTextureMaxAnisotropy = 16.0;
278 
279    /* No wide AA points.
280     */
281    ctx->Const.MinPointSize = 1.0;
282    ctx->Const.MinPointSizeAA = 1.0;
283    ctx->Const.MaxPointSizeAA = 1.0;
284    ctx->Const.PointSizeGranularity = 0.0625;
285    ctx->Const.MaxPointSize = 2047.0;
286 
287    /* mesa initialization problem - _mesa_init_point was already called */
288    ctx->Point.MaxSize = ctx->Const.MaxPointSize;
289 
290    ctx->Const.MinLineWidth = 1.0;
291    ctx->Const.MinLineWidthAA = 1.0;
292    ctx->Const.MaxLineWidth = 10.0;
293    ctx->Const.MaxLineWidthAA = 10.0;
294    ctx->Const.LineWidthGranularity = 0.0625;
295 
296    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeInstructions = R200_VSF_MAX_INST;
297    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAttribs = 12;
298    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeTemps = R200_VSF_MAX_TEMPS;
299    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeParameters = R200_VSF_MAX_PARAM;
300    ctx->Const.Program[MESA_SHADER_VERTEX].MaxNativeAddressRegs = 1;
301 
302    ctx->Const.MaxDrawBuffers = 1;
303    ctx->Const.MaxColorAttachments = 1;
304 
305    ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].OptimizeForAOS = GL_TRUE;
306 
307    /* Install the customized pipeline:
308     */
309    _tnl_destroy_pipeline( ctx );
310    _tnl_install_pipeline( ctx, r200_pipeline );
311 
312    /* Try and keep materials and vertices separate:
313     */
314 /*    _tnl_isolate_materials( ctx, GL_TRUE ); */
315 
316 
317    /* Configure swrast and TNL to match hardware characteristics:
318     */
319    _swrast_allow_pixel_fog( ctx, GL_FALSE );
320    _swrast_allow_vertex_fog( ctx, GL_TRUE );
321    _tnl_allow_pixel_fog( ctx, GL_FALSE );
322    _tnl_allow_vertex_fog( ctx, GL_TRUE );
323 
324 
325    for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
326       _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
327       _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
328    }
329    _math_matrix_ctr( &rmesa->tmpmat );
330    _math_matrix_set_identity( &rmesa->tmpmat );
331 
332    ctx->Extensions.ARB_occlusion_query = true;
333    ctx->Extensions.ARB_point_sprite = true;
334    ctx->Extensions.ARB_texture_border_clamp = true;
335    ctx->Extensions.ARB_texture_cube_map = true;
336    ctx->Extensions.ARB_texture_env_combine = true;
337    ctx->Extensions.ARB_texture_env_dot3 = true;
338    ctx->Extensions.ARB_texture_env_crossbar = true;
339    ctx->Extensions.ARB_texture_filter_anisotropic = true;
340    ctx->Extensions.ARB_texture_mirror_clamp_to_edge = true;
341    ctx->Extensions.ARB_vertex_program = true;
342    ctx->Extensions.ATI_fragment_shader = (ctx->Const.MaxTextureUnits == 6);
343    ctx->Extensions.ATI_texture_env_combine3 = true;
344    ctx->Extensions.ATI_texture_mirror_once = true;
345    ctx->Extensions.EXT_blend_color = true;
346    ctx->Extensions.EXT_blend_equation_separate = true;
347    ctx->Extensions.EXT_blend_func_separate = true;
348    ctx->Extensions.EXT_blend_minmax = true;
349    ctx->Extensions.EXT_gpu_program_parameters = true;
350    ctx->Extensions.EXT_point_parameters = true;
351    ctx->Extensions.EXT_texture_env_dot3 = true;
352    ctx->Extensions.EXT_texture_filter_anisotropic = true;
353    ctx->Extensions.EXT_texture_mirror_clamp = true;
354    ctx->Extensions.MESA_pack_invert = true;
355    ctx->Extensions.NV_fog_distance = true;
356    ctx->Extensions.NV_texture_rectangle = true;
357    ctx->Extensions.OES_EGL_image = true;
358 
359    if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
360      /* yuv textures don't work with some chips - R200 / rv280 okay so far
361 	others get the bit ordering right but don't actually do YUV-RGB conversion */
362       ctx->Extensions.MESA_ycbcr_texture = true;
363    }
364    ctx->Extensions.EXT_texture_compression_s3tc = true;
365    ctx->Extensions.ANGLE_texture_compression_dxt = true;
366 
367 #if 0
368    r200InitDriverFuncs( ctx );
369    r200InitIoctlFuncs( ctx );
370    r200InitStateFuncs( ctx );
371    r200InitTextureFuncs( ctx );
372 #endif
373    /* plug in a few more device driver functions */
374    /* XXX these should really go right after _mesa_init_driver_functions() */
375    radeon_fbo_init(&rmesa->radeon);
376    radeonInitSpanFuncs( ctx );
377    r200InitTnlFuncs( ctx );
378    r200InitState( rmesa );
379    r200InitSwtcl( ctx );
380 
381    rmesa->prefer_gart_client_texturing =
382       (getenv("R200_GART_CLIENT_TEXTURES") != 0);
383 
384    tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
385    if (getenv("R200_NO_RAST")) {
386       fprintf(stderr, "disabling 3D acceleration\n");
387       FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
388    }
389    else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
390 	    !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
391       if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
392 	 rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
393 	 fprintf(stderr, "Disabling HW TCL support\n");
394       }
395       TCL_FALLBACK(&rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
396    }
397 
398    _mesa_override_extensions(ctx);
399    _mesa_compute_version(ctx);
400 
401    /* Exec table initialization requires the version to be computed */
402    _mesa_initialize_dispatch_tables(ctx);
403    _mesa_initialize_vbo_vtxfmt(ctx);
404 
405    *error = __DRI_CTX_ERROR_SUCCESS;
406    return GL_TRUE;
407 }
408 
409 
r200DestroyContext(__DRIcontext * driContextPriv)410 void r200DestroyContext( __DRIcontext *driContextPriv )
411 {
412 	int i;
413 	r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
414 	if (rmesa)
415 	{
416 		for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
417 			_math_matrix_dtr( &rmesa->TexGenMatrix[i] );
418 		}
419 	}
420 	radeonDestroyContext(driContextPriv);
421 }
422