1 /*
2  * Copyright © 2012 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Eric Anholt <eric@anholt.net>
25  *
26  */
27 
28 #ifndef BRW_VEC4_LIVE_VARIABLES_H
29 #define BRW_VEC4_LIVE_VARIABLES_H
30 
31 #include "brw_ir_vec4.h"
32 #include "brw_ir_analysis.h"
33 #include "util/bitset.h"
34 
35 struct backend_shader;
36 
37 namespace brw {
38 
39 class vec4_live_variables {
40 public:
41    struct block_data {
42       /**
43        * Which variables are defined before being used in the block.
44        *
45        * Note that for our purposes, "defined" means unconditionally, completely
46        * defined.
47        */
48       BITSET_WORD *def;
49 
50       /**
51        * Which variables are used before being defined in the block.
52        */
53       BITSET_WORD *use;
54 
55       /** Which defs reach the entry point of the block. */
56       BITSET_WORD *livein;
57 
58       /** Which defs reach the exit point of the block. */
59       BITSET_WORD *liveout;
60 
61       BITSET_WORD flag_def[1];
62       BITSET_WORD flag_use[1];
63       BITSET_WORD flag_livein[1];
64       BITSET_WORD flag_liveout[1];
65    };
66 
67    vec4_live_variables(const backend_shader *s);
68    ~vec4_live_variables();
69 
70    bool
71    validate(const backend_shader *s) const;
72 
73    analysis_dependency_class
dependency_class()74    dependency_class() const
75    {
76       return (DEPENDENCY_INSTRUCTION_IDENTITY |
77               DEPENDENCY_INSTRUCTION_DATA_FLOW |
78               DEPENDENCY_VARIABLES);
79    }
80 
81    int num_vars;
82    int bitset_words;
83 
84    const struct intel_device_info *devinfo;
85 
86    /** Per-basic-block information on live variables */
87    struct block_data *block_data;
88 
89    /** @{
90     * Final computed live ranges for each variable.
91     */
92    int *start;
93    int *end;
94    /** @} */
95 
96    int var_range_start(unsigned v, unsigned n) const;
97    int var_range_end(unsigned v, unsigned n) const;
98    bool vgrfs_interfere(int a, int b) const;
99 
100 protected:
101    void setup_def_use();
102    void compute_live_variables();
103    void compute_start_end();
104 
105    const simple_allocator &alloc;
106    cfg_t *cfg;
107    void *mem_ctx;
108 };
109 
110 /* Returns the variable index for the k-th dword of the c-th component of
111  * register reg.
112  */
113 inline unsigned
114 var_from_reg(const simple_allocator &alloc, const src_reg &reg,
115              unsigned c = 0, unsigned k = 0)
116 {
117    assert(reg.file == VGRF && reg.nr < alloc.count && c < 4);
118    const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
119    unsigned result =
120       8 * alloc.offsets[reg.nr] + reg.offset / 4 +
121       (BRW_GET_SWZ(reg.swizzle, c) + k / csize * 4) * csize + k % csize;
122    /* Do not exceed the limit for this register */
123    assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr]));
124    return result;
125 }
126 
127 inline unsigned
128 var_from_reg(const simple_allocator &alloc, const dst_reg &reg,
129              unsigned c = 0, unsigned k = 0)
130 {
131    assert(reg.file == VGRF && reg.nr < alloc.count && c < 4);
132    const unsigned csize = DIV_ROUND_UP(type_sz(reg.type), 4);
133    unsigned result =
134       8 * alloc.offsets[reg.nr] + reg.offset / 4 +
135       (c + k / csize * 4) * csize + k % csize;
136    /* Do not exceed the limit for this register */
137    assert(result < 8 * (alloc.offsets[reg.nr] + alloc.sizes[reg.nr]));
138    return result;
139 }
140 
141 } /* namespace brw */
142 
143 #endif /* BRW_VEC4_LIVE_VARIABLES_H */
144