1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include <sys/sysinfo.h>
26
27 #include "common/v3d_device_info.h"
28 #include "common/v3d_limits.h"
29 #include "util/os_misc.h"
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_debug.h"
35 #include "util/u_memory.h"
36 #include "util/format/u_format.h"
37 #include "util/u_hash_table.h"
38 #include "util/u_screen.h"
39 #include "util/u_transfer_helper.h"
40 #include "util/ralloc.h"
41 #include "util/xmlconfig.h"
42
43 #include <xf86drm.h>
44 #include "v3d_screen.h"
45 #include "v3d_context.h"
46 #include "v3d_resource.h"
47 #include "compiler/v3d_compiler.h"
48 #include "drm-uapi/drm_fourcc.h"
49
50 static const char *
v3d_screen_get_name(struct pipe_screen * pscreen)51 v3d_screen_get_name(struct pipe_screen *pscreen)
52 {
53 struct v3d_screen *screen = v3d_screen(pscreen);
54
55 if (!screen->name) {
56 screen->name = ralloc_asprintf(screen,
57 "V3D %d.%d",
58 screen->devinfo.ver / 10,
59 screen->devinfo.ver % 10);
60 }
61
62 return screen->name;
63 }
64
65 static const char *
v3d_screen_get_vendor(struct pipe_screen * pscreen)66 v3d_screen_get_vendor(struct pipe_screen *pscreen)
67 {
68 return "Broadcom";
69 }
70
71 static void
v3d_screen_destroy(struct pipe_screen * pscreen)72 v3d_screen_destroy(struct pipe_screen *pscreen)
73 {
74 struct v3d_screen *screen = v3d_screen(pscreen);
75
76 _mesa_hash_table_destroy(screen->bo_handles, NULL);
77 v3d_bufmgr_destroy(pscreen);
78 slab_destroy_parent(&screen->transfer_pool);
79 if (screen->ro)
80 screen->ro->destroy(screen->ro);
81
82 if (using_v3d_simulator)
83 v3d_simulator_destroy(screen->sim_file);
84
85 v3d_compiler_free(screen->compiler);
86 u_transfer_helper_destroy(pscreen->transfer_helper);
87
88 close(screen->fd);
89 ralloc_free(pscreen);
90 }
91
92 static bool
v3d_has_feature(struct v3d_screen * screen,enum drm_v3d_param feature)93 v3d_has_feature(struct v3d_screen *screen, enum drm_v3d_param feature)
94 {
95 struct drm_v3d_get_param p = {
96 .param = feature,
97 };
98 int ret = v3d_ioctl(screen->fd, DRM_IOCTL_V3D_GET_PARAM, &p);
99
100 if (ret != 0)
101 return false;
102
103 return p.value;
104 }
105
106 static int
v3d_screen_get_param(struct pipe_screen * pscreen,enum pipe_cap param)107 v3d_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
108 {
109 struct v3d_screen *screen = v3d_screen(pscreen);
110
111 switch (param) {
112 /* Supported features (boolean caps). */
113 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
114 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
115 case PIPE_CAP_NPOT_TEXTURES:
116 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
117 case PIPE_CAP_TEXTURE_MULTISAMPLE:
118 case PIPE_CAP_TEXTURE_SWIZZLE:
119 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
120 case PIPE_CAP_START_INSTANCE:
121 case PIPE_CAP_TGSI_INSTANCEID:
122 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
123 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
124 case PIPE_CAP_VERTEX_SHADER_SATURATE:
125 case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
126 case PIPE_CAP_EMULATE_NONFIXED_PRIMITIVE_RESTART:
127 case PIPE_CAP_PRIMITIVE_RESTART:
128 case PIPE_CAP_OCCLUSION_QUERY:
129 case PIPE_CAP_POINT_SPRITE:
130 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
131 case PIPE_CAP_DRAW_INDIRECT:
132 case PIPE_CAP_MULTI_DRAW_INDIRECT:
133 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
134 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
135 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
136 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
137 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
138 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
139 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
140 case PIPE_CAP_TGSI_TEXCOORD:
141 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
142 return 1;
143
144 case PIPE_CAP_TEXTURE_QUERY_LOD:
145 return screen->devinfo.ver >= 42;
146 break;
147
148 case PIPE_CAP_PACKED_UNIFORMS:
149 /* We can't enable this flag, because it results in load_ubo
150 * intrinsics across a 16b boundary, but v3d's TMU general
151 * memory accesses wrap on 16b boundaries.
152 */
153 return 0;
154
155 case PIPE_CAP_NIR_IMAGES_AS_DEREF:
156 return 0;
157
158 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
159 /* XXX perf: we don't want to emit these extra blits for
160 * glReadPixels(), since we still have to do an uncached read
161 * from the GPU of the result after waiting for the TFU blit
162 * to happen. However, disabling this introduces instability
163 * in
164 * dEQP-GLES31.functional.image_load_store.early_fragment_tests.*
165 * and corruption in chromium's rendering.
166 */
167 return 1;
168
169 case PIPE_CAP_COMPUTE:
170 return screen->has_csd && screen->devinfo.ver >= 41;
171
172 case PIPE_CAP_GENERATE_MIPMAP:
173 return v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_TFU);
174
175 case PIPE_CAP_INDEP_BLEND_ENABLE:
176 return screen->devinfo.ver >= 40;
177
178 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
179 return 256;
180
181 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
182 if (screen->devinfo.ver < 40)
183 return 0;
184 return 4;
185
186 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
187 if (screen->has_cache_flush)
188 return 4;
189 else
190 return 0; /* Disables shader storage */
191
192 case PIPE_CAP_GLSL_FEATURE_LEVEL:
193 return 330;
194
195 case PIPE_CAP_ESSL_FEATURE_LEVEL:
196 return 310;
197
198 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
199 return 140;
200
201 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
202 return 1;
203 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
204 return 0;
205 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
206 if (screen->devinfo.ver >= 40)
207 return 0;
208 else
209 return 1;
210 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
211 if (screen->devinfo.ver >= 40)
212 return 1;
213 else
214 return 0;
215
216 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
217 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
218 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
219 return 1;
220
221 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
222 return 4;
223
224 case PIPE_CAP_MAX_VARYINGS:
225 return V3D_MAX_FS_INPUTS / 4;
226
227 /* Texturing. */
228 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
229 if (screen->devinfo.ver < 40)
230 return 2048;
231 else if (screen->nonmsaa_texture_size_limit)
232 return 7680;
233 else
234 return 4096;
235 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
236 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
237 if (screen->devinfo.ver < 40)
238 return 12;
239 else
240 return V3D_MAX_MIP_LEVELS;
241 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
242 return 2048;
243
244 /* Render targets. */
245 case PIPE_CAP_MAX_RENDER_TARGETS:
246 return 4;
247
248 case PIPE_CAP_VENDOR_ID:
249 return 0x14E4;
250 case PIPE_CAP_ACCELERATED:
251 return 1;
252 case PIPE_CAP_VIDEO_MEMORY: {
253 uint64_t system_memory;
254
255 if (!os_get_total_physical_memory(&system_memory))
256 return 0;
257
258 return (int)(system_memory >> 20);
259 }
260 case PIPE_CAP_UMA:
261 return 1;
262
263 case PIPE_CAP_ALPHA_TEST:
264 case PIPE_CAP_FLATSHADE:
265 case PIPE_CAP_TWO_SIDED_COLOR:
266 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
267 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
268 case PIPE_CAP_GL_CLAMP:
269 return 0;
270
271 /* Geometry shaders */
272 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
273 /* Minimum required by GLES 3.2 */
274 return 1024;
275 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
276 /* MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS / 4 */
277 return 256;
278 case PIPE_CAP_MAX_GS_INVOCATIONS:
279 return 32;
280
281 case PIPE_CAP_SUPPORTED_PRIM_MODES:
282 case PIPE_CAP_SUPPORTED_PRIM_MODES_WITH_RESTART:
283 return screen->prim_types;
284
285 default:
286 return u_pipe_screen_get_param_defaults(pscreen, param);
287 }
288 }
289
290 static float
v3d_screen_get_paramf(struct pipe_screen * pscreen,enum pipe_capf param)291 v3d_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
292 {
293 switch (param) {
294 case PIPE_CAPF_MAX_LINE_WIDTH:
295 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
296 return V3D_MAX_LINE_WIDTH;
297
298 case PIPE_CAPF_MAX_POINT_WIDTH:
299 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
300 return V3D_MAX_POINT_SIZE;
301
302 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
303 return 0.0f;
304 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
305 return 16.0f;
306
307 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
308 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
309 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
310 return 0.0f;
311 default:
312 fprintf(stderr, "unknown paramf %d\n", param);
313 return 0;
314 }
315 }
316
317 static int
v3d_screen_get_shader_param(struct pipe_screen * pscreen,unsigned shader,enum pipe_shader_cap param)318 v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
319 enum pipe_shader_cap param)
320 {
321 struct v3d_screen *screen = v3d_screen(pscreen);
322
323 switch (shader) {
324 case PIPE_SHADER_VERTEX:
325 case PIPE_SHADER_FRAGMENT:
326 break;
327 case PIPE_SHADER_COMPUTE:
328 if (!screen->has_csd)
329 return 0;
330 break;
331 case PIPE_SHADER_GEOMETRY:
332 if (screen->devinfo.ver < 41)
333 return 0;
334 break;
335 default:
336 return 0;
337 }
338
339 /* this is probably not totally correct.. but it's a start: */
340 switch (param) {
341 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
342 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
343 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
344 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
345 return 16384;
346
347 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
348 return UINT_MAX;
349
350 case PIPE_SHADER_CAP_MAX_INPUTS:
351 switch (shader) {
352 case PIPE_SHADER_VERTEX:
353 return V3D_MAX_VS_INPUTS / 4;
354 case PIPE_SHADER_GEOMETRY:
355 return V3D_MAX_GS_INPUTS / 4;
356 case PIPE_SHADER_FRAGMENT:
357 return V3D_MAX_FS_INPUTS / 4;
358 default:
359 return 0;
360 };
361 case PIPE_SHADER_CAP_MAX_OUTPUTS:
362 if (shader == PIPE_SHADER_FRAGMENT)
363 return 4;
364 else
365 return V3D_MAX_FS_INPUTS / 4;
366 case PIPE_SHADER_CAP_MAX_TEMPS:
367 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
368 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
369 /* Note: Limited by the offset size in
370 * v3d_unit_data_create().
371 */
372 return 16 * 1024 * sizeof(float);
373 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
374 return 16;
375 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
376 return 0;
377 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
378 /* We don't currently support this in the backend, but that is
379 * okay because our NIR compiler sets the option
380 * lower_all_io_to_temps, which will eliminate indirect
381 * indexing on all input/output variables by translating it to
382 * indirect indexing on temporary variables instead, which we
383 * will then lower to scratch. We prefer this over setting this
384 * to 0, which would cause if-ladder injection to eliminate
385 * indirect indexing on inputs.
386 */
387 return 1;
388 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
389 return 1;
390 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
391 return 1;
392 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
393 return 1;
394 case PIPE_SHADER_CAP_SUBROUTINES:
395 return 0;
396 case PIPE_SHADER_CAP_INTEGERS:
397 return 1;
398 case PIPE_SHADER_CAP_FP16:
399 case PIPE_SHADER_CAP_FP16_DERIVATIVES:
400 case PIPE_SHADER_CAP_FP16_CONST_BUFFERS:
401 case PIPE_SHADER_CAP_INT16:
402 case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
403 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
404 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
405 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
406 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
407 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
408 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
409 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
410 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
411 return 0;
412 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
413 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
414 return V3D_OPENGL_MAX_TEXTURE_SAMPLERS;
415
416 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
417 if (screen->has_cache_flush) {
418 if (shader == PIPE_SHADER_VERTEX ||
419 shader == PIPE_SHADER_GEOMETRY) {
420 return 0;
421 }
422 return PIPE_MAX_SHADER_BUFFERS;
423 } else {
424 return 0;
425 }
426
427 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
428 if (screen->has_cache_flush) {
429 if (screen->devinfo.ver < 41)
430 return 0;
431 else
432 return PIPE_MAX_SHADER_IMAGES;
433 } else {
434 return 0;
435 }
436
437 case PIPE_SHADER_CAP_PREFERRED_IR:
438 return PIPE_SHADER_IR_NIR;
439 case PIPE_SHADER_CAP_SUPPORTED_IRS:
440 return 1 << PIPE_SHADER_IR_NIR;
441 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
442 /* We use NIR's loop unrolling */
443 return 0;
444 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
445 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
446 return 0;
447 default:
448 fprintf(stderr, "unknown shader param %d\n", param);
449 return 0;
450 }
451 return 0;
452 }
453
454 static int
v3d_get_compute_param(struct pipe_screen * pscreen,enum pipe_shader_ir ir_type,enum pipe_compute_cap param,void * ret)455 v3d_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
456 enum pipe_compute_cap param, void *ret)
457 {
458 struct v3d_screen *screen = v3d_screen(pscreen);
459
460 if (!screen->has_csd)
461 return 0;
462
463 #define RET(x) do { \
464 if (ret) \
465 memcpy(ret, x, sizeof(x)); \
466 return sizeof(x); \
467 } while (0)
468
469 switch (param) {
470 case PIPE_COMPUTE_CAP_ADDRESS_BITS:
471 RET((uint32_t []) { 32 });
472 break;
473
474 case PIPE_COMPUTE_CAP_IR_TARGET:
475 sprintf(ret, "v3d");
476 return strlen(ret);
477
478 case PIPE_COMPUTE_CAP_GRID_DIMENSION:
479 RET((uint64_t []) { 3 });
480
481 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
482 /* GL_MAX_COMPUTE_SHADER_WORK_GROUP_COUNT: The CSD has a
483 * 16-bit field for the number of workgroups in each
484 * dimension.
485 */
486 RET(((uint64_t []) { 65535, 65535, 65535 }));
487
488 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
489 /* GL_MAX_COMPUTE_WORK_GROUP_SIZE */
490 RET(((uint64_t []) { 256, 256, 256 }));
491
492 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
493 case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
494 /* GL_MAX_COMPUTE_WORK_GROUP_INVOCATIONS: This is
495 * limited by WG_SIZE in the CSD.
496 */
497 RET((uint64_t []) { 256 });
498
499 case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
500 RET((uint64_t []) { 1024 * 1024 * 1024 });
501
502 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
503 /* GL_MAX_COMPUTE_SHARED_MEMORY_SIZE */
504 RET((uint64_t []) { 32768 });
505
506 case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
507 case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
508 RET((uint64_t []) { 4096 });
509
510 case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE: {
511 struct sysinfo si;
512 sysinfo(&si);
513 RET((uint64_t []) { si.totalram });
514 }
515
516 case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
517 /* OpenCL only */
518 RET((uint32_t []) { 0 });
519
520 case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
521 RET((uint32_t []) { 1 });
522
523 case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
524 RET((uint32_t []) { 1 });
525
526 case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
527 RET((uint32_t []) { 16 });
528
529 }
530
531 return 0;
532 }
533
534 static bool
v3d_screen_is_format_supported(struct pipe_screen * pscreen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned storage_sample_count,unsigned usage)535 v3d_screen_is_format_supported(struct pipe_screen *pscreen,
536 enum pipe_format format,
537 enum pipe_texture_target target,
538 unsigned sample_count,
539 unsigned storage_sample_count,
540 unsigned usage)
541 {
542 struct v3d_screen *screen = v3d_screen(pscreen);
543
544 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
545 return false;
546
547 if (sample_count > 1 && sample_count != V3D_MAX_SAMPLES)
548 return false;
549
550 if (target >= PIPE_MAX_TEXTURE_TYPES) {
551 return false;
552 }
553
554 if (usage & PIPE_BIND_VERTEX_BUFFER) {
555 switch (format) {
556 case PIPE_FORMAT_R32G32B32A32_FLOAT:
557 case PIPE_FORMAT_R32G32B32_FLOAT:
558 case PIPE_FORMAT_R32G32_FLOAT:
559 case PIPE_FORMAT_R32_FLOAT:
560 case PIPE_FORMAT_R32G32B32A32_SNORM:
561 case PIPE_FORMAT_R32G32B32_SNORM:
562 case PIPE_FORMAT_R32G32_SNORM:
563 case PIPE_FORMAT_R32_SNORM:
564 case PIPE_FORMAT_R32G32B32A32_SSCALED:
565 case PIPE_FORMAT_R32G32B32_SSCALED:
566 case PIPE_FORMAT_R32G32_SSCALED:
567 case PIPE_FORMAT_R32_SSCALED:
568 case PIPE_FORMAT_R16G16B16A16_UNORM:
569 case PIPE_FORMAT_R16G16B16_UNORM:
570 case PIPE_FORMAT_R16G16_UNORM:
571 case PIPE_FORMAT_R16_UNORM:
572 case PIPE_FORMAT_R16G16B16A16_SNORM:
573 case PIPE_FORMAT_R16G16B16_SNORM:
574 case PIPE_FORMAT_R16G16_SNORM:
575 case PIPE_FORMAT_R16_SNORM:
576 case PIPE_FORMAT_R16G16B16A16_USCALED:
577 case PIPE_FORMAT_R16G16B16_USCALED:
578 case PIPE_FORMAT_R16G16_USCALED:
579 case PIPE_FORMAT_R16_USCALED:
580 case PIPE_FORMAT_R16G16B16A16_SSCALED:
581 case PIPE_FORMAT_R16G16B16_SSCALED:
582 case PIPE_FORMAT_R16G16_SSCALED:
583 case PIPE_FORMAT_R16_SSCALED:
584 case PIPE_FORMAT_B8G8R8A8_UNORM:
585 case PIPE_FORMAT_R8G8B8A8_UNORM:
586 case PIPE_FORMAT_R8G8B8_UNORM:
587 case PIPE_FORMAT_R8G8_UNORM:
588 case PIPE_FORMAT_R8_UNORM:
589 case PIPE_FORMAT_R8G8B8A8_SNORM:
590 case PIPE_FORMAT_R8G8B8_SNORM:
591 case PIPE_FORMAT_R8G8_SNORM:
592 case PIPE_FORMAT_R8_SNORM:
593 case PIPE_FORMAT_R8G8B8A8_USCALED:
594 case PIPE_FORMAT_R8G8B8_USCALED:
595 case PIPE_FORMAT_R8G8_USCALED:
596 case PIPE_FORMAT_R8_USCALED:
597 case PIPE_FORMAT_R8G8B8A8_SSCALED:
598 case PIPE_FORMAT_R8G8B8_SSCALED:
599 case PIPE_FORMAT_R8G8_SSCALED:
600 case PIPE_FORMAT_R8_SSCALED:
601 case PIPE_FORMAT_R10G10B10A2_UNORM:
602 case PIPE_FORMAT_B10G10R10A2_UNORM:
603 case PIPE_FORMAT_R10G10B10A2_SNORM:
604 case PIPE_FORMAT_B10G10R10A2_SNORM:
605 case PIPE_FORMAT_R10G10B10A2_USCALED:
606 case PIPE_FORMAT_B10G10R10A2_USCALED:
607 case PIPE_FORMAT_R10G10B10A2_SSCALED:
608 case PIPE_FORMAT_B10G10R10A2_SSCALED:
609 break;
610 default:
611 return false;
612 }
613 }
614
615 /* FORMAT_NONE gets allowed for ARB_framebuffer_no_attachments's probe
616 * of FRAMEBUFFER_MAX_SAMPLES
617 */
618 if ((usage & PIPE_BIND_RENDER_TARGET) &&
619 format != PIPE_FORMAT_NONE &&
620 !v3d_rt_format_supported(&screen->devinfo, format)) {
621 return false;
622 }
623
624 if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
625 !v3d_tex_format_supported(&screen->devinfo, format)) {
626 return false;
627 }
628
629 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
630 !(format == PIPE_FORMAT_S8_UINT_Z24_UNORM ||
631 format == PIPE_FORMAT_X8Z24_UNORM ||
632 format == PIPE_FORMAT_Z16_UNORM ||
633 format == PIPE_FORMAT_Z32_FLOAT ||
634 format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT)) {
635 return false;
636 }
637
638 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
639 !(format == PIPE_FORMAT_R8_UINT ||
640 format == PIPE_FORMAT_R16_UINT ||
641 format == PIPE_FORMAT_R32_UINT)) {
642 return false;
643 }
644
645 return true;
646 }
647
648 static const nir_shader_compiler_options v3d_nir_options = {
649 .lower_uadd_sat = true,
650 .lower_iadd_sat = true,
651 .lower_all_io_to_temps = true,
652 .lower_extract_byte = true,
653 .lower_extract_word = true,
654 .lower_insert_byte = true,
655 .lower_insert_word = true,
656 .lower_bitfield_insert_to_shifts = true,
657 .lower_bitfield_extract_to_shifts = true,
658 .lower_bitfield_reverse = true,
659 .lower_bit_count = true,
660 .lower_cs_local_id_from_index = true,
661 .lower_ffract = true,
662 .lower_fmod = true,
663 .lower_pack_unorm_2x16 = true,
664 .lower_pack_snorm_2x16 = true,
665 .lower_pack_unorm_4x8 = true,
666 .lower_pack_snorm_4x8 = true,
667 .lower_unpack_unorm_4x8 = true,
668 .lower_unpack_snorm_4x8 = true,
669 .lower_pack_half_2x16 = true,
670 .lower_unpack_half_2x16 = true,
671 .lower_fdiv = true,
672 .lower_find_lsb = true,
673 .lower_ffma16 = true,
674 .lower_ffma32 = true,
675 .lower_ffma64 = true,
676 .lower_flrp32 = true,
677 .lower_fpow = true,
678 .lower_fsat = true,
679 .lower_fsqrt = true,
680 .lower_ifind_msb = true,
681 .lower_isign = true,
682 .lower_ldexp = true,
683 .lower_mul_high = true,
684 .lower_wpos_pntc = true,
685 .lower_rotate = true,
686 .lower_to_scalar = true,
687 .has_fsub = true,
688 .has_isub = true,
689 .divergence_analysis_options =
690 nir_divergence_multiple_workgroup_per_compute_subgroup,
691 /* This will enable loop unrolling in the state tracker so we won't
692 * be able to selectively disable it in backend if it leads to
693 * lower thread counts or TMU spills. Choose a conservative maximum to
694 * limit register pressure impact.
695 */
696 .max_unroll_iterations = 16,
697 };
698
699 static const void *
v3d_screen_get_compiler_options(struct pipe_screen * pscreen,enum pipe_shader_ir ir,unsigned shader)700 v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
701 enum pipe_shader_ir ir, unsigned shader)
702 {
703 return &v3d_nir_options;
704 }
705
706 static const uint64_t v3d_available_modifiers[] = {
707 DRM_FORMAT_MOD_BROADCOM_UIF,
708 DRM_FORMAT_MOD_LINEAR,
709 DRM_FORMAT_MOD_BROADCOM_SAND128,
710 };
711
712 static void
v3d_screen_query_dmabuf_modifiers(struct pipe_screen * pscreen,enum pipe_format format,int max,uint64_t * modifiers,unsigned int * external_only,int * count)713 v3d_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
714 enum pipe_format format, int max,
715 uint64_t *modifiers,
716 unsigned int *external_only,
717 int *count)
718 {
719 int i;
720 int num_modifiers = ARRAY_SIZE(v3d_available_modifiers);
721
722 /* Expose DRM_FORMAT_MOD_BROADCOM_SAND128 only for PIPE_FORMAT_NV12 */
723 if (format != PIPE_FORMAT_NV12)
724 num_modifiers--;
725
726 if (!modifiers) {
727 *count = num_modifiers;
728 return;
729 }
730
731 *count = MIN2(max, num_modifiers);
732 for (i = 0; i < *count; i++) {
733 modifiers[i] = v3d_available_modifiers[i];
734 if (external_only)
735 external_only[i] = util_format_is_yuv(format);
736 }
737 }
738
739 static bool
v3d_screen_is_dmabuf_modifier_supported(struct pipe_screen * pscreen,uint64_t modifier,enum pipe_format format,bool * external_only)740 v3d_screen_is_dmabuf_modifier_supported(struct pipe_screen *pscreen,
741 uint64_t modifier,
742 enum pipe_format format,
743 bool *external_only)
744 {
745 int i;
746 bool is_sand_col128 = (format == PIPE_FORMAT_NV12) &&
747 (fourcc_mod_broadcom_mod(modifier) == DRM_FORMAT_MOD_BROADCOM_SAND128);
748
749 if (is_sand_col128) {
750 if (external_only)
751 *external_only = true;
752 return true;
753 }
754
755 /* We don't want to generally allow DRM_FORMAT_MOD_BROADCOM_SAND128
756 * modifier, that is the last v3d_available_modifiers. We only accept
757 * it in the case of having a PIPE_FORMAT_NV12.
758 */
759 assert(v3d_available_modifiers[ARRAY_SIZE(v3d_available_modifiers) - 1] ==
760 DRM_FORMAT_MOD_BROADCOM_SAND128);
761 for (i = 0; i < ARRAY_SIZE(v3d_available_modifiers) - 1; i++) {
762 if (v3d_available_modifiers[i] == modifier) {
763 if (external_only)
764 *external_only = util_format_is_yuv(format);
765
766 return true;
767 }
768 }
769
770 return false;
771 }
772
773 struct pipe_screen *
v3d_screen_create(int fd,const struct pipe_screen_config * config,struct renderonly * ro)774 v3d_screen_create(int fd, const struct pipe_screen_config *config,
775 struct renderonly *ro)
776 {
777 struct v3d_screen *screen = rzalloc(NULL, struct v3d_screen);
778 struct pipe_screen *pscreen;
779
780 pscreen = &screen->base;
781
782 pscreen->destroy = v3d_screen_destroy;
783 pscreen->get_param = v3d_screen_get_param;
784 pscreen->get_paramf = v3d_screen_get_paramf;
785 pscreen->get_shader_param = v3d_screen_get_shader_param;
786 pscreen->get_compute_param = v3d_get_compute_param;
787 pscreen->context_create = v3d_context_create;
788 pscreen->is_format_supported = v3d_screen_is_format_supported;
789
790 screen->fd = fd;
791 screen->ro = ro;
792
793 list_inithead(&screen->bo_cache.time_list);
794 (void)mtx_init(&screen->bo_handles_mutex, mtx_plain);
795 screen->bo_handles = util_hash_table_create_ptr_keys();
796
797 #if defined(USE_V3D_SIMULATOR)
798 screen->sim_file = v3d_simulator_init(screen->fd);
799 #endif
800
801 if (!v3d_get_device_info(screen->fd, &screen->devinfo, &v3d_ioctl))
802 goto fail;
803
804 driParseConfigFiles(config->options, config->options_info, 0, "v3d",
805 NULL, NULL, NULL, 0, NULL, 0);
806
807 /* We have to driCheckOption for the simulator mode to not assertion
808 * fail on not having our XML config.
809 */
810 const char *nonmsaa_name = "v3d_nonmsaa_texture_size_limit";
811 screen->nonmsaa_texture_size_limit =
812 driCheckOption(config->options, nonmsaa_name, DRI_BOOL) &&
813 driQueryOptionb(config->options, nonmsaa_name);
814
815 slab_create_parent(&screen->transfer_pool, sizeof(struct v3d_transfer), 16);
816
817 screen->has_csd = v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CSD);
818 screen->has_cache_flush =
819 v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH);
820 screen->has_perfmon = v3d_has_feature(screen, DRM_V3D_PARAM_SUPPORTS_PERFMON);
821
822 v3d_fence_init(screen);
823
824 v3d_process_debug_variable();
825
826 v3d_resource_screen_init(pscreen);
827
828 screen->compiler = v3d_compiler_init(&screen->devinfo);
829
830 pscreen->get_name = v3d_screen_get_name;
831 pscreen->get_vendor = v3d_screen_get_vendor;
832 pscreen->get_device_vendor = v3d_screen_get_vendor;
833 pscreen->get_compiler_options = v3d_screen_get_compiler_options;
834 pscreen->query_dmabuf_modifiers = v3d_screen_query_dmabuf_modifiers;
835 pscreen->is_dmabuf_modifier_supported =
836 v3d_screen_is_dmabuf_modifier_supported;
837
838 if (screen->has_perfmon) {
839 pscreen->get_driver_query_group_info = v3d_get_driver_query_group_info;
840 pscreen->get_driver_query_info = v3d_get_driver_query_info;
841 }
842
843 /* Generate the bitmask of supported draw primitives. */
844 screen->prim_types = BITFIELD_BIT(PIPE_PRIM_POINTS) |
845 BITFIELD_BIT(PIPE_PRIM_LINES) |
846 BITFIELD_BIT(PIPE_PRIM_LINE_LOOP) |
847 BITFIELD_BIT(PIPE_PRIM_LINE_STRIP) |
848 BITFIELD_BIT(PIPE_PRIM_TRIANGLES) |
849 BITFIELD_BIT(PIPE_PRIM_TRIANGLE_STRIP) |
850 BITFIELD_BIT(PIPE_PRIM_TRIANGLE_FAN) |
851 BITFIELD_BIT(PIPE_PRIM_LINES_ADJACENCY) |
852 BITFIELD_BIT(PIPE_PRIM_LINE_STRIP_ADJACENCY) |
853 BITFIELD_BIT(PIPE_PRIM_TRIANGLES_ADJACENCY) |
854 BITFIELD_BIT(PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY);
855
856 return pscreen;
857
858 fail:
859 close(fd);
860 ralloc_free(pscreen);
861 return NULL;
862 }
863