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24 
25 #ifndef CPU_X86_VM_VMREG_X86_HPP
26 #define CPU_X86_VM_VMREG_X86_HPP
27 
28 
29 
is_Register()30 inline bool is_Register() {
31   return (unsigned int) value() < (unsigned int) ConcreteRegisterImpl::max_gpr;
32 }
33 
is_FloatRegister()34 inline bool is_FloatRegister() {
35   return value() >= ConcreteRegisterImpl::max_gpr && value() < ConcreteRegisterImpl::max_fpr;
36 }
37 
is_XMMRegister()38 inline bool is_XMMRegister() {
39   int uarch_max_xmm = ConcreteRegisterImpl::max_xmm;
40 
41 #ifdef _LP64
42   if (UseAVX < 3) {
43     int half_xmm = (XMMRegisterImpl::max_slots_per_register * XMMRegisterImpl::number_of_registers) / 2;
44     uarch_max_xmm -= half_xmm;
45   }
46 #endif
47 
48   return (value() >= ConcreteRegisterImpl::max_fpr && value() < uarch_max_xmm);
49 }
50 
is_KRegister()51 inline bool is_KRegister() {
52   if (UseAVX > 2) {
53     return value() >= ConcreteRegisterImpl::max_xmm && value() < ConcreteRegisterImpl::max_kpr;
54   } else {
55     return false;
56   }
57 }
58 
as_Register()59 inline Register as_Register() {
60 
61   assert( is_Register(), "must be");
62   // Yuk
63 #ifdef AMD64
64   return ::as_Register(value() >> 1);
65 #else
66   return ::as_Register(value());
67 #endif // AMD64
68 }
69 
as_FloatRegister()70 inline FloatRegister as_FloatRegister() {
71   assert( is_FloatRegister() && is_even(value()), "must be" );
72   // Yuk
73   return ::as_FloatRegister((value() - ConcreteRegisterImpl::max_gpr) >> 1);
74 }
75 
as_XMMRegister()76 inline XMMRegister as_XMMRegister() {
77   assert( is_XMMRegister() && is_even(value()), "must be" );
78   // Yuk
79   return ::as_XMMRegister((value() - ConcreteRegisterImpl::max_fpr) >> 4);
80 }
81 
as_KRegister()82 inline KRegister as_KRegister() {
83   assert(is_KRegister(), "must be");
84   // Yuk
85   return ::as_KRegister((value() - ConcreteRegisterImpl::max_xmm));
86 }
87 
is_concrete()88 inline   bool is_concrete() {
89   assert(is_reg(), "must be");
90 #ifndef AMD64
91   if (is_Register()) return true;
92 #endif // AMD64
93   return is_even(value());
94 }
95 
96 #endif // CPU_X86_VM_VMREG_X86_HPP
97