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24 
25 #ifndef CPU_X86_DISASSEMBLER_X86_HPP
26 #define CPU_X86_DISASSEMBLER_X86_HPP
27 
pd_instruction_alignment()28   static int pd_instruction_alignment() {
29     return 1;
30   }
31 
pd_cpu_opts()32   static const char* pd_cpu_opts() {
33     return "";
34   }
35 
36   // Returns address of n-th instruction preceding addr,
37   // NULL if no preceding instruction can be found.
38   // On CISC architectures, it is difficult to impossible to step
39   // backwards in the instruction stream. Therefore just return NULL.
40   // It might be beneficial to check "is_readable" as we do on ppc and s390.
find_prev_instr(address addr,int n_instr)41   static address find_prev_instr(address addr, int n_instr) {
42     return NULL;
43   }
44 
45   // special-case instruction decoding.
46   // There may be cases where the binutils disassembler doesn't do
47   // the perfect job. In those cases, decode_instruction0 may kick in
48   // and do it right.
49   // If nothing had to be done, just return "here", otherwise return "here + instr_len(here)"
decode_instruction0(address here,outputStream * st,address virtual_begin=NULL)50   static address decode_instruction0(address here, outputStream* st, address virtual_begin = NULL) {
51     return here;
52   }
53 
54   // platform-specific instruction annotations (like value of loaded constants)
annotate(address pc,outputStream * st)55   static void annotate(address pc, outputStream* st) { };
56 
57 #endif // CPU_X86_DISASSEMBLER_X86_HPP
58