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24 
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "code/relocInfo.hpp"
28 #include "memory/universe.hpp"
29 #include "nativeInst_x86.hpp"
30 #include "oops/compressedOops.inline.hpp"
31 #include "oops/klass.inline.hpp"
32 #include "oops/oop.inline.hpp"
33 #include "runtime/safepoint.hpp"
34 #include "runtime/safepointMechanism.hpp"
35 
36 
pd_set_data_value(address x,intptr_t o,bool verify_only)37 void Relocation::pd_set_data_value(address x, intptr_t o, bool verify_only) {
38 #ifdef AMD64
39   x += o;
40   typedef Assembler::WhichOperand WhichOperand;
41   WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop
42   assert(which == Assembler::disp32_operand ||
43          which == Assembler::narrow_oop_operand ||
44          which == Assembler::imm_operand, "format unpacks ok");
45   if (which == Assembler::imm_operand) {
46     if (verify_only) {
47       guarantee(*pd_address_in_code() == x, "instructions must match");
48     } else {
49       *pd_address_in_code() = x;
50     }
51   } else if (which == Assembler::narrow_oop_operand) {
52     address disp = Assembler::locate_operand(addr(), which);
53     // both compressed oops and compressed classes look the same
54     if (CompressedOops::is_in((void*)x)) {
55     if (verify_only) {
56       guarantee(*(uint32_t*) disp == CompressedOops::encode((oop)x), "instructions must match");
57     } else {
58       *(int32_t*) disp = CompressedOops::encode((oop)x);
59     }
60   } else {
61       if (verify_only) {
62         guarantee(*(uint32_t*) disp == CompressedKlassPointers::encode((Klass*)x), "instructions must match");
63       } else {
64         *(int32_t*) disp = CompressedKlassPointers::encode((Klass*)x);
65       }
66     }
67   } else {
68     // Note:  Use runtime_call_type relocations for call32_operand.
69     address ip = addr();
70     address disp = Assembler::locate_operand(ip, which);
71     address next_ip = Assembler::locate_next_instruction(ip);
72     if (verify_only) {
73       guarantee(*(int32_t*) disp == (x - next_ip), "instructions must match");
74     } else {
75       *(int32_t*) disp = x - next_ip;
76     }
77   }
78 #else
79   if (verify_only) {
80     guarantee(*pd_address_in_code() == (x + o), "instructions must match");
81   } else {
82     *pd_address_in_code() = x + o;
83   }
84 #endif // AMD64
85 }
86 
87 
pd_call_destination(address orig_addr)88 address Relocation::pd_call_destination(address orig_addr) {
89   intptr_t adj = 0;
90   if (orig_addr != NULL) {
91     // We just moved this call instruction from orig_addr to addr().
92     // This means its target will appear to have grown by addr() - orig_addr.
93     adj = -( addr() - orig_addr );
94   }
95   NativeInstruction* ni = nativeInstruction_at(addr());
96   if (ni->is_call()) {
97     return nativeCall_at(addr())->destination() + adj;
98   } else if (ni->is_jump()) {
99     return nativeJump_at(addr())->jump_destination() + adj;
100   } else if (ni->is_cond_jump()) {
101     return nativeGeneralJump_at(addr())->jump_destination() + adj;
102   } else if (ni->is_mov_literal64()) {
103     return (address) ((NativeMovConstReg*)ni)->data();
104   } else {
105     ShouldNotReachHere();
106     return NULL;
107   }
108 }
109 
110 
pd_set_call_destination(address x)111 void Relocation::pd_set_call_destination(address x) {
112   NativeInstruction* ni = nativeInstruction_at(addr());
113   if (ni->is_call()) {
114     nativeCall_at(addr())->set_destination(x);
115   } else if (ni->is_jump()) {
116     NativeJump* nj = nativeJump_at(addr());
117 
118     // Unresolved jumps are recognized by a destination of -1
119     // However 64bit can't actually produce such an address
120     // and encodes a jump to self but jump_destination will
121     // return a -1 as the signal. We must not relocate this
122     // jmp or the ic code will not see it as unresolved.
123 
124     if (nj->jump_destination() == (address) -1) {
125       x = addr(); // jump to self
126     }
127     nj->set_jump_destination(x);
128   } else if (ni->is_cond_jump()) {
129     // %%%% kludge this, for now, until we get a jump_destination method
130     address old_dest = nativeGeneralJump_at(addr())->jump_destination();
131     address disp = Assembler::locate_operand(addr(), Assembler::call32_operand);
132     *(jint*)disp += (x - old_dest);
133   } else if (ni->is_mov_literal64()) {
134     ((NativeMovConstReg*)ni)->set_data((intptr_t)x);
135   } else {
136     ShouldNotReachHere();
137   }
138 }
139 
140 
pd_address_in_code()141 address* Relocation::pd_address_in_code() {
142   // All embedded Intel addresses are stored in 32-bit words.
143   // Since the addr points at the start of the instruction,
144   // we must parse the instruction a bit to find the embedded word.
145   assert(is_data(), "must be a DataRelocation");
146   typedef Assembler::WhichOperand WhichOperand;
147   WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
148 #ifdef AMD64
149   assert(which == Assembler::disp32_operand ||
150          which == Assembler::call32_operand ||
151          which == Assembler::imm_operand, "format unpacks ok");
152   // The "address" in the code is a displacement can't return it as
153   // and address* since it is really a jint*
154   guarantee(which == Assembler::imm_operand, "must be immediate operand");
155 #else
156   assert(which == Assembler::disp32_operand || which == Assembler::imm_operand, "format unpacks ok");
157 #endif // AMD64
158   return (address*) Assembler::locate_operand(addr(), which);
159 }
160 
161 
pd_get_address_from_code()162 address Relocation::pd_get_address_from_code() {
163 #ifdef AMD64
164   // All embedded Intel addresses are stored in 32-bit words.
165   // Since the addr points at the start of the instruction,
166   // we must parse the instruction a bit to find the embedded word.
167   assert(is_data(), "must be a DataRelocation");
168   typedef Assembler::WhichOperand WhichOperand;
169   WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
170   assert(which == Assembler::disp32_operand ||
171          which == Assembler::call32_operand ||
172          which == Assembler::imm_operand, "format unpacks ok");
173   if (which != Assembler::imm_operand) {
174     address ip = addr();
175     address disp = Assembler::locate_operand(ip, which);
176     address next_ip = Assembler::locate_next_instruction(ip);
177     address a = next_ip + *(int32_t*) disp;
178     return a;
179   }
180 #endif // AMD64
181   return *pd_address_in_code();
182 }
183 
fix_relocation_after_move(const CodeBuffer * src,CodeBuffer * dest)184 void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
185 #ifdef _LP64
186   typedef Assembler::WhichOperand WhichOperand;
187   WhichOperand which = (WhichOperand) format();
188 #if !INCLUDE_JVMCI
189   if (SafepointMechanism::uses_global_page_poll()) {
190     assert((which == Assembler::disp32_operand) == !Assembler::is_polling_page_far(), "format not set correctly");
191   }
192 #endif
193   if (which == Assembler::disp32_operand) {
194     assert(SafepointMechanism::uses_global_page_poll(), "should only have generated such a poll if global polling enabled");
195     address orig_addr = old_addr_for(addr(), src, dest);
196     NativeInstruction* oni = nativeInstruction_at(orig_addr);
197     int32_t* orig_disp = (int32_t*) Assembler::locate_operand(orig_addr, which);
198     // This poll_addr is incorrect by the size of the instruction it is irrelevant
199     intptr_t poll_addr = (intptr_t)oni + *orig_disp;
200     NativeInstruction* ni = nativeInstruction_at(addr());
201     intptr_t new_disp = poll_addr - (intptr_t) ni;
202 
203     int32_t* disp = (int32_t*) Assembler::locate_operand(addr(), which);
204     * disp = (int32_t)new_disp;
205   }
206 #endif // _LP64
207 }
208 
pd_fix_value(address x)209 void metadata_Relocation::pd_fix_value(address x) {
210 }
211