1 /*
2 * Copyright (c) 2000, 2020, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_CodeStubs.hpp"
27 #include "c1/c1_InstructionPrinter.hpp"
28 #include "c1/c1_LIR.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_ValueStack.hpp"
31 #include "ci/ciInstance.hpp"
32 #include "runtime/safepointMechanism.inline.hpp"
33 #include "runtime/sharedRuntime.hpp"
34
as_register() const35 Register LIR_OprDesc::as_register() const {
36 return FrameMap::cpu_rnr2reg(cpu_regnr());
37 }
38
as_register_lo() const39 Register LIR_OprDesc::as_register_lo() const {
40 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
41 }
42
as_register_hi() const43 Register LIR_OprDesc::as_register_hi() const {
44 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
45 }
46
47 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
48
value_type(ValueType * type)49 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
50 ValueTag tag = type->tag();
51 switch (tag) {
52 case metaDataTag : {
53 ClassConstant* c = type->as_ClassConstant();
54 if (c != NULL && !c->value()->is_loaded()) {
55 return LIR_OprFact::metadataConst(NULL);
56 } else if (c != NULL) {
57 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
58 } else {
59 MethodConstant* m = type->as_MethodConstant();
60 assert (m != NULL, "not a class or a method?");
61 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
62 }
63 }
64 case objectTag : {
65 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
66 }
67 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
68 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
69 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
70 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
71 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
72 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
73 }
74 }
75
76
77 //---------------------------------------------------
78
79
scale(BasicType type)80 LIR_Address::Scale LIR_Address::scale(BasicType type) {
81 int elem_size = type2aelembytes(type);
82 switch (elem_size) {
83 case 1: return LIR_Address::times_1;
84 case 2: return LIR_Address::times_2;
85 case 4: return LIR_Address::times_4;
86 case 8: return LIR_Address::times_8;
87 }
88 ShouldNotReachHere();
89 return LIR_Address::times_1;
90 }
91
92 //---------------------------------------------------
93
type_char(BasicType t)94 char LIR_OprDesc::type_char(BasicType t) {
95 switch (t) {
96 case T_ARRAY:
97 t = T_OBJECT;
98 case T_BOOLEAN:
99 case T_CHAR:
100 case T_FLOAT:
101 case T_DOUBLE:
102 case T_BYTE:
103 case T_SHORT:
104 case T_INT:
105 case T_LONG:
106 case T_OBJECT:
107 case T_ADDRESS:
108 case T_VOID:
109 return ::type2char(t);
110 case T_METADATA:
111 return 'M';
112 case T_ILLEGAL:
113 return '?';
114
115 default:
116 ShouldNotReachHere();
117 return '?';
118 }
119 }
120
121 #ifndef PRODUCT
validate_type() const122 void LIR_OprDesc::validate_type() const {
123
124 #ifdef ASSERT
125 if (!is_pointer() && !is_illegal()) {
126 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
127 switch (as_BasicType(type_field())) {
128 case T_LONG:
129 assert((kindfield == cpu_register || kindfield == stack_value) &&
130 size_field() == double_size, "must match");
131 break;
132 case T_FLOAT:
133 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
134 assert((kindfield == fpu_register || kindfield == stack_value
135 ARM_ONLY(|| kindfield == cpu_register)
136 PPC32_ONLY(|| kindfield == cpu_register) ) &&
137 size_field() == single_size, "must match");
138 break;
139 case T_DOUBLE:
140 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
141 assert((kindfield == fpu_register || kindfield == stack_value
142 ARM_ONLY(|| kindfield == cpu_register)
143 PPC32_ONLY(|| kindfield == cpu_register) ) &&
144 size_field() == double_size, "must match");
145 break;
146 case T_BOOLEAN:
147 case T_CHAR:
148 case T_BYTE:
149 case T_SHORT:
150 case T_INT:
151 case T_ADDRESS:
152 case T_OBJECT:
153 case T_METADATA:
154 case T_ARRAY:
155 assert((kindfield == cpu_register || kindfield == stack_value) &&
156 size_field() == single_size, "must match");
157 break;
158
159 case T_ILLEGAL:
160 // XXX TKR also means unknown right now
161 // assert(is_illegal(), "must match");
162 break;
163
164 default:
165 ShouldNotReachHere();
166 }
167 }
168 #endif
169
170 }
171 #endif // PRODUCT
172
173
is_oop() const174 bool LIR_OprDesc::is_oop() const {
175 if (is_pointer()) {
176 return pointer()->is_oop_pointer();
177 } else {
178 OprType t= type_field();
179 assert(t != unknown_type, "not set");
180 return t == object_type;
181 }
182 }
183
184
185
verify() const186 void LIR_Op2::verify() const {
187 #ifdef ASSERT
188 switch (code()) {
189 case lir_cmove:
190 case lir_xchg:
191 break;
192
193 default:
194 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
195 "can't produce oops from arith");
196 }
197
198 if (TwoOperandLIRForm) {
199
200 #ifdef ASSERT
201 bool threeOperandForm = false;
202 #ifdef S390
203 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
204 threeOperandForm =
205 code() == lir_shl ||
206 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
207 #endif
208 #endif
209
210 switch (code()) {
211 case lir_add:
212 case lir_sub:
213 case lir_mul:
214 case lir_mul_strictfp:
215 case lir_div:
216 case lir_div_strictfp:
217 case lir_rem:
218 case lir_logic_and:
219 case lir_logic_or:
220 case lir_logic_xor:
221 case lir_shl:
222 case lir_shr:
223 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
224 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
225 break;
226
227 // special handling for lir_ushr because of write barriers
228 case lir_ushr:
229 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
230 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
231 break;
232
233 default:
234 break;
235 }
236 }
237 #endif
238 }
239
240
LIR_OpBranch(LIR_Condition cond,BlockBegin * block)241 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block)
242 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
243 , _cond(cond)
244 , _label(block->label())
245 , _block(block)
246 , _ublock(NULL)
247 , _stub(NULL) {
248 }
249
LIR_OpBranch(LIR_Condition cond,CodeStub * stub)250 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, CodeStub* stub) :
251 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
252 , _cond(cond)
253 , _label(stub->entry())
254 , _block(NULL)
255 , _ublock(NULL)
256 , _stub(stub) {
257 }
258
LIR_OpBranch(LIR_Condition cond,BlockBegin * block,BlockBegin * ublock)259 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BlockBegin* block, BlockBegin* ublock)
260 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
261 , _cond(cond)
262 , _label(block->label())
263 , _block(block)
264 , _ublock(ublock)
265 , _stub(NULL)
266 {
267 }
268
change_block(BlockBegin * b)269 void LIR_OpBranch::change_block(BlockBegin* b) {
270 assert(_block != NULL, "must have old block");
271 assert(_block->label() == label(), "must be equal");
272
273 _block = b;
274 _label = b->label();
275 }
276
change_ublock(BlockBegin * b)277 void LIR_OpBranch::change_ublock(BlockBegin* b) {
278 assert(_ublock != NULL, "must have old block");
279 _ublock = b;
280 }
281
negate_cond()282 void LIR_OpBranch::negate_cond() {
283 switch (_cond) {
284 case lir_cond_equal: _cond = lir_cond_notEqual; break;
285 case lir_cond_notEqual: _cond = lir_cond_equal; break;
286 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
287 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
288 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
289 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
290 default: ShouldNotReachHere();
291 }
292 }
293
294
LIR_OpTypeCheck(LIR_Code code,LIR_Opr result,LIR_Opr object,ciKlass * klass,LIR_Opr tmp1,LIR_Opr tmp2,LIR_Opr tmp3,bool fast_check,CodeEmitInfo * info_for_exception,CodeEmitInfo * info_for_patch,CodeStub * stub)295 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
296 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
297 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
298 CodeStub* stub)
299
300 : LIR_Op(code, result, NULL)
301 , _object(object)
302 , _array(LIR_OprFact::illegalOpr)
303 , _klass(klass)
304 , _tmp1(tmp1)
305 , _tmp2(tmp2)
306 , _tmp3(tmp3)
307 , _fast_check(fast_check)
308 , _info_for_patch(info_for_patch)
309 , _info_for_exception(info_for_exception)
310 , _stub(stub)
311 , _profiled_method(NULL)
312 , _profiled_bci(-1)
313 , _should_profile(false)
314 {
315 if (code == lir_checkcast) {
316 assert(info_for_exception != NULL, "checkcast throws exceptions");
317 } else if (code == lir_instanceof) {
318 assert(info_for_exception == NULL, "instanceof throws no exceptions");
319 } else {
320 ShouldNotReachHere();
321 }
322 }
323
324
325
LIR_OpTypeCheck(LIR_Code code,LIR_Opr object,LIR_Opr array,LIR_Opr tmp1,LIR_Opr tmp2,LIR_Opr tmp3,CodeEmitInfo * info_for_exception)326 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
327 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
328 , _object(object)
329 , _array(array)
330 , _klass(NULL)
331 , _tmp1(tmp1)
332 , _tmp2(tmp2)
333 , _tmp3(tmp3)
334 , _fast_check(false)
335 , _info_for_patch(NULL)
336 , _info_for_exception(info_for_exception)
337 , _stub(NULL)
338 , _profiled_method(NULL)
339 , _profiled_bci(-1)
340 , _should_profile(false)
341 {
342 if (code == lir_store_check) {
343 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
344 assert(info_for_exception != NULL, "store_check throws exceptions");
345 } else {
346 ShouldNotReachHere();
347 }
348 }
349
350
LIR_OpArrayCopy(LIR_Opr src,LIR_Opr src_pos,LIR_Opr dst,LIR_Opr dst_pos,LIR_Opr length,LIR_Opr tmp,ciArrayKlass * expected_type,int flags,CodeEmitInfo * info)351 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
352 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
353 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
354 , _src(src)
355 , _src_pos(src_pos)
356 , _dst(dst)
357 , _dst_pos(dst_pos)
358 , _length(length)
359 , _tmp(tmp)
360 , _expected_type(expected_type)
361 , _flags(flags) {
362 _stub = new ArrayCopyStub(this);
363 }
364
LIR_OpUpdateCRC32(LIR_Opr crc,LIR_Opr val,LIR_Opr res)365 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
366 : LIR_Op(lir_updatecrc32, res, NULL)
367 , _crc(crc)
368 , _val(val) {
369 }
370
371 //-------------------verify--------------------------
372
verify() const373 void LIR_Op1::verify() const {
374 switch(code()) {
375 case lir_move:
376 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
377 break;
378 case lir_null_check:
379 assert(in_opr()->is_register(), "must be");
380 break;
381 case lir_return:
382 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
383 break;
384 default:
385 break;
386 }
387 }
388
verify() const389 void LIR_OpRTCall::verify() const {
390 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
391 }
392
393 //-------------------visits--------------------------
394
395 // complete rework of LIR instruction visitor.
396 // The virtual call for each instruction type is replaced by a big
397 // switch that adds the operands for each instruction
398
visit(LIR_Op * op)399 void LIR_OpVisitState::visit(LIR_Op* op) {
400 // copy information from the LIR_Op
401 reset();
402 set_op(op);
403
404 switch (op->code()) {
405
406 // LIR_Op0
407 case lir_backwardbranch_target: // result and info always invalid
408 case lir_fpop_raw: // result and info always invalid
409 case lir_breakpoint: // result and info always invalid
410 case lir_membar: // result and info always invalid
411 case lir_membar_acquire: // result and info always invalid
412 case lir_membar_release: // result and info always invalid
413 case lir_membar_loadload: // result and info always invalid
414 case lir_membar_storestore: // result and info always invalid
415 case lir_membar_loadstore: // result and info always invalid
416 case lir_membar_storeload: // result and info always invalid
417 case lir_on_spin_wait:
418 {
419 assert(op->as_Op0() != NULL, "must be");
420 assert(op->_info == NULL, "info not used by this instruction");
421 assert(op->_result->is_illegal(), "not used");
422 break;
423 }
424
425 case lir_nop: // may have info, result always invalid
426 case lir_std_entry: // may have result, info always invalid
427 case lir_osr_entry: // may have result, info always invalid
428 case lir_get_thread: // may have result, info always invalid
429 {
430 assert(op->as_Op0() != NULL, "must be");
431 if (op->_info != NULL) do_info(op->_info);
432 if (op->_result->is_valid()) do_output(op->_result);
433 break;
434 }
435
436
437 // LIR_OpLabel
438 case lir_label: // result and info always invalid
439 {
440 assert(op->as_OpLabel() != NULL, "must be");
441 assert(op->_info == NULL, "info not used by this instruction");
442 assert(op->_result->is_illegal(), "not used");
443 break;
444 }
445
446
447 // LIR_Op1
448 case lir_fxch: // input always valid, result and info always invalid
449 case lir_fld: // input always valid, result and info always invalid
450 case lir_push: // input always valid, result and info always invalid
451 case lir_pop: // input always valid, result and info always invalid
452 case lir_leal: // input and result always valid, info always invalid
453 case lir_monaddr: // input and result always valid, info always invalid
454 case lir_null_check: // input and info always valid, result always invalid
455 case lir_move: // input and result always valid, may have info
456 {
457 assert(op->as_Op1() != NULL, "must be");
458 LIR_Op1* op1 = (LIR_Op1*)op;
459
460 if (op1->_info) do_info(op1->_info);
461 if (op1->_opr->is_valid()) do_input(op1->_opr);
462 if (op1->_result->is_valid()) do_output(op1->_result);
463
464 break;
465 }
466
467 case lir_return:
468 {
469 assert(op->as_OpReturn() != NULL, "must be");
470 LIR_OpReturn* op_ret = (LIR_OpReturn*)op;
471
472 if (op_ret->_info) do_info(op_ret->_info);
473 if (op_ret->_opr->is_valid()) do_input(op_ret->_opr);
474 if (op_ret->_result->is_valid()) do_output(op_ret->_result);
475 if (op_ret->stub() != NULL) do_stub(op_ret->stub());
476
477 break;
478 }
479
480 case lir_safepoint:
481 {
482 assert(op->as_Op1() != NULL, "must be");
483 LIR_Op1* op1 = (LIR_Op1*)op;
484
485 assert(op1->_info != NULL, ""); do_info(op1->_info);
486 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
487 assert(op1->_result->is_illegal(), "safepoint does not produce value");
488
489 break;
490 }
491
492 // LIR_OpConvert;
493 case lir_convert: // input and result always valid, info always invalid
494 {
495 assert(op->as_OpConvert() != NULL, "must be");
496 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
497
498 assert(opConvert->_info == NULL, "must be");
499 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
500 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
501 #ifdef PPC32
502 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
503 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
504 #endif
505 do_stub(opConvert->_stub);
506
507 break;
508 }
509
510 // LIR_OpBranch;
511 case lir_branch: // may have info, input and result register always invalid
512 case lir_cond_float_branch: // may have info, input and result register always invalid
513 {
514 assert(op->as_OpBranch() != NULL, "must be");
515 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
516
517 if (opBranch->_info != NULL) do_info(opBranch->_info);
518 assert(opBranch->_result->is_illegal(), "not used");
519 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
520
521 break;
522 }
523
524
525 // LIR_OpAllocObj
526 case lir_alloc_object:
527 {
528 assert(op->as_OpAllocObj() != NULL, "must be");
529 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
530
531 if (opAllocObj->_info) do_info(opAllocObj->_info);
532 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
533 do_temp(opAllocObj->_opr);
534 }
535 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
536 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
537 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
538 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
539 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
540 do_stub(opAllocObj->_stub);
541 break;
542 }
543
544
545 // LIR_OpRoundFP;
546 case lir_roundfp: {
547 assert(op->as_OpRoundFP() != NULL, "must be");
548 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
549
550 assert(op->_info == NULL, "info not used by this instruction");
551 assert(opRoundFP->_tmp->is_illegal(), "not used");
552 do_input(opRoundFP->_opr);
553 do_output(opRoundFP->_result);
554
555 break;
556 }
557
558
559 // LIR_Op2
560 case lir_cmp:
561 case lir_cmp_l2i:
562 case lir_ucmp_fd2i:
563 case lir_cmp_fd2i:
564 case lir_add:
565 case lir_sub:
566 case lir_mul:
567 case lir_div:
568 case lir_rem:
569 case lir_sqrt:
570 case lir_abs:
571 case lir_neg:
572 case lir_logic_and:
573 case lir_logic_or:
574 case lir_logic_xor:
575 case lir_shl:
576 case lir_shr:
577 case lir_ushr:
578 case lir_xadd:
579 case lir_xchg:
580 case lir_assert:
581 {
582 assert(op->as_Op2() != NULL, "must be");
583 LIR_Op2* op2 = (LIR_Op2*)op;
584 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
585 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
586
587 if (op2->_info) do_info(op2->_info);
588 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
589 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
590 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
591 if (op2->_result->is_valid()) do_output(op2->_result);
592 if (op->code() == lir_xchg || op->code() == lir_xadd) {
593 // on ARM and PPC, return value is loaded first so could
594 // destroy inputs. On other platforms that implement those
595 // (x86, sparc), the extra constrainsts are harmless.
596 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
597 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
598 }
599
600 break;
601 }
602
603 // special handling for cmove: right input operand must not be equal
604 // to the result operand, otherwise the backend fails
605 case lir_cmove:
606 {
607 assert(op->as_Op2() != NULL, "must be");
608 LIR_Op2* op2 = (LIR_Op2*)op;
609
610 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
611 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
612 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
613
614 do_input(op2->_opr1);
615 do_input(op2->_opr2);
616 do_temp(op2->_opr2);
617 do_output(op2->_result);
618
619 break;
620 }
621
622 // vspecial handling for strict operations: register input operands
623 // as temp to guarantee that they do not overlap with other
624 // registers
625 case lir_mul_strictfp:
626 case lir_div_strictfp:
627 {
628 assert(op->as_Op2() != NULL, "must be");
629 LIR_Op2* op2 = (LIR_Op2*)op;
630
631 assert(op2->_info == NULL, "not used");
632 assert(op2->_opr1->is_valid(), "used");
633 assert(op2->_opr2->is_valid(), "used");
634 assert(op2->_result->is_valid(), "used");
635 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
636 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
637
638 do_input(op2->_opr1); do_temp(op2->_opr1);
639 do_input(op2->_opr2); do_temp(op2->_opr2);
640 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
641 do_output(op2->_result);
642
643 break;
644 }
645
646 case lir_throw: {
647 assert(op->as_Op2() != NULL, "must be");
648 LIR_Op2* op2 = (LIR_Op2*)op;
649
650 if (op2->_info) do_info(op2->_info);
651 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
652 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
653 assert(op2->_result->is_illegal(), "no result");
654 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
655 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
656
657 break;
658 }
659
660 case lir_unwind: {
661 assert(op->as_Op1() != NULL, "must be");
662 LIR_Op1* op1 = (LIR_Op1*)op;
663
664 assert(op1->_info == NULL, "no info");
665 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
666 assert(op1->_result->is_illegal(), "no result");
667
668 break;
669 }
670
671 // LIR_Op3
672 case lir_idiv:
673 case lir_irem: {
674 assert(op->as_Op3() != NULL, "must be");
675 LIR_Op3* op3= (LIR_Op3*)op;
676
677 if (op3->_info) do_info(op3->_info);
678 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
679
680 // second operand is input and temp, so ensure that second operand
681 // and third operand get not the same register
682 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
683 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
684 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
685
686 if (op3->_result->is_valid()) do_output(op3->_result);
687
688 break;
689 }
690
691 case lir_fmad:
692 case lir_fmaf: {
693 assert(op->as_Op3() != NULL, "must be");
694 LIR_Op3* op3= (LIR_Op3*)op;
695 assert(op3->_info == NULL, "no info");
696 do_input(op3->_opr1);
697 do_input(op3->_opr2);
698 do_input(op3->_opr3);
699 do_output(op3->_result);
700 break;
701 }
702
703 // LIR_OpJavaCall
704 case lir_static_call:
705 case lir_optvirtual_call:
706 case lir_icvirtual_call:
707 case lir_virtual_call:
708 case lir_dynamic_call: {
709 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
710 assert(opJavaCall != NULL, "must be");
711
712 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
713
714 // only visit register parameters
715 int n = opJavaCall->_arguments->length();
716 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
717 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
718 do_input(*opJavaCall->_arguments->adr_at(i));
719 }
720 }
721
722 if (opJavaCall->_info) do_info(opJavaCall->_info);
723 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
724 opJavaCall->is_method_handle_invoke()) {
725 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
726 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
727 }
728 do_call();
729 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
730
731 break;
732 }
733
734
735 // LIR_OpRTCall
736 case lir_rtcall: {
737 assert(op->as_OpRTCall() != NULL, "must be");
738 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
739
740 // only visit register parameters
741 int n = opRTCall->_arguments->length();
742 for (int i = 0; i < n; i++) {
743 if (!opRTCall->_arguments->at(i)->is_pointer()) {
744 do_input(*opRTCall->_arguments->adr_at(i));
745 }
746 }
747 if (opRTCall->_info) do_info(opRTCall->_info);
748 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
749 do_call();
750 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
751
752 break;
753 }
754
755
756 // LIR_OpArrayCopy
757 case lir_arraycopy: {
758 assert(op->as_OpArrayCopy() != NULL, "must be");
759 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
760
761 assert(opArrayCopy->_result->is_illegal(), "unused");
762 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
763 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
764 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
765 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
766 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
767 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
768 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
769
770 // the implementation of arraycopy always has a call into the runtime
771 do_call();
772
773 break;
774 }
775
776
777 // LIR_OpUpdateCRC32
778 case lir_updatecrc32: {
779 assert(op->as_OpUpdateCRC32() != NULL, "must be");
780 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
781
782 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
783 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
784 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
785 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
786
787 break;
788 }
789
790
791 // LIR_OpLock
792 case lir_lock:
793 case lir_unlock: {
794 assert(op->as_OpLock() != NULL, "must be");
795 LIR_OpLock* opLock = (LIR_OpLock*)op;
796
797 if (opLock->_info) do_info(opLock->_info);
798
799 // TODO: check if these operands really have to be temp
800 // (or if input is sufficient). This may have influence on the oop map!
801 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
802 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
803 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
804
805 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
806 assert(opLock->_result->is_illegal(), "unused");
807
808 do_stub(opLock->_stub);
809
810 break;
811 }
812
813
814 // LIR_OpDelay
815 case lir_delay_slot: {
816 assert(op->as_OpDelay() != NULL, "must be");
817 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
818
819 visit(opDelay->delay_op());
820 break;
821 }
822
823 // LIR_OpTypeCheck
824 case lir_instanceof:
825 case lir_checkcast:
826 case lir_store_check: {
827 assert(op->as_OpTypeCheck() != NULL, "must be");
828 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
829
830 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
831 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
832 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
833 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
834 do_temp(opTypeCheck->_object);
835 }
836 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
837 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
838 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
839 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
840 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
841 do_stub(opTypeCheck->_stub);
842 break;
843 }
844
845 // LIR_OpCompareAndSwap
846 case lir_cas_long:
847 case lir_cas_obj:
848 case lir_cas_int: {
849 assert(op->as_OpCompareAndSwap() != NULL, "must be");
850 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
851
852 assert(opCompareAndSwap->_addr->is_valid(), "used");
853 assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
854 assert(opCompareAndSwap->_new_value->is_valid(), "used");
855 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
856 do_input(opCompareAndSwap->_addr);
857 do_temp(opCompareAndSwap->_addr);
858 do_input(opCompareAndSwap->_cmp_value);
859 do_temp(opCompareAndSwap->_cmp_value);
860 do_input(opCompareAndSwap->_new_value);
861 do_temp(opCompareAndSwap->_new_value);
862 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
863 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
864 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
865
866 break;
867 }
868
869
870 // LIR_OpAllocArray;
871 case lir_alloc_array: {
872 assert(op->as_OpAllocArray() != NULL, "must be");
873 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
874
875 if (opAllocArray->_info) do_info(opAllocArray->_info);
876 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
877 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
878 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
879 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
880 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
881 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
882 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
883 do_stub(opAllocArray->_stub);
884 break;
885 }
886
887 // LIR_OpProfileCall:
888 case lir_profile_call: {
889 assert(op->as_OpProfileCall() != NULL, "must be");
890 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
891
892 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
893 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
894 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
895 break;
896 }
897
898 // LIR_OpProfileType:
899 case lir_profile_type: {
900 assert(op->as_OpProfileType() != NULL, "must be");
901 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
902
903 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
904 do_input(opProfileType->_obj);
905 do_temp(opProfileType->_tmp);
906 break;
907 }
908 default:
909 op->visit(this);
910 }
911 }
912
visit(LIR_OpVisitState * state)913 void LIR_Op::visit(LIR_OpVisitState* state) {
914 ShouldNotReachHere();
915 }
916
do_stub(CodeStub * stub)917 void LIR_OpVisitState::do_stub(CodeStub* stub) {
918 if (stub != NULL) {
919 stub->visit(this);
920 }
921 }
922
all_xhandler()923 XHandlers* LIR_OpVisitState::all_xhandler() {
924 XHandlers* result = NULL;
925
926 int i;
927 for (i = 0; i < info_count(); i++) {
928 if (info_at(i)->exception_handlers() != NULL) {
929 result = info_at(i)->exception_handlers();
930 break;
931 }
932 }
933
934 #ifdef ASSERT
935 for (i = 0; i < info_count(); i++) {
936 assert(info_at(i)->exception_handlers() == NULL ||
937 info_at(i)->exception_handlers() == result,
938 "only one xhandler list allowed per LIR-operation");
939 }
940 #endif
941
942 if (result != NULL) {
943 return result;
944 } else {
945 return new XHandlers();
946 }
947
948 return result;
949 }
950
951
952 #ifdef ASSERT
no_operands(LIR_Op * op)953 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
954 visit(op);
955
956 return opr_count(inputMode) == 0 &&
957 opr_count(outputMode) == 0 &&
958 opr_count(tempMode) == 0 &&
959 info_count() == 0 &&
960 !has_call() &&
961 !has_slow_case();
962 }
963 #endif
964
965 // LIR_OpReturn
LIR_OpReturn(LIR_Opr opr)966 LIR_OpReturn::LIR_OpReturn(LIR_Opr opr) :
967 LIR_Op1(lir_return, opr, (CodeEmitInfo*)NULL /* info */),
968 _stub(NULL) {
969 if (VM_Version::supports_stack_watermark_barrier()) {
970 _stub = new C1SafepointPollStub();
971 }
972 }
973
974 //---------------------------------------------------
975
976
emit_code(LIR_Assembler * masm)977 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
978 masm->emit_call(this);
979 }
980
emit_code(LIR_Assembler * masm)981 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
982 masm->emit_rtcall(this);
983 }
984
emit_code(LIR_Assembler * masm)985 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
986 masm->emit_opLabel(this);
987 }
988
emit_code(LIR_Assembler * masm)989 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
990 masm->emit_arraycopy(this);
991 masm->append_code_stub(stub());
992 }
993
emit_code(LIR_Assembler * masm)994 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
995 masm->emit_updatecrc32(this);
996 }
997
emit_code(LIR_Assembler * masm)998 void LIR_Op0::emit_code(LIR_Assembler* masm) {
999 masm->emit_op0(this);
1000 }
1001
emit_code(LIR_Assembler * masm)1002 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1003 masm->emit_op1(this);
1004 }
1005
emit_code(LIR_Assembler * masm)1006 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1007 masm->emit_alloc_obj(this);
1008 masm->append_code_stub(stub());
1009 }
1010
emit_code(LIR_Assembler * masm)1011 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1012 masm->emit_opBranch(this);
1013 if (stub()) {
1014 masm->append_code_stub(stub());
1015 }
1016 }
1017
emit_code(LIR_Assembler * masm)1018 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1019 masm->emit_opConvert(this);
1020 if (stub() != NULL) {
1021 masm->append_code_stub(stub());
1022 }
1023 }
1024
emit_code(LIR_Assembler * masm)1025 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1026 masm->emit_op2(this);
1027 }
1028
emit_code(LIR_Assembler * masm)1029 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1030 masm->emit_alloc_array(this);
1031 masm->append_code_stub(stub());
1032 }
1033
emit_code(LIR_Assembler * masm)1034 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1035 masm->emit_opTypeCheck(this);
1036 if (stub()) {
1037 masm->append_code_stub(stub());
1038 }
1039 }
1040
emit_code(LIR_Assembler * masm)1041 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1042 masm->emit_compare_and_swap(this);
1043 }
1044
emit_code(LIR_Assembler * masm)1045 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1046 masm->emit_op3(this);
1047 }
1048
emit_code(LIR_Assembler * masm)1049 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1050 masm->emit_lock(this);
1051 if (stub()) {
1052 masm->append_code_stub(stub());
1053 }
1054 }
1055
1056 #ifdef ASSERT
emit_code(LIR_Assembler * masm)1057 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1058 masm->emit_assert(this);
1059 }
1060 #endif
1061
emit_code(LIR_Assembler * masm)1062 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1063 masm->emit_delay(this);
1064 }
1065
emit_code(LIR_Assembler * masm)1066 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1067 masm->emit_profile_call(this);
1068 }
1069
emit_code(LIR_Assembler * masm)1070 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1071 masm->emit_profile_type(this);
1072 }
1073
1074 // LIR_List
LIR_List(Compilation * compilation,BlockBegin * block)1075 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1076 : _operations(8)
1077 , _compilation(compilation)
1078 #ifndef PRODUCT
1079 , _block(block)
1080 #endif
1081 #ifdef ASSERT
1082 , _file(NULL)
1083 , _line(0)
1084 #endif
1085 { }
1086
1087
1088 #ifdef ASSERT
set_file_and_line(const char * file,int line)1089 void LIR_List::set_file_and_line(const char * file, int line) {
1090 const char * f = strrchr(file, '/');
1091 if (f == NULL) f = strrchr(file, '\\');
1092 if (f == NULL) {
1093 f = file;
1094 } else {
1095 f++;
1096 }
1097 _file = f;
1098 _line = line;
1099 }
1100 #endif
1101
1102
append(LIR_InsertionBuffer * buffer)1103 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1104 assert(this == buffer->lir_list(), "wrong lir list");
1105 const int n = _operations.length();
1106
1107 if (buffer->number_of_ops() > 0) {
1108 // increase size of instructions list
1109 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1110 // insert ops from buffer into instructions list
1111 int op_index = buffer->number_of_ops() - 1;
1112 int ip_index = buffer->number_of_insertion_points() - 1;
1113 int from_index = n - 1;
1114 int to_index = _operations.length() - 1;
1115 for (; ip_index >= 0; ip_index --) {
1116 int index = buffer->index_at(ip_index);
1117 // make room after insertion point
1118 while (index < from_index) {
1119 _operations.at_put(to_index --, _operations.at(from_index --));
1120 }
1121 // insert ops from buffer
1122 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1123 _operations.at_put(to_index --, buffer->op_at(op_index --));
1124 }
1125 }
1126 }
1127
1128 buffer->finish();
1129 }
1130
1131
oop2reg_patch(jobject o,LIR_Opr reg,CodeEmitInfo * info)1132 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1133 assert(reg->type() == T_OBJECT, "bad reg");
1134 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1135 }
1136
klass2reg_patch(Metadata * o,LIR_Opr reg,CodeEmitInfo * info)1137 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1138 assert(reg->type() == T_METADATA, "bad reg");
1139 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1140 }
1141
load(LIR_Address * addr,LIR_Opr src,CodeEmitInfo * info,LIR_PatchCode patch_code)1142 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1143 append(new LIR_Op1(
1144 lir_move,
1145 LIR_OprFact::address(addr),
1146 src,
1147 addr->type(),
1148 patch_code,
1149 info));
1150 }
1151
1152
volatile_load_mem_reg(LIR_Address * address,LIR_Opr dst,CodeEmitInfo * info,LIR_PatchCode patch_code)1153 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1154 append(new LIR_Op1(
1155 lir_move,
1156 LIR_OprFact::address(address),
1157 dst,
1158 address->type(),
1159 patch_code,
1160 info, lir_move_volatile));
1161 }
1162
volatile_load_unsafe_reg(LIR_Opr base,LIR_Opr offset,LIR_Opr dst,BasicType type,CodeEmitInfo * info,LIR_PatchCode patch_code)1163 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1164 append(new LIR_Op1(
1165 lir_move,
1166 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1167 dst,
1168 type,
1169 patch_code,
1170 info, lir_move_volatile));
1171 }
1172
1173
store_mem_int(jint v,LIR_Opr base,int offset_in_bytes,BasicType type,CodeEmitInfo * info,LIR_PatchCode patch_code)1174 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1175 append(new LIR_Op1(
1176 lir_move,
1177 LIR_OprFact::intConst(v),
1178 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1179 type,
1180 patch_code,
1181 info));
1182 }
1183
1184
store_mem_oop(jobject o,LIR_Opr base,int offset_in_bytes,BasicType type,CodeEmitInfo * info,LIR_PatchCode patch_code)1185 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1186 append(new LIR_Op1(
1187 lir_move,
1188 LIR_OprFact::oopConst(o),
1189 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1190 type,
1191 patch_code,
1192 info));
1193 }
1194
1195
store(LIR_Opr src,LIR_Address * addr,CodeEmitInfo * info,LIR_PatchCode patch_code)1196 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1197 append(new LIR_Op1(
1198 lir_move,
1199 src,
1200 LIR_OprFact::address(addr),
1201 addr->type(),
1202 patch_code,
1203 info));
1204 }
1205
1206
volatile_store_mem_reg(LIR_Opr src,LIR_Address * addr,CodeEmitInfo * info,LIR_PatchCode patch_code)1207 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1208 append(new LIR_Op1(
1209 lir_move,
1210 src,
1211 LIR_OprFact::address(addr),
1212 addr->type(),
1213 patch_code,
1214 info,
1215 lir_move_volatile));
1216 }
1217
volatile_store_unsafe_reg(LIR_Opr src,LIR_Opr base,LIR_Opr offset,BasicType type,CodeEmitInfo * info,LIR_PatchCode patch_code)1218 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1219 append(new LIR_Op1(
1220 lir_move,
1221 src,
1222 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1223 type,
1224 patch_code,
1225 info, lir_move_volatile));
1226 }
1227
1228
idiv(LIR_Opr left,LIR_Opr right,LIR_Opr res,LIR_Opr tmp,CodeEmitInfo * info)1229 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1230 append(new LIR_Op3(
1231 lir_idiv,
1232 left,
1233 right,
1234 tmp,
1235 res,
1236 info));
1237 }
1238
1239
idiv(LIR_Opr left,int right,LIR_Opr res,LIR_Opr tmp,CodeEmitInfo * info)1240 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1241 append(new LIR_Op3(
1242 lir_idiv,
1243 left,
1244 LIR_OprFact::intConst(right),
1245 tmp,
1246 res,
1247 info));
1248 }
1249
1250
irem(LIR_Opr left,LIR_Opr right,LIR_Opr res,LIR_Opr tmp,CodeEmitInfo * info)1251 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1252 append(new LIR_Op3(
1253 lir_irem,
1254 left,
1255 right,
1256 tmp,
1257 res,
1258 info));
1259 }
1260
1261
irem(LIR_Opr left,int right,LIR_Opr res,LIR_Opr tmp,CodeEmitInfo * info)1262 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1263 append(new LIR_Op3(
1264 lir_irem,
1265 left,
1266 LIR_OprFact::intConst(right),
1267 tmp,
1268 res,
1269 info));
1270 }
1271
1272
cmp_mem_int(LIR_Condition condition,LIR_Opr base,int disp,int c,CodeEmitInfo * info)1273 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1274 append(new LIR_Op2(
1275 lir_cmp,
1276 condition,
1277 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1278 LIR_OprFact::intConst(c),
1279 info));
1280 }
1281
1282
cmp_reg_mem(LIR_Condition condition,LIR_Opr reg,LIR_Address * addr,CodeEmitInfo * info)1283 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1284 append(new LIR_Op2(
1285 lir_cmp,
1286 condition,
1287 reg,
1288 LIR_OprFact::address(addr),
1289 info));
1290 }
1291
allocate_object(LIR_Opr dst,LIR_Opr t1,LIR_Opr t2,LIR_Opr t3,LIR_Opr t4,int header_size,int object_size,LIR_Opr klass,bool init_check,CodeStub * stub)1292 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1293 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1294 append(new LIR_OpAllocObj(
1295 klass,
1296 dst,
1297 t1,
1298 t2,
1299 t3,
1300 t4,
1301 header_size,
1302 object_size,
1303 init_check,
1304 stub));
1305 }
1306
allocate_array(LIR_Opr dst,LIR_Opr len,LIR_Opr t1,LIR_Opr t2,LIR_Opr t3,LIR_Opr t4,BasicType type,LIR_Opr klass,CodeStub * stub)1307 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1308 append(new LIR_OpAllocArray(
1309 klass,
1310 len,
1311 dst,
1312 t1,
1313 t2,
1314 t3,
1315 t4,
1316 type,
1317 stub));
1318 }
1319
shift_left(LIR_Opr value,LIR_Opr count,LIR_Opr dst,LIR_Opr tmp)1320 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1321 append(new LIR_Op2(
1322 lir_shl,
1323 value,
1324 count,
1325 dst,
1326 tmp));
1327 }
1328
shift_right(LIR_Opr value,LIR_Opr count,LIR_Opr dst,LIR_Opr tmp)1329 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1330 append(new LIR_Op2(
1331 lir_shr,
1332 value,
1333 count,
1334 dst,
1335 tmp));
1336 }
1337
1338
unsigned_shift_right(LIR_Opr value,LIR_Opr count,LIR_Opr dst,LIR_Opr tmp)1339 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1340 append(new LIR_Op2(
1341 lir_ushr,
1342 value,
1343 count,
1344 dst,
1345 tmp));
1346 }
1347
fcmp2int(LIR_Opr left,LIR_Opr right,LIR_Opr dst,bool is_unordered_less)1348 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1349 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1350 left,
1351 right,
1352 dst));
1353 }
1354
lock_object(LIR_Opr hdr,LIR_Opr obj,LIR_Opr lock,LIR_Opr scratch,CodeStub * stub,CodeEmitInfo * info)1355 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1356 append(new LIR_OpLock(
1357 lir_lock,
1358 hdr,
1359 obj,
1360 lock,
1361 scratch,
1362 stub,
1363 info));
1364 }
1365
unlock_object(LIR_Opr hdr,LIR_Opr obj,LIR_Opr lock,LIR_Opr scratch,CodeStub * stub)1366 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1367 append(new LIR_OpLock(
1368 lir_unlock,
1369 hdr,
1370 obj,
1371 lock,
1372 scratch,
1373 stub,
1374 NULL));
1375 }
1376
1377
check_LIR()1378 void check_LIR() {
1379 // cannot do the proper checking as PRODUCT and other modes return different results
1380 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1381 }
1382
1383
1384
checkcast(LIR_Opr result,LIR_Opr object,ciKlass * klass,LIR_Opr tmp1,LIR_Opr tmp2,LIR_Opr tmp3,bool fast_check,CodeEmitInfo * info_for_exception,CodeEmitInfo * info_for_patch,CodeStub * stub,ciMethod * profiled_method,int profiled_bci)1385 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1386 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1387 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1388 ciMethod* profiled_method, int profiled_bci) {
1389 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1390 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1391 if (profiled_method != NULL) {
1392 c->set_profiled_method(profiled_method);
1393 c->set_profiled_bci(profiled_bci);
1394 c->set_should_profile(true);
1395 }
1396 append(c);
1397 }
1398
instanceof(LIR_Opr result,LIR_Opr object,ciKlass * klass,LIR_Opr tmp1,LIR_Opr tmp2,LIR_Opr tmp3,bool fast_check,CodeEmitInfo * info_for_patch,ciMethod * profiled_method,int profiled_bci)1399 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1400 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1401 if (profiled_method != NULL) {
1402 c->set_profiled_method(profiled_method);
1403 c->set_profiled_bci(profiled_bci);
1404 c->set_should_profile(true);
1405 }
1406 append(c);
1407 }
1408
1409
store_check(LIR_Opr object,LIR_Opr array,LIR_Opr tmp1,LIR_Opr tmp2,LIR_Opr tmp3,CodeEmitInfo * info_for_exception,ciMethod * profiled_method,int profiled_bci)1410 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1411 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1412 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1413 if (profiled_method != NULL) {
1414 c->set_profiled_method(profiled_method);
1415 c->set_profiled_bci(profiled_bci);
1416 c->set_should_profile(true);
1417 }
1418 append(c);
1419 }
1420
null_check(LIR_Opr opr,CodeEmitInfo * info,bool deoptimize_on_null)1421 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1422 if (deoptimize_on_null) {
1423 // Emit an explicit null check and deoptimize if opr is null
1424 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1425 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
1426 branch(lir_cond_equal, deopt);
1427 } else {
1428 // Emit an implicit null check
1429 append(new LIR_Op1(lir_null_check, opr, info));
1430 }
1431 }
1432
cas_long(LIR_Opr addr,LIR_Opr cmp_value,LIR_Opr new_value,LIR_Opr t1,LIR_Opr t2,LIR_Opr result)1433 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1434 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1435 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1436 }
1437
cas_obj(LIR_Opr addr,LIR_Opr cmp_value,LIR_Opr new_value,LIR_Opr t1,LIR_Opr t2,LIR_Opr result)1438 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1439 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1440 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1441 }
1442
cas_int(LIR_Opr addr,LIR_Opr cmp_value,LIR_Opr new_value,LIR_Opr t1,LIR_Opr t2,LIR_Opr result)1443 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1444 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1445 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1446 }
1447
1448
1449 #ifdef PRODUCT
1450
print_LIR(BlockList * blocks)1451 void print_LIR(BlockList* blocks) {
1452 }
1453
1454 #else
1455 // LIR_OprDesc
print() const1456 void LIR_OprDesc::print() const {
1457 print(tty);
1458 }
1459
print(outputStream * out) const1460 void LIR_OprDesc::print(outputStream* out) const {
1461 if (is_illegal()) {
1462 return;
1463 }
1464
1465 out->print("[");
1466 if (is_pointer()) {
1467 pointer()->print_value_on(out);
1468 } else if (is_single_stack()) {
1469 out->print("stack:%d", single_stack_ix());
1470 } else if (is_double_stack()) {
1471 out->print("dbl_stack:%d",double_stack_ix());
1472 } else if (is_virtual()) {
1473 out->print("R%d", vreg_number());
1474 } else if (is_single_cpu()) {
1475 out->print("%s", as_register()->name());
1476 } else if (is_double_cpu()) {
1477 out->print("%s", as_register_hi()->name());
1478 out->print("%s", as_register_lo()->name());
1479 #if defined(X86)
1480 } else if (is_single_xmm()) {
1481 out->print("%s", as_xmm_float_reg()->name());
1482 } else if (is_double_xmm()) {
1483 out->print("%s", as_xmm_double_reg()->name());
1484 } else if (is_single_fpu()) {
1485 out->print("fpu%d", fpu_regnr());
1486 } else if (is_double_fpu()) {
1487 out->print("fpu%d", fpu_regnrLo());
1488 #elif defined(AARCH64)
1489 } else if (is_single_fpu()) {
1490 out->print("fpu%d", fpu_regnr());
1491 } else if (is_double_fpu()) {
1492 out->print("fpu%d", fpu_regnrLo());
1493 #elif defined(ARM)
1494 } else if (is_single_fpu()) {
1495 out->print("s%d", fpu_regnr());
1496 } else if (is_double_fpu()) {
1497 out->print("d%d", fpu_regnrLo() >> 1);
1498 #else
1499 } else if (is_single_fpu()) {
1500 out->print("%s", as_float_reg()->name());
1501 } else if (is_double_fpu()) {
1502 out->print("%s", as_double_reg()->name());
1503 #endif
1504
1505 } else if (is_illegal()) {
1506 out->print("-");
1507 } else {
1508 out->print("Unknown Operand");
1509 }
1510 if (!is_illegal()) {
1511 out->print("|%c", type_char());
1512 }
1513 if (is_register() && is_last_use()) {
1514 out->print("(last_use)");
1515 }
1516 out->print("]");
1517 }
1518
1519
1520 // LIR_Address
print_value_on(outputStream * out) const1521 void LIR_Const::print_value_on(outputStream* out) const {
1522 switch (type()) {
1523 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1524 case T_INT: out->print("int:%d", as_jint()); break;
1525 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1526 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1527 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1528 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1529 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1530 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1531 }
1532 }
1533
1534 // LIR_Address
print_value_on(outputStream * out) const1535 void LIR_Address::print_value_on(outputStream* out) const {
1536 out->print("Base:"); _base->print(out);
1537 if (!_index->is_illegal()) {
1538 out->print(" Index:"); _index->print(out);
1539 switch (scale()) {
1540 case times_1: break;
1541 case times_2: out->print(" * 2"); break;
1542 case times_4: out->print(" * 4"); break;
1543 case times_8: out->print(" * 8"); break;
1544 }
1545 }
1546 out->print(" Disp: " INTX_FORMAT, _disp);
1547 }
1548
1549 // debug output of block header without InstructionPrinter
1550 // (because phi functions are not necessary for LIR)
print_block(BlockBegin * x)1551 static void print_block(BlockBegin* x) {
1552 // print block id
1553 BlockEnd* end = x->end();
1554 tty->print("B%d ", x->block_id());
1555
1556 // print flags
1557 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1558 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1559 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1560 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1561 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1562 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1563 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1564
1565 // print block bci range
1566 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1567
1568 // print predecessors and successors
1569 if (x->number_of_preds() > 0) {
1570 tty->print("preds: ");
1571 for (int i = 0; i < x->number_of_preds(); i ++) {
1572 tty->print("B%d ", x->pred_at(i)->block_id());
1573 }
1574 }
1575
1576 if (x->number_of_sux() > 0) {
1577 tty->print("sux: ");
1578 for (int i = 0; i < x->number_of_sux(); i ++) {
1579 tty->print("B%d ", x->sux_at(i)->block_id());
1580 }
1581 }
1582
1583 // print exception handlers
1584 if (x->number_of_exception_handlers() > 0) {
1585 tty->print("xhandler: ");
1586 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1587 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1588 }
1589 }
1590
1591 tty->cr();
1592 }
1593
print_LIR(BlockList * blocks)1594 void print_LIR(BlockList* blocks) {
1595 tty->print_cr("LIR:");
1596 int i;
1597 for (i = 0; i < blocks->length(); i++) {
1598 BlockBegin* bb = blocks->at(i);
1599 print_block(bb);
1600 tty->print("__id_Instruction___________________________________________"); tty->cr();
1601 bb->lir()->print_instructions();
1602 }
1603 }
1604
print_instructions()1605 void LIR_List::print_instructions() {
1606 for (int i = 0; i < _operations.length(); i++) {
1607 _operations.at(i)->print(); tty->cr();
1608 }
1609 tty->cr();
1610 }
1611
1612 // LIR_Ops printing routines
1613 // LIR_Op
print_on(outputStream * out) const1614 void LIR_Op::print_on(outputStream* out) const {
1615 if (id() != -1 || PrintCFGToFile) {
1616 out->print("%4d ", id());
1617 } else {
1618 out->print(" ");
1619 }
1620 out->print("%s ", name());
1621 print_instr(out);
1622 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1623 #ifdef ASSERT
1624 if (Verbose && _file != NULL) {
1625 out->print(" (%s:%d)", _file, _line);
1626 }
1627 #endif
1628 }
1629
name() const1630 const char * LIR_Op::name() const {
1631 const char* s = NULL;
1632 switch(code()) {
1633 // LIR_Op0
1634 case lir_membar: s = "membar"; break;
1635 case lir_membar_acquire: s = "membar_acquire"; break;
1636 case lir_membar_release: s = "membar_release"; break;
1637 case lir_membar_loadload: s = "membar_loadload"; break;
1638 case lir_membar_storestore: s = "membar_storestore"; break;
1639 case lir_membar_loadstore: s = "membar_loadstore"; break;
1640 case lir_membar_storeload: s = "membar_storeload"; break;
1641 case lir_label: s = "label"; break;
1642 case lir_nop: s = "nop"; break;
1643 case lir_on_spin_wait: s = "on_spin_wait"; break;
1644 case lir_backwardbranch_target: s = "backbranch"; break;
1645 case lir_std_entry: s = "std_entry"; break;
1646 case lir_osr_entry: s = "osr_entry"; break;
1647 case lir_fpop_raw: s = "fpop_raw"; break;
1648 case lir_breakpoint: s = "breakpoint"; break;
1649 case lir_get_thread: s = "get_thread"; break;
1650 // LIR_Op1
1651 case lir_fxch: s = "fxch"; break;
1652 case lir_fld: s = "fld"; break;
1653 case lir_push: s = "push"; break;
1654 case lir_pop: s = "pop"; break;
1655 case lir_null_check: s = "null_check"; break;
1656 case lir_return: s = "return"; break;
1657 case lir_safepoint: s = "safepoint"; break;
1658 case lir_leal: s = "leal"; break;
1659 case lir_branch: s = "branch"; break;
1660 case lir_cond_float_branch: s = "flt_cond_br"; break;
1661 case lir_move: s = "move"; break;
1662 case lir_roundfp: s = "roundfp"; break;
1663 case lir_rtcall: s = "rtcall"; break;
1664 case lir_throw: s = "throw"; break;
1665 case lir_unwind: s = "unwind"; break;
1666 case lir_convert: s = "convert"; break;
1667 case lir_alloc_object: s = "alloc_obj"; break;
1668 case lir_monaddr: s = "mon_addr"; break;
1669 // LIR_Op2
1670 case lir_cmp: s = "cmp"; break;
1671 case lir_cmp_l2i: s = "cmp_l2i"; break;
1672 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1673 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1674 case lir_cmove: s = "cmove"; break;
1675 case lir_add: s = "add"; break;
1676 case lir_sub: s = "sub"; break;
1677 case lir_mul: s = "mul"; break;
1678 case lir_mul_strictfp: s = "mul_strictfp"; break;
1679 case lir_div: s = "div"; break;
1680 case lir_div_strictfp: s = "div_strictfp"; break;
1681 case lir_rem: s = "rem"; break;
1682 case lir_abs: s = "abs"; break;
1683 case lir_neg: s = "neg"; break;
1684 case lir_sqrt: s = "sqrt"; break;
1685 case lir_logic_and: s = "logic_and"; break;
1686 case lir_logic_or: s = "logic_or"; break;
1687 case lir_logic_xor: s = "logic_xor"; break;
1688 case lir_shl: s = "shift_left"; break;
1689 case lir_shr: s = "shift_right"; break;
1690 case lir_ushr: s = "ushift_right"; break;
1691 case lir_alloc_array: s = "alloc_array"; break;
1692 case lir_xadd: s = "xadd"; break;
1693 case lir_xchg: s = "xchg"; break;
1694 // LIR_Op3
1695 case lir_idiv: s = "idiv"; break;
1696 case lir_irem: s = "irem"; break;
1697 case lir_fmad: s = "fmad"; break;
1698 case lir_fmaf: s = "fmaf"; break;
1699 // LIR_OpJavaCall
1700 case lir_static_call: s = "static"; break;
1701 case lir_optvirtual_call: s = "optvirtual"; break;
1702 case lir_icvirtual_call: s = "icvirtual"; break;
1703 case lir_virtual_call: s = "virtual"; break;
1704 case lir_dynamic_call: s = "dynamic"; break;
1705 // LIR_OpArrayCopy
1706 case lir_arraycopy: s = "arraycopy"; break;
1707 // LIR_OpUpdateCRC32
1708 case lir_updatecrc32: s = "updatecrc32"; break;
1709 // LIR_OpLock
1710 case lir_lock: s = "lock"; break;
1711 case lir_unlock: s = "unlock"; break;
1712 // LIR_OpDelay
1713 case lir_delay_slot: s = "delay"; break;
1714 // LIR_OpTypeCheck
1715 case lir_instanceof: s = "instanceof"; break;
1716 case lir_checkcast: s = "checkcast"; break;
1717 case lir_store_check: s = "store_check"; break;
1718 // LIR_OpCompareAndSwap
1719 case lir_cas_long: s = "cas_long"; break;
1720 case lir_cas_obj: s = "cas_obj"; break;
1721 case lir_cas_int: s = "cas_int"; break;
1722 // LIR_OpProfileCall
1723 case lir_profile_call: s = "profile_call"; break;
1724 // LIR_OpProfileType
1725 case lir_profile_type: s = "profile_type"; break;
1726 // LIR_OpAssert
1727 #ifdef ASSERT
1728 case lir_assert: s = "assert"; break;
1729 #endif
1730 case lir_none: ShouldNotReachHere();break;
1731 default: s = "illegal_op"; break;
1732 }
1733 return s;
1734 }
1735
1736 // LIR_OpJavaCall
print_instr(outputStream * out) const1737 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1738 out->print("call: ");
1739 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1740 if (receiver()->is_valid()) {
1741 out->print(" [recv: "); receiver()->print(out); out->print("]");
1742 }
1743 if (result_opr()->is_valid()) {
1744 out->print(" [result: "); result_opr()->print(out); out->print("]");
1745 }
1746 }
1747
1748 // LIR_OpLabel
print_instr(outputStream * out) const1749 void LIR_OpLabel::print_instr(outputStream* out) const {
1750 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1751 }
1752
1753 // LIR_OpArrayCopy
print_instr(outputStream * out) const1754 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1755 src()->print(out); out->print(" ");
1756 src_pos()->print(out); out->print(" ");
1757 dst()->print(out); out->print(" ");
1758 dst_pos()->print(out); out->print(" ");
1759 length()->print(out); out->print(" ");
1760 tmp()->print(out); out->print(" ");
1761 }
1762
1763 // LIR_OpUpdateCRC32
print_instr(outputStream * out) const1764 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1765 crc()->print(out); out->print(" ");
1766 val()->print(out); out->print(" ");
1767 result_opr()->print(out); out->print(" ");
1768 }
1769
1770 // LIR_OpCompareAndSwap
print_instr(outputStream * out) const1771 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1772 addr()->print(out); out->print(" ");
1773 cmp_value()->print(out); out->print(" ");
1774 new_value()->print(out); out->print(" ");
1775 tmp1()->print(out); out->print(" ");
1776 tmp2()->print(out); out->print(" ");
1777
1778 }
1779
1780 // LIR_Op0
print_instr(outputStream * out) const1781 void LIR_Op0::print_instr(outputStream* out) const {
1782 result_opr()->print(out);
1783 }
1784
1785 // LIR_Op1
name() const1786 const char * LIR_Op1::name() const {
1787 if (code() == lir_move) {
1788 switch (move_kind()) {
1789 case lir_move_normal:
1790 return "move";
1791 case lir_move_unaligned:
1792 return "unaligned move";
1793 case lir_move_volatile:
1794 return "volatile_move";
1795 case lir_move_wide:
1796 return "wide_move";
1797 default:
1798 ShouldNotReachHere();
1799 return "illegal_op";
1800 }
1801 } else {
1802 return LIR_Op::name();
1803 }
1804 }
1805
1806
print_instr(outputStream * out) const1807 void LIR_Op1::print_instr(outputStream* out) const {
1808 _opr->print(out); out->print(" ");
1809 result_opr()->print(out); out->print(" ");
1810 print_patch_code(out, patch_code());
1811 }
1812
1813
1814 // LIR_Op1
print_instr(outputStream * out) const1815 void LIR_OpRTCall::print_instr(outputStream* out) const {
1816 intx a = (intx)addr();
1817 out->print("%s", Runtime1::name_for_address(addr()));
1818 out->print(" ");
1819 tmp()->print(out);
1820 }
1821
print_patch_code(outputStream * out,LIR_PatchCode code)1822 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1823 switch(code) {
1824 case lir_patch_none: break;
1825 case lir_patch_low: out->print("[patch_low]"); break;
1826 case lir_patch_high: out->print("[patch_high]"); break;
1827 case lir_patch_normal: out->print("[patch_normal]"); break;
1828 default: ShouldNotReachHere();
1829 }
1830 }
1831
1832 // LIR_OpBranch
print_instr(outputStream * out) const1833 void LIR_OpBranch::print_instr(outputStream* out) const {
1834 print_condition(out, cond()); out->print(" ");
1835 if (block() != NULL) {
1836 out->print("[B%d] ", block()->block_id());
1837 } else if (stub() != NULL) {
1838 out->print("[");
1839 stub()->print_name(out);
1840 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1841 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1842 } else {
1843 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1844 }
1845 if (ublock() != NULL) {
1846 out->print("unordered: [B%d] ", ublock()->block_id());
1847 }
1848 }
1849
print_condition(outputStream * out,LIR_Condition cond)1850 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1851 switch(cond) {
1852 case lir_cond_equal: out->print("[EQ]"); break;
1853 case lir_cond_notEqual: out->print("[NE]"); break;
1854 case lir_cond_less: out->print("[LT]"); break;
1855 case lir_cond_lessEqual: out->print("[LE]"); break;
1856 case lir_cond_greaterEqual: out->print("[GE]"); break;
1857 case lir_cond_greater: out->print("[GT]"); break;
1858 case lir_cond_belowEqual: out->print("[BE]"); break;
1859 case lir_cond_aboveEqual: out->print("[AE]"); break;
1860 case lir_cond_always: out->print("[AL]"); break;
1861 default: out->print("[%d]",cond); break;
1862 }
1863 }
1864
1865 // LIR_OpConvert
print_instr(outputStream * out) const1866 void LIR_OpConvert::print_instr(outputStream* out) const {
1867 print_bytecode(out, bytecode());
1868 in_opr()->print(out); out->print(" ");
1869 result_opr()->print(out); out->print(" ");
1870 #ifdef PPC32
1871 if(tmp1()->is_valid()) {
1872 tmp1()->print(out); out->print(" ");
1873 tmp2()->print(out); out->print(" ");
1874 }
1875 #endif
1876 }
1877
print_bytecode(outputStream * out,Bytecodes::Code code)1878 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1879 switch(code) {
1880 case Bytecodes::_d2f: out->print("[d2f] "); break;
1881 case Bytecodes::_d2i: out->print("[d2i] "); break;
1882 case Bytecodes::_d2l: out->print("[d2l] "); break;
1883 case Bytecodes::_f2d: out->print("[f2d] "); break;
1884 case Bytecodes::_f2i: out->print("[f2i] "); break;
1885 case Bytecodes::_f2l: out->print("[f2l] "); break;
1886 case Bytecodes::_i2b: out->print("[i2b] "); break;
1887 case Bytecodes::_i2c: out->print("[i2c] "); break;
1888 case Bytecodes::_i2d: out->print("[i2d] "); break;
1889 case Bytecodes::_i2f: out->print("[i2f] "); break;
1890 case Bytecodes::_i2l: out->print("[i2l] "); break;
1891 case Bytecodes::_i2s: out->print("[i2s] "); break;
1892 case Bytecodes::_l2i: out->print("[l2i] "); break;
1893 case Bytecodes::_l2f: out->print("[l2f] "); break;
1894 case Bytecodes::_l2d: out->print("[l2d] "); break;
1895 default:
1896 out->print("[?%d]",code);
1897 break;
1898 }
1899 }
1900
print_instr(outputStream * out) const1901 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1902 klass()->print(out); out->print(" ");
1903 obj()->print(out); out->print(" ");
1904 tmp1()->print(out); out->print(" ");
1905 tmp2()->print(out); out->print(" ");
1906 tmp3()->print(out); out->print(" ");
1907 tmp4()->print(out); out->print(" ");
1908 out->print("[hdr:%d]", header_size()); out->print(" ");
1909 out->print("[obj:%d]", object_size()); out->print(" ");
1910 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1911 }
1912
print_instr(outputStream * out) const1913 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1914 _opr->print(out); out->print(" ");
1915 tmp()->print(out); out->print(" ");
1916 result_opr()->print(out); out->print(" ");
1917 }
1918
1919 // LIR_Op2
print_instr(outputStream * out) const1920 void LIR_Op2::print_instr(outputStream* out) const {
1921 if (code() == lir_cmove || code() == lir_cmp) {
1922 print_condition(out, condition()); out->print(" ");
1923 }
1924 in_opr1()->print(out); out->print(" ");
1925 in_opr2()->print(out); out->print(" ");
1926 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1927 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1928 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1929 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1930 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1931 result_opr()->print(out);
1932 }
1933
print_instr(outputStream * out) const1934 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1935 klass()->print(out); out->print(" ");
1936 len()->print(out); out->print(" ");
1937 obj()->print(out); out->print(" ");
1938 tmp1()->print(out); out->print(" ");
1939 tmp2()->print(out); out->print(" ");
1940 tmp3()->print(out); out->print(" ");
1941 tmp4()->print(out); out->print(" ");
1942 out->print("[type:0x%x]", type()); out->print(" ");
1943 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1944 }
1945
1946
print_instr(outputStream * out) const1947 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1948 object()->print(out); out->print(" ");
1949 if (code() == lir_store_check) {
1950 array()->print(out); out->print(" ");
1951 }
1952 if (code() != lir_store_check) {
1953 klass()->print_name_on(out); out->print(" ");
1954 if (fast_check()) out->print("fast_check ");
1955 }
1956 tmp1()->print(out); out->print(" ");
1957 tmp2()->print(out); out->print(" ");
1958 tmp3()->print(out); out->print(" ");
1959 result_opr()->print(out); out->print(" ");
1960 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1961 }
1962
1963
1964 // LIR_Op3
print_instr(outputStream * out) const1965 void LIR_Op3::print_instr(outputStream* out) const {
1966 in_opr1()->print(out); out->print(" ");
1967 in_opr2()->print(out); out->print(" ");
1968 in_opr3()->print(out); out->print(" ");
1969 result_opr()->print(out);
1970 }
1971
1972
print_instr(outputStream * out) const1973 void LIR_OpLock::print_instr(outputStream* out) const {
1974 hdr_opr()->print(out); out->print(" ");
1975 obj_opr()->print(out); out->print(" ");
1976 lock_opr()->print(out); out->print(" ");
1977 if (_scratch->is_valid()) {
1978 _scratch->print(out); out->print(" ");
1979 }
1980 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1981 }
1982
1983 #ifdef ASSERT
print_instr(outputStream * out) const1984 void LIR_OpAssert::print_instr(outputStream* out) const {
1985 print_condition(out, condition()); out->print(" ");
1986 in_opr1()->print(out); out->print(" ");
1987 in_opr2()->print(out); out->print(", \"");
1988 out->print("%s", msg()); out->print("\"");
1989 }
1990 #endif
1991
1992
print_instr(outputStream * out) const1993 void LIR_OpDelay::print_instr(outputStream* out) const {
1994 _op->print_on(out);
1995 }
1996
1997
1998 // LIR_OpProfileCall
print_instr(outputStream * out) const1999 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2000 profiled_method()->name()->print_symbol_on(out);
2001 out->print(".");
2002 profiled_method()->holder()->name()->print_symbol_on(out);
2003 out->print(" @ %d ", profiled_bci());
2004 mdo()->print(out); out->print(" ");
2005 recv()->print(out); out->print(" ");
2006 tmp1()->print(out); out->print(" ");
2007 }
2008
2009 // LIR_OpProfileType
print_instr(outputStream * out) const2010 void LIR_OpProfileType::print_instr(outputStream* out) const {
2011 out->print("exact = ");
2012 if (exact_klass() == NULL) {
2013 out->print("unknown");
2014 } else {
2015 exact_klass()->print_name_on(out);
2016 }
2017 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2018 out->print(" ");
2019 mdp()->print(out); out->print(" ");
2020 obj()->print(out); out->print(" ");
2021 tmp()->print(out); out->print(" ");
2022 }
2023
2024 #endif // PRODUCT
2025
2026 // Implementation of LIR_InsertionBuffer
2027
append(int index,LIR_Op * op)2028 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2029 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2030
2031 int i = number_of_insertion_points() - 1;
2032 if (i < 0 || index_at(i) < index) {
2033 append_new(index, 1);
2034 } else {
2035 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2036 assert(count_at(i) > 0, "check");
2037 set_count_at(i, count_at(i) + 1);
2038 }
2039 _ops.push(op);
2040
2041 DEBUG_ONLY(verify());
2042 }
2043
2044 #ifdef ASSERT
verify()2045 void LIR_InsertionBuffer::verify() {
2046 int sum = 0;
2047 int prev_idx = -1;
2048
2049 for (int i = 0; i < number_of_insertion_points(); i++) {
2050 assert(prev_idx < index_at(i), "index must be ordered ascending");
2051 sum += count_at(i);
2052 }
2053 assert(sum == number_of_ops(), "wrong total sum");
2054 }
2055 #endif
2056