1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 #include "draw/draw_context.h"
25
26 #include "util/u_framebuffer.h"
27 #include "util/half_float.h"
28 #include "util/u_helpers.h"
29 #include "util/u_math.h"
30 #include "util/u_memory.h"
31 #include "util/u_pack_color.h"
32 #include "util/u_transfer.h"
33 #include "util/u_blend.h"
34
35 #include "tgsi/tgsi_parse.h"
36
37 #include "pipe/p_config.h"
38
39 #include "r300_cb.h"
40 #include "r300_context.h"
41 #include "r300_emit.h"
42 #include "r300_reg.h"
43 #include "r300_screen.h"
44 #include "r300_screen_buffer.h"
45 #include "r300_state_inlines.h"
46 #include "r300_fs.h"
47 #include "r300_texture.h"
48 #include "r300_vs.h"
49
50 /* r300_state: Functions used to initialize state context by translating
51 * Gallium state objects into semi-native r300 state objects. */
52
53 #define UPDATE_STATE(cso, atom) \
54 if (cso != atom.state) { \
55 atom.state = cso; \
56 r300_mark_atom_dirty(r300, &(atom)); \
57 }
58
blend_discard_if_src_alpha_0(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)59 static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA,
60 unsigned dstRGB, unsigned dstA)
61 {
62 /* If the blend equation is ADD or REVERSE_SUBTRACT,
63 * SRC_ALPHA == 0, and the following state is set, the colorbuffer
64 * will not be changed.
65 * Notice that the dst factors are the src factors inverted. */
66 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
67 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
68 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
69 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
70 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
71 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
72 srcA == PIPE_BLENDFACTOR_ZERO) &&
73 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
74 dstRGB == PIPE_BLENDFACTOR_ONE) &&
75 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
76 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
77 dstA == PIPE_BLENDFACTOR_ONE);
78 }
79
blend_discard_if_src_alpha_1(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)80 static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA,
81 unsigned dstRGB, unsigned dstA)
82 {
83 /* If the blend equation is ADD or REVERSE_SUBTRACT,
84 * SRC_ALPHA == 1, and the following state is set, the colorbuffer
85 * will not be changed.
86 * Notice that the dst factors are the src factors inverted. */
87 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
88 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
89 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
90 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
91 srcA == PIPE_BLENDFACTOR_ZERO) &&
92 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
93 dstRGB == PIPE_BLENDFACTOR_ONE) &&
94 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
95 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
96 dstA == PIPE_BLENDFACTOR_ONE);
97 }
98
blend_discard_if_src_color_0(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)99 static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA,
100 unsigned dstRGB, unsigned dstA)
101 {
102 /* If the blend equation is ADD or REVERSE_SUBTRACT,
103 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer
104 * will not be changed.
105 * Notice that the dst factors are the src factors inverted. */
106 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
107 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
108 (srcA == PIPE_BLENDFACTOR_ZERO) &&
109 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
110 dstRGB == PIPE_BLENDFACTOR_ONE) &&
111 (dstA == PIPE_BLENDFACTOR_ONE);
112 }
113
blend_discard_if_src_color_1(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)114 static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA,
115 unsigned dstRGB, unsigned dstA)
116 {
117 /* If the blend equation is ADD or REVERSE_SUBTRACT,
118 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer
119 * will not be changed.
120 * Notice that the dst factors are the src factors inverted. */
121 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
122 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
123 (srcA == PIPE_BLENDFACTOR_ZERO) &&
124 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
125 dstRGB == PIPE_BLENDFACTOR_ONE) &&
126 (dstA == PIPE_BLENDFACTOR_ONE);
127 }
128
blend_discard_if_src_alpha_color_0(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)129 static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA,
130 unsigned dstRGB, unsigned dstA)
131 {
132 /* If the blend equation is ADD or REVERSE_SUBTRACT,
133 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set,
134 * the colorbuffer will not be changed.
135 * Notice that the dst factors are the src factors inverted. */
136 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
137 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
138 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
139 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
140 (srcA == PIPE_BLENDFACTOR_SRC_COLOR ||
141 srcA == PIPE_BLENDFACTOR_SRC_ALPHA ||
142 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
143 srcA == PIPE_BLENDFACTOR_ZERO) &&
144 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
145 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
146 dstRGB == PIPE_BLENDFACTOR_ONE) &&
147 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
148 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
149 dstA == PIPE_BLENDFACTOR_ONE);
150 }
151
blend_discard_if_src_alpha_color_1(unsigned srcRGB,unsigned srcA,unsigned dstRGB,unsigned dstA)152 static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA,
153 unsigned dstRGB, unsigned dstA)
154 {
155 /* If the blend equation is ADD or REVERSE_SUBTRACT,
156 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set,
157 * the colorbuffer will not be changed.
158 * Notice that the dst factors are the src factors inverted. */
159 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
160 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
161 srcRGB == PIPE_BLENDFACTOR_ZERO) &&
162 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
163 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
164 srcA == PIPE_BLENDFACTOR_ZERO) &&
165 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR ||
166 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
167 dstRGB == PIPE_BLENDFACTOR_ONE) &&
168 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
169 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
170 dstA == PIPE_BLENDFACTOR_ONE);
171 }
172
blend_discard_conditionally(unsigned eqRGB,unsigned eqA,unsigned dstRGB,unsigned dstA,unsigned srcRGB,unsigned srcA)173 static unsigned blend_discard_conditionally(unsigned eqRGB, unsigned eqA,
174 unsigned dstRGB, unsigned dstA,
175 unsigned srcRGB, unsigned srcA)
176 {
177 unsigned blend_control = 0;
178
179 /* Optimization: discard pixels which don't change the colorbuffer.
180 *
181 * The code below is non-trivial and some math is involved.
182 *
183 * Discarding pixels must be disabled when FP16 AA is enabled.
184 * This is a hardware bug. Also, this implementation wouldn't work
185 * with FP blending enabled and equation clamping disabled.
186 *
187 * Equations other than ADD are rarely used and therefore won't be
188 * optimized. */
189 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) &&
190 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) {
191 /* ADD: X+Y
192 * REVERSE_SUBTRACT: Y-X
193 *
194 * The idea is:
195 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1,
196 * then CB will not be changed.
197 *
198 * Given the srcFactor and dstFactor variables, we can derive
199 * what src and dst should be equal to and discard appropriate
200 * pixels.
201 */
202 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) {
203 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
204 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA,
205 dstRGB, dstA)) {
206 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1;
207 } else if (blend_discard_if_src_color_0(srcRGB, srcA,
208 dstRGB, dstA)) {
209 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0;
210 } else if (blend_discard_if_src_color_1(srcRGB, srcA,
211 dstRGB, dstA)) {
212 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1;
213 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA,
214 dstRGB, dstA)) {
215 blend_control |=
216 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0;
217 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA,
218 dstRGB, dstA)) {
219 blend_control |=
220 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1;
221 }
222 }
223 return blend_control;
224 }
225
226 /* The hardware colormask is clunky a must be swizzled depending on the format.
227 * This was figured out by trial-and-error. */
bgra_cmask(unsigned mask)228 static unsigned bgra_cmask(unsigned mask)
229 {
230 return ((mask & PIPE_MASK_R) << 2) |
231 ((mask & PIPE_MASK_B) >> 2) |
232 (mask & (PIPE_MASK_G | PIPE_MASK_A));
233 }
234
rgba_cmask(unsigned mask)235 static unsigned rgba_cmask(unsigned mask)
236 {
237 return mask & PIPE_MASK_RGBA;
238 }
239
rrrr_cmask(unsigned mask)240 static unsigned rrrr_cmask(unsigned mask)
241 {
242 return (mask & PIPE_MASK_R) |
243 ((mask & PIPE_MASK_R) << 1) |
244 ((mask & PIPE_MASK_R) << 2) |
245 ((mask & PIPE_MASK_R) << 3);
246 }
247
aaaa_cmask(unsigned mask)248 static unsigned aaaa_cmask(unsigned mask)
249 {
250 return ((mask & PIPE_MASK_A) >> 3) |
251 ((mask & PIPE_MASK_A) >> 2) |
252 ((mask & PIPE_MASK_A) >> 1) |
253 (mask & PIPE_MASK_A);
254 }
255
grrg_cmask(unsigned mask)256 static unsigned grrg_cmask(unsigned mask)
257 {
258 return ((mask & PIPE_MASK_R) << 1) |
259 ((mask & PIPE_MASK_R) << 2) |
260 ((mask & PIPE_MASK_G) >> 1) |
261 ((mask & PIPE_MASK_G) << 2);
262 }
263
arra_cmask(unsigned mask)264 static unsigned arra_cmask(unsigned mask)
265 {
266 return ((mask & PIPE_MASK_R) << 1) |
267 ((mask & PIPE_MASK_R) << 2) |
268 ((mask & PIPE_MASK_A) >> 3) |
269 (mask & PIPE_MASK_A);
270 }
271
blend_read_enable(unsigned eqRGB,unsigned eqA,unsigned dstRGB,unsigned dstA,unsigned srcRGB,unsigned srcA,boolean src_alpha_optz)272 static unsigned blend_read_enable(unsigned eqRGB, unsigned eqA,
273 unsigned dstRGB, unsigned dstA,
274 unsigned srcRGB, unsigned srcA,
275 boolean src_alpha_optz)
276 {
277 unsigned blend_control = 0;
278
279 /* Optimization: some operations do not require the destination color.
280 *
281 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled,
282 * otherwise blending gives incorrect results. It seems to be
283 * a hardware bug. */
284 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN ||
285 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX ||
286 dstRGB != PIPE_BLENDFACTOR_ZERO ||
287 dstA != PIPE_BLENDFACTOR_ZERO ||
288 util_blend_factor_uses_dest(srcRGB, false) ||
289 util_blend_factor_uses_dest(srcA, true)) {
290 /* Enable reading from the colorbuffer. */
291 blend_control |= R300_READ_ENABLE;
292
293 if (src_alpha_optz) {
294 /* Optimization: Depending on incoming pixels, we can
295 * conditionally disable the reading in hardware... */
296 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN &&
297 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) {
298 /* Disable reading if SRC_ALPHA == 0. */
299 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
300 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
301 (dstA == PIPE_BLENDFACTOR_SRC_COLOR ||
302 dstA == PIPE_BLENDFACTOR_SRC_ALPHA ||
303 dstA == PIPE_BLENDFACTOR_ZERO) &&
304 (srcRGB != PIPE_BLENDFACTOR_DST_COLOR &&
305 srcRGB != PIPE_BLENDFACTOR_DST_ALPHA &&
306 srcRGB != PIPE_BLENDFACTOR_INV_DST_COLOR &&
307 srcRGB != PIPE_BLENDFACTOR_INV_DST_ALPHA)) {
308 blend_control |= R500_SRC_ALPHA_0_NO_READ;
309 }
310
311 /* Disable reading if SRC_ALPHA == 1. */
312 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
313 dstRGB == PIPE_BLENDFACTOR_ZERO) &&
314 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR ||
315 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
316 dstA == PIPE_BLENDFACTOR_ZERO) &&
317 (srcRGB != PIPE_BLENDFACTOR_DST_COLOR &&
318 srcRGB != PIPE_BLENDFACTOR_DST_ALPHA &&
319 srcRGB != PIPE_BLENDFACTOR_INV_DST_COLOR &&
320 srcRGB != PIPE_BLENDFACTOR_INV_DST_ALPHA)) {
321 blend_control |= R500_SRC_ALPHA_1_NO_READ;
322 }
323 }
324 }
325 }
326 return blend_control;
327 }
328
329 /* Create a new blend state based on the CSO blend state.
330 *
331 * This encompasses alpha blending, logic/raster ops, and blend dithering. */
r300_create_blend_state(struct pipe_context * pipe,const struct pipe_blend_state * state)332 static void* r300_create_blend_state(struct pipe_context* pipe,
333 const struct pipe_blend_state* state)
334 {
335 struct r300_screen* r300screen = r300_screen(pipe->screen);
336 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state);
337 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */
338 uint32_t blend_control_noclamp = 0; /* R300_RB3D_CBLEND: 0x4e04 */
339 uint32_t blend_control_noalpha = 0; /* R300_RB3D_CBLEND: 0x4e04 */
340 uint32_t blend_control_noalpha_noclamp = 0; /* R300_RB3D_CBLEND: 0x4e04 */
341 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */
342 uint32_t alpha_blend_control_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */
343 uint32_t alpha_blend_control_noalpha = 0; /* R300_RB3D_ABLEND: 0x4e08 */
344 uint32_t alpha_blend_control_noalpha_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */
345 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */
346 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */
347 int i;
348
349 const unsigned eqRGB = state->rt[0].rgb_func;
350 const unsigned srcRGB = state->rt[0].rgb_src_factor;
351 const unsigned dstRGB = state->rt[0].rgb_dst_factor;
352
353 const unsigned eqA = state->rt[0].alpha_func;
354 const unsigned srcA = state->rt[0].alpha_src_factor;
355 const unsigned dstA = state->rt[0].alpha_dst_factor;
356
357 unsigned srcRGBX = srcRGB;
358 unsigned dstRGBX = dstRGB;
359 CB_LOCALS;
360
361 blend->state = *state;
362
363 /* force DST_ALPHA to ONE where we can */
364 switch (srcRGBX) {
365 case PIPE_BLENDFACTOR_DST_ALPHA:
366 srcRGBX = PIPE_BLENDFACTOR_ONE;
367 break;
368 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
369 srcRGBX = PIPE_BLENDFACTOR_ZERO;
370 break;
371 }
372
373 switch (dstRGBX) {
374 case PIPE_BLENDFACTOR_DST_ALPHA:
375 dstRGBX = PIPE_BLENDFACTOR_ONE;
376 break;
377 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
378 dstRGBX = PIPE_BLENDFACTOR_ZERO;
379 break;
380 }
381
382 /* Get blending register values. */
383 if (state->rt[0].blend_enable) {
384 unsigned blend_eq, blend_eq_noclamp;
385
386 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha,
387 * this is just the crappy D3D naming */
388 blend_control = blend_control_noclamp =
389 R300_ALPHA_BLEND_ENABLE |
390 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) |
391 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT);
392
393 blend_control_noalpha = blend_control_noalpha_noclamp =
394 R300_ALPHA_BLEND_ENABLE |
395 ( r300_translate_blend_factor(srcRGBX) << R300_SRC_BLEND_SHIFT) |
396 ( r300_translate_blend_factor(dstRGBX) << R300_DST_BLEND_SHIFT);
397
398 blend_eq = r300_translate_blend_function(eqRGB, TRUE);
399 blend_eq_noclamp = r300_translate_blend_function(eqRGB, FALSE);
400
401 blend_control |= blend_eq;
402 blend_control_noalpha |= blend_eq;
403 blend_control_noclamp |= blend_eq_noclamp;
404 blend_control_noalpha_noclamp |= blend_eq_noclamp;
405
406 /* Optimization: some operations do not require the destination color. */
407 blend_control |= blend_read_enable(eqRGB, eqA, dstRGB, dstA,
408 srcRGB, srcA, r300screen->caps.is_r500);
409 blend_control_noclamp |= blend_read_enable(eqRGB, eqA, dstRGB, dstA,
410 srcRGB, srcA, FALSE);
411 blend_control_noalpha |= blend_read_enable(eqRGB, eqA, dstRGBX, dstA,
412 srcRGBX, srcA, r300screen->caps.is_r500);
413 blend_control_noalpha_noclamp |= blend_read_enable(eqRGB, eqA, dstRGBX, dstA,
414 srcRGBX, srcA, FALSE);
415
416 /* Optimization: discard pixels which don't change the colorbuffer.
417 * It cannot be used with FP16 AA. */
418 blend_control |= blend_discard_conditionally(eqRGB, eqA, dstRGB, dstA,
419 srcRGB, srcA);
420 blend_control_noalpha |= blend_discard_conditionally(eqRGB, eqA, dstRGBX, dstA,
421 srcRGBX, srcA);
422
423 /* separate alpha */
424 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) {
425 blend_control |= R300_SEPARATE_ALPHA_ENABLE;
426 blend_control_noclamp |= R300_SEPARATE_ALPHA_ENABLE;
427
428 alpha_blend_control = alpha_blend_control_noclamp =
429 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
430 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
431 alpha_blend_control |= r300_translate_blend_function(eqA, TRUE);
432 alpha_blend_control_noclamp |= r300_translate_blend_function(eqA, FALSE);
433 }
434 if (srcA != srcRGBX || dstA != dstRGBX || eqA != eqRGB) {
435 blend_control_noalpha |= R300_SEPARATE_ALPHA_ENABLE;
436 blend_control_noalpha_noclamp |= R300_SEPARATE_ALPHA_ENABLE;
437
438 alpha_blend_control_noalpha = alpha_blend_control_noalpha_noclamp =
439 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) |
440 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT);
441 alpha_blend_control_noalpha |= r300_translate_blend_function(eqA, TRUE);
442 alpha_blend_control_noalpha_noclamp |= r300_translate_blend_function(eqA, FALSE);
443 }
444 }
445
446 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */
447 if (state->logicop_enable) {
448 rop = R300_RB3D_ROPCNTL_ROP_ENABLE |
449 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT;
450 }
451
452 /* Neither fglrx nor classic r300 ever set this, regardless of dithering
453 * state. Since it's an optional implementation detail, we can leave it
454 * out and never dither.
455 *
456 * This could be revisited if we ever get quality or conformance hints.
457 *
458 if (state->dither) {
459 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT |
460 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT;
461 }
462 */
463
464 /* Build a command buffer. */
465 {
466 unsigned (*func[COLORMASK_NUM_SWIZZLES])(unsigned) = {
467 bgra_cmask,
468 rgba_cmask,
469 rrrr_cmask,
470 aaaa_cmask,
471 grrg_cmask,
472 arra_cmask,
473 bgra_cmask,
474 rgba_cmask
475 };
476
477 for (i = 0; i < COLORMASK_NUM_SWIZZLES; i++) {
478 boolean has_alpha = i != COLORMASK_RGBX && i != COLORMASK_BGRX;
479
480 BEGIN_CB(blend->cb_clamp[i], 8);
481 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
482 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
483 OUT_CB(has_alpha ? blend_control : blend_control_noalpha);
484 OUT_CB(has_alpha ? alpha_blend_control : alpha_blend_control_noalpha);
485 OUT_CB(func[i](state->rt[0].colormask));
486 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
487 END_CB;
488 }
489 }
490
491 /* Build a command buffer (for RGBA16F). */
492 BEGIN_CB(blend->cb_noclamp, 8);
493 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
494 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
495 OUT_CB(blend_control_noclamp);
496 OUT_CB(alpha_blend_control_noclamp);
497 OUT_CB(rgba_cmask(state->rt[0].colormask));
498 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
499 END_CB;
500
501 /* Build a command buffer (for RGB16F). */
502 BEGIN_CB(blend->cb_noclamp_noalpha, 8);
503 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
504 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
505 OUT_CB(blend_control_noalpha_noclamp);
506 OUT_CB(alpha_blend_control_noalpha_noclamp);
507 OUT_CB(rgba_cmask(state->rt[0].colormask));
508 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
509 END_CB;
510
511 /* The same as above, but with no colorbuffer reads and writes. */
512 BEGIN_CB(blend->cb_no_readwrite, 8);
513 OUT_CB_REG(R300_RB3D_ROPCNTL, rop);
514 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3);
515 OUT_CB(0);
516 OUT_CB(0);
517 OUT_CB(0);
518 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither);
519 END_CB;
520
521 return (void*)blend;
522 }
523
524 /* Bind blend state. */
r300_bind_blend_state(struct pipe_context * pipe,void * state)525 static void r300_bind_blend_state(struct pipe_context* pipe,
526 void* state)
527 {
528 struct r300_context* r300 = r300_context(pipe);
529 struct r300_blend_state *blend = (struct r300_blend_state*)state;
530 boolean last_alpha_to_one = r300->alpha_to_one;
531 boolean last_alpha_to_coverage = r300->alpha_to_coverage;
532
533 UPDATE_STATE(state, r300->blend_state);
534
535 if (!blend)
536 return;
537
538 r300->alpha_to_one = blend->state.alpha_to_one;
539 r300->alpha_to_coverage = blend->state.alpha_to_coverage;
540
541 if (r300->alpha_to_one != last_alpha_to_one && r300->msaa_enable &&
542 r300->fs_status == FRAGMENT_SHADER_VALID) {
543 r300->fs_status = FRAGMENT_SHADER_MAYBE_DIRTY;
544 }
545
546 if (r300->alpha_to_coverage != last_alpha_to_coverage &&
547 r300->msaa_enable) {
548 r300_mark_atom_dirty(r300, &r300->dsa_state);
549 }
550 }
551
552 /* Free blend state. */
r300_delete_blend_state(struct pipe_context * pipe,void * state)553 static void r300_delete_blend_state(struct pipe_context* pipe,
554 void* state)
555 {
556 FREE(state);
557 }
558
559 /* Convert float to 10bit integer */
float_to_fixed10(float f)560 static unsigned float_to_fixed10(float f)
561 {
562 return CLAMP((unsigned)(f * 1023.9f), 0, 1023);
563 }
564
565 /* Set blend color.
566 * Setup both R300 and R500 registers, figure out later which one to write. */
r300_set_blend_color(struct pipe_context * pipe,const struct pipe_blend_color * color)567 static void r300_set_blend_color(struct pipe_context* pipe,
568 const struct pipe_blend_color* color)
569 {
570 struct r300_context* r300 = r300_context(pipe);
571 struct pipe_framebuffer_state *fb = r300->fb_state.state;
572 struct r300_blend_color_state *state =
573 (struct r300_blend_color_state*)r300->blend_color_state.state;
574 struct pipe_blend_color c;
575 struct pipe_surface *cb;
576 float tmp;
577 CB_LOCALS;
578
579 state->state = *color; /* Save it, so that we can reuse it in set_fb_state */
580 c = *color;
581 cb = fb->nr_cbufs ? r300_get_nonnull_cb(fb, 0) : NULL;
582
583 /* The blend color is dependent on the colorbuffer format. */
584 if (cb) {
585 switch (cb->format) {
586 case PIPE_FORMAT_R8_UNORM:
587 case PIPE_FORMAT_L8_UNORM:
588 case PIPE_FORMAT_I8_UNORM:
589 c.color[1] = c.color[0];
590 break;
591
592 case PIPE_FORMAT_A8_UNORM:
593 c.color[1] = c.color[3];
594 break;
595
596 case PIPE_FORMAT_R8G8_UNORM:
597 c.color[2] = c.color[1];
598 break;
599
600 case PIPE_FORMAT_L8A8_UNORM:
601 case PIPE_FORMAT_R8A8_UNORM:
602 c.color[2] = c.color[3];
603 break;
604
605 case PIPE_FORMAT_R8G8B8A8_UNORM:
606 case PIPE_FORMAT_R8G8B8X8_UNORM:
607 tmp = c.color[0];
608 c.color[0] = c.color[2];
609 c.color[2] = tmp;
610 break;
611
612 default:;
613 }
614 }
615
616 if (r300->screen->caps.is_r500) {
617 BEGIN_CB(state->cb, 3);
618 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2);
619
620 switch (cb ? cb->format : 0) {
621 case PIPE_FORMAT_R16G16B16A16_FLOAT:
622 case PIPE_FORMAT_R16G16B16X16_FLOAT:
623 OUT_CB(_mesa_float_to_half(c.color[2]) |
624 (_mesa_float_to_half(c.color[3]) << 16));
625 OUT_CB(_mesa_float_to_half(c.color[0]) |
626 (_mesa_float_to_half(c.color[1]) << 16));
627 break;
628
629 default:
630 OUT_CB(float_to_fixed10(c.color[0]) |
631 (float_to_fixed10(c.color[3]) << 16));
632 OUT_CB(float_to_fixed10(c.color[2]) |
633 (float_to_fixed10(c.color[1]) << 16));
634 }
635
636 END_CB;
637 } else {
638 union util_color uc;
639 util_pack_color(c.color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc);
640
641 BEGIN_CB(state->cb, 2);
642 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui[0]);
643 END_CB;
644 }
645
646 r300_mark_atom_dirty(r300, &r300->blend_color_state);
647 }
648
r300_set_clip_state(struct pipe_context * pipe,const struct pipe_clip_state * state)649 static void r300_set_clip_state(struct pipe_context* pipe,
650 const struct pipe_clip_state* state)
651 {
652 struct r300_context* r300 = r300_context(pipe);
653 struct r300_clip_state *clip =
654 (struct r300_clip_state*)r300->clip_state.state;
655 CB_LOCALS;
656
657 if (r300->screen->caps.has_tcl) {
658 BEGIN_CB(clip->cb, r300->clip_state.size);
659 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
660 (r300->screen->caps.is_r500 ?
661 R500_PVS_UCP_START : R300_PVS_UCP_START));
662 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
663 OUT_CB_TABLE(state->ucp, 6 * 4);
664 END_CB;
665
666 r300_mark_atom_dirty(r300, &r300->clip_state);
667 } else {
668 draw_set_clip_state(r300->draw, state);
669 }
670 }
671
672 /* Create a new depth, stencil, and alpha state based on the CSO dsa state.
673 *
674 * This contains the depth buffer, stencil buffer, alpha test, and such.
675 * On the Radeon, depth and stencil buffer setup are intertwined, which is
676 * the reason for some of the strange-looking assignments across registers. */
r300_create_dsa_state(struct pipe_context * pipe,const struct pipe_depth_stencil_alpha_state * state)677 static void* r300_create_dsa_state(struct pipe_context* pipe,
678 const struct pipe_depth_stencil_alpha_state* state)
679 {
680 boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500;
681 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state);
682 CB_LOCALS;
683 uint32_t alpha_value_fp16 = 0;
684 uint32_t z_buffer_control = 0;
685 uint32_t z_stencil_control = 0;
686 uint32_t stencil_ref_mask = 0;
687 uint32_t stencil_ref_bf = 0;
688
689 dsa->dsa = *state;
690
691 /* Depth test setup. - separate write mask depth for decomp flush */
692 if (state->depth_writemask) {
693 z_buffer_control |= R300_Z_WRITE_ENABLE;
694 }
695
696 if (state->depth_enabled) {
697 z_buffer_control |= R300_Z_ENABLE;
698
699 z_stencil_control |=
700 (r300_translate_depth_stencil_function(state->depth_func) <<
701 R300_Z_FUNC_SHIFT);
702 }
703
704 /* Stencil buffer setup. */
705 if (state->stencil[0].enabled) {
706 z_buffer_control |= R300_STENCIL_ENABLE;
707 z_stencil_control |=
708 (r300_translate_depth_stencil_function(state->stencil[0].func) <<
709 R300_S_FRONT_FUNC_SHIFT) |
710 (r300_translate_stencil_op(state->stencil[0].fail_op) <<
711 R300_S_FRONT_SFAIL_OP_SHIFT) |
712 (r300_translate_stencil_op(state->stencil[0].zpass_op) <<
713 R300_S_FRONT_ZPASS_OP_SHIFT) |
714 (r300_translate_stencil_op(state->stencil[0].zfail_op) <<
715 R300_S_FRONT_ZFAIL_OP_SHIFT);
716
717 stencil_ref_mask =
718 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) |
719 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT);
720
721 if (state->stencil[1].enabled) {
722 dsa->two_sided = TRUE;
723
724 z_buffer_control |= R300_STENCIL_FRONT_BACK;
725 z_stencil_control |=
726 (r300_translate_depth_stencil_function(state->stencil[1].func) <<
727 R300_S_BACK_FUNC_SHIFT) |
728 (r300_translate_stencil_op(state->stencil[1].fail_op) <<
729 R300_S_BACK_SFAIL_OP_SHIFT) |
730 (r300_translate_stencil_op(state->stencil[1].zpass_op) <<
731 R300_S_BACK_ZPASS_OP_SHIFT) |
732 (r300_translate_stencil_op(state->stencil[1].zfail_op) <<
733 R300_S_BACK_ZFAIL_OP_SHIFT);
734
735 stencil_ref_bf =
736 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) |
737 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT);
738
739 if (is_r500) {
740 z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK;
741 } else {
742 dsa->two_sided_stencil_ref =
743 (state->stencil[0].valuemask != state->stencil[1].valuemask ||
744 state->stencil[0].writemask != state->stencil[1].writemask);
745 }
746 }
747 }
748
749 /* Alpha test setup. */
750 if (state->alpha_enabled) {
751 dsa->alpha_function =
752 r300_translate_alpha_function(state->alpha_func) |
753 R300_FG_ALPHA_FUNC_ENABLE;
754
755 dsa->alpha_function |= float_to_ubyte(state->alpha_ref_value);
756 alpha_value_fp16 = _mesa_float_to_half(state->alpha_ref_value);
757 }
758
759 BEGIN_CB(&dsa->cb_begin, 8);
760 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
761 OUT_CB(z_buffer_control);
762 OUT_CB(z_stencil_control);
763 OUT_CB(stencil_ref_mask);
764 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, stencil_ref_bf);
765 OUT_CB_REG(R500_FG_ALPHA_VALUE, alpha_value_fp16);
766 END_CB;
767
768 BEGIN_CB(dsa->cb_zb_no_readwrite, 8);
769 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3);
770 OUT_CB(0);
771 OUT_CB(0);
772 OUT_CB(0);
773 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0);
774 OUT_CB_REG(R500_FG_ALPHA_VALUE, alpha_value_fp16);
775 END_CB;
776
777 return (void*)dsa;
778 }
779
r300_dsa_inject_stencilref(struct r300_context * r300)780 static void r300_dsa_inject_stencilref(struct r300_context *r300)
781 {
782 struct r300_dsa_state *dsa =
783 (struct r300_dsa_state*)r300->dsa_state.state;
784
785 if (!dsa)
786 return;
787
788 dsa->stencil_ref_mask =
789 (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) |
790 r300->stencil_ref.ref_value[0];
791 dsa->stencil_ref_bf =
792 (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) |
793 r300->stencil_ref.ref_value[1];
794 }
795
796 /* Bind DSA state. */
r300_bind_dsa_state(struct pipe_context * pipe,void * state)797 static void r300_bind_dsa_state(struct pipe_context* pipe,
798 void* state)
799 {
800 struct r300_context* r300 = r300_context(pipe);
801
802 if (!state) {
803 return;
804 }
805
806 UPDATE_STATE(state, r300->dsa_state);
807
808 r300_mark_atom_dirty(r300, &r300->hyperz_state); /* Will be updated before the emission. */
809 r300_dsa_inject_stencilref(r300);
810 }
811
812 /* Free DSA state. */
r300_delete_dsa_state(struct pipe_context * pipe,void * state)813 static void r300_delete_dsa_state(struct pipe_context* pipe,
814 void* state)
815 {
816 FREE(state);
817 }
818
r300_set_stencil_ref(struct pipe_context * pipe,const struct pipe_stencil_ref sr)819 static void r300_set_stencil_ref(struct pipe_context* pipe,
820 const struct pipe_stencil_ref sr)
821 {
822 struct r300_context* r300 = r300_context(pipe);
823
824 r300->stencil_ref = sr;
825
826 r300_dsa_inject_stencilref(r300);
827 r300_mark_atom_dirty(r300, &r300->dsa_state);
828 }
829
r300_print_fb_surf_info(struct pipe_surface * surf,unsigned index,const char * binding)830 static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index,
831 const char *binding)
832 {
833 struct pipe_resource *tex = surf->texture;
834 struct r300_resource *rtex = r300_resource(tex);
835
836 fprintf(stderr,
837 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, "
838 "Lastlayer: %i, Level: %i, Format: %s\n"
839
840 "r300: TEX: Macro: %s, Micro: %s, "
841 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n",
842
843 binding, index, surf->width, surf->height,
844 surf->u.tex.first_layer, surf->u.tex.last_layer, surf->u.tex.level,
845 util_format_short_name(surf->format),
846
847 rtex->tex.macrotile[0] ? "YES" : " NO",
848 rtex->tex.microtile ? "YES" : " NO",
849 tex->width0, tex->height0, tex->depth0,
850 tex->last_level, util_format_short_name(surf->format));
851 }
852
r300_mark_fb_state_dirty(struct r300_context * r300,enum r300_fb_state_change change)853 void r300_mark_fb_state_dirty(struct r300_context *r300,
854 enum r300_fb_state_change change)
855 {
856 struct pipe_framebuffer_state *state = r300->fb_state.state;
857
858 r300_mark_atom_dirty(r300, &r300->gpu_flush);
859 r300_mark_atom_dirty(r300, &r300->fb_state);
860
861 /* What is marked as dirty depends on the enum r300_fb_state_change. */
862 if (change == R300_CHANGED_FB_STATE) {
863 r300_mark_atom_dirty(r300, &r300->aa_state);
864 r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */
865 r300_set_blend_color(&r300->context, r300->blend_color_state.state);
866 }
867
868 if (change == R300_CHANGED_FB_STATE ||
869 change == R300_CHANGED_HYPERZ_FLAG) {
870 r300_mark_atom_dirty(r300, &r300->hyperz_state);
871 }
872
873 if (change == R300_CHANGED_FB_STATE ||
874 change == R300_CHANGED_MULTIWRITE) {
875 r300_mark_atom_dirty(r300, &r300->fb_state_pipelined);
876 }
877
878 /* Now compute the fb_state atom size. */
879 r300->fb_state.size = 2 + (8 * state->nr_cbufs);
880
881 if (r300->cbzb_clear)
882 r300->fb_state.size += 10;
883 else if (state->zsbuf) {
884 r300->fb_state.size += 10;
885 if (r300->hyperz_enabled)
886 r300->fb_state.size += 8;
887 }
888
889 if (r300->cmask_in_use) {
890 r300->fb_state.size += 6;
891 if (r300->screen->caps.is_r500 && r300->screen->info.drm_minor >= 29) {
892 r300->fb_state.size += 3;
893 }
894 }
895
896 /* The size of the rest of atoms stays the same. */
897 }
898
899 static void
r300_set_framebuffer_state(struct pipe_context * pipe,const struct pipe_framebuffer_state * state)900 r300_set_framebuffer_state(struct pipe_context* pipe,
901 const struct pipe_framebuffer_state* state)
902 {
903 struct r300_context* r300 = r300_context(pipe);
904 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state;
905 struct pipe_framebuffer_state *current_state = r300->fb_state.state;
906 unsigned max_width, max_height, i;
907 uint32_t zbuffer_bpp = 0;
908 boolean unlock_zbuffer = FALSE;
909
910 if (r300->screen->caps.is_r500) {
911 max_width = max_height = 4096;
912 } else if (r300->screen->caps.is_r400) {
913 max_width = max_height = 4021;
914 } else {
915 max_width = max_height = 2560;
916 }
917
918 if (state->width > max_width || state->height > max_height) {
919 fprintf(stderr, "r300: Implementation error: Render targets are too "
920 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__);
921 return;
922 }
923
924 if (current_state->zsbuf && r300->zmask_in_use && !r300->locked_zbuffer) {
925 /* There is a zmask in use, what are we gonna do? */
926 if (state->zsbuf) {
927 if (!pipe_surface_equal(current_state->zsbuf, state->zsbuf)) {
928 /* Decompress the currently bound zbuffer before we bind another one. */
929 r300_decompress_zmask(r300);
930 r300->hiz_in_use = FALSE;
931 }
932 } else {
933 /* We don't bind another zbuffer, so lock the current one. */
934 pipe_surface_reference(&r300->locked_zbuffer, current_state->zsbuf);
935 }
936 } else if (r300->locked_zbuffer) {
937 /* We have a locked zbuffer now, what are we gonna do? */
938 if (state->zsbuf) {
939 if (!pipe_surface_equal(r300->locked_zbuffer, state->zsbuf)) {
940 /* We are binding some other zbuffer, so decompress the locked one,
941 * it gets unlocked automatically. */
942 r300_decompress_zmask_locked_unsafe(r300);
943 r300->hiz_in_use = FALSE;
944 } else {
945 /* We are binding the locked zbuffer again, so unlock it. */
946 unlock_zbuffer = TRUE;
947 }
948 }
949 }
950 assert(state->zsbuf || (r300->locked_zbuffer && !unlock_zbuffer) || !r300->zmask_in_use);
951
952 /* If zsbuf is set from NULL to non-NULL or vice versa.. */
953 if (!!current_state->zsbuf != !!state->zsbuf) {
954 r300_mark_atom_dirty(r300, &r300->dsa_state);
955 }
956
957 util_copy_framebuffer_state(r300->fb_state.state, state);
958
959 /* Remove trailing NULL colorbuffers. */
960 while (current_state->nr_cbufs && !current_state->cbufs[current_state->nr_cbufs-1])
961 current_state->nr_cbufs--;
962
963 /* Set whether CMASK can be used. */
964 r300->cmask_in_use =
965 state->nr_cbufs == 1 && state->cbufs[0] &&
966 r300->screen->cmask_resource == state->cbufs[0]->texture;
967
968 /* Need to reset clamping or colormask. */
969 r300_mark_atom_dirty(r300, &r300->blend_state);
970
971 /* Re-swizzle the blend color. */
972 r300_set_blend_color(pipe, &((struct r300_blend_color_state*)r300->blend_color_state.state)->state);
973
974 if (unlock_zbuffer) {
975 pipe_surface_reference(&r300->locked_zbuffer, NULL);
976 }
977
978 r300_mark_fb_state_dirty(r300, R300_CHANGED_FB_STATE);
979
980 if (state->zsbuf) {
981 switch (util_format_get_blocksize(state->zsbuf->format)) {
982 case 2:
983 zbuffer_bpp = 16;
984 break;
985 case 4:
986 zbuffer_bpp = 24;
987 break;
988 }
989
990 /* Polygon offset depends on the zbuffer bit depth. */
991 if (r300->zbuffer_bpp != zbuffer_bpp) {
992 r300->zbuffer_bpp = zbuffer_bpp;
993
994 if (r300->polygon_offset_enabled)
995 r300_mark_atom_dirty(r300, &r300->rs_state);
996 }
997 }
998
999 r300->num_samples = util_framebuffer_get_num_samples(state);
1000
1001 /* Set up AA config. */
1002 if (r300->num_samples > 1) {
1003 switch (r300->num_samples) {
1004 case 2:
1005 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE |
1006 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2;
1007 break;
1008 case 4:
1009 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE |
1010 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4;
1011 break;
1012 case 6:
1013 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE |
1014 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6;
1015 break;
1016 }
1017 } else {
1018 aa->aa_config = 0;
1019 }
1020
1021 if (DBG_ON(r300, DBG_FB)) {
1022 fprintf(stderr, "r300: set_framebuffer_state:\n");
1023 for (i = 0; i < state->nr_cbufs; i++) {
1024 if (state->cbufs[i])
1025 r300_print_fb_surf_info(state->cbufs[i], i, "CB");
1026 }
1027 if (state->zsbuf) {
1028 r300_print_fb_surf_info(state->zsbuf, 0, "ZB");
1029 }
1030 }
1031 }
1032
1033 /* Create fragment shader state. */
r300_create_fs_state(struct pipe_context * pipe,const struct pipe_shader_state * shader)1034 static void* r300_create_fs_state(struct pipe_context* pipe,
1035 const struct pipe_shader_state* shader)
1036 {
1037 struct r300_fragment_shader* fs = NULL;
1038
1039 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader);
1040
1041 /* Copy state directly into shader. */
1042 fs->state = *shader;
1043 fs->state.tokens = tgsi_dup_tokens(shader->tokens);
1044
1045 return (void*)fs;
1046 }
1047
r300_mark_fs_code_dirty(struct r300_context * r300)1048 void r300_mark_fs_code_dirty(struct r300_context *r300)
1049 {
1050 struct r300_fragment_shader* fs = r300_fs(r300);
1051
1052 r300_mark_atom_dirty(r300, &r300->fs);
1053 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1054 r300_mark_atom_dirty(r300, &r300->fs_constants);
1055 r300->fs.size = fs->shader->cb_code_size;
1056
1057 if (r300->screen->caps.is_r500) {
1058 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7;
1059 r300->fs_constants.size = fs->shader->externals_count * 4 + 3;
1060 } else {
1061 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5;
1062 r300->fs_constants.size = fs->shader->externals_count * 4 + 1;
1063 }
1064
1065 ((struct r300_constant_buffer*)r300->fs_constants.state)->remap_table =
1066 fs->shader->code.constants_remap_table;
1067 }
1068
1069 /* Bind fragment shader state. */
r300_bind_fs_state(struct pipe_context * pipe,void * shader)1070 static void r300_bind_fs_state(struct pipe_context* pipe, void* shader)
1071 {
1072 struct r300_context* r300 = r300_context(pipe);
1073 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
1074
1075 if (!fs) {
1076 r300->fs.state = NULL;
1077 return;
1078 }
1079
1080 r300->fs.state = fs;
1081 r300->fs_status = FRAGMENT_SHADER_DIRTY;
1082
1083 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
1084 }
1085
1086 /* Delete fragment shader state. */
r300_delete_fs_state(struct pipe_context * pipe,void * shader)1087 static void r300_delete_fs_state(struct pipe_context* pipe, void* shader)
1088 {
1089 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader;
1090 struct r300_fragment_shader_code *tmp, *ptr = fs->first;
1091
1092 while (ptr) {
1093 tmp = ptr;
1094 ptr = ptr->next;
1095 rc_constants_destroy(&tmp->code.constants);
1096 FREE(tmp->cb_code);
1097 FREE(tmp);
1098 }
1099 FREE((void*)fs->state.tokens);
1100 FREE(shader);
1101 }
1102
r300_set_polygon_stipple(struct pipe_context * pipe,const struct pipe_poly_stipple * state)1103 static void r300_set_polygon_stipple(struct pipe_context* pipe,
1104 const struct pipe_poly_stipple* state)
1105 {
1106 }
1107
1108 /* Create a new rasterizer state based on the CSO rasterizer state.
1109 *
1110 * This is a very large chunk of state, and covers most of the graphics
1111 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks.
1112 *
1113 * In a not entirely unironic sidenote, this state has nearly nothing to do
1114 * with the actual block on the Radeon called the rasterizer (RS). */
r300_create_rs_state(struct pipe_context * pipe,const struct pipe_rasterizer_state * state)1115 static void* r300_create_rs_state(struct pipe_context* pipe,
1116 const struct pipe_rasterizer_state* state)
1117 {
1118 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state);
1119 uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */
1120 uint32_t vap_clip_cntl; /* R300_VAP_CLIP_CNTL: 0x221C */
1121 uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */
1122 uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */
1123 uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */
1124 uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */
1125 uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */
1126 uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */
1127 uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */
1128 uint32_t polygon_mode; /* R300_GA_POLY_MODE: 0x4288 */
1129 uint32_t clip_rule; /* R300_SC_CLIP_RULE: 0x43D0 */
1130 uint32_t round_mode; /* R300_GA_ROUND_MODE: 0x428c */
1131
1132 /* Point sprites texture coordinates, 0: lower left, 1: upper right */
1133 float point_texcoord_left = 0; /* R300_GA_POINT_S0: 0x4200 */
1134 float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */
1135 float point_texcoord_right = 1; /* R300_GA_POINT_S1: 0x4208 */
1136 float point_texcoord_top = 0; /* R300_GA_POINT_T1: 0x420c */
1137 boolean vclamp = !r300_context(pipe)->screen->caps.is_r500;
1138 CB_LOCALS;
1139
1140 /* Copy rasterizer state. */
1141 rs->rs = *state;
1142 rs->rs_draw = *state;
1143
1144 rs->rs.sprite_coord_enable = state->point_quad_rasterization *
1145 state->sprite_coord_enable;
1146
1147 /* Override some states for Draw. */
1148 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */
1149 rs->rs_draw.offset_point = 0;
1150 rs->rs_draw.offset_line = 0;
1151 rs->rs_draw.offset_tri = 0;
1152 rs->rs_draw.offset_clamp = 0;
1153
1154 #if UTIL_ARCH_LITTLE_ENDIAN
1155 vap_control_status = R300_VC_NO_SWAP;
1156 #else
1157 vap_control_status = R300_VC_32BIT_SWAP;
1158 #endif
1159
1160 /* If no TCL engine is present, turn off the HW TCL. */
1161 if (!r300_screen(pipe->screen)->caps.has_tcl) {
1162 vap_control_status |= R300_VAP_TCL_BYPASS;
1163 }
1164
1165 /* Point size width and height. */
1166 point_size =
1167 pack_float_16_6x(state->point_size) |
1168 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT);
1169
1170 /* Point size clamping. */
1171 if (state->point_size_per_vertex) {
1172 /* Per-vertex point size.
1173 * Clamp to [0, max FB size] */
1174 float min_psiz = util_get_min_point_size(state);
1175 float max_psiz = pipe->screen->get_paramf(pipe->screen,
1176 PIPE_CAPF_MAX_POINT_WIDTH);
1177 point_minmax =
1178 (pack_float_16_6x(min_psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
1179 (pack_float_16_6x(max_psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
1180 } else {
1181 /* We cannot disable the point-size vertex output,
1182 * so clamp it. */
1183 float psiz = state->point_size;
1184 point_minmax =
1185 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) |
1186 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT);
1187 }
1188
1189 /* Line control. */
1190 line_control = pack_float_16_6x(state->line_width) |
1191 R300_GA_LINE_CNTL_END_TYPE_COMP;
1192
1193 /* Enable polygon mode */
1194 polygon_mode = 0;
1195 if (state->fill_front != PIPE_POLYGON_MODE_FILL ||
1196 state->fill_back != PIPE_POLYGON_MODE_FILL) {
1197 polygon_mode = R300_GA_POLY_MODE_DUAL;
1198 }
1199
1200 /* Front face */
1201 if (state->front_ccw)
1202 cull_mode = R300_FRONT_FACE_CCW;
1203 else
1204 cull_mode = R300_FRONT_FACE_CW;
1205
1206 /* Polygon offset */
1207 polygon_offset_enable = 0;
1208 if (util_get_offset(state, state->fill_front)) {
1209 polygon_offset_enable |= R300_FRONT_ENABLE;
1210 }
1211 if (util_get_offset(state, state->fill_back)) {
1212 polygon_offset_enable |= R300_BACK_ENABLE;
1213 }
1214
1215 rs->polygon_offset_enable = polygon_offset_enable != 0;
1216
1217 /* Polygon mode */
1218 if (polygon_mode) {
1219 polygon_mode |=
1220 r300_translate_polygon_mode_front(state->fill_front);
1221 polygon_mode |=
1222 r300_translate_polygon_mode_back(state->fill_back);
1223 }
1224
1225 if (state->cull_face & PIPE_FACE_FRONT) {
1226 cull_mode |= R300_CULL_FRONT;
1227 }
1228 if (state->cull_face & PIPE_FACE_BACK) {
1229 cull_mode |= R300_CULL_BACK;
1230 }
1231
1232 if (state->line_stipple_enable) {
1233 line_stipple_config =
1234 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE |
1235 (fui((float)state->line_stipple_factor) &
1236 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK);
1237 /* XXX this might need to be scaled up */
1238 line_stipple_value = state->line_stipple_pattern;
1239 } else {
1240 line_stipple_config = 0;
1241 line_stipple_value = 0;
1242 }
1243
1244 if (state->flatshade) {
1245 rs->color_control = R300_SHADE_MODEL_FLAT;
1246 } else {
1247 rs->color_control = R300_SHADE_MODEL_SMOOTH;
1248 }
1249
1250 clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
1251
1252 /* Point sprites coord mode */
1253 if (rs->rs.sprite_coord_enable) {
1254 switch (state->sprite_coord_mode) {
1255 case PIPE_SPRITE_COORD_UPPER_LEFT:
1256 point_texcoord_top = 0.0f;
1257 point_texcoord_bottom = 1.0f;
1258 break;
1259 case PIPE_SPRITE_COORD_LOWER_LEFT:
1260 point_texcoord_top = 1.0f;
1261 point_texcoord_bottom = 0.0f;
1262 break;
1263 }
1264 }
1265
1266 if (r300_screen(pipe->screen)->caps.has_tcl) {
1267 vap_clip_cntl = (state->clip_plane_enable & 63) |
1268 R300_PS_UCP_MODE_CLIP_AS_TRIFAN;
1269 } else {
1270 vap_clip_cntl = R300_CLIP_DISABLE;
1271 }
1272
1273 /* Vertex color clamping. FP20 means no clamping. */
1274 round_mode =
1275 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST |
1276 (!vclamp ? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20 |
1277 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20) : 0);
1278
1279 /* Build the main command buffer. */
1280 BEGIN_CB(rs->cb_main, RS_STATE_MAIN_SIZE);
1281 OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status);
1282 OUT_CB_REG(R300_VAP_CLIP_CNTL, vap_clip_cntl);
1283 OUT_CB_REG(R300_GA_POINT_SIZE, point_size);
1284 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX, 2);
1285 OUT_CB(point_minmax);
1286 OUT_CB(line_control);
1287 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2);
1288 OUT_CB(polygon_offset_enable);
1289 rs->cull_mode_index = 11;
1290 OUT_CB(cull_mode);
1291 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config);
1292 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value);
1293 OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode);
1294 OUT_CB_REG(R300_GA_ROUND_MODE, round_mode);
1295 OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule);
1296 OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4);
1297 OUT_CB_32F(point_texcoord_left);
1298 OUT_CB_32F(point_texcoord_bottom);
1299 OUT_CB_32F(point_texcoord_right);
1300 OUT_CB_32F(point_texcoord_top);
1301 END_CB;
1302
1303 /* Build the two command buffers for polygon offset setup. */
1304 if (polygon_offset_enable) {
1305 float scale = state->offset_scale * 12;
1306 float offset = state->offset_units * 4;
1307
1308 BEGIN_CB(rs->cb_poly_offset_zb16, 5);
1309 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1310 OUT_CB_32F(scale);
1311 OUT_CB_32F(offset);
1312 OUT_CB_32F(scale);
1313 OUT_CB_32F(offset);
1314 END_CB;
1315
1316 offset = state->offset_units * 2;
1317
1318 BEGIN_CB(rs->cb_poly_offset_zb24, 5);
1319 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
1320 OUT_CB_32F(scale);
1321 OUT_CB_32F(offset);
1322 OUT_CB_32F(scale);
1323 OUT_CB_32F(offset);
1324 END_CB;
1325 }
1326
1327 return (void*)rs;
1328 }
1329
1330 /* Bind rasterizer state. */
r300_bind_rs_state(struct pipe_context * pipe,void * state)1331 static void r300_bind_rs_state(struct pipe_context* pipe, void* state)
1332 {
1333 struct r300_context* r300 = r300_context(pipe);
1334 struct r300_rs_state* rs = (struct r300_rs_state*)state;
1335 int last_sprite_coord_enable = r300->sprite_coord_enable;
1336 boolean last_two_sided_color = r300->two_sided_color;
1337 boolean last_msaa_enable = r300->msaa_enable;
1338 boolean last_flatshade = r300->flatshade;
1339 boolean last_clip_halfz = r300->clip_halfz;
1340
1341 if (r300->draw && rs) {
1342 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state);
1343 }
1344
1345 if (rs) {
1346 r300->polygon_offset_enabled = rs->polygon_offset_enable;
1347 r300->sprite_coord_enable = rs->rs.sprite_coord_enable;
1348 r300->two_sided_color = rs->rs.light_twoside;
1349 r300->msaa_enable = rs->rs.multisample;
1350 r300->flatshade = rs->rs.flatshade;
1351 r300->clip_halfz = rs->rs.clip_halfz;
1352 } else {
1353 r300->polygon_offset_enabled = FALSE;
1354 r300->sprite_coord_enable = 0;
1355 r300->two_sided_color = FALSE;
1356 r300->msaa_enable = FALSE;
1357 r300->flatshade = FALSE;
1358 r300->clip_halfz = FALSE;
1359 }
1360
1361 UPDATE_STATE(state, r300->rs_state);
1362 r300->rs_state.size = RS_STATE_MAIN_SIZE + (r300->polygon_offset_enabled ? 5 : 0);
1363
1364 if (last_sprite_coord_enable != r300->sprite_coord_enable ||
1365 last_two_sided_color != r300->two_sided_color ||
1366 last_flatshade != r300->flatshade) {
1367 r300_mark_atom_dirty(r300, &r300->rs_block_state);
1368 }
1369
1370 if (last_msaa_enable != r300->msaa_enable) {
1371 if (r300->alpha_to_coverage) {
1372 r300_mark_atom_dirty(r300, &r300->dsa_state);
1373 }
1374
1375 if (r300->alpha_to_one &&
1376 r300->fs_status == FRAGMENT_SHADER_VALID) {
1377 r300->fs_status = FRAGMENT_SHADER_MAYBE_DIRTY;
1378 }
1379 }
1380
1381 if (r300->screen->caps.has_tcl && last_clip_halfz != r300->clip_halfz) {
1382 r300_mark_atom_dirty(r300, &r300->vs_state);
1383 }
1384 }
1385
1386 /* Free rasterizer state. */
r300_delete_rs_state(struct pipe_context * pipe,void * state)1387 static void r300_delete_rs_state(struct pipe_context* pipe, void* state)
1388 {
1389 FREE(state);
1390 }
1391
1392 static void*
r300_create_sampler_state(struct pipe_context * pipe,const struct pipe_sampler_state * state)1393 r300_create_sampler_state(struct pipe_context* pipe,
1394 const struct pipe_sampler_state* state)
1395 {
1396 struct r300_context* r300 = r300_context(pipe);
1397 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state);
1398 boolean is_r500 = r300->screen->caps.is_r500;
1399 int lod_bias;
1400
1401 sampler->state = *state;
1402
1403 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG
1404 * or MIN filter is NEAREST. Since texwrap produces same results
1405 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */
1406 if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST ||
1407 sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) {
1408 /* Wrap S. */
1409 if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP)
1410 sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1411 else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP)
1412 sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1413
1414 /* Wrap T. */
1415 if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP)
1416 sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1417 else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP)
1418 sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1419
1420 /* Wrap R. */
1421 if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP)
1422 sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
1423 else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP)
1424 sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE;
1425 }
1426
1427 sampler->filter0 |=
1428 (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) |
1429 (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) |
1430 (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT);
1431
1432 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter,
1433 state->mag_img_filter,
1434 state->min_mip_filter,
1435 state->max_anisotropy > 1);
1436
1437 sampler->filter0 |= r300_anisotropy(state->max_anisotropy);
1438
1439 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */
1440 /* We must pass these to the merge function to clamp them properly. */
1441 sampler->min_lod = (unsigned)MAX2(state->min_lod, 0);
1442 sampler->max_lod = (unsigned)MAX2(ceilf(state->max_lod), 0);
1443
1444 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1);
1445
1446 sampler->filter1 |= (lod_bias << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1447
1448 /* This is very high quality anisotropic filtering for R5xx.
1449 * It's good for benchmarking the performance of texturing but
1450 * in practice we don't want to slow down the driver because it's
1451 * a pretty good performance killer. Feel free to play with it. */
1452 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) {
1453 sampler->filter1 |= r500_anisotropy(state->max_anisotropy);
1454 }
1455
1456 /* R500-specific fixups and optimizations */
1457 if (r300->screen->caps.is_r500) {
1458 sampler->filter1 |= R500_BORDER_FIX;
1459 }
1460
1461 return (void*)sampler;
1462 }
1463
r300_bind_sampler_states(struct pipe_context * pipe,enum pipe_shader_type shader,unsigned start,unsigned count,void ** states)1464 static void r300_bind_sampler_states(struct pipe_context* pipe,
1465 enum pipe_shader_type shader,
1466 unsigned start, unsigned count,
1467 void** states)
1468 {
1469 struct r300_context* r300 = r300_context(pipe);
1470 struct r300_textures_state* state =
1471 (struct r300_textures_state*)r300->textures_state.state;
1472 unsigned tex_units = r300->screen->caps.num_tex_units;
1473
1474 assert(start == 0);
1475
1476 if (shader != PIPE_SHADER_FRAGMENT)
1477 return;
1478
1479 if (count > tex_units)
1480 return;
1481
1482 memcpy(state->sampler_states, states, sizeof(void*) * count);
1483 state->sampler_state_count = count;
1484
1485 r300_mark_atom_dirty(r300, &r300->textures_state);
1486 }
1487
r300_delete_sampler_state(struct pipe_context * pipe,void * state)1488 static void r300_delete_sampler_state(struct pipe_context* pipe, void* state)
1489 {
1490 FREE(state);
1491 }
1492
r300_assign_texture_cache_region(unsigned index,unsigned num)1493 static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num)
1494 {
1495 /* This looks like a hack, but I believe it's suppose to work like
1496 * that. To illustrate how this works, let's assume you have 5 textures.
1497 * From docs, 5 and the successive numbers are:
1498 *
1499 * FOURTH_1 = 5
1500 * FOURTH_2 = 6
1501 * FOURTH_3 = 7
1502 * EIGHTH_0 = 8
1503 * EIGHTH_1 = 9
1504 *
1505 * First 3 textures will get 3/4 of size of the cache, divided evenly
1506 * between them. The last 1/4 of the cache must be divided between
1507 * the last 2 textures, each will therefore get 1/8 of the cache.
1508 * Why not just to use "5 + texture_index" ?
1509 *
1510 * This simple trick works for all "num" <= 16.
1511 */
1512 if (num <= 1)
1513 return R300_TX_CACHE(R300_TX_CACHE_WHOLE);
1514 else
1515 return R300_TX_CACHE(num + index);
1516 }
1517
r300_set_sampler_views(struct pipe_context * pipe,enum pipe_shader_type shader,unsigned start,unsigned count,unsigned unbind_num_trailing_slots,bool take_ownership,struct pipe_sampler_view ** views)1518 static void r300_set_sampler_views(struct pipe_context* pipe,
1519 enum pipe_shader_type shader,
1520 unsigned start, unsigned count,
1521 unsigned unbind_num_trailing_slots,
1522 bool take_ownership,
1523 struct pipe_sampler_view** views)
1524 {
1525 struct r300_context* r300 = r300_context(pipe);
1526 struct r300_textures_state* state =
1527 (struct r300_textures_state*)r300->textures_state.state;
1528 struct r300_resource *texture;
1529 unsigned i, real_num_views = 0, view_index = 0;
1530 unsigned tex_units = r300->screen->caps.num_tex_units;
1531 boolean dirty_tex = FALSE;
1532
1533 assert(start == 0); /* non-zero not handled yet */
1534
1535 if (shader != PIPE_SHADER_FRAGMENT || count > tex_units) {
1536 if (take_ownership) {
1537 for (unsigned i = 0; i < count; i++) {
1538 struct pipe_sampler_view *view = views[i];
1539 pipe_sampler_view_reference(&view, NULL);
1540 }
1541 }
1542 return;
1543 }
1544
1545 /* Calculate the real number of views. */
1546 for (i = 0; i < count; i++) {
1547 if (views[i])
1548 real_num_views++;
1549 }
1550
1551 for (i = 0; i < count; i++) {
1552 if (take_ownership) {
1553 pipe_sampler_view_reference(
1554 (struct pipe_sampler_view**)&state->sampler_views[i], NULL);
1555 state->sampler_views[i] = (struct r300_sampler_view*)views[i];
1556 } else {
1557 pipe_sampler_view_reference(
1558 (struct pipe_sampler_view**)&state->sampler_views[i],
1559 views[i]);
1560 }
1561
1562 if (!views[i]) {
1563 continue;
1564 }
1565
1566 /* A new sampler view (= texture)... */
1567 dirty_tex = TRUE;
1568
1569 /* Set the texrect factor in the fragment shader.
1570 * Needed for RECT and NPOT fallback. */
1571 texture = r300_resource(views[i]->texture);
1572 if (texture->tex.is_npot) {
1573 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1574 }
1575
1576 state->sampler_views[i]->texcache_region =
1577 r300_assign_texture_cache_region(view_index, real_num_views);
1578 view_index++;
1579 }
1580
1581 for (i = count; i < tex_units; i++) {
1582 if (state->sampler_views[i]) {
1583 pipe_sampler_view_reference(
1584 (struct pipe_sampler_view**)&state->sampler_views[i],
1585 NULL);
1586 }
1587 }
1588
1589 state->sampler_view_count = count;
1590
1591 r300_mark_atom_dirty(r300, &r300->textures_state);
1592
1593 if (dirty_tex) {
1594 r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
1595 }
1596 }
1597
1598 struct pipe_sampler_view *
r300_create_sampler_view_custom(struct pipe_context * pipe,struct pipe_resource * texture,const struct pipe_sampler_view * templ,unsigned width0_override,unsigned height0_override)1599 r300_create_sampler_view_custom(struct pipe_context *pipe,
1600 struct pipe_resource *texture,
1601 const struct pipe_sampler_view *templ,
1602 unsigned width0_override,
1603 unsigned height0_override)
1604 {
1605 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view);
1606 struct r300_resource *tex = r300_resource(texture);
1607 boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500;
1608 boolean dxtc_swizzle = r300_screen(pipe->screen)->caps.dxtc_swizzle;
1609
1610 if (view) {
1611 unsigned hwformat;
1612
1613 view->base = *templ;
1614 view->base.reference.count = 1;
1615 view->base.context = pipe;
1616 view->base.texture = NULL;
1617 pipe_resource_reference(&view->base.texture, texture);
1618
1619 view->width0_override = width0_override;
1620 view->height0_override = height0_override;
1621 view->swizzle[0] = templ->swizzle_r;
1622 view->swizzle[1] = templ->swizzle_g;
1623 view->swizzle[2] = templ->swizzle_b;
1624 view->swizzle[3] = templ->swizzle_a;
1625
1626 hwformat = r300_translate_texformat(templ->format,
1627 view->swizzle,
1628 is_r500,
1629 dxtc_swizzle);
1630
1631 if (hwformat == ~0) {
1632 fprintf(stderr, "r300: Oops. Got unsupported format %s in %s.\n",
1633 util_format_short_name(templ->format), __func__);
1634 }
1635 assert(hwformat != ~0);
1636
1637 r300_texture_setup_format_state(r300_screen(pipe->screen), tex,
1638 templ->format, 0,
1639 width0_override, height0_override,
1640 &view->format);
1641 view->format.format1 |= hwformat;
1642 if (is_r500) {
1643 view->format.format2 |= r500_tx_format_msb_bit(templ->format);
1644 }
1645 }
1646
1647 return (struct pipe_sampler_view*)view;
1648 }
1649
1650 static struct pipe_sampler_view *
r300_create_sampler_view(struct pipe_context * pipe,struct pipe_resource * texture,const struct pipe_sampler_view * templ)1651 r300_create_sampler_view(struct pipe_context *pipe,
1652 struct pipe_resource *texture,
1653 const struct pipe_sampler_view *templ)
1654 {
1655 return r300_create_sampler_view_custom(pipe, texture, templ,
1656 r300_resource(texture)->tex.width0,
1657 r300_resource(texture)->tex.height0);
1658 }
1659
1660
1661 static void
r300_sampler_view_destroy(struct pipe_context * pipe,struct pipe_sampler_view * view)1662 r300_sampler_view_destroy(struct pipe_context *pipe,
1663 struct pipe_sampler_view *view)
1664 {
1665 pipe_resource_reference(&view->texture, NULL);
1666 FREE(view);
1667 }
1668
r300_set_sample_mask(struct pipe_context * pipe,unsigned mask)1669 static void r300_set_sample_mask(struct pipe_context *pipe,
1670 unsigned mask)
1671 {
1672 struct r300_context* r300 = r300_context(pipe);
1673
1674 *((unsigned*)r300->sample_mask.state) = mask;
1675
1676 r300_mark_atom_dirty(r300, &r300->sample_mask);
1677 }
1678
r300_set_scissor_states(struct pipe_context * pipe,unsigned start_slot,unsigned num_scissors,const struct pipe_scissor_state * state)1679 static void r300_set_scissor_states(struct pipe_context* pipe,
1680 unsigned start_slot,
1681 unsigned num_scissors,
1682 const struct pipe_scissor_state* state)
1683 {
1684 struct r300_context* r300 = r300_context(pipe);
1685
1686 memcpy(r300->scissor_state.state, state,
1687 sizeof(struct pipe_scissor_state));
1688
1689 r300_mark_atom_dirty(r300, &r300->scissor_state);
1690 }
1691
r300_set_viewport_states(struct pipe_context * pipe,unsigned start_slot,unsigned num_viewports,const struct pipe_viewport_state * state)1692 static void r300_set_viewport_states(struct pipe_context* pipe,
1693 unsigned start_slot,
1694 unsigned num_viewports,
1695 const struct pipe_viewport_state* state)
1696 {
1697 struct r300_context* r300 = r300_context(pipe);
1698 struct r300_viewport_state* viewport =
1699 (struct r300_viewport_state*)r300->viewport_state.state;
1700
1701 r300->viewport = *state;
1702
1703 if (r300->draw) {
1704 draw_set_viewport_states(r300->draw, start_slot, num_viewports, state);
1705 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT;
1706 return;
1707 }
1708
1709 /* Do the transform in HW. */
1710 viewport->vte_control = R300_VTX_W0_FMT;
1711
1712 if (state->scale[0] != 1.0f) {
1713 viewport->xscale = state->scale[0];
1714 viewport->vte_control |= R300_VPORT_X_SCALE_ENA;
1715 }
1716 if (state->scale[1] != 1.0f) {
1717 viewport->yscale = state->scale[1];
1718 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA;
1719 }
1720 if (state->scale[2] != 1.0f) {
1721 viewport->zscale = state->scale[2];
1722 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA;
1723 }
1724 if (state->translate[0] != 0.0f) {
1725 viewport->xoffset = state->translate[0];
1726 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA;
1727 }
1728 if (state->translate[1] != 0.0f) {
1729 viewport->yoffset = state->translate[1];
1730 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA;
1731 }
1732 if (state->translate[2] != 0.0f) {
1733 viewport->zoffset = state->translate[2];
1734 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA;
1735 }
1736
1737 r300_mark_atom_dirty(r300, &r300->viewport_state);
1738 if (r300->fs.state && r300_fs(r300)->shader &&
1739 r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) {
1740 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state);
1741 }
1742 }
1743
r300_set_vertex_buffers_hwtcl(struct pipe_context * pipe,unsigned start_slot,unsigned count,unsigned unbind_num_trailing_slots,bool take_ownership,const struct pipe_vertex_buffer * buffers)1744 static void r300_set_vertex_buffers_hwtcl(struct pipe_context* pipe,
1745 unsigned start_slot, unsigned count,
1746 unsigned unbind_num_trailing_slots,
1747 bool take_ownership,
1748 const struct pipe_vertex_buffer* buffers)
1749 {
1750 struct r300_context* r300 = r300_context(pipe);
1751
1752 util_set_vertex_buffers_count(r300->vertex_buffer,
1753 &r300->nr_vertex_buffers,
1754 buffers, start_slot, count,
1755 unbind_num_trailing_slots, take_ownership);
1756
1757 /* There must be at least one vertex buffer set, otherwise it locks up. */
1758 if (!r300->nr_vertex_buffers) {
1759 util_set_vertex_buffers_count(r300->vertex_buffer,
1760 &r300->nr_vertex_buffers,
1761 &r300->dummy_vb, 0, 1, 0, false);
1762 }
1763
1764 r300->vertex_arrays_dirty = TRUE;
1765 }
1766
r300_set_vertex_buffers_swtcl(struct pipe_context * pipe,unsigned start_slot,unsigned count,unsigned unbind_num_trailing_slots,bool take_ownership,const struct pipe_vertex_buffer * buffers)1767 static void r300_set_vertex_buffers_swtcl(struct pipe_context* pipe,
1768 unsigned start_slot, unsigned count,
1769 unsigned unbind_num_trailing_slots,
1770 bool take_ownership,
1771 const struct pipe_vertex_buffer* buffers)
1772 {
1773 struct r300_context* r300 = r300_context(pipe);
1774 unsigned i;
1775
1776 util_set_vertex_buffers_count(r300->vertex_buffer,
1777 &r300->nr_vertex_buffers,
1778 buffers, start_slot, count,
1779 unbind_num_trailing_slots, take_ownership);
1780 draw_set_vertex_buffers(r300->draw, start_slot, count,
1781 unbind_num_trailing_slots, buffers);
1782
1783 if (!buffers)
1784 return;
1785
1786 for (i = 0; i < count; i++) {
1787 if (buffers[i].is_user_buffer) {
1788 draw_set_mapped_vertex_buffer(r300->draw, start_slot + i,
1789 buffers[i].buffer.user, ~0);
1790 } else if (buffers[i].buffer.resource) {
1791 draw_set_mapped_vertex_buffer(r300->draw, start_slot + i,
1792 r300_resource(buffers[i].buffer.resource)->malloced_buffer, ~0);
1793 }
1794 }
1795 }
1796
1797 /* Initialize the PSC tables. */
r300_vertex_psc(struct r300_vertex_element_state * velems)1798 static void r300_vertex_psc(struct r300_vertex_element_state *velems)
1799 {
1800 struct r300_vertex_stream_state *vstream = &velems->vertex_stream;
1801 uint16_t type, swizzle;
1802 enum pipe_format format;
1803 unsigned i;
1804
1805 /* Vertex shaders have no semantics on their inputs,
1806 * so PSC should just route stuff based on the vertex elements,
1807 * and not on attrib information. */
1808 for (i = 0; i < velems->count; i++) {
1809 format = velems->velem[i].src_format;
1810
1811 type = r300_translate_vertex_data_type(format);
1812 if (type == R300_INVALID_FORMAT) {
1813 fprintf(stderr, "r300: Bad vertex format %s.\n",
1814 util_format_short_name(format));
1815 assert(0);
1816 abort();
1817 }
1818
1819 type |= i << R300_DST_VEC_LOC_SHIFT;
1820 swizzle = r300_translate_vertex_data_swizzle(format);
1821
1822 if (i & 1) {
1823 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16;
1824 vstream->vap_prog_stream_cntl_ext[i >> 1] |= (uint32_t)swizzle << 16;
1825 } else {
1826 vstream->vap_prog_stream_cntl[i >> 1] |= type;
1827 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle;
1828 }
1829 }
1830
1831 /* Set the last vector in the PSC. */
1832 if (i) {
1833 i -= 1;
1834 }
1835 vstream->vap_prog_stream_cntl[i >> 1] |=
1836 (R300_LAST_VEC << (i & 1 ? 16 : 0));
1837
1838 vstream->count = (i >> 1) + 1;
1839 }
1840
r300_create_vertex_elements_state(struct pipe_context * pipe,unsigned count,const struct pipe_vertex_element * attribs)1841 static void* r300_create_vertex_elements_state(struct pipe_context* pipe,
1842 unsigned count,
1843 const struct pipe_vertex_element* attribs)
1844 {
1845 struct r300_vertex_element_state *velems;
1846 unsigned i;
1847 struct pipe_vertex_element dummy_attrib = {0};
1848
1849 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */
1850 if (!count) {
1851 dummy_attrib.src_format = PIPE_FORMAT_R8G8B8A8_UNORM;
1852 attribs = &dummy_attrib;
1853 count = 1;
1854 } else if (count > 16) {
1855 fprintf(stderr, "r300: More than 16 vertex elements are not supported,"
1856 " requested %i, using 16.\n", count);
1857 count = 16;
1858 }
1859
1860 velems = CALLOC_STRUCT(r300_vertex_element_state);
1861 if (!velems)
1862 return NULL;
1863
1864 velems->count = count;
1865 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count);
1866
1867 if (r300_screen(pipe->screen)->caps.has_tcl) {
1868 /* Setup PSC.
1869 * The unused components will be replaced by (..., 0, 1). */
1870 r300_vertex_psc(velems);
1871
1872 for (i = 0; i < count; i++) {
1873 velems->format_size[i] =
1874 align(util_format_get_blocksize(velems->velem[i].src_format), 4);
1875 velems->vertex_size_dwords += velems->format_size[i] / 4;
1876 }
1877 }
1878
1879 return velems;
1880 }
1881
r300_bind_vertex_elements_state(struct pipe_context * pipe,void * state)1882 static void r300_bind_vertex_elements_state(struct pipe_context *pipe,
1883 void *state)
1884 {
1885 struct r300_context *r300 = r300_context(pipe);
1886 struct r300_vertex_element_state *velems = state;
1887
1888 if (!velems) {
1889 return;
1890 }
1891
1892 r300->velems = velems;
1893
1894 if (r300->draw) {
1895 draw_set_vertex_elements(r300->draw, velems->count, velems->velem);
1896 return;
1897 }
1898
1899 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state);
1900 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2;
1901 r300->vertex_arrays_dirty = TRUE;
1902 }
1903
r300_delete_vertex_elements_state(struct pipe_context * pipe,void * state)1904 static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state)
1905 {
1906 FREE(state);
1907 }
1908
r300_create_vs_state(struct pipe_context * pipe,const struct pipe_shader_state * shader)1909 static void* r300_create_vs_state(struct pipe_context* pipe,
1910 const struct pipe_shader_state* shader)
1911 {
1912 struct r300_context* r300 = r300_context(pipe);
1913 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader);
1914
1915 /* Copy state directly into shader. */
1916 vs->state = *shader;
1917 vs->state.tokens = tgsi_dup_tokens(shader->tokens);
1918
1919 if (r300->screen->caps.has_tcl) {
1920 r300_init_vs_outputs(r300, vs);
1921 r300_translate_vertex_shader(r300, vs);
1922 } else {
1923 r300_draw_init_vertex_shader(r300, vs);
1924 }
1925
1926 return vs;
1927 }
1928
r300_bind_vs_state(struct pipe_context * pipe,void * shader)1929 static void r300_bind_vs_state(struct pipe_context* pipe, void* shader)
1930 {
1931 struct r300_context* r300 = r300_context(pipe);
1932 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1933
1934 if (!vs) {
1935 r300->vs_state.state = NULL;
1936 return;
1937 }
1938 if (vs == r300->vs_state.state) {
1939 return;
1940 }
1941 r300->vs_state.state = vs;
1942
1943 /* The majority of the RS block bits is dependent on the vertex shader. */
1944 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */
1945
1946 if (r300->screen->caps.has_tcl) {
1947 unsigned fc_op_dwords = r300->screen->caps.is_r500 ? 3 : 2;
1948 r300_mark_atom_dirty(r300, &r300->vs_state);
1949 r300->vs_state.size = vs->code.length + 9 +
1950 (R300_VS_MAX_FC_OPS * fc_op_dwords + 4);
1951
1952 r300_mark_atom_dirty(r300, &r300->vs_constants);
1953 r300->vs_constants.size =
1954 2 +
1955 (vs->externals_count ? vs->externals_count * 4 + 3 : 0) +
1956 (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0);
1957
1958 ((struct r300_constant_buffer*)r300->vs_constants.state)->remap_table =
1959 vs->code.constants_remap_table;
1960
1961 r300_mark_atom_dirty(r300, &r300->pvs_flush);
1962 } else {
1963 draw_bind_vertex_shader(r300->draw,
1964 (struct draw_vertex_shader*)vs->draw_vs);
1965 }
1966 }
1967
r300_delete_vs_state(struct pipe_context * pipe,void * shader)1968 static void r300_delete_vs_state(struct pipe_context* pipe, void* shader)
1969 {
1970 struct r300_context* r300 = r300_context(pipe);
1971 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader;
1972
1973 if (r300->screen->caps.has_tcl) {
1974 rc_constants_destroy(&vs->code.constants);
1975 FREE(vs->code.constants_remap_table);
1976 } else {
1977 draw_delete_vertex_shader(r300->draw,
1978 (struct draw_vertex_shader*)vs->draw_vs);
1979 }
1980
1981 FREE((void*)vs->state.tokens);
1982 FREE(shader);
1983 }
1984
r300_set_constant_buffer(struct pipe_context * pipe,enum pipe_shader_type shader,uint index,bool take_ownership,const struct pipe_constant_buffer * cb)1985 static void r300_set_constant_buffer(struct pipe_context *pipe,
1986 enum pipe_shader_type shader, uint index,
1987 bool take_ownership,
1988 const struct pipe_constant_buffer *cb)
1989 {
1990 struct r300_context* r300 = r300_context(pipe);
1991 struct r300_constant_buffer *cbuf;
1992 uint32_t *mapped;
1993
1994 if (!cb || (!cb->buffer && !cb->user_buffer))
1995 return;
1996
1997 switch (shader) {
1998 case PIPE_SHADER_VERTEX:
1999 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state;
2000 break;
2001 case PIPE_SHADER_FRAGMENT:
2002 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state;
2003 break;
2004 default:
2005 return;
2006 }
2007
2008
2009 if (cb->user_buffer)
2010 mapped = (uint32_t*)cb->user_buffer;
2011 else {
2012 struct r300_resource *rbuf = r300_resource(cb->buffer);
2013
2014 if (rbuf && rbuf->malloced_buffer)
2015 mapped = (uint32_t*)rbuf->malloced_buffer;
2016 else
2017 return;
2018 }
2019
2020 if (shader == PIPE_SHADER_FRAGMENT ||
2021 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) {
2022 cbuf->ptr = mapped;
2023 }
2024
2025 if (shader == PIPE_SHADER_VERTEX) {
2026 if (r300->screen->caps.has_tcl) {
2027 struct r300_vertex_shader *vs =
2028 (struct r300_vertex_shader*)r300->vs_state.state;
2029
2030 if (!vs) {
2031 cbuf->buffer_base = 0;
2032 return;
2033 }
2034
2035 cbuf->buffer_base = r300->vs_const_base;
2036 r300->vs_const_base += vs->code.constants.Count;
2037 if (r300->vs_const_base > R500_MAX_PVS_CONST_VECS) {
2038 r300->vs_const_base = vs->code.constants.Count;
2039 cbuf->buffer_base = 0;
2040 r300_mark_atom_dirty(r300, &r300->pvs_flush);
2041 }
2042 r300_mark_atom_dirty(r300, &r300->vs_constants);
2043 } else if (r300->draw) {
2044 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX,
2045 0, mapped, cb->buffer_size);
2046 }
2047 } else if (shader == PIPE_SHADER_FRAGMENT) {
2048 r300_mark_atom_dirty(r300, &r300->fs_constants);
2049 }
2050 }
2051
r300_texture_barrier(struct pipe_context * pipe,unsigned flags)2052 static void r300_texture_barrier(struct pipe_context *pipe, unsigned flags)
2053 {
2054 struct r300_context *r300 = r300_context(pipe);
2055
2056 r300_mark_atom_dirty(r300, &r300->gpu_flush);
2057 r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
2058 }
2059
r300_memory_barrier(struct pipe_context * pipe,unsigned flags)2060 static void r300_memory_barrier(struct pipe_context *pipe, unsigned flags)
2061 {
2062 }
2063
r300_init_state_functions(struct r300_context * r300)2064 void r300_init_state_functions(struct r300_context* r300)
2065 {
2066 r300->context.create_blend_state = r300_create_blend_state;
2067 r300->context.bind_blend_state = r300_bind_blend_state;
2068 r300->context.delete_blend_state = r300_delete_blend_state;
2069
2070 r300->context.set_blend_color = r300_set_blend_color;
2071
2072 r300->context.set_clip_state = r300_set_clip_state;
2073 r300->context.set_sample_mask = r300_set_sample_mask;
2074
2075 r300->context.set_constant_buffer = r300_set_constant_buffer;
2076
2077 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state;
2078 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state;
2079 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state;
2080
2081 r300->context.set_stencil_ref = r300_set_stencil_ref;
2082
2083 r300->context.set_framebuffer_state = r300_set_framebuffer_state;
2084
2085 r300->context.create_fs_state = r300_create_fs_state;
2086 r300->context.bind_fs_state = r300_bind_fs_state;
2087 r300->context.delete_fs_state = r300_delete_fs_state;
2088
2089 r300->context.set_polygon_stipple = r300_set_polygon_stipple;
2090
2091 r300->context.create_rasterizer_state = r300_create_rs_state;
2092 r300->context.bind_rasterizer_state = r300_bind_rs_state;
2093 r300->context.delete_rasterizer_state = r300_delete_rs_state;
2094
2095 r300->context.create_sampler_state = r300_create_sampler_state;
2096 r300->context.bind_sampler_states = r300_bind_sampler_states;
2097 r300->context.delete_sampler_state = r300_delete_sampler_state;
2098
2099 r300->context.set_sampler_views = r300_set_sampler_views;
2100 r300->context.create_sampler_view = r300_create_sampler_view;
2101 r300->context.sampler_view_destroy = r300_sampler_view_destroy;
2102
2103 r300->context.set_scissor_states = r300_set_scissor_states;
2104
2105 r300->context.set_viewport_states = r300_set_viewport_states;
2106
2107 if (r300->screen->caps.has_tcl) {
2108 r300->context.set_vertex_buffers = r300_set_vertex_buffers_hwtcl;
2109 } else {
2110 r300->context.set_vertex_buffers = r300_set_vertex_buffers_swtcl;
2111 }
2112
2113 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state;
2114 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state;
2115 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state;
2116
2117 r300->context.create_vs_state = r300_create_vs_state;
2118 r300->context.bind_vs_state = r300_bind_vs_state;
2119 r300->context.delete_vs_state = r300_delete_vs_state;
2120
2121 r300->context.texture_barrier = r300_texture_barrier;
2122 r300->context.memory_barrier = r300_memory_barrier;
2123 }
2124