1unit ATtiny28; 2 3{$goto on} 4 5interface 6 7var 8 // PORTD 9 PORTD : byte absolute $00+$32; // Port D Data Register 10 DDRD : byte absolute $00+$31; // Port D Data Direction Register 11 PIND : byte absolute $00+$30; // Port D Input Pins 12 // CPU 13 SREG : byte absolute $00+$3F; // Status Register 14 ICR : byte absolute $00+$26; // Interrupt Control Register 15 MCUCS : byte absolute $00+$27; // MCU Control and Status Register 16 OSCCAL : byte absolute $00+$20; // Status Register 17 // ANALOG_COMPARATOR 18 ACSR : byte absolute $00+$28; // Analog Comparator Control And Status Register 19 // TIMER_COUNTER_0 20 IFR : byte absolute $00+$25; // Interrupt Flag register 21 TCCR0 : byte absolute $00+$24; // Timer/Counter0 Control Register 22 TCNT0 : byte absolute $00+$23; // Timer Counter 0 23 // WATCHDOG 24 WDTCR : byte absolute $00+$21; // Watchdog Timer Control Register 25 // EXTERNAL_INTERRUPT 26 // PORTA 27 PORTA : byte absolute $00+$3B; // Port A Data Register 28 PACR : byte absolute $00+$3A; // Port A Control Register 29 PINA : byte absolute $00+$39; // Port A Input Pins 30 // PORTB 31 PINB : byte absolute $00+$36; // Port B Input Pins 32 // MODULATOR 33 MODCR : byte absolute $00+$22; // Modulation Control Register 34 35const 36 // SREG 37 I = 7; // Global Interrupt Enable 38 T = 6; // Bit Copy Storage 39 H = 5; // Half Carry Flag 40 S = 4; // Sign Bit 41 V = 3; // Two's Complement Overflow Flag 42 N = 2; // Negative Flag 43 Z = 1; // Zero Flag 44 C = 0; // Carry Flag 45 // ICR 46 ICS1 = 2; // Interrupt Sense Control 1 bits 47 ISC0 = 0; // Interrupt Sense Control 0 bits 48 // MCUCS 49 PLUPB = 7; // Pull-up Enable Port B 50 SE = 5; // Sleep Enable 51 SM = 4; // Sleep Mode 52 WDRF = 3; // Watchdog Reset Flag 53 EXTRF = 1; // External Reset Flag 54 PORF = 0; // Power-On Reset Flag 55 // ACSR 56 ACD = 7; // Analog Comparator Disable 57 ACO = 5; // Analog Comparator Output 58 ACI = 4; // Analog Comparator Interrupt Flag 59 ACIE = 3; // Analog Comparator Interrupt Enable 60 ACIS = 0; // Analog Comparator Interrupt Mode Select bits 61 // ICR 62 TOIE0 = 4; // Timer/Counter0 Overflow Interrupt Enable 63 // IFR 64 TOV0 = 4; // Timer/Counter0 Overflow Flag 65 // TCCR0 66 FOV0 = 7; // Force Overflow 67 OOM0 = 3; // Overflow Output Mode, Bits 68 CS0 = 0; // Clock Select0 bits 69 // WDTCR 70 WDTOE = 4; // RW 71 WDE = 3; // Watch Dog Enable 72 WDP = 0; // Watch Dog Timer Prescaler bits 73 // ICR 74 INT = 6; // External Interrupt Request 1 Enable 75 LLIE = 5; // Low-level Input Interrupt Enable 76 // IFR 77 INTF = 6; // External Interrupt Flags 78 // MODCR 79 ONTIM4 = 7; // Modulation On-time Bit 4 80 OTIM3 = 6; // Modulation On-time Bit 3 81 ONTIM = 3; // Modulation On-time Bits 82 MCONF = 0; // Modulation Configuration Bits 83 84implementation 85 86{$define RELBRANCHES} 87 88{$i avrcommon.inc} 89 90procedure INT0_ISR; external name 'INT0_ISR'; // Interrupt 1 External Interrupt 0 91procedure INT1_ISR; external name 'INT1_ISR'; // Interrupt 2 External Interrupt 1 92procedure LOW_LEVEL_IO_PINS_ISR; external name 'LOW_LEVEL_IO_PINS_ISR'; // Interrupt 3 Low-level Input on Port B 93procedure TIMER0_OVF_ISR; external name 'TIMER0_OVF_ISR'; // Interrupt 4 Timer/Counter0 Overflow 94procedure ANA_COMP_ISR; external name 'ANA_COMP_ISR'; // Interrupt 5 Analog Comparator 95 96procedure _FPC_start; assembler; nostackframe; 97label 98 _start; 99 asm 100 .init 101 .globl _start 102 103 rjmp _start 104 rjmp INT0_ISR 105 rjmp INT1_ISR 106 rjmp LOW_LEVEL_IO_PINS_ISR 107 rjmp TIMER0_OVF_ISR 108 rjmp ANA_COMP_ISR 109 110 {$i start_noram.inc} 111 112 .weak INT0_ISR 113 .weak INT1_ISR 114 .weak LOW_LEVEL_IO_PINS_ISR 115 .weak TIMER0_OVF_ISR 116 .weak ANA_COMP_ISR 117 118 .set INT0_ISR, Default_IRQ_handler 119 .set INT1_ISR, Default_IRQ_handler 120 .set LOW_LEVEL_IO_PINS_ISR, Default_IRQ_handler 121 .set TIMER0_OVF_ISR, Default_IRQ_handler 122 .set ANA_COMP_ISR, Default_IRQ_handler 123 end; 124 125end. 126