1; Options for the ARM port of the compiler. 2 3; Copyright (C) 2005-2020 Free Software Foundation, Inc. 4; 5; This file is part of GCC. 6; 7; GCC is free software; you can redistribute it and/or modify it under 8; the terms of the GNU General Public License as published by the Free 9; Software Foundation; either version 3, or (at your option) any later 10; version. 11; 12; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13; WARRANTY; without even the implied warranty of MERCHANTABILITY or 14; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15; for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with GCC; see the file COPYING3. If not see 19; <http://www.gnu.org/licenses/>. 20 21HeaderInclude 22config/arm/arm-opts.h 23 24TargetSave 25const char *x_arm_arch_string 26 27TargetSave 28const char *x_arm_cpu_string 29 30TargetSave 31const char *x_arm_tune_string 32 33Enum 34Name(tls_type) Type(enum arm_tls_type) 35TLS dialect to use: 36 37EnumValue 38Enum(tls_type) String(gnu) Value(TLS_GNU) 39 40EnumValue 41Enum(tls_type) String(gnu2) Value(TLS_GNU2) 42 43mabi= 44Target RejectNegative Joined Enum(arm_abi_type) Var(arm_abi) Init(ARM_DEFAULT_ABI) 45Specify an ABI. 46 47Enum 48Name(arm_abi_type) Type(enum arm_abi_type) 49Known ARM ABIs (for use with the -mabi= option): 50 51EnumValue 52Enum(arm_abi_type) String(apcs-gnu) Value(ARM_ABI_APCS) 53 54EnumValue 55Enum(arm_abi_type) String(atpcs) Value(ARM_ABI_ATPCS) 56 57EnumValue 58Enum(arm_abi_type) String(aapcs) Value(ARM_ABI_AAPCS) 59 60EnumValue 61Enum(arm_abi_type) String(iwmmxt) Value(ARM_ABI_IWMMXT) 62 63EnumValue 64Enum(arm_abi_type) String(aapcs-linux) Value(ARM_ABI_AAPCS_LINUX) 65 66mabort-on-noreturn 67Target Report Mask(ABORT_NORETURN) 68Generate a call to abort if a noreturn function returns. 69 70mapcs 71Target RejectNegative Mask(APCS_FRAME) Undocumented 72 73mapcs-frame 74Target Report Mask(APCS_FRAME) 75Generate APCS conformant stack frames. 76 77mapcs-reentrant 78Target Report Mask(APCS_REENT) 79Generate re-entrant, PIC code. 80 81mapcs-stack-check 82Target Report Mask(APCS_STACK) Undocumented 83 84march= 85Target RejectNegative Negative(march=) ToLower Joined Var(arm_arch_string) 86Specify the name of the target architecture. 87 88; Other arm_arch values are loaded from arm-tables.opt 89; but that is a generated file and this is an odd-one-out. 90EnumValue 91Enum(arm_arch) String(native) Value(-1) DriverOnly 92 93; Set to the name of target architecture which is required for 94; multilib linking. This option is undocumented becuase it 95; should not be used by the users. 96mlibarch= 97Target RejectNegative JoinedOrMissing NoDWARFRecord DriverOnly Undocumented 98 99marm 100Target Report RejectNegative Negative(mthumb) InverseMask(THUMB) 101Generate code in 32 bit ARM state. 102 103mbig-endian 104Target Report RejectNegative Negative(mlittle-endian) Mask(BIG_END) 105Assume target CPU is configured as big endian. 106 107mcallee-super-interworking 108Target Report Mask(CALLEE_INTERWORKING) 109Thumb: Assume non-static functions may be called from ARM code. 110 111mcaller-super-interworking 112Target Report Mask(CALLER_INTERWORKING) 113Thumb: Assume function pointers may go to non-Thumb aware code. 114 115mcpu= 116Target RejectNegative Negative(mcpu=) ToLower Joined Var(arm_cpu_string) 117Specify the name of the target CPU. 118 119mfloat-abi= 120Target RejectNegative Joined Enum(float_abi_type) Var(arm_float_abi) Init(TARGET_DEFAULT_FLOAT_ABI) 121Specify if floating point hardware should be used. 122 123mcmse 124Target RejectNegative Var(use_cmse) 125Specify that the compiler should target secure code as per ARMv8-M Security Extensions. 126 127Enum 128Name(float_abi_type) Type(enum float_abi_type) 129Known floating-point ABIs (for use with the -mfloat-abi= option): 130 131EnumValue 132Enum(float_abi_type) String(soft) Value(ARM_FLOAT_ABI_SOFT) 133 134EnumValue 135Enum(float_abi_type) String(softfp) Value(ARM_FLOAT_ABI_SOFTFP) 136 137EnumValue 138Enum(float_abi_type) String(hard) Value(ARM_FLOAT_ABI_HARD) 139 140mflip-thumb 141Target Report Var(TARGET_FLIP_THUMB) Undocumented 142Switch ARM/Thumb modes on alternating functions for compiler testing. 143 144mfp16-format= 145Target RejectNegative Joined Enum(arm_fp16_format_type) Var(arm_fp16_format) Init(ARM_FP16_FORMAT_NONE) 146Specify the __fp16 floating-point format. 147 148Enum 149Name(arm_fp16_format_type) Type(enum arm_fp16_format_type) 150Known __fp16 formats (for use with the -mfp16-format= option): 151 152EnumValue 153Enum(arm_fp16_format_type) String(none) Value(ARM_FP16_FORMAT_NONE) 154 155EnumValue 156Enum(arm_fp16_format_type) String(ieee) Value(ARM_FP16_FORMAT_IEEE) 157 158EnumValue 159Enum(arm_fp16_format_type) String(alternative) Value(ARM_FP16_FORMAT_ALTERNATIVE) 160 161mfpu= 162Target RejectNegative Joined Enum(arm_fpu) Var(arm_fpu_index) Init(TARGET_FPU_auto) Save 163Specify the name of the target floating point hardware/format. 164 165mhard-float 166Target RejectNegative Alias(mfloat-abi=, hard) Undocumented 167 168mlittle-endian 169Target Report RejectNegative Negative(mbig-endian) InverseMask(BIG_END) 170Assume target CPU is configured as little endian. 171 172mlong-calls 173Target Report Mask(LONG_CALLS) 174Generate call insns as indirect calls, if necessary. 175 176mpic-data-is-text-relative 177Target Report Var(arm_pic_data_is_text_relative) Init(TARGET_DEFAULT_PIC_DATA_IS_TEXT_RELATIVE) 178Assume data segments are relative to text segment. 179 180mpic-register= 181Target RejectNegative Joined Var(arm_pic_register_string) 182Specify the register to be used for PIC addressing. 183 184mpoke-function-name 185Target Report Mask(POKE_FUNCTION_NAME) 186Store function names in object code. 187 188msched-prolog 189Target Report Mask(SCHED_PROLOG) 190Permit scheduling of a function's prologue sequence. 191 192msingle-pic-base 193Target Report Mask(SINGLE_PIC_BASE) 194Do not load the PIC register in function prologues. 195 196msoft-float 197Target RejectNegative Alias(mfloat-abi=, soft) Undocumented 198 199mstructure-size-boundary= 200Target RejectNegative Joined UInteger Var(arm_structure_size_boundary) Init(DEFAULT_STRUCTURE_SIZE_BOUNDARY) 201Specify the minimum bit alignment of structures. (Deprecated). 202 203mthumb 204Target Report RejectNegative Negative(marm) Mask(THUMB) Save 205Generate code for Thumb state. 206 207mthumb-interwork 208Target Report Mask(INTERWORK) 209Support calls between Thumb and ARM instruction sets. 210 211mtls-dialect= 212Target RejectNegative Joined Enum(tls_type) Var(target_tls_dialect) Init(TLS_GNU) 213Specify thread local storage scheme. 214 215mtp= 216Target RejectNegative Joined Enum(arm_tp_type) Var(target_thread_pointer) Init(TP_AUTO) 217Specify how to access the thread pointer. 218 219Enum 220Name(arm_tp_type) Type(enum arm_tp_type) 221Valid arguments to -mtp=: 222 223EnumValue 224Enum(arm_tp_type) String(soft) Value(TP_SOFT) 225 226EnumValue 227Enum(arm_tp_type) String(auto) Value(TP_AUTO) 228 229EnumValue 230Enum(arm_tp_type) String(cp15) Value(TP_CP15) 231 232mtpcs-frame 233Target Report Mask(TPCS_FRAME) 234Thumb: Generate (non-leaf) stack frames even if not needed. 235 236mtpcs-leaf-frame 237Target Report Mask(TPCS_LEAF_FRAME) 238Thumb: Generate (leaf) stack frames even if not needed. 239 240mtune= 241Target RejectNegative Negative(mtune=) ToLower Joined Var(arm_tune_string) 242Tune code for the given processor. 243 244mprint-tune-info 245Target Report RejectNegative Var(print_tune_info) Init(0) 246Print CPU tuning information as comment in assembler file. This is 247an option used only for regression testing of the compiler and not 248intended for ordinary use in compiling code. 249 250; Other processor_type values are loaded from arm-tables.opt 251; but that is a generated file and this is an odd-one-out. 252EnumValue 253Enum(processor_type) String(native) Value(-1) DriverOnly 254 255mvectorize-with-neon-quad 256Target Report RejectNegative InverseMask(NEON_VECTORIZE_DOUBLE) 257Use Neon quad-word (rather than double-word) registers for vectorization. 258 259mvectorize-with-neon-double 260Target Report RejectNegative Mask(NEON_VECTORIZE_DOUBLE) 261Use Neon double-word (rather than quad-word) registers for vectorization. 262 263mverbose-cost-dump 264Common Undocumented Var(arm_verbose_cost) Init(0) 265Enable more verbose RTX cost dumps during debug. For GCC developers use only. 266 267mword-relocations 268Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS) 269Only generate absolute relocations on word sized values. 270 271mrestrict-it 272Target Report Var(arm_restrict_it) Init(2) Save 273Generate IT blocks appropriate for ARMv8. 274 275mfix-cortex-m3-ldrd 276Target Report Var(fix_cm3_ldrd) Init(2) 277Avoid overlapping destination and address registers on LDRD instructions 278that may trigger Cortex-M3 errata. 279 280mfix-cmse-cve-2021-35465 281Target Var(fix_vlldm) Init(2) 282Mitigate issues with VLLDM on some M-profile devices (CVE-2021-35465). 283 284munaligned-access 285Target Report Var(unaligned_access) Init(2) Save 286Enable unaligned word and halfword accesses to packed data. 287 288mneon-for-64bits 289Target WarnRemoved 290This option is deprecated and has no effect. 291 292mslow-flash-data 293Target Report Var(target_slow_flash_data) Init(0) 294Assume loading data from flash is slower than fetching instructions. 295 296masm-syntax-unified 297Target Report Var(inline_asm_unified) Init(0) Save 298Assume unified syntax for inline assembly code. 299 300mpure-code 301Target Report Var(target_pure_code) Init(0) 302Do not allow constant data to be placed in code sections. 303 304mbe8 305Target Report RejectNegative Negative(mbe32) Mask(BE8) 306When linking for big-endian targets, generate a BE8 format image. 307 308mbe32 309Target Report RejectNegative Negative(mbe8) InverseMask(BE8) 310When linking for big-endian targets, generate a legacy BE32 format image. 311 312mbranch-cost= 313Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1) 314Cost to assume for a branch insn. 315 316mgeneral-regs-only 317Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save 318Generate code which uses the core registers only (r0-r14). 319 320mfdpic 321Target Report Mask(FDPIC) 322Enable Function Descriptor PIC mode. 323