1 /* Common hooks for ARM.
2 Copyright (C) 1991-2020 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published
8 by the Free Software Foundation; either version 3, or (at your
9 option) any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #define INCLUDE_LIST
21 #define INCLUDE_VECTOR
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "memmodel.h"
27 #include "tm_p.h"
28 #include "common/common-target.h"
29 #include "common/common-target-def.h"
30 #include "opts.h"
31 #include "flags.h"
32 #include "sbitmap.h"
33 #include "diagnostic.h"
34 #include <algorithm>
35
36 /* Set default optimization options. */
37 static const struct default_options arm_option_optimization_table[] =
38 {
39 /* Enable section anchors by default at -O1 or higher. */
40 { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
41 { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
42 { OPT_LEVELS_NONE, 0, NULL, 0 }
43 };
44
45 /* Implement TARGET_EXCEPT_UNWIND_INFO. */
46
47 enum unwind_info_type
arm_except_unwind_info(struct gcc_options * opts)48 arm_except_unwind_info (struct gcc_options *opts)
49 {
50 /* Honor the --enable-sjlj-exceptions configure switch. */
51 #ifdef CONFIG_SJLJ_EXCEPTIONS
52 if (CONFIG_SJLJ_EXCEPTIONS)
53 return UI_SJLJ;
54 #endif
55
56 /* If not using ARM EABI unwind tables... */
57 if (ARM_UNWIND_INFO)
58 {
59 /* For simplicity elsewhere in this file, indicate that all unwind
60 info is disabled if we're not emitting unwind tables. */
61 if (!opts->x_flag_exceptions && !opts->x_flag_unwind_tables)
62 return UI_NONE;
63 else
64 return UI_TARGET;
65 }
66
67 /* ... honor target configurations requesting DWARF2 EH... */
68 #ifdef DWARF2_UNWIND_INFO
69 if (DWARF2_UNWIND_INFO)
70 return UI_DWARF2;
71 #endif
72
73 /* ... or fallback to sjlj exceptions for backwards compatibility. */
74 return UI_SJLJ;
75 }
76
77 #define ARM_CPU_NAME_LENGTH 20
78
79 /* Truncate NAME at the first '.' or '+' character seen, or return
80 NAME unmodified. */
81
82 const char *
arm_rewrite_selected_cpu(const char * name)83 arm_rewrite_selected_cpu (const char *name)
84 {
85 static char output_buf[ARM_CPU_NAME_LENGTH + 1] = {0};
86 char *arg_pos;
87
88 strncpy (output_buf, name, ARM_CPU_NAME_LENGTH);
89 output_buf[ARM_CPU_NAME_LENGTH] = 0;
90
91 arg_pos = strchr (output_buf, '.');
92
93 /* If we found a '.' truncate the entry at that point. */
94 if (arg_pos)
95 *arg_pos = '\0';
96
97 arg_pos = strchr (output_buf, '+');
98
99 /* If we found a '+' truncate the entry at that point. */
100 if (arg_pos)
101 *arg_pos = '\0';
102
103 return output_buf;
104 }
105
106 /* Called by the driver to rewrite a name passed to the -mcpu
107 argument in preparation to be passed to the assembler. The
108 names passed from the command line will be in ARGV, we want
109 to use the right-most argument, which should be in
110 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
111
112 const char *
arm_rewrite_mcpu(int argc,const char ** argv)113 arm_rewrite_mcpu (int argc, const char **argv)
114 {
115 gcc_assert (argc);
116 return arm_rewrite_selected_cpu (argv[argc - 1]);
117 }
118
119 /* Comparator for arm_rewrite_selected_arch. Compare the two arch extension
120 strings FIRST and SECOND and return TRUE if FIRST is less than SECOND
121 alphabetically. */
122
123 static bool
compare_opt_names(const char * first,const char * second)124 compare_opt_names (const char *first, const char *second)
125 {
126 return strcmp (first, second) <= 0;
127 }
128
129 /* Rewrite the architecture string for passing to the assembler.
130 Although the syntax is similar we cannot assume that it supports
131 the newer FP related options. So strip any option that only
132 defines features in the standard -mfpu options out. We'll generate
133 a suitable -mfpu option elsewhere to carry that information. NAME
134 should already have been canonicalized, so we do not expect to
135 encounter +no.. options that remove features. A final problem is
136 that the assembler expects the feature extensions to be listed
137 alphabetically, so we build a list of required options and then
138 sort them into canonical order in the resulting string. */
139 const char *
arm_rewrite_selected_arch(const char * name)140 arm_rewrite_selected_arch (const char *name)
141 {
142 /* The result we return needs to be semi persistent, so handle being
143 re-invoked. */
144 static char *asm_arch = NULL;
145
146 if (asm_arch)
147 {
148 free (asm_arch);
149 asm_arch = NULL;
150 }
151
152 const char *arg_pos = strchr (name, '+');
153
154 /* No extension options? just return the original string. */
155 if (arg_pos == NULL)
156 return name;
157
158 const arch_option *arch_opt
159 = arm_parse_arch_option_name (all_architectures, "-march", name);
160
161 auto_sbitmap fpu_bits (isa_num_bits);
162 static const enum isa_feature fpu_bitlist[]
163 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
164
165 arm_initialize_isa (fpu_bits, fpu_bitlist);
166
167 auto_sbitmap opt_bits (isa_num_bits);
168
169 /* Ensure that the resulting string is large enough for the result. We
170 never add options, so using strdup here will ensure that. */
171 asm_arch = xstrdup (name);
172 asm_arch[arg_pos - name] = '\0';
173
174 std::vector<const char *>optlist;
175
176 while (arg_pos)
177 {
178 const char *end = strchr (arg_pos + 1, '+');
179 size_t len = end ? end - arg_pos : strlen (arg_pos);
180
181 for (const cpu_arch_extension *entry = arch_opt->common.extensions;
182 entry->name != NULL;
183 entry++)
184 {
185 if (strncmp (entry->name, arg_pos + 1, len - 1) == 0
186 && entry->name[len - 1] == '\0')
187 {
188 /* Don't expect removal options. */
189 gcc_assert (!entry->remove);
190 arm_initialize_isa (opt_bits, entry->isa_bits);
191 if (!bitmap_subset_p (opt_bits, fpu_bits))
192 optlist.push_back (entry->name);
193 bitmap_clear (opt_bits);
194 break;
195 }
196 }
197
198 arg_pos = end;
199 }
200
201 std::sort (optlist.begin (), optlist.end (), compare_opt_names);
202
203 for (std::vector<const char *>::iterator opt_iter = optlist.begin ();
204 opt_iter != optlist.end ();
205 ++opt_iter)
206 {
207 strcat (asm_arch, "+");
208 strcat (asm_arch, (*opt_iter));
209 }
210
211 return asm_arch;
212 }
213
214 /* Called by the driver to rewrite a name passed to the -march
215 argument in preparation to be passed to the assembler. The
216 names passed from the command line will be in ARGV, we want
217 to use the right-most argument, which should be in
218 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
219
220 const char *
arm_rewrite_march(int argc,const char ** argv)221 arm_rewrite_march (int argc, const char **argv)
222 {
223 gcc_assert (argc);
224 return arm_rewrite_selected_arch (argv[argc - 1]);
225 }
226
227 #include "arm-cpu-cdata.h"
228
229 /* Scan over a raw feature array BITS checking for BIT being present.
230 This is slower than the normal bitmask checks, but we would spend longer
231 initializing that than doing the check this way. Returns true iff
232 BIT is found. */
233 static bool
check_isa_bits_for(const enum isa_feature * bits,enum isa_feature bit)234 check_isa_bits_for (const enum isa_feature* bits, enum isa_feature bit)
235 {
236 while (*bits != isa_nobit)
237 if (*bits++ == bit)
238 return true;
239
240 return false;
241 }
242
243 /* Called by the driver to check whether the target denoted by current
244 command line options is a Thumb-only target. ARGV is an array of
245 tupples (normally only one) where the first element of the tupple
246 is 'cpu' or 'arch' and the second is the option passed to the
247 compiler for that. An architecture tupple is always taken in
248 preference to a cpu tupple and the last of each type always
249 overrides any earlier setting. */
250
251 const char *
arm_target_thumb_only(int argc,const char ** argv)252 arm_target_thumb_only (int argc, const char **argv)
253 {
254 const char *arch = NULL;
255 const char *cpu = NULL;
256
257 if (argc % 2 != 0)
258 fatal_error (input_location,
259 "%%:target_mode_check takes an even number of parameters");
260
261 while (argc)
262 {
263 if (strcmp (argv[0], "arch") == 0)
264 arch = argv[1];
265 else if (strcmp (argv[0], "cpu") == 0)
266 cpu = argv[1];
267 else
268 fatal_error (input_location,
269 "unrecognized option passed to %%:target_mode_check");
270 argc -= 2;
271 argv += 2;
272 }
273
274 /* No architecture, or CPU, has option extensions that change
275 whether or not we have a Thumb-only device, so there is no need
276 to scan any option extensions specified. */
277
278 /* If the architecture is specified, that overrides any CPU setting. */
279 if (arch)
280 {
281 const arch_option *arch_opt
282 = arm_parse_arch_option_name (all_architectures, "-march", arch,
283 false);
284
285 if (arch_opt && !check_isa_bits_for (arch_opt->common.isa_bits,
286 isa_bit_notm))
287 return "-mthumb";
288 }
289 else if (cpu)
290 {
291 const cpu_option *cpu_opt
292 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu, false);
293
294 if (cpu_opt && !check_isa_bits_for (cpu_opt->common.isa_bits,
295 isa_bit_notm))
296 return "-mthumb";
297 }
298
299 /* Compiler hasn't been configured with a default, and the CPU
300 doesn't require Thumb, so default to ARM. */
301 return "-marm";
302 }
303
304 /* List the permitted CPU option names. If TARGET is a near miss for an
305 entry, print out the suggested alternative. */
306 static void
arm_print_hint_for_cpu_option(const char * target,const cpu_option * list)307 arm_print_hint_for_cpu_option (const char *target,
308 const cpu_option *list)
309 {
310 auto_vec<const char*> candidates;
311 for (; list->common.name != NULL; list++)
312 {
313 candidates.safe_push (list->common.name);
314 if (list->aliases)
315 {
316 for (const cpu_alias *alias = list->aliases; alias->name != NULL;
317 alias++)
318 if (alias->visible)
319 candidates.safe_push (alias->name);
320 }
321 }
322
323 #ifdef HAVE_LOCAL_CPU_DETECT
324 /* Add also "native" as possible value. */
325 candidates.safe_push ("native");
326 #endif
327
328 char *s;
329 const char *hint = candidates_list_and_hint (target, s, candidates);
330 if (hint)
331 inform (input_location, "valid arguments are: %s; did you mean %qs?",
332 s, hint);
333 else
334 inform (input_location, "valid arguments are: %s", s);
335
336 XDELETEVEC (s);
337 }
338
339 /* Parse the base component of a CPU selection in LIST. Return a
340 pointer to the entry in the architecture table. OPTNAME is the
341 name of the option we are parsing and can be used if a diagnostic
342 is needed. If COMPLAIN is true (the default) emit error
343 messages and hints on invalid input. */
344 const cpu_option *
arm_parse_cpu_option_name(const cpu_option * list,const char * optname,const char * target,bool complain)345 arm_parse_cpu_option_name (const cpu_option *list, const char *optname,
346 const char *target, bool complain)
347 {
348 const cpu_option *entry;
349 const char *end = strchr (target, '+');
350 size_t len = end ? end - target : strlen (target);
351
352 for (entry = list; entry->common.name != NULL; entry++)
353 {
354 if (strncmp (entry->common.name, target, len) == 0
355 && entry->common.name[len] == '\0')
356 return entry;
357
358 /* Match against any legal alias for this CPU candidate. */
359 if (entry->aliases)
360 {
361 for (const cpu_alias *alias = entry->aliases; alias->name != NULL;
362 alias++)
363 if (strncmp (alias->name, target, len) == 0
364 && alias->name[len] == '\0')
365 return entry;
366 }
367 }
368
369 if (complain)
370 {
371 error_at (input_location, "unrecognized %s target: %s", optname, target);
372 arm_print_hint_for_cpu_option (target, list);
373 }
374 return NULL;
375 }
376
377 /* List the permitted architecture option names. If TARGET is a near
378 miss for an entry, print out the suggested alternative. */
379 static void
arm_print_hint_for_arch_option(const char * target,const arch_option * list)380 arm_print_hint_for_arch_option (const char *target,
381 const arch_option *list)
382 {
383 auto_vec<const char*> candidates;
384 for (; list->common.name != NULL; list++)
385 candidates.safe_push (list->common.name);
386
387 #ifdef HAVE_LOCAL_CPU_DETECT
388 /* Add also "native" as possible value. */
389 candidates.safe_push ("native");
390 #endif
391
392 char *s;
393 const char *hint = candidates_list_and_hint (target, s, candidates);
394 if (hint)
395 inform (input_location, "valid arguments are: %s; did you mean %qs?",
396 s, hint);
397 else
398 inform (input_location, "valid arguments are: %s", s);
399
400 XDELETEVEC (s);
401 }
402
403 /* Parse the base component of a CPU or architecture selection in
404 LIST. Return a pointer to the entry in the architecture table.
405 OPTNAME is the name of the option we are parsing and can be used if
406 a diagnostic is needed. If COMPLAIN is true (the default) emit error
407 messages and hints on invalid input. */
408 const arch_option *
arm_parse_arch_option_name(const arch_option * list,const char * optname,const char * target,bool complain)409 arm_parse_arch_option_name (const arch_option *list, const char *optname,
410 const char *target, bool complain)
411 {
412 const arch_option *entry;
413 const char *end = strchr (target, '+');
414 size_t len = end ? end - target : strlen (target);
415
416 for (entry = list; entry->common.name != NULL; entry++)
417 {
418 if (strncmp (entry->common.name, target, len) == 0
419 && entry->common.name[len] == '\0')
420 return entry;
421 }
422
423 if (complain)
424 {
425 error_at (input_location, "unrecognized %s target: %s", optname, target);
426 arm_print_hint_for_arch_option (target, list);
427 }
428 return NULL;
429 }
430
431 /* List the permitted architecture option names. If TARGET is a near
432 miss for an entry, print out the suggested alternative. */
433 static void
arm_print_hint_for_fpu_option(const char * target)434 arm_print_hint_for_fpu_option (const char *target)
435 {
436 auto_vec<const char*> candidates;
437 for (int i = 0; i < TARGET_FPU_auto; i++)
438 candidates.safe_push (all_fpus[i].name);
439 char *s;
440 const char *hint = candidates_list_and_hint (target, s, candidates);
441 if (hint)
442 inform (input_location, "valid arguments are: %s; did you mean %qs?",
443 s, hint);
444 else
445 inform (input_location, "valid arguments are: %s", s);
446
447 XDELETEVEC (s);
448 }
449
450 static const arm_fpu_desc *
arm_parse_fpu_option(const char * opt)451 arm_parse_fpu_option (const char *opt)
452 {
453 int i;
454
455 for (i = 0; i < TARGET_FPU_auto; i++)
456 {
457 if (strcmp (all_fpus[i].name, opt) == 0)
458 return all_fpus + i;
459 }
460
461 error_at (input_location, "unrecognized %<-mfpu%> target: %s", opt);
462 arm_print_hint_for_fpu_option (opt);
463 return NULL;
464 }
465
466 /* Convert a static initializer array of feature bits to sbitmap
467 representation. */
468 void
arm_initialize_isa(sbitmap isa,const enum isa_feature * isa_bits)469 arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits)
470 {
471 bitmap_clear (isa);
472 while (*isa_bits != isa_nobit)
473 bitmap_set_bit (isa, *(isa_bits++));
474 }
475
476 /* OPT isn't a recognized feature. Print a suitable error message and
477 suggest a possible value. Always print the list of permitted
478 values. */
479 static void
arm_unrecognized_feature(const char * opt,size_t len,const cpu_arch_option * target)480 arm_unrecognized_feature (const char *opt, size_t len,
481 const cpu_arch_option *target)
482 {
483 char *this_opt = XALLOCAVEC (char, len+1);
484 auto_vec<const char*> candidates;
485
486 strncpy (this_opt, opt, len);
487 this_opt[len] = 0;
488
489 error_at (input_location, "%qs does not support feature %qs", target->name,
490 this_opt);
491 for (const cpu_arch_extension *list = target->extensions;
492 list->name != NULL;
493 list++)
494 candidates.safe_push (list->name);
495
496 char *s;
497 const char *hint = candidates_list_and_hint (this_opt, s, candidates);
498
499 if (hint)
500 inform (input_location, "valid feature names are: %s; did you mean %qs?",
501 s, hint);
502 else
503 inform (input_location, "valid feature names are: %s", s);
504
505 XDELETEVEC (s);
506 }
507
508 /* Parse any feature extensions to add to (or remove from) the
509 permitted ISA selection. */
510 void
arm_parse_option_features(sbitmap isa,const cpu_arch_option * target,const char * opts_in)511 arm_parse_option_features (sbitmap isa, const cpu_arch_option *target,
512 const char *opts_in)
513 {
514 const char *opts = opts_in;
515
516 if (!opts)
517 return;
518
519 if (!target->extensions)
520 {
521 error_at (input_location, "%s does not take any feature options",
522 target->name);
523 return;
524 }
525
526 while (opts)
527 {
528 gcc_assert (*opts == '+');
529 const struct cpu_arch_extension *entry;
530 const char *end = strchr (++opts, '+');
531 size_t len = end ? end - opts : strlen (opts);
532 bool matched = false;
533
534 for (entry = target->extensions;
535 !matched && entry->name != NULL;
536 entry++)
537 {
538 if (strncmp (entry->name, opts, len) == 0
539 && entry->name[len] == '\0')
540 {
541 if (isa)
542 {
543 const enum isa_feature *f = entry->isa_bits;
544 if (entry->remove)
545 {
546 while (*f != isa_nobit)
547 bitmap_clear_bit (isa, *(f++));
548 }
549 else
550 {
551 while (*f != isa_nobit)
552 bitmap_set_bit (isa, *(f++));
553 }
554 }
555 matched = true;
556 }
557 }
558
559 if (!matched)
560 arm_unrecognized_feature (opts, len, target);
561
562 opts = end;
563 }
564 }
565
566 class candidate_extension
567 {
568 public:
569 const cpu_arch_extension *extension;
570 sbitmap isa_bits;
571 bool required;
572
candidate_extension(const cpu_arch_extension * ext,sbitmap bits)573 candidate_extension (const cpu_arch_extension *ext, sbitmap bits)
574 : extension (ext), isa_bits (bits), required (true)
575 {}
~candidate_extension()576 ~candidate_extension ()
577 {
578 sbitmap_free (isa_bits);
579 }
580 };
581
582 /* Generate a canonical representation of the -march option from the
583 current -march string (if given) and other options on the command
584 line that might affect the architecture. This aids multilib selection
585 by ensuring that:
586 a) the option is always present
587 b) only the minimal set of options are used
588 c) when there are multiple extensions, they are in a consistent order.
589
590 The options array consists of couplets of information where the
591 first item in each couplet is the string describing which option
592 name was selected (arch, cpu, fpu) and the second is the value
593 passed for that option. */
594 const char *
arm_canon_arch_option(int argc,const char ** argv)595 arm_canon_arch_option (int argc, const char **argv)
596 {
597 const char *arch = NULL;
598 const char *cpu = NULL;
599 const char *fpu = NULL;
600 const char *abi = NULL;
601 static char *canonical_arch = NULL;
602
603 /* Just in case we're called more than once. */
604 if (canonical_arch)
605 {
606 free (canonical_arch);
607 canonical_arch = NULL;
608 }
609
610 if (argc & 1)
611 fatal_error (input_location,
612 "%%:canon_for_mlib takes 1 or more pairs of parameters");
613
614 while (argc)
615 {
616 if (strcmp (argv[0], "arch") == 0)
617 arch = argv[1];
618 else if (strcmp (argv[0], "cpu") == 0)
619 cpu = argv[1];
620 else if (strcmp (argv[0], "fpu") == 0)
621 fpu = argv[1];
622 else if (strcmp (argv[0], "abi") == 0)
623 abi = argv[1];
624 else
625 fatal_error (input_location,
626 "unrecognized operand to %%:canon_for_mlib");
627
628 argc -= 2;
629 argv += 2;
630 }
631
632 auto_sbitmap target_isa (isa_num_bits);
633 auto_sbitmap base_isa (isa_num_bits);
634 auto_sbitmap fpu_isa (isa_num_bits);
635
636 bitmap_clear (fpu_isa);
637
638 const arch_option *selected_arch = NULL;
639
640 /* At least one of these must be defined by either the specs or the
641 user. */
642 gcc_assert (cpu || arch);
643
644 if (!fpu)
645 fpu = FPUTYPE_AUTO;
646
647 if (!abi)
648 {
649 if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFT)
650 abi = "soft";
651 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFTFP)
652 abi = "softfp";
653 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_HARD)
654 abi = "hard";
655 }
656
657 /* First build up a bitmap describing the target architecture. */
658 if (arch)
659 {
660 selected_arch = arm_parse_arch_option_name (all_architectures,
661 "-march", arch);
662
663 if (selected_arch == NULL)
664 return "";
665
666 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
667 arm_parse_option_features (target_isa, &selected_arch->common,
668 strchr (arch, '+'));
669 if (fpu && strcmp (fpu, "auto") != 0)
670 {
671 /* We assume that architectures do not have any FPU bits
672 enabled by default. If they did, we would need to strip
673 these out first. */
674 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
675 if (target_fpu == NULL)
676 return "";
677
678 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
679 bitmap_ior (target_isa, target_isa, fpu_isa);
680 }
681 }
682 else if (cpu)
683 {
684 const cpu_option *selected_cpu
685 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu);
686
687 if (selected_cpu == NULL)
688 return "";
689
690 arm_initialize_isa (target_isa, selected_cpu->common.isa_bits);
691 arm_parse_option_features (target_isa, &selected_cpu->common,
692 strchr (cpu, '+'));
693 if (fpu && strcmp (fpu, "auto") != 0)
694 {
695 /* The easiest and safest way to remove the default fpu
696 capabilities is to look for a '+no..' option that removes
697 the base FPU bit (isa_bit_vfpv2). If that doesn't exist
698 then the best we can do is strip out all the bits that
699 might be part of the most capable FPU we know about,
700 which is "crypto-neon-fp-armv8". */
701 bool default_fpu_found = false;
702 if (selected_cpu->common.extensions)
703 {
704 const cpu_arch_extension *ext;
705 for (ext = selected_cpu->common.extensions; ext->name != NULL;
706 ++ext)
707 {
708 if (ext->remove
709 && check_isa_bits_for (ext->isa_bits, isa_bit_vfpv2))
710 {
711 arm_initialize_isa (fpu_isa, ext->isa_bits);
712 bitmap_and_compl (target_isa, target_isa, fpu_isa);
713 default_fpu_found = true;
714 }
715 }
716
717 }
718
719 if (!default_fpu_found)
720 {
721 arm_initialize_isa
722 (fpu_isa,
723 all_fpus[TARGET_FPU_crypto_neon_fp_armv8].isa_bits);
724 bitmap_and_compl (target_isa, target_isa, fpu_isa);
725 }
726
727 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
728 if (target_fpu == NULL)
729 return "";
730
731 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
732 bitmap_ior (target_isa, target_isa, fpu_isa);
733 }
734
735 selected_arch = all_architectures + selected_cpu->arch;
736 }
737
738 /* If we have a soft-float ABI, disable the FPU. */
739 if (abi && strcmp (abi, "soft") == 0)
740 {
741 /* Clearing the VFPv2 bit is sufficient to stop any extention that
742 builds on the FPU from matching. */
743 bitmap_clear_bit (target_isa, isa_bit_vfpv2);
744 }
745
746 /* If we don't have a selected architecture by now, something's
747 badly wrong. */
748 gcc_assert (selected_arch);
749
750 arm_initialize_isa (base_isa, selected_arch->common.isa_bits);
751
752 /* Architecture has no extension options, so just return the canonical
753 architecture name. */
754 if (selected_arch->common.extensions == NULL)
755 return selected_arch->common.name;
756
757 /* We're only interested in extension bits. */
758 bitmap_and_compl (target_isa, target_isa, base_isa);
759
760 /* There are no extensions needed. Just return the canonical architecture
761 name. */
762 if (bitmap_empty_p (target_isa))
763 return selected_arch->common.name;
764
765 /* What is left is the architecture that the compiler will target. We
766 now need to map that back into a suitable option+features list.
767
768 The list is built in two passes. First we scan every additive
769 option feature supported by the architecture. If the option
770 provides a subset of the features we need we add it to the list
771 of candidates. We then scan backwards over the list of
772 candidates and if we find a feature that adds nothing to one that
773 was later in the list we mark it as redundant. The result is a
774 minimal list of required features for the target
775 architecture. */
776
777 std::list<candidate_extension *> extensions;
778
779 auto_sbitmap target_isa_unsatisfied (isa_num_bits);
780 bitmap_copy (target_isa_unsatisfied, target_isa);
781
782 sbitmap isa_bits = NULL;
783 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
784 cand->name != NULL;
785 cand++)
786 {
787 if (cand->remove || cand->alias)
788 continue;
789
790 if (isa_bits == NULL)
791 isa_bits = sbitmap_alloc (isa_num_bits);
792
793 arm_initialize_isa (isa_bits, cand->isa_bits);
794 if (bitmap_subset_p (isa_bits, target_isa))
795 {
796 extensions.push_back (new candidate_extension (cand, isa_bits));
797 bitmap_and_compl (target_isa_unsatisfied, target_isa_unsatisfied,
798 isa_bits);
799 isa_bits = NULL;
800 }
801 }
802
803 /* There's one extra case to consider, which is that the user has
804 specified an FPU that is less capable than this architecture
805 supports. In that case the code above will fail to find a
806 suitable feature. We handle this by scanning the list of options
807 again, matching the first option that provides an FPU that is
808 more capable than the selected FPU.
809
810 Note that the other case (user specified a more capable FPU than
811 this architecture supports) should end up selecting the most
812 capable FPU variant that we do support. This is sufficient for
813 multilib selection. */
814
815 if (bitmap_bit_p (target_isa_unsatisfied, isa_bit_vfpv2)
816 && bitmap_bit_p (fpu_isa, isa_bit_vfpv2))
817 {
818 std::list<candidate_extension *>::iterator ipoint = extensions.begin ();
819
820 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
821 cand->name != NULL;
822 cand++)
823 {
824 if (cand->remove || cand->alias)
825 continue;
826
827 if (isa_bits == NULL)
828 isa_bits = sbitmap_alloc (isa_num_bits);
829
830 /* We need to keep the features in canonical order, so move the
831 insertion point if this feature is a candidate. */
832 if (ipoint != extensions.end ()
833 && (*ipoint)->extension == cand)
834 ++ipoint;
835
836 arm_initialize_isa (isa_bits, cand->isa_bits);
837 if (bitmap_subset_p (fpu_isa, isa_bits))
838 {
839 extensions.insert (ipoint,
840 new candidate_extension (cand, isa_bits));
841 isa_bits = NULL;
842 break;
843 }
844 }
845 }
846
847 if (isa_bits)
848 sbitmap_free (isa_bits);
849
850 bitmap_clear (target_isa);
851 size_t len = 1;
852 for (std::list<candidate_extension *>::reverse_iterator riter
853 = extensions.rbegin ();
854 riter != extensions.rend (); ++riter)
855 {
856 if (bitmap_subset_p ((*riter)->isa_bits, target_isa))
857 (*riter)->required = false;
858 else
859 {
860 bitmap_ior (target_isa, target_isa, (*riter)->isa_bits);
861 len += strlen ((*riter)->extension->name) + 1;
862 }
863 }
864
865 canonical_arch
866 = (char *) xmalloc (len + strlen (selected_arch->common.name));
867
868 strcpy (canonical_arch, selected_arch->common.name);
869
870 for (std::list<candidate_extension *>::iterator iter = extensions.begin ();
871 iter != extensions.end (); ++iter)
872 {
873 if ((*iter)->required)
874 {
875 strcat (canonical_arch, "+");
876 strcat (canonical_arch, (*iter)->extension->name);
877 }
878 delete (*iter);
879 }
880
881 return canonical_arch;
882 }
883
884 /* If building big-endian on a BE8 target generate a --be8 option for
885 the linker. Takes four types of option: "little" - little-endian;
886 "big" - big-endian; "be8" - force be8 iff big-endian; and "arch"
887 "<arch-name>" (two arguments) - the target architecture. The
888 parameter names are generated by the driver from the command-line
889 options. */
890 const char *
arm_be8_option(int argc,const char ** argv)891 arm_be8_option (int argc, const char **argv)
892 {
893 int endian = TARGET_ENDIAN_DEFAULT;
894 const char *arch = NULL;
895 int arg;
896 bool force = false;
897
898 for (arg = 0; arg < argc; arg++)
899 {
900 if (strcmp (argv[arg], "little") == 0)
901 endian = 0;
902 else if (strcmp (argv[arg], "big") == 0)
903 endian = 1;
904 else if (strcmp (argv[arg], "be8") == 0)
905 force = true;
906 else if (strcmp (argv[arg], "arch") == 0)
907 {
908 arg++;
909 gcc_assert (arg < argc);
910 arch = argv[arg];
911 }
912 else
913 gcc_unreachable ();
914 }
915
916 /* Little endian - no be8 option. */
917 if (!endian)
918 return "";
919
920 if (force)
921 return "--be8";
922
923 /* Arch might not be set iff arm_canon_arch (above) detected an
924 error. Do nothing in that case. */
925 if (!arch)
926 return "";
927
928 const arch_option *selected_arch
929 = arm_parse_arch_option_name (all_architectures, "-march", arch);
930
931 /* Similarly if the given arch option was itself invalid. */
932 if (!selected_arch)
933 return "";
934
935 if (check_isa_bits_for (selected_arch->common.isa_bits, isa_bit_be8))
936 return "--be8";
937
938 return "";
939 }
940
941 /* Generate a -mfpu= option for passing to the assembler. This is
942 only called when -mfpu was set (possibly defaulted) to auto and is
943 needed to ensure that the assembler knows the correct FPU to use.
944 It wouldn't really be needed except that the compiler can be used
945 to invoke the assembler directly on hand-written files that lack
946 the necessary internal .fpu directives. We assume that the architecture
947 canonicalization calls have already been made so that we have a final
948 -march= option to derive the fpu from. */
949 const char*
arm_asm_auto_mfpu(int argc,const char ** argv)950 arm_asm_auto_mfpu (int argc, const char **argv)
951 {
952 static char *auto_fpu = NULL;
953 const char *arch = NULL;
954 static const enum isa_feature fpu_bitlist[]
955 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
956 const arch_option *selected_arch;
957 static const char* fpuname = "softvfp";
958
959 /* Handle multiple calls to this routine. */
960 if (auto_fpu)
961 {
962 free (auto_fpu);
963 auto_fpu = NULL;
964 }
965
966 while (argc)
967 {
968 if (strcmp (argv[0], "arch") == 0)
969 arch = argv[1];
970 else
971 fatal_error (input_location,
972 "unrecognized operand to %%:asm_auto_mfpu");
973 argc -= 2;
974 argv += 2;
975 }
976
977 auto_sbitmap target_isa (isa_num_bits);
978 auto_sbitmap fpubits (isa_num_bits);
979
980 gcc_assert (arch != NULL);
981 selected_arch = arm_parse_arch_option_name (all_architectures,
982 "-march", arch);
983 if (selected_arch == NULL)
984 return "";
985
986 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
987 arm_parse_option_features (target_isa, &selected_arch->common,
988 strchr (arch, '+'));
989 arm_initialize_isa (fpubits, fpu_bitlist);
990
991 bitmap_and (fpubits, fpubits, target_isa);
992
993 /* The logic below is essentially identical to that in
994 arm.c:arm_identify_fpu_from_isa(), but that only works in the main
995 part of the compiler. */
996
997 /* If there are no FPU capability bits, we just pass -mfpu=softvfp. */
998 if (!bitmap_empty_p (fpubits))
999 {
1000 unsigned int i;
1001 auto_sbitmap cand_fpubits (isa_num_bits);
1002 for (i = 0; i < TARGET_FPU_auto; i++)
1003 {
1004 arm_initialize_isa (cand_fpubits, all_fpus[i].isa_bits);
1005 if (bitmap_equal_p (fpubits, cand_fpubits))
1006 {
1007 fpuname = all_fpus[i].name;
1008 break;
1009 }
1010 }
1011
1012 gcc_assert (i != TARGET_FPU_auto
1013 || bitmap_bit_p (target_isa, isa_bit_vfp_base));
1014 }
1015
1016 auto_fpu = (char *) xmalloc (strlen (fpuname) + sizeof ("-mfpu="));
1017 strcpy (auto_fpu, "-mfpu=");
1018 strcat (auto_fpu, fpuname);
1019 return auto_fpu;
1020 }
1021
1022 #undef ARM_CPU_NAME_LENGTH
1023
1024
1025 #undef TARGET_DEFAULT_TARGET_FLAGS
1026 #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG)
1027
1028 #undef TARGET_OPTION_OPTIMIZATION_TABLE
1029 #define TARGET_OPTION_OPTIMIZATION_TABLE arm_option_optimization_table
1030
1031 #undef TARGET_EXCEPT_UNWIND_INFO
1032 #define TARGET_EXCEPT_UNWIND_INFO arm_except_unwind_info
1033
1034 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
1035