1 /* { dg-options "-O -msve-vector-bits=256" } */
2 /* { dg-final { check-function-bodies "**" "" } } */
3
4 #include "struct.h"
5
6 #define CONSUME(VAR) \
7 { \
8 register void *ptr_ asm ("x7") = &(VAR); \
9 asm volatile ("" :: "r" (ptr_) : "memory"); \
10 }
11
12 #define SEL2(TAG, TYPE) \
13 TAG TYPE \
14 sel2_##TYPE (TAG TYPE x, TAG TYPE y) \
15 { \
16 return y; \
17 }
18
19 #define WRAP(TYPE) \
20 struct wrap_##TYPE \
21 { \
22 TYPE data; \
23 }; \
24 SEL2 (struct, wrap_##TYPE)
25
26 /*
27 ** sel2_wrap_fixed_int8_t:
28 ** mov z0\.d, z1\.d
29 ** ret
30 */
31 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_int8_t\n} } } */
32 WRAP (fixed_int8_t);
33
34 /*
35 ** sel2_wrap_fixed_int16_t:
36 ** mov z0\.d, z1\.d
37 ** ret
38 */
39 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_int16_t\n} } } */
40 WRAP (fixed_int16_t);
41
42 /*
43 ** sel2_wrap_fixed_int32_t:
44 ** mov z0\.d, z1\.d
45 ** ret
46 */
47 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_int32_t\n} } } */
48 WRAP (fixed_int32_t);
49
50 /*
51 ** sel2_wrap_fixed_int64_t:
52 ** mov z0\.d, z1\.d
53 ** ret
54 */
55 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_int64_t\n} } } */
56 WRAP (fixed_int64_t);
57
58 /*
59 ** sel2_wrap_fixed_uint8_t:
60 ** mov z0\.d, z1\.d
61 ** ret
62 */
63 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_uint8_t\n} } } */
64 WRAP (fixed_uint8_t);
65
66 /*
67 ** sel2_wrap_fixed_uint16_t:
68 ** mov z0\.d, z1\.d
69 ** ret
70 */
71 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_uint16_t\n} } } */
72 WRAP (fixed_uint16_t);
73
74 /*
75 ** sel2_wrap_fixed_uint32_t:
76 ** mov z0\.d, z1\.d
77 ** ret
78 */
79 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_uint32_t\n} } } */
80 WRAP (fixed_uint32_t);
81
82 /*
83 ** sel2_wrap_fixed_uint64_t:
84 ** mov z0\.d, z1\.d
85 ** ret
86 */
87 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_uint64_t\n} } } */
88 WRAP (fixed_uint64_t);
89
90 /*
91 ** sel2_wrap_fixed_bfloat16_t:
92 ** mov z0\.d, z1\.d
93 ** ret
94 */
95 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_bfloat16_t\n} } } */
96 WRAP (fixed_bfloat16_t);
97
98 /*
99 ** sel2_wrap_fixed_float16_t:
100 ** mov z0\.d, z1\.d
101 ** ret
102 */
103 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_float16_t\n} } } */
104 WRAP (fixed_float16_t);
105
106 /*
107 ** sel2_wrap_fixed_float32_t:
108 ** mov z0\.d, z1\.d
109 ** ret
110 */
111 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_float32_t\n} } } */
112 WRAP (fixed_float32_t);
113
114 /*
115 ** sel2_wrap_fixed_float64_t:
116 ** mov z0\.d, z1\.d
117 ** ret
118 */
119 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_float64_t\n} } } */
120 WRAP (fixed_float64_t);
121
122 /*
123 ** sel2_wrap_fixed_bool_t:
124 ** mov p0\.b, p1\.b
125 ** ret
126 */
127 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_wrap_fixed_bool_t\n} } } */
128 WRAP (fixed_bool_t);
129
130 struct pst_arr1
131 {
132 fixed_uint8_t u8[1];
133 };
134
135 /*
136 ** sel2_pst_arr1:
137 ** mov z0\.d, z1\.d
138 ** ret
139 */
140 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr1\n} } } */
SEL2(struct,pst_arr1)141 SEL2 (struct, pst_arr1)
142
143 /*
144 ** test_pst_arr1:
145 ** eor z0\.b, z0\.b, #(?:0x)?1
146 ** ret
147 */
148 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr1\n} } } */
149 svuint8_t
150 test_pst_arr1 (struct pst_arr1 x)
151 {
152 return sveor_x (svptrue_b8 (), x.u8[0], 1);
153 }
154
155 struct pst_arr2
156 {
157 fixed_uint8_t u8[2];
158 };
159 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr2\n} } } */
SEL2(struct,pst_arr2)160 SEL2 (struct, pst_arr2)
161
162 /*
163 ** test_pst_arr2:
164 ** sub z0\.b, z0\.b, z1\.b
165 ** ret
166 */
167 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr2\n} } } */
168 svuint8_t
169 test_pst_arr2 (struct pst_arr2 x)
170 {
171 return svsub_x (svptrue_b8 (), x.u8[0], x.u8[1]);
172 }
173
174 struct pst_arr3
175 {
176 fixed_uint16_t u16[3];
177 };
178 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr3\n} } } */
SEL2(struct,pst_arr3)179 SEL2 (struct, pst_arr3)
180
181 /*
182 ** test_pst_arr3:
183 ** sub z0\.h, z0\.h, z2\.h
184 ** ret
185 */
186 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr3\n} } } */
187 svuint16_t
188 test_pst_arr3 (struct pst_arr3 x)
189 {
190 return svsub_x (svptrue_b8 (), x.u16[0], x.u16[2]);
191 }
192
193 struct pst_arr4
194 {
195 fixed_uint32_t u32[4];
196 };
197 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr4\n} } } */
SEL2(struct,pst_arr4)198 SEL2 (struct, pst_arr4)
199
200 /*
201 ** test_pst_arr4:
202 ** sub z0\.s, z0\.s, z3\.s
203 ** ret
204 */
205 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr4\n} } } */
206 svuint32_t
207 test_pst_arr4 (struct pst_arr4 x)
208 {
209 return svsub_x (svptrue_b8 (), x.u32[0], x.u32[3]);
210 }
211
212 struct pst_arr5
213 {
214 fixed_uint64_t u64[2][2][2];
215 };
216 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr5\n} } } */
SEL2(struct,pst_arr5)217 SEL2 (struct, pst_arr5)
218
219 /*
220 ** test_pst_arr5: { target aarch64_little_endian }
221 ** sub sp, sp, #256
222 ** str z0, \[sp\]
223 ** str z1, \[sp, #1, mul vl\]
224 ** str z2, \[sp, #2, mul vl\]
225 ** str z3, \[sp, #3, mul vl\]
226 ** str z4, \[sp, #4, mul vl\]
227 ** str z5, \[sp, #5, mul vl\]
228 ** str z6, \[sp, #6, mul vl\]
229 ** str z7, \[sp, #7, mul vl\]
230 ** mov (x7, sp|w7, wsp)
231 ** add sp, sp, #?256
232 ** ret
233 */
234 /*
235 ** test_pst_arr5: { target aarch64_big_endian }
236 ** sub sp, sp, #256
237 ** ptrue (p[0-3])\.b, vl32
238 ** st1d z0\.d, \1, \[sp\]
239 ** st1d z1\.d, \1, \[sp, #1, mul vl\]
240 ** st1d z2\.d, \1, \[sp, #2, mul vl\]
241 ** st1d z3\.d, \1, \[sp, #3, mul vl\]
242 ** st1d z4\.d, \1, \[sp, #4, mul vl\]
243 ** st1d z5\.d, \1, \[sp, #5, mul vl\]
244 ** st1d z6\.d, \1, \[sp, #6, mul vl\]
245 ** st1d z7\.d, \1, \[sp, #7, mul vl\]
246 ** mov ((x7, sp|w7, wsp)|w7, wsp)
247 ** add sp, sp, #?256
248 ** ret
249 */
250 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr5\n} } } */
251 void
252 test_pst_arr5 (struct pst_arr5 x)
253 {
254 CONSUME (x);
255 }
256
257 /*
258 ** test_pst_arr5_x0:
259 ** (
260 ** mov z0\.d, z7\.d
261 ** mov (x7, x0|w7, w0)
262 ** |
263 ** mov (x7, x0|w7, w0)
264 ** mov z0\.d, z7\.d
265 ** )
266 ** ret
267 */
268 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr5_x0\n} } } */
269 svint32_t
test_pst_arr5_x0(svint32_t z0,struct pst_arr5 x,svint32_t z1,svint32_t z2,svint32_t z3,svint32_t z4,svint32_t z5,svint32_t z6,svint32_t z7)270 test_pst_arr5_x0 (svint32_t z0, struct pst_arr5 x,
271 svint32_t z1, svint32_t z2, svint32_t z3, svint32_t z4,
272 svint32_t z5, svint32_t z6, svint32_t z7)
273 {
274 CONSUME (x);
275 return z7;
276 }
277
278 /*
279 ** test_pst_arr5_x7:
280 ** ret
281 */
282 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr5_x7\n} } } */
283 svint32_t
test_pst_arr5_x7(svint32_t z0,int x0,int x1,int x2,int x3,int x4,int x5,int x6,struct pst_arr5 x)284 test_pst_arr5_x7 (svint32_t z0, int x0, int x1, int x2, int x3, int x4,
285 int x5, int x6, struct pst_arr5 x)
286 {
287 CONSUME (x);
288 return z0;
289 }
290
291 /*
292 ** test_pst_arr5_sp: { target lp64 }
293 ** ldr x7, \[sp\]
294 ** ret
295 */
296 /*
297 ** test_pst_arr5_sp: { target ilp32 }
298 ** ldr w7, \[sp(, 4)?\]
299 ** ret
300 */
301 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr5_sp\n} } } */
302 svint32_t
test_pst_arr5_sp(svint32_t z0,int x0,int x1,int x2,int x3,int x4,int x5,int x6,int x7,struct pst_arr5 x)303 test_pst_arr5_sp (svint32_t z0, int x0, int x1, int x2, int x3, int x4,
304 int x5, int x6, int x7, struct pst_arr5 x)
305 {
306 CONSUME (x);
307 return z0;
308 }
309
310 struct pst_arr6
311 {
312 fixed_bool_t b[2][2];
313 };
314 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_arr6\n} } } */
SEL2(struct,pst_arr6)315 SEL2 (struct, pst_arr6)
316
317 /*
318 ** test_pst_arr6:
319 ** ...
320 ** brkpa p0\.b, p0/z, p2\.b, p3\.b
321 ** ...
322 */
323 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr6\n} } } */
324 fixed_bool_t
325 test_pst_arr6 (struct pst_arr6 x)
326 {
327 return svbrkpa_z (x.b[0][0], x.b[1][0], x.b[1][1]);
328 }
329
330 /*
331 ** test_pst_arr6_x0:
332 ** (
333 ** mov p0\.b, p3\.b
334 ** mov (x7, x0|w7, w0)
335 ** |
336 ** mov (x7, x0|w7, w0)
337 ** mov p0\.b, p3\.b
338 ** )
339 ** ret
340 */
341 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr6_x0\n} } } */
342 fixed_bool_t
test_pst_arr6_x0(svbool_t p0,struct pst_arr6 x,svbool_t p1,svbool_t p2,svbool_t p3)343 test_pst_arr6_x0 (svbool_t p0, struct pst_arr6 x, svbool_t p1, svbool_t p2,
344 svbool_t p3)
345 {
346 CONSUME (x);
347 return p3;
348 }
349
350 /*
351 ** test_pst_arr6_x7:
352 ** ret
353 */
354 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr6_x7\n} } } */
355 fixed_bool_t
test_pst_arr6_x7(svbool_t p0,int x0,int x1,int x2,int x3,int x4,int x5,int x6,struct pst_arr6 x)356 test_pst_arr6_x7 (svbool_t p0, int x0, int x1, int x2, int x3, int x4,
357 int x5, int x6, struct pst_arr6 x)
358 {
359 CONSUME (x);
360 return p0;
361 }
362
363 /*
364 ** test_pst_arr6_sp: { target lp64 }
365 ** ldr x7, \[sp\]
366 ** ret
367 */
368 /*
369 ** test_pst_arr6_sp: { target ilp32 }
370 ** ldr w7, \[sp(, 4)?\]
371 ** ret
372 */
373 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_arr6_sp\n} } } */
374 fixed_bool_t
test_pst_arr6_sp(svbool_t p0,int x0,int x1,int x2,int x3,int x4,int x5,int x6,int x7,struct pst_arr6 x)375 test_pst_arr6_sp (svbool_t p0, int x0, int x1, int x2, int x3, int x4,
376 int x5, int x6, int x7, struct pst_arr6 x)
377 {
378 CONSUME (x);
379 return p0;
380 }
381
382 struct pst_uniform1
383 {
384 fixed_int8_t a, b;
385 };
386 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_uniform1\n} } } */
SEL2(struct,pst_uniform1)387 SEL2 (struct, pst_uniform1)
388
389 /*
390 ** test_pst_uniform1: { target aarch64_little_endian }
391 ** sub sp, sp, #64
392 ** str z0, \[sp\]
393 ** str z1, \[sp, #1, mul vl\]
394 ** mov (x7, sp|w7, wsp)
395 ** add sp, sp, #?64
396 ** ret
397 */
398 /*
399 ** test_pst_uniform1: { target aarch64_big_endian }
400 ** sub sp, sp, #64
401 ** ptrue (p[0-3])\.b, vl32
402 ** st1b z0\.b, \1, \[sp\]
403 ** st1b z1\.b, \1, \[sp, #1, mul vl\]
404 ** mov (x7, sp|w7, wsp)
405 ** add sp, sp, #?64
406 ** ret
407 */
408 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_uniform1\n} } } */
409 void
410 test_pst_uniform1 (struct pst_uniform1 x)
411 {
412 CONSUME (x);
413 }
414
415 struct pst_uniform2
416 {
417 fixed_int16_t a;
418 fixed_int16_t b[2];
419 };
420 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_uniform2\n} } } */
SEL2(struct,pst_uniform2)421 SEL2 (struct, pst_uniform2)
422
423 /*
424 ** test_pst_uniform2: { target aarch64_little_endian }
425 ** sub sp, sp, #96
426 ** str z0, \[sp\]
427 ** str z1, \[sp, #1, mul vl\]
428 ** str z2, \[sp, #2, mul vl\]
429 ** mov (x7, sp|w7, wsp)
430 ** add sp, sp, #?96
431 ** ret
432 */
433 /*
434 ** test_pst_uniform2: { target aarch64_big_endian }
435 ** sub sp, sp, #96
436 ** ptrue (p[0-3])\.b, vl32
437 ** st1h z0\.h, \1, \[sp\]
438 ** st1h z1\.h, \1, \[sp, #1, mul vl\]
439 ** st1h z2\.h, \1, \[sp, #2, mul vl\]
440 ** mov (x7, sp|w7, wsp)
441 ** add sp, sp, #?96
442 ** ret
443 */
444 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_uniform2\n} } } */
445 void
446 test_pst_uniform2 (struct pst_uniform2 x)
447 {
448 CONSUME (x);
449 }
450
451 struct pst_uniform3
452 {
453 fixed_int32_t a;
454 fixed_int32_t b[2];
455 fixed_int32_t c;
456 };
457 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_uniform3\n} } } */
SEL2(struct,pst_uniform3)458 SEL2 (struct, pst_uniform3)
459
460 /*
461 ** test_pst_uniform3: { target aarch64_little_endian }
462 ** sub sp, sp, #128
463 ** str z0, \[sp\]
464 ** str z1, \[sp, #1, mul vl\]
465 ** str z2, \[sp, #2, mul vl\]
466 ** str z3, \[sp, #3, mul vl\]
467 ** mov (x7, sp|w7, wsp)
468 ** add sp, sp, #?128
469 ** ret
470 */
471 /*
472 ** test_pst_uniform3: { target aarch64_big_endian }
473 ** sub sp, sp, #128
474 ** ptrue (p[0-3])\.b, vl32
475 ** st1w z0\.s, \1, \[sp\]
476 ** st1w z1\.s, \1, \[sp, #1, mul vl\]
477 ** st1w z2\.s, \1, \[sp, #2, mul vl\]
478 ** st1w z3\.s, \1, \[sp, #3, mul vl\]
479 ** mov (x7, sp|w7, wsp)
480 ** add sp, sp, #?128
481 ** ret
482 */
483 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_uniform3\n} } } */
484 void
485 test_pst_uniform3 (struct pst_uniform3 x)
486 {
487 CONSUME (x);
488 }
489
490 struct pst_uniform4
491 {
492 fixed_int32_t a __attribute__((aligned(SVE_BYTES * 2)));
493 fixed_int32_t b[3] __attribute__((aligned(SVE_BYTES * 2)));
494 fixed_int32_t c __attribute__((aligned(SVE_BYTES * 2)));
495 };
496 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_uniform4\n} } } */
SEL2(struct,pst_uniform4)497 SEL2 (struct, pst_uniform4)
498
499 /*
500 ** test_pst_uniform4: { target aarch64_little_endian }
501 ** sub sp, sp, #304
502 ** add (x[0-9]+), sp, #?63
503 ** and x7, \1, #?(?:-64|4294967232)
504 ** ptrue (p[0-7])\.b, vl32
505 ** st1w z0\.s, \2, \[x7\]
506 ** add (x[0-9]+), x7, #?64
507 ** str z1, \[\3\]
508 ** str z2, \[\3, #1, mul vl\]
509 ** str z3, \[\3, #2, mul vl\]
510 ** st1w z4\.s, \2, \[x7, #6, mul vl\]
511 ** add sp, sp, #?304
512 ** ret
513 */
514 /*
515 ** test_pst_uniform4: { target aarch64_big_endian }
516 ** sub sp, sp, #304
517 ** add (x[0-9]+), sp, #?63
518 ** and x7, \1, #?(?:-64|4294967232)
519 ** ptrue (p[0-7])\.b, vl32
520 ** st1w z0\.s, \2, \[x7\]
521 ** add (x[0-9]+), x7, #?64
522 ** st1w z1\.s, \2, \[\3\]
523 ** st1w z2\.s, \2, \[\3, #1, mul vl\]
524 ** st1w z3\.s, \2, \[\3, #2, mul vl\]
525 ** st1w z4\.s, \2, \[x7, #6, mul vl\]
526 ** add sp, sp, #?304
527 ** ret
528 */
529 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_uniform4\n} } } */
530 void
531 test_pst_uniform4 (struct pst_uniform4 x)
532 {
533 CONSUME (x);
534 }
535
536 struct pst_mixed1
537 {
538 fixed_bool_t p0;
539 fixed_bfloat16_t z0;
540 fixed_float16_t z1;
541 fixed_float32_t z2;
542 fixed_float64_t z3;
543 fixed_bool_t p1;
544 fixed_bool_t p2;
545 fixed_int8_t z4;
546 fixed_int16_t z5;
547 fixed_int32_t z6;
548 fixed_int64_t z7;
549 fixed_bool_t p3;
550 };
551 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_mixed1\n} } } */
SEL2(struct,pst_mixed1)552 SEL2 (struct, pst_mixed1)
553
554 /*
555 ** test_pst_mixed1:
556 ** sub sp, sp, #304
557 ** str p0, \[sp\]
558 ** ptrue p0\.b, vl32
559 ** add (x[0-9+]), sp, #?16
560 ** st1h z0\.h, p0, \[\1\]
561 ** add (x[0-9+]), sp, #?48
562 ** st1h z1\.h, p0, \[\2\]
563 ** add (x[0-9+]), sp, #?80
564 ** st1w z2\.s, p0, \[\3\]
565 ** add (x[0-9+]), sp, #?112
566 ** st1d z3\.d, p0, \[\4\]
567 ** str p1, \[sp, #36, mul vl\]
568 ** str p2, \[sp, #37, mul vl\]
569 ** st1b z4\.b, p0, \[sp, #5, mul vl\]
570 ** st1h z5\.h, p0, \[sp, #6, mul vl\]
571 ** st1w z6\.s, p0, \[sp, #7, mul vl\]
572 ** ...
573 ** st1d z7\.d, p0, [^\n]*
574 ** ...
575 ** str p3, \[sp, #72, mul vl\]
576 ** mov (x7, sp|w7, wsp)
577 ** add sp, sp, #?304
578 ** ret
579 */
580 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_mixed1\n} } } */
581 void
582 test_pst_mixed1 (struct pst_mixed1 x)
583 {
584 CONSUME (x);
585 }
586
587 struct pst_mixed2
588 {
589 struct __attribute__ ((packed)) {
590 fixed_bool_t p;
591 fixed_int8_t z;
592 } a[3];
593 fixed_int16_t b[1][1][1][4];
594 };
595 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_mixed2\n} } } */
SEL2(struct,pst_mixed2)596 SEL2 (struct, pst_mixed2)
597
598 /*
599 ** test_pst_mixed2: { target aarch64_little_endian }
600 ** sub sp, sp, #240
601 ** str p0, \[sp\]
602 ** ptrue (p[03])\.b, vl32
603 ** add (x[0-9]+), sp, #?4
604 ** st1b z0\.b, \1, \[\2\]
605 ** str p1, \[sp, #9, mul vl\]
606 ** add (x[0-9]+), sp, #?40
607 ** st1b z1\.b, \1, \[\3\]
608 ** str p2, \[sp, #18, mul vl\]
609 ** add (x[0-9]+), sp, #?76
610 ** st1b z2\.b, \1, \[\4\]
611 ** add (x[0-9]+), sp, #?112
612 ** str z3, \[\5\]
613 ** str z4, \[\5, #1, mul vl\]
614 ** str z5, \[\5, #2, mul vl\]
615 ** str z6, \[\5, #3, mul vl\]
616 ** mov (x7, sp|w7, wsp)
617 ** add sp, sp, #?240
618 ** ret
619 */
620 /*
621 ** test_pst_mixed2: { target aarch64_big_endian }
622 ** sub sp, sp, #240
623 ** str p0, \[sp\]
624 ** ptrue (p[03])\.b, vl32
625 ** add (x[0-9]+), sp, #?4
626 ** st1b z0\.b, \1, \[\2\]
627 ** str p1, \[sp, #9, mul vl\]
628 ** add (x[0-9]+), sp, #?40
629 ** st1b z1\.b, \1, \[\3\]
630 ** str p2, \[sp, #18, mul vl\]
631 ** add (x[0-9]+), sp, #?76
632 ** st1b z2\.b, \1, \[\4\]
633 ** add (x[0-9]+), sp, #?112
634 ** st1h z3\.h, \1, \[\5\]
635 ** st1h z4\.h, \1, \[\5, #1, mul vl\]
636 ** st1h z5\.h, \1, \[\5, #2, mul vl\]
637 ** st1h z6\.h, \1, \[\5, #3, mul vl\]
638 ** mov (x7, sp|w7, wsp)
639 ** add sp, sp, #?240
640 ** ret
641 */
642 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_mixed2\n} } } */
643 void
644 test_pst_mixed2 (struct pst_mixed2 x)
645 {
646 CONSUME (x);
647 }
648
649 struct pst_big1
650 {
651 fixed_int8_t a[9];
652 };
653 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_big1\n} } } */
SEL2(struct,pst_big1)654 SEL2 (struct, pst_big1)
655
656 /*
657 ** test_pst_big1_a: { target lp64 }
658 ** ptrue (p[0-7])\.b, vl32
659 ** ld1b z0\.b, \1/z, \[x0\]
660 ** ret
661 */
662 /*
663 ** test_pst_big1_a: { target ilp32 }
664 ** uxtw x0, w0
665 ** ptrue (p[0-7])\.b, vl32
666 ** ld1b z0\.b, \1/z, \[x0\]
667 ** ret
668 */
669 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big1_a\n} } } */
670 svint8_t
671 test_pst_big1_a (struct pst_big1 x)
672 {
673 return x.a[0];
674 }
675
676 /*
677 ** test_pst_big1_b: { target lp64 }
678 ** add x7, x0, #?256
679 ** ret
680 */
681 /*
682 ** test_pst_big1_b: { target ilp32 }
683 ** add w7, w0, #?256
684 ** ret
685 */
686 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big1_b\n} } } */
687 svint8_t
test_pst_big1_b(struct pst_big1 x)688 test_pst_big1_b (struct pst_big1 x)
689 {
690 CONSUME (x.a[8]);
691 }
692
693 struct pst_big2
694 {
695 fixed_bool_t a[5];
696 };
697 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_big2\n} } } */
SEL2(struct,pst_big2)698 SEL2 (struct, pst_big2)
699
700 /*
701 ** test_pst_big2_a: { target lp64 }
702 ** ldr p0, \[x0\]
703 ** ret
704 */
705 /*
706 ** test_pst_big2_a: { target ilp32 }
707 ** uxtw x0, w0
708 ** ldr p0, \[x0\]
709 ** ret
710 */
711 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big2_a\n} } } */
712 svbool_t
713 test_pst_big2_a (struct pst_big2 x)
714 {
715 return x.a[0];
716 }
717
718 /*
719 ** test_pst_big2_b: { target lp64 }
720 ** ldr p0, \[x0, #4, mul vl\]
721 ** ret
722 */
723 /*
724 ** test_pst_big2_b: { target ilp32 }
725 ** uxtw x0, w0
726 ** ldr p0, \[x0, #4, mul vl\]
727 ** ret
728 */
729 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big2_b\n} } } */
730 svbool_t
test_pst_big2_b(struct pst_big2 x)731 test_pst_big2_b (struct pst_big2 x)
732 {
733 return x.a[4];
734 }
735
736 struct pst_big3
737 {
738 fixed_bool_t p0;
739 fixed_int8_t a[2];
740 fixed_bool_t p1;
741 fixed_bool_t p2;
742 fixed_bool_t p3;
743 fixed_int8_t b[6];
744 fixed_bool_t p4;
745 };
746 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_big3\n} } } */
SEL2(struct,pst_big3)747 SEL2 (struct, pst_big3)
748
749 /*
750 ** test_pst_big3_a: { target lp64 }
751 ** ldr p0, \[x0\]
752 ** ret
753 */
754 /*
755 ** test_pst_big3_a: { target ilp32 }
756 ** uxtw x0, w0
757 ** ldr p0, \[x0\]
758 ** ret
759 */
760 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_a\n} } } */
761 svbool_t
762 test_pst_big3_a (struct pst_big3 x)
763 {
764 return x.p0;
765 }
766
767 /*
768 ** test_pst_big3_b: { target lp64 }
769 ** ldr p0, \[x0, #20, mul vl\]
770 ** ret
771 */
772 /*
773 ** test_pst_big3_b: { target ilp32 }
774 ** uxtw x0, w0
775 ** ldr p0, \[x0, #20, mul vl\]
776 ** ret
777 */
778 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_b\n} } } */
779 svbool_t
test_pst_big3_b(struct pst_big3 x)780 test_pst_big3_b (struct pst_big3 x)
781 {
782 return x.p1;
783 }
784
785 /*
786 ** test_pst_big3_c: { target lp64 }
787 ** ldr p0, \[x0, #21, mul vl\]
788 ** ret
789 */
790 /*
791 ** test_pst_big3_c: { target ilp32 }
792 ** uxtw x0, w0
793 ** ldr p0, \[x0, #21, mul vl\]
794 ** ret
795 */
796 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_c\n} } } */
797 svbool_t
test_pst_big3_c(struct pst_big3 x)798 test_pst_big3_c (struct pst_big3 x)
799 {
800 return x.p2;
801 }
802
803 /*
804 ** test_pst_big3_d: { target lp64 }
805 ** ldr p0, \[x0, #72, mul vl\]
806 ** ret
807 */
808 /*
809 ** test_pst_big3_d: { target ilp32 }
810 ** uxtw x0, w0
811 ** ldr p0, \[x0, #72, mul vl\]
812 ** ret
813 */
814 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_d\n} } } */
815 svbool_t
test_pst_big3_d(struct pst_big3 x)816 test_pst_big3_d (struct pst_big3 x)
817 {
818 return x.p4;
819 }
820
821 /*
822 ** test_pst_big3_e: { target lp64 }
823 ** add (x[0-9]+), x0, #?16
824 ** ptrue (p[0-7])\.b, vl32
825 ** ld1b z0\.b, \2/z, \[\1\]
826 ** ret
827 */
828 /*
829 ** test_pst_big3_e: { target ilp32 }
830 ** uxtw x0, w0
831 ** add (x[0-9]+), x0, #?16
832 ** ptrue (p[0-7])\.b, vl32
833 ** ld1b z0\.b, \2/z, \[\1\]
834 ** ret
835 */
836 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_e\n} } } */
837 svint8_t
test_pst_big3_e(struct pst_big3 x)838 test_pst_big3_e (struct pst_big3 x)
839 {
840 return x.a[0];
841 }
842
843 /*
844 ** test_pst_big3_f: { target lp64 }
845 ** ptrue (p[0-7])\.b, vl32
846 ** ld1b z0\.b, \1/z, \[x0, #4, mul vl\]
847 ** ret
848 */
849 /*
850 ** test_pst_big3_f: { target ilp32 }
851 ** uxtw x0, w0
852 ** ptrue (p[0-7])\.b, vl32
853 ** ld1b z0\.b, \1/z, \[x0, #4, mul vl\]
854 ** ret
855 */
856 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_big3_f\n} } } */
857 svint8_t
test_pst_big3_f(struct pst_big3 x)858 test_pst_big3_f (struct pst_big3 x)
859 {
860 return x.b[1];
861 }
862
863 struct pst_zero1
864 {
865 fixed_bool_t a[0];
866 fixed_int32_t b;
867 };
868 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_zero1\n} } } */
SEL2(struct,pst_zero1)869 SEL2 (struct, pst_zero1)
870
871 /*
872 ** test_pst_zero1:
873 ** ret
874 */
875 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_zero1\n} } } */
876 svint32_t
877 test_pst_zero1 (struct pst_zero1 x)
878 {
879 return x.b;
880 }
881
882 struct pst_zero2
883 {
884 unsigned int : 0;
885 fixed_bool_t b;
886 };
887 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_zero2\n} } } */
SEL2(struct,pst_zero2)888 SEL2 (struct, pst_zero2)
889
890 /*
891 ** test_pst_zero2:
892 ** (
893 ** sub sp, sp, #16
894 ** add sp, sp, #?16
895 ** |
896 ** )
897 ** ret
898 */
899 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_zero2\n} } } */
900 svbool_t
901 test_pst_zero2 (struct pst_zero2 x)
902 {
903 return x.b;
904 }
905
906 struct pst_zero3
907 {
908 struct {} empty;
909 fixed_uint64_t b;
910 };
911 /* { dg-final { scan-assembler {\t\.variant_pcs\tsel2_pst_zero3\n} } } */
SEL2(struct,pst_zero3)912 SEL2 (struct, pst_zero3)
913
914 /*
915 ** test_pst_zero3:
916 ** ret
917 */
918 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_pst_zero3\n} } } */
919 svuint64_t
920 test_pst_zero3 (struct pst_zero3 x)
921 {
922 return x.b;
923 }
924
925 typedef unsigned char small_vec __attribute__((vector_size(SVE_BYTES / 4)));
926
927 struct nonpst1
928 {
929 small_vec a[4];
930 };
931 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst1\n} } } */
SEL2(struct,nonpst1)932 SEL2 (struct, nonpst1)
933
934 /*
935 ** test_nonpst1:
936 ** mov v0\.8b, v3\.8b
937 ** ret
938 */
939 /* { dg-final { scan-assembler-not {\t\.variant_pcs\ttest_nonpst1\n} } } */
940 small_vec
941 test_nonpst1 (struct nonpst1 x)
942 {
943 return x.a[3];
944 }
945
946 union nonpst2
947 {
948 struct {
949 fixed_bool_t a[0];
950 fixed_int32_t b;
951 };
952 };
953 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst2\n} } } */
SEL2(union,nonpst2)954 SEL2 (union, nonpst2)
955
956 /*
957 ** test_nonpst2: { target lp64 }
958 ** ptrue (p[0-7])\.b, vl32
959 ** ld1w z0\.s, \1/z, \[x0\]
960 ** ret
961 */
962 /*
963 ** test_nonpst2: { target ilp32 }
964 ** uxtw x0, w0
965 ** ptrue (p[0-7])\.b, vl32
966 ** ld1w z0\.s, \1/z, \[x0\]
967 ** ret
968 */
969 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst2\n} } } */
970 svint32_t
971 test_nonpst2 (union nonpst2 x)
972 {
973 return x.b;
974 }
975
976 /*
977 ** ret_nonpst2:
978 ** ptrue (p[0-7])\.b, vl32
979 ** index (z[0-9]+\.s), #1, #2
980 ** st1w \2, \1, \[x8\]
981 ** ret
982 */
983 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tret_nonpst2\n} } } */
984 union nonpst2
ret_nonpst2(void)985 ret_nonpst2 (void)
986 {
987 return (union nonpst2) { { {}, 1, 3, 5, 7, 9, 11, 13, 15 } };
988 }
989
990 union nonpst3
991 {
992 struct {
993 unsigned int : 0;
994 fixed_bool_t b;
995 };
996 };
997 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst3\n} } } */
SEL2(union,nonpst3)998 SEL2 (union, nonpst3)
999
1000 /*
1001 ** test_nonpst3: { target aarch64_little_endian }
1002 ** sub sp, sp, #16
1003 ** str w0, \[sp, #?12\]
1004 ** ldr p0, \[sp, #3, mul vl\]
1005 ** add sp, sp, #?16
1006 ** ret
1007 */
1008 /*
1009 ** test_nonpst3: { target aarch64_big_endian }
1010 ** sub sp, sp, #16
1011 ** (
1012 ** lsr (x[0-9]+), x0, #?32
1013 ** str \1, \[sp\]
1014 ** ldr p0, \[sp, #1, mul vl\]
1015 ** |
1016 ** str x0, \[sp\]
1017 ** ldr p0, \[sp\]
1018 ** )
1019 ** add sp, sp, #?16
1020 ** ret
1021 */
1022 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst3\n} } } */
1023 svbool_t
1024 test_nonpst3 (union nonpst3 x)
1025 {
1026 return x.b;
1027 }
1028
1029 /*
1030 ** ret_nonpst3: { target aarch64_little_endian }
1031 ** mov w0, -1
1032 ** ret
1033 */
1034 /*
1035 ** ret_nonpst3: { target aarch64_big_endian }
1036 ** mov x0, -4294967296
1037 ** ret
1038 */
1039 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tret_nonpst3\n} } } */
1040 union nonpst3
ret_nonpst3(void)1041 ret_nonpst3 (void)
1042 {
1043 return (union nonpst3) { { svptrue_b8 () } };
1044 }
1045
1046 union nonpst4
1047 {
1048 struct {
1049 struct {} empty;
1050 fixed_uint64_t b;
1051 };
1052 };
1053 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst4\n} } } */
SEL2(union,nonpst4)1054 SEL2 (union, nonpst4)
1055
1056 /*
1057 ** test_nonpst4: { target lp64 }
1058 ** ptrue (p[0-7])\.b, vl32
1059 ** ld1d z0\.d, \1/z, \[x0\]
1060 ** ret
1061 */
1062 /*
1063 ** test_nonpst4: { target ilp32 }
1064 ** uxtw x0, w0
1065 ** ptrue (p[0-7])\.b, vl32
1066 ** ld1d z0\.d, \1/z, \[x0\]
1067 ** ret
1068 */
1069 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst4\n} } } */
1070 svuint64_t
1071 test_nonpst4 (union nonpst4 x)
1072 {
1073 return x.b;
1074 }
1075
1076 /*
1077 ** ret_nonpst4:
1078 ** ptrue (p[0-7])\.b, vl32
1079 ** index (z[0-9]+\.d), #1, #1
1080 ** st1d \2, \1, \[x8\]
1081 ** ret
1082 */
1083 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tret_nonpst4\n} } } */
1084 union nonpst4
ret_nonpst4(void)1085 ret_nonpst4 (void)
1086 {
1087 return (union nonpst4) { { {}, 1, 2, 3, 4 } };
1088 }
1089
1090 struct nonpst5
1091 {
1092 union {
1093 fixed_uint16_t b;
1094 };
1095 };
1096 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst5\n} } } */
SEL2(struct,nonpst5)1097 SEL2 (struct, nonpst5)
1098
1099 /*
1100 ** test_nonpst5: { target lp64 }
1101 ** ptrue (p[0-7])\.b, vl32
1102 ** ld1h z0\.h, \1/z, \[x0\]
1103 ** ret
1104 */
1105 /*
1106 ** test_nonpst5: { target ilp32 }
1107 ** uxtw x0, w0
1108 ** ptrue (p[0-7])\.b, vl32
1109 ** ld1h z0\.h, \1/z, \[x0\]
1110 ** ret
1111 */
1112 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst5\n} } } */
1113 svuint16_t
1114 test_nonpst5 (struct nonpst5 x)
1115 {
1116 return x.b;
1117 }
1118
1119 struct nonpst6
1120 {
1121 fixed_uint64_t b;
1122 fixed_uint64_t *ptr;
1123 };
1124 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst6\n} } } */
SEL2(struct,nonpst6)1125 SEL2 (struct, nonpst6)
1126
1127 /*
1128 ** test_nonpst6: { target lp64 }
1129 ** ptrue (p[0-3])\.b, vl32
1130 ** ld1d z0\.d, \1/z, \[x0\]
1131 ** ret
1132 */
1133 /*
1134 ** test_nonpst6: { target ilp32 }
1135 ** uxtw x0, w0
1136 ** ptrue (p[0-3])\.b, vl32
1137 ** ld1d z0\.d, \1/z, \[x0\]
1138 ** ret
1139 */
1140 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst6\n} } } */
1141 svuint64_t
1142 test_nonpst6 (struct nonpst6 x)
1143 {
1144 return x.b;
1145 }
1146
1147 struct nonpst7
1148 {
1149 fixed_uint64_t b;
1150 uint32_t foo __attribute__((vector_size(SVE_BYTES)));
1151 };
1152 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst7\n} } } */
SEL2(struct,nonpst7)1153 SEL2 (struct, nonpst7)
1154
1155 /*
1156 ** test_nonpst7: { target lp64 }
1157 ** ptrue (p[0-3])\.b, vl32
1158 ** ld1d z0\.d, \1/z, \[x0\]
1159 ** ret
1160 */
1161 /*
1162 ** test_nonpst7: { target ilp32 }
1163 ** uxtw x0, w0
1164 ** ptrue (p[0-3])\.b, vl32
1165 ** ld1d z0\.d, \1/z, \[x0\]
1166 ** ret
1167 */
1168 /* { dg-final { scan-assembler {\t\.variant_pcs\ttest_nonpst7\n} } } */
1169 svuint64_t
1170 test_nonpst7 (struct nonpst7 x)
1171 {
1172 return x.b;
1173 }
1174
1175 typedef unsigned char tiny_vec __attribute__((vector_size(SVE_BYTES / 8)));
1176
1177 struct nonpst8
1178 {
1179 tiny_vec a;
1180 };
1181 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tsel2_pst_nonpst8\n} } } */
SEL2(struct,nonpst8)1182 SEL2 (struct, nonpst8)
1183
1184 /*
1185 ** test_nonpst8: { target aarch64_little_endian }
1186 ** ubfx x0, x0, 8, 8
1187 ** ret
1188 */
1189 /*
1190 ** test_nonpst8: { target aarch64_big_endian }
1191 ** (
1192 ** sub sp, sp, #16
1193 ** ubfx x0, x0, 48, 8
1194 ** add sp, sp, #?16
1195 ** |
1196 ** ubfx x0, x0, 48, 8
1197 ** )
1198 ** ret
1199 */
1200 /* { dg-final { scan-assembler-not {\t\.variant_pcs\ttest_nonpst8\n} } } */
1201 unsigned int
1202 test_nonpst8 (struct nonpst8 x)
1203 {
1204 return x.a[1];
1205 }
1206
1207 /*
1208 ** ret_nonpst8: { target aarch64_little_endian }
1209 ** (
1210 ** sub sp, sp, #16
1211 ** mov w0, #?513
1212 ** movk w0, #?0x403, lsl #?16
1213 ** add sp, sp, #?16
1214 ** |
1215 ** mov w0, #?513
1216 ** movk w0, #?0x403, lsl #?16
1217 ** )
1218 ** ret
1219 */
1220 /*
1221 ** ret_nonpst8: { target aarch64_big_endian }
1222 ** mov x0, #?3315714752512
1223 ** movk x0, #?0x102, lsl #?48
1224 ** ret
1225 */
1226 /* { dg-final { scan-assembler-not {\t\.variant_pcs\tret_nonpst8\n} } } */
1227 struct nonpst8
ret_nonpst8(void)1228 ret_nonpst8 (void)
1229 {
1230 return (struct nonpst8) { { 1, 2, 3, 4 } };
1231 }
1232