1 /* { dg-do compile { target { powerpc*-*-* } } } */ 2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ 3 /* { dg-require-effective-target powerpc_p8vector_ok } */ 4 /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model -fno-unroll-loops -fno-unroll-all-loops" } */ 5 6 #ifndef SIZE 7 #define SIZE 1024 8 #endif 9 10 #ifndef ALIGN 11 #define ALIGN 32 12 #endif 13 14 #ifndef ATTR_ALIGN 15 #define ATTR_ALIGN __attribute__((__aligned__(ALIGN))) 16 #endif 17 18 #ifndef TYPE 19 #define TYPE unsigned int 20 #endif 21 22 TYPE in1 [SIZE] ATTR_ALIGN; 23 TYPE in2 [SIZE] ATTR_ALIGN; 24 TYPE eqv [SIZE] ATTR_ALIGN; 25 TYPE nand1[SIZE] ATTR_ALIGN; 26 TYPE nand2[SIZE] ATTR_ALIGN; 27 TYPE orc1 [SIZE] ATTR_ALIGN; 28 TYPE orc2 [SIZE] ATTR_ALIGN; 29 30 void do_eqv(void)31do_eqv (void) 32 { 33 unsigned long i; 34 35 for (i = 0; i < SIZE; i++) 36 { 37 eqv[i] = ~(in1[i] ^ in2[i]); 38 } 39 } 40 41 void do_nand1(void)42do_nand1 (void) 43 { 44 unsigned long i; 45 46 for (i = 0; i < SIZE; i++) 47 { 48 nand1[i] = ~(in1[i] & in2[i]); 49 } 50 } 51 52 void do_nand2(void)53do_nand2 (void) 54 { 55 unsigned long i; 56 57 for (i = 0; i < SIZE; i++) 58 { 59 nand2[i] = (~in1[i]) | (~in2[i]); 60 } 61 } 62 63 void do_orc1(void)64do_orc1 (void) 65 { 66 unsigned long i; 67 68 for (i = 0; i < SIZE; i++) 69 { 70 orc1[i] = (~in1[i]) | in2[i]; 71 } 72 } 73 74 void do_orc2(void)75do_orc2 (void) 76 { 77 unsigned long i; 78 79 for (i = 0; i < SIZE; i++) 80 { 81 orc1[i] = in1[i] | (~in2[i]); 82 } 83 } 84 85 /* { dg-final { scan-assembler-times "xxleqv" 1 } } */ 86 /* { dg-final { scan-assembler-times "xxlnand" 2 } } */ 87 /* { dg-final { scan-assembler-times "xxlorc" 2 } } */ 88