1###################################- 2# 3# Copyright (C) 2009-2016 Free Software Foundation, Inc. 4# 5# Contributed by Michael Eager <eager@eagercon.com>. 6# 7# This file is free software; you can redistribute it and/or modify it 8# under the terms of the GNU General Public License as published by the 9# Free Software Foundation; either version 3, or (at your option) any 10# later version. 11# 12# GCC is distributed in the hope that it will be useful, but WITHOUT 13# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15# License for more details. 16# 17# Under Section 7 of GPL version 3, you are granted additional 18# permissions described in the GCC Runtime Library Exception, version 19# 3.1, as published by the Free Software Foundation. 20# 21# You should have received a copy of the GNU General Public License and 22# a copy of the GCC Runtime Library Exception along with this program; 23# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 24# <http://www.gnu.org/licenses/>. 25# 26# divsi3.S 27# 28# Divide operation for 32 bit integers. 29# Input : Dividend in Reg r5 30# Divisor in Reg r6 31# Output: Result in Reg r3 32# 33####################################### 34 35 .globl __divsi3 36 .ent __divsi3 37 .type __divsi3,@function 38__divsi3: 39 .frame r1,0,r15 40 41 ADDIK r1,r1,-16 42 SWI r28,r1,0 43 SWI r29,r1,4 44 SWI r30,r1,8 45 SWI r31,r1,12 46 47 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error 48 BEQI r5,$LaResult_Is_Zero # Result is Zero 49 BGEID r5,$LaR5_Pos 50 XOR r28,r5,r6 # Get the sign of the result 51 RSUBI r5,r5,0 # Make r5 positive 52$LaR5_Pos: 53 BGEI r6,$LaR6_Pos 54 RSUBI r6,r6,0 # Make r6 positive 55$LaR6_Pos: 56 ADDIK r30,r0,0 # Clear mod 57 ADDIK r3,r0,0 # clear div 58 ADDIK r29,r0,32 # Initialize the loop count 59 60 # First part try to find the first '1' in the r5 61$LaDIV0: 62 BLTI r5,$LaDIV2 # This traps r5 == 0x80000000 63$LaDIV1: 64 ADD r5,r5,r5 # left shift logical r5 65 BGTID r5,$LaDIV1 66 ADDIK r29,r29,-1 67$LaDIV2: 68 ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry 69 ADDC r30,r30,r30 # Move that bit into the Mod register 70 RSUB r31,r6,r30 # Try to subtract (r30 a r6) 71 BLTI r31,$LaMOD_TOO_SMALL 72 OR r30,r0,r31 # Move the r31 to mod since the result was positive 73 ADDIK r3,r3,1 74$LaMOD_TOO_SMALL: 75 ADDIK r29,r29,-1 76 BEQi r29,$LaLOOP_END 77 ADD r3,r3,r3 # Shift in the '1' into div 78 BRI $LaDIV2 # Div2 79$LaLOOP_END: 80 BGEI r28,$LaRETURN_HERE 81 BRID $LaRETURN_HERE 82 RSUBI r3,r3,0 # Negate the result 83$LaDiv_By_Zero: 84$LaResult_Is_Zero: 85 OR r3,r0,r0 # set result to 0 86$LaRETURN_HERE: 87# Restore values of CSRs and that of r3 and the divisor and the dividend 88 LWI r28,r1,0 89 LWI r29,r1,4 90 LWI r30,r1,8 91 LWI r31,r1,12 92 RTSD r15,8 93 ADDIK r1,r1,16 94.end __divsi3 95 .size __divsi3, . - __divsi3 96 97