1;; C-SKY DSP instruction descriptions. 2;; Copyright (C) 2018-2019 Free Software Foundation, Inc. 3;; Contributed by C-SKY Microsystems and Mentor Graphics. 4;; 5;; This file is part of GCC. 6;; 7;; GCC is free software; you can redistribute it and/or modify it 8;; under the terms of the GNU General Public License as published by 9;; the Free Software Foundation; either version 3, or (at your option) 10;; any later version. 11;; 12;; GCC is distributed in the hope that it will be useful, but 13;; WITHOUT ANY WARRANTY; without even the implied warranty of 14;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15;; General Public License for more details. 16;; 17;; You should have received a copy of the GNU General Public License 18;; along with GCC; see the file COPYING3. If not see 19;; <http://www.gnu.org/licenses/>. */ 20 21;; ------------------------------------------------------------ 22;; DSP insns 23;; ------------------------------------------------------------ 24 25(define_insn "mulsidi3" 26 [(set (match_operand:DI 0 "register_operand" "=y") 27 (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r")) 28 (sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))] 29 "TARGET_DSP" 30 "muls\t%1, %2" 31) 32 33(define_insn "umulsidi3" 34 [(set (match_operand:DI 0 "register_operand" "=y") 35 (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r")) 36 (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))] 37 "TARGET_DSP" 38 "mulu\t%1, %2" 39) 40 41(define_insn "maddsidi4" 42 [(set (match_operand:DI 0 "register_operand" "=y") 43 (plus:DI (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r")) 44 (sign_extend:DI (match_operand:SI 2 "register_operand" "r"))) 45 (match_operand:DI 3 "register_operand" "0")))] 46 "TARGET_DSP" 47 "mulsa\t%1, %2" 48) 49 50(define_insn "umaddsidi4" 51 [(set (match_operand:DI 0 "register_operand" "=y") 52 (plus:DI (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r")) 53 (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))) 54 (match_operand:DI 3 "register_operand" "0")))] 55 "TARGET_DSP" 56 "mulua\t%1, %2" 57) 58 59(define_insn "msubsidi4" 60 [(set (match_operand:DI 0 "register_operand" "=y") 61 (minus:DI (match_operand:DI 3 "register_operand" "0") 62 (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r")) 63 (sign_extend:DI (match_operand:SI 2 "register_operand" "r")))))] 64 "TARGET_DSP" 65 "mulss\t%1, %2" 66) 67 68(define_insn "umsubsidi4" 69 [(set (match_operand:DI 0 "register_operand" "=y") 70 (minus:DI (match_operand:DI 3 "register_operand" "0") 71 (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r")) 72 (zero_extend:DI (match_operand:SI 2 "register_operand" "r")))))] 73 "TARGET_DSP" 74 "mulus\t%1, %2" 75) 76 77(define_insn "*mulall_s16_0" 78 [(set (match_operand:SI 0 "register_operand" "=r") 79 (plus:SI (match_operand:SI 3 "register_operand" " 0") 80 (mult:SI (match_operand:SI 1 "register_operand" " r") 81 (match_operand:SI 2 "register_operand" " r"))))] 82 "CSKY_ISA_FEATURE (3E3r1)" 83 "mula.32.l\t%0, %1, %2" 84 [(set_attr "type" "alu") 85 (set_attr "length" "4")]) 86 87(define_insn "*mulall_s16_1" 88 [(set (match_operand:SI 0 "register_operand" "=r") 89 (plus:SI (mult:SI (match_operand:SI 1 "register_operand" " r") 90 (match_operand:SI 2 "register_operand" " r")) 91 (match_operand:SI 3 "register_operand" " 0")))] 92 "CSKY_ISA_FEATURE (3E3r1)" 93 "mula.32.l\t%0, %1, %2" 94 [(set_attr "type" "alu") 95 (set_attr "length" "4")]) 96