1 /* Test the vqdmlsl_laneq_s32 AArch64 SIMD intrinsic. */ 2 3 /* { dg-do compile } */ 4 /* { dg-options "-save-temps -O3 -fno-inline" } */ 5 6 #include "arm_neon.h" 7 8 int64x2_t t_vqdmlsl_lane_s32(int64x2_t a,int32x2_t b,int32x4_t c)9t_vqdmlsl_lane_s32 (int64x2_t a, int32x2_t b, int32x4_t c) 10 { 11 return vqdmlsl_laneq_s32 (a, b, c, 0); 12 } 13 14 /* { dg-final { scan-assembler-times "sqdmlsl\[ \t\]+\[vV\]\[0-9\]+\.2\[dD\], ?\[vV\]\[0-9\]+\.2\[sS\], ?\[vV\]\[0-9\]+\.\[sS\]\\\[0\\\]\n" 1 } } */ 15