1/* Definitions of target machine for GNU compiler, Synopsys DesignWare ARC cpu.
2   Copyright (C) 2002-2019 Free Software Foundation, Inc.
3   Contributor: Joern Rennecke <joern.rennecke@embecosm.com>
4		on behalf of Synopsys Inc.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
10the Free Software Foundation; either version 3, or (at your option)
11any later version.
12
13GCC is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3.  If not see
20<http://www.gnu.org/licenses/>.  */
21
22/* Some insns set all condition code flags, some only set the ZNC flags, and
23   some only set the ZN flags.  */
24
25CC_MODE (CC_ZN);
26CC_MODE (CC_Z);
27CC_MODE (CC_C);
28CC_MODE (CC_FP_GT);
29CC_MODE (CC_FP_GE);
30CC_MODE (CC_FP_ORD);
31CC_MODE (CC_FP_UNEQ);
32CC_MODE (CC_FPX);
33
34/* Vector modes.  */
35VECTOR_MODES (INT, 4);        /*            V4QI V2HI */
36VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI */
37VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI */
38
39/* FPU condition flags.  */
40CC_MODE (CC_FPU);
41CC_MODE (CC_FPUE);
42CC_MODE (CC_FPU_UNEQ);
43