1 #include <arm_neon.h>
2 #include "arm-neon-ref.h"
3 #include "compute-ref-data.h"
4
5 /* Expected results. */
6 VECT_VAR_DECL(expected,int,8,8) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
7 0xfc, 0xfd, 0xfe, 0xff };
8 VECT_VAR_DECL(expected,int,16,4) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3 };
9 VECT_VAR_DECL(expected,int,32,2) [] = { 0xfffffffc, 0xfffffffd };
10 VECT_VAR_DECL(expected,int,64,1) [] = { 0xfffffffffffffff0 };
11 VECT_VAR_DECL(expected,uint,8,8) [] = { 0x5, 0x6, 0x7, 0x8,
12 0x9, 0xa, 0xb, 0xc };
13 VECT_VAR_DECL(expected,uint,16,4) [] = { 0xfffc, 0xfffd, 0xfffe, 0xffff };
14 VECT_VAR_DECL(expected,uint,32,2) [] = { 0xfffffff3, 0xfffffff4 };
15 VECT_VAR_DECL(expected,uint,64,1) [] = { 0xfffffffffffffff0 };
16 VECT_VAR_DECL(expected,int,8,16) [] = { 0xf8, 0xf9, 0xfa, 0xfb,
17 0xfc, 0xfd, 0xfe, 0xff,
18 0x0, 0x1, 0x2, 0x3,
19 0x4, 0x5, 0x6, 0x7 };
20 VECT_VAR_DECL(expected,int,16,8) [] = { 0xfff0, 0xfff1, 0xfff2, 0xfff3,
21 0xfff4, 0xfff5, 0xfff6, 0xfff7 };
22 VECT_VAR_DECL(expected,int,32,4) [] = { 0xfffffffc, 0xfffffffd,
23 0xfffffffe, 0xffffffff };
24 VECT_VAR_DECL(expected,int,64,2) [] = { 0xfffffffffffffff0,
25 0xfffffffffffffff1 };
26 VECT_VAR_DECL(expected,uint,8,16) [] = { 0x5, 0x6, 0x7, 0x8,
27 0x9, 0xa, 0xb, 0xc,
28 0xd, 0xe, 0xf, 0x10,
29 0x11, 0x12, 0x13, 0x14 };
30 VECT_VAR_DECL(expected,uint,16,8) [] = { 0xfffc, 0xfffd, 0xfffe, 0xffff,
31 0x0, 0x1, 0x2, 0x3 };
32 VECT_VAR_DECL(expected,uint,32,4) [] = { 0xfffffff3, 0xfffffff4,
33 0xfffffff5, 0xfffffff6 };
34 VECT_VAR_DECL(expected,uint,64,2) [] = { 0xfffffffffffffff0,
35 0xfffffffffffffff1 };
36
37 #define TEST_MSG "VSRA_N"
exec_vsra_n(void)38 void exec_vsra_n (void)
39 {
40 /* Basic test: y=vsra_n(x,v), then store the result. */
41 #define TEST_VSRA_N(Q, T1, T2, W, N, V) \
42 VECT_VAR(vector_res, T1, W, N) = \
43 vsra##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
44 VECT_VAR(vector2, T1, W, N), \
45 V); \
46 vst1##Q##_##T2##W(VECT_VAR(result, T1, W, N), VECT_VAR(vector_res, T1, W, N))
47
48 DECL_VARIABLE_ALL_VARIANTS(vector);
49 DECL_VARIABLE_ALL_VARIANTS(vector2);
50 DECL_VARIABLE_ALL_VARIANTS(vector_res);
51
52 clean_results ();
53
54 /* Initialize input "vector" from "buffer". */
55 TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
56
57 /* Choose arbitrary initialization values. */
58 VDUP(vector2, , int, s, 8, 8, 0x11);
59 VDUP(vector2, , int, s, 16, 4, 0x22);
60 VDUP(vector2, , int, s, 32, 2, 0x33);
61 VDUP(vector2, , int, s, 64, 1, 0x44);
62 VDUP(vector2, , uint, u, 8, 8, 0x55);
63 VDUP(vector2, , uint, u, 16, 4, 0x66);
64 VDUP(vector2, , uint, u, 32, 2, 0x77);
65 VDUP(vector2, , uint, u, 64, 1, 0x88);
66
67 VDUP(vector2, q, int, s, 8, 16, 0x11);
68 VDUP(vector2, q, int, s, 16, 8, 0x22);
69 VDUP(vector2, q, int, s, 32, 4, 0x33);
70 VDUP(vector2, q, int, s, 64, 2, 0x44);
71 VDUP(vector2, q, uint, u, 8, 16, 0x55);
72 VDUP(vector2, q, uint, u, 16, 8, 0x66);
73 VDUP(vector2, q, uint, u, 32, 4, 0x77);
74 VDUP(vector2, q, uint, u, 64, 2, 0x88);
75
76 /* Choose shift amount arbitrarily. */
77 TEST_VSRA_N(, int, s, 8, 8, 1);
78 TEST_VSRA_N(, int, s, 16, 4, 12);
79 TEST_VSRA_N(, int, s, 32, 2, 2);
80 TEST_VSRA_N(, int, s, 64, 1, 32);
81 TEST_VSRA_N(, uint, u, 8, 8, 2);
82 TEST_VSRA_N(, uint, u, 16, 4, 3);
83 TEST_VSRA_N(, uint, u, 32, 2, 5);
84 TEST_VSRA_N(, uint, u, 64, 1, 33);
85
86 TEST_VSRA_N(q, int, s, 8, 16, 1);
87 TEST_VSRA_N(q, int, s, 16, 8, 12);
88 TEST_VSRA_N(q, int, s, 32, 4, 2);
89 TEST_VSRA_N(q, int, s, 64, 2, 32);
90 TEST_VSRA_N(q, uint, u, 8, 16, 2);
91 TEST_VSRA_N(q, uint, u, 16, 8, 3);
92 TEST_VSRA_N(q, uint, u, 32, 4, 5);
93 TEST_VSRA_N(q, uint, u, 64, 2, 33);
94
95 CHECK(TEST_MSG, int, 8, 8, PRIx8, expected, "");
96 CHECK(TEST_MSG, int, 16, 4, PRIx16, expected, "");
97 CHECK(TEST_MSG, int, 32, 2, PRIx32, expected, "");
98 CHECK(TEST_MSG, int, 64, 1, PRIx64, expected, "");
99 CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected, "");
100 CHECK(TEST_MSG, uint, 16, 4, PRIx16, expected, "");
101 CHECK(TEST_MSG, uint, 32, 2, PRIx32, expected, "");
102 CHECK(TEST_MSG, uint, 64, 1, PRIx64, expected, "");
103 CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
104 CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
105 CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
106 CHECK(TEST_MSG, int, 64, 2, PRIx64, expected, "");
107 CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
108 CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
109 CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
110 CHECK(TEST_MSG, uint, 64, 2, PRIx64, expected, "");
111 }
112
main(void)113 int main (void)
114 {
115 exec_vsra_n ();
116 return 0;
117 }
118