gas/i386/hlebad.l

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GAS LISTING .*


[ 	]*1[ 	]+\# Check 32bit unsupported HLE instructions
[ 	]*2[ 	]+
[ 	]*3[ 	]+\.allow_index_reg
[ 	]*4[ 	]+\.text
[ 	]*5[ 	]+_start:
[ 	]*6[ 	]+
[ 	]*7[ 	]+\# Tests for op imm8 al
[ 	]*8[ 	]+xacquire adc \$100,%al
[ 	]*9[ 	]+xacquire lock adc \$100,%al
[ 	]*10[ 	]+lock xacquire adc \$100,%al
[ 	]*11[ 	]+xrelease adc \$100,%al
[ 	]*12[ 	]+xrelease lock adc \$100,%al
[ 	]*13[ 	]+lock xrelease adc \$100,%al
[ 	]*14[ 	]+
[ 	]*15[ 	]+\# Tests for op imm16 ax
[ 	]*16[ 	]+xacquire adc \$1000,%ax
[ 	]*17[ 	]+xacquire lock adc \$1000,%ax
[ 	]*18[ 	]+lock xacquire adc \$1000,%ax
[ 	]*19[ 	]+xrelease adc \$1000,%ax
[ 	]*20[ 	]+xrelease lock adc \$1000,%ax
[ 	]*21[ 	]+lock xrelease adc \$1000,%ax
[ 	]*22[ 	]+
[ 	]*23[ 	]+\# Tests for op imm32 eax
[ 	]*24[ 	]+xacquire adc \$10000000,%eax
[ 	]*25[ 	]+xacquire lock adc \$10000000,%eax
[ 	]*26[ 	]+lock xacquire adc \$10000000,%eax
[ 	]*27[ 	]+xrelease adc \$10000000,%eax
[ 	]*28[ 	]+xrelease lock adc \$10000000,%eax
[ 	]*29[ 	]+lock xrelease adc \$10000000,%eax
[ 	]*30[ 	]+
[ 	]*31[ 	]+\# Tests for op imm8 regb/m8
[ 	]*32[ 	]+xacquire adcb \$100,%cl
[ 	]*33[ 	]+xacquire lock adcb \$100,%cl
[ 	]*34[ 	]+lock xacquire adcb \$100,%cl
[ 	]*35[ 	]+xrelease adcb \$100,%cl
[ 	]*36[ 	]+xrelease lock adcb \$100,%cl
[ 	]*37[ 	]+lock xrelease adcb \$100,%cl
[ 	]*38[ 	]+xacquire adcb \$100,\(%ecx\)
[ 	]*39[ 	]+xrelease adcb \$100,\(%ecx\)
[ 	]*40[ 	]+
[ 	]*41[ 	]+\# Tests for op imm16 regs/m16
[ 	]*42[ 	]+xacquire adcw \$1000,%cx
[ 	]*43[ 	]+xacquire lock adcw \$1000,%cx
[ 	]*44[ 	]+lock xacquire adcw \$1000,%cx
[ 	]*45[ 	]+xrelease adcw \$1000,%cx
[ 	]*46[ 	]+xrelease lock adcw \$1000,%cx
[ 	]*47[ 	]+lock xrelease adcw \$1000,%cx
[ 	]*48[ 	]+xacquire adcw \$1000,\(%ecx\)
[ 	]*49[ 	]+xrelease adcw \$1000,\(%ecx\)
[ 	]*50[ 	]+
[ 	]*51[ 	]+\# Tests for op imm32 regl/m32
[ 	]*52[ 	]+xacquire adcl \$10000000,%ecx
[ 	]*53[ 	]+xacquire lock adcl \$10000000,%ecx
[ 	]*54[ 	]+lock xacquire adcl \$10000000,%ecx
[ 	]*55[ 	]+xrelease adcl \$10000000,%ecx
[ 	]*56[ 	]+xrelease lock adcl \$10000000,%ecx
[ 	]*57[ 	]+lock xrelease adcl \$10000000,%ecx
GAS LISTING .*


[ 	]*58[ 	]+xacquire adcl \$10000000,\(%ecx\)
[ 	]*59[ 	]+xrelease adcl \$10000000,\(%ecx\)
[ 	]*60[ 	]+
[ 	]*61[ 	]+\# Tests for op imm8 regs/m16
[ 	]*62[ 	]+xacquire adcw \$100,%cx
[ 	]*63[ 	]+xacquire lock adcw \$100,%cx
[ 	]*64[ 	]+lock xacquire adcw \$100,%cx
[ 	]*65[ 	]+xrelease adcw \$100,%cx
[ 	]*66[ 	]+xrelease lock adcw \$100,%cx
[ 	]*67[ 	]+lock xrelease adcw \$100,%cx
[ 	]*68[ 	]+xacquire adcw \$100,\(%ecx\)
[ 	]*69[ 	]+xrelease adcw \$100,\(%ecx\)
[ 	]*70[ 	]+
[ 	]*71[ 	]+\# Tests for op imm8 regl/m32
[ 	]*72[ 	]+xacquire adcl \$100,%ecx
[ 	]*73[ 	]+xacquire lock adcl \$100,%ecx
[ 	]*74[ 	]+lock xacquire adcl \$100,%ecx
[ 	]*75[ 	]+xrelease adcl \$100,%ecx
[ 	]*76[ 	]+xrelease lock adcl \$100,%ecx
[ 	]*77[ 	]+lock xrelease adcl \$100,%ecx
[ 	]*78[ 	]+xacquire adcl \$100,\(%ecx\)
[ 	]*79[ 	]+xrelease adcl \$100,\(%ecx\)
[ 	]*80[ 	]+
[ 	]*81[ 	]+\# Tests for op imm8 regb/m8
[ 	]*82[ 	]+xacquire adcb \$100,%cl
[ 	]*83[ 	]+xacquire lock adcb \$100,%cl
[ 	]*84[ 	]+lock xacquire adcb \$100,%cl
[ 	]*85[ 	]+xrelease adcb \$100,%cl
[ 	]*86[ 	]+xrelease lock adcb \$100,%cl
[ 	]*87[ 	]+lock xrelease adcb \$100,%cl
[ 	]*88[ 	]+xacquire adcb \$100,\(%ecx\)
[ 	]*89[ 	]+xrelease adcb \$100,\(%ecx\)
[ 	]*90[ 	]+
[ 	]*91[ 	]+\# Tests for op regb regb/m8
[ 	]*92[ 	]+\# Tests for op regb/m8 regb
[ 	]*93[ 	]+xacquire adcb %al,%cl
[ 	]*94[ 	]+xacquire lock adcb %al,%cl
[ 	]*95[ 	]+lock xacquire adcb %al,%cl
[ 	]*96[ 	]+xrelease adcb %al,%cl
[ 	]*97[ 	]+xrelease lock adcb %al,%cl
[ 	]*98[ 	]+lock xrelease adcb %al,%cl
[ 	]*99[ 	]+xacquire adcb %al,\(%ecx\)
[ 	]*100[ 	]+xrelease adcb %al,\(%ecx\)
[ 	]*101[ 	]+xacquire adcb %cl,%al
[ 	]*102[ 	]+xacquire lock adcb %cl,%al
[ 	]*103[ 	]+lock xacquire adcb %cl,%al
[ 	]*104[ 	]+xrelease adcb %cl,%al
[ 	]*105[ 	]+xrelease lock adcb %cl,%al
[ 	]*106[ 	]+lock xrelease adcb %cl,%al
[ 	]*107[ 	]+xacquire adcb \(%ecx\),%al
[ 	]*108[ 	]+xacquire lock adcb \(%ecx\),%al
[ 	]*109[ 	]+lock xacquire adcb \(%ecx\),%al
[ 	]*110[ 	]+xrelease adcb \(%ecx\),%al
[ 	]*111[ 	]+xrelease lock adcb \(%ecx\),%al
[ 	]*112[ 	]+lock xrelease adcb \(%ecx\),%al
[ 	]*113[ 	]+
[ 	]*114[ 	]+\# Tests for op regs regs/m16
GAS LISTING .*


[ 	]*115[ 	]+\# Tests for op regs/m16 regs
[ 	]*116[ 	]+xacquire adcw %ax,%cx
[ 	]*117[ 	]+xacquire lock adcw %ax,%cx
[ 	]*118[ 	]+lock xacquire adcw %ax,%cx
[ 	]*119[ 	]+xrelease adcw %ax,%cx
[ 	]*120[ 	]+xrelease lock adcw %ax,%cx
[ 	]*121[ 	]+lock xrelease adcw %ax,%cx
[ 	]*122[ 	]+xacquire adcw %ax,\(%ecx\)
[ 	]*123[ 	]+xrelease adcw %ax,\(%ecx\)
[ 	]*124[ 	]+xacquire adcw %cx,%ax
[ 	]*125[ 	]+xacquire lock adcw %cx,%ax
[ 	]*126[ 	]+lock xacquire adcw %cx,%ax
[ 	]*127[ 	]+xrelease adcw %cx,%ax
[ 	]*128[ 	]+xrelease lock adcw %cx,%ax
[ 	]*129[ 	]+lock xrelease adcw %cx,%ax
[ 	]*130[ 	]+xacquire adcw \(%ecx\),%ax
[ 	]*131[ 	]+xacquire lock adcw \(%ecx\),%ax
[ 	]*132[ 	]+lock xacquire adcw \(%ecx\),%ax
[ 	]*133[ 	]+xrelease adcw \(%ecx\),%ax
[ 	]*134[ 	]+xrelease lock adcw \(%ecx\),%ax
[ 	]*135[ 	]+lock xrelease adcw \(%ecx\),%ax
[ 	]*136[ 	]+
[ 	]*137[ 	]+\# Tests for op regl regl/m32
[ 	]*138[ 	]+\# Tests for op regl/m32 regl
[ 	]*139[ 	]+xacquire adcl %eax,%ecx
[ 	]*140[ 	]+xacquire lock adcl %eax,%ecx
[ 	]*141[ 	]+lock xacquire adcl %eax,%ecx
[ 	]*142[ 	]+xrelease adcl %eax,%ecx
[ 	]*143[ 	]+xrelease lock adcl %eax,%ecx
[ 	]*144[ 	]+lock xrelease adcl %eax,%ecx
[ 	]*145[ 	]+xacquire adcl %eax,\(%ecx\)
[ 	]*146[ 	]+xrelease adcl %eax,\(%ecx\)
[ 	]*147[ 	]+xacquire adcl %ecx,%eax
[ 	]*148[ 	]+xacquire lock adcl %ecx,%eax
[ 	]*149[ 	]+lock xacquire adcl %ecx,%eax
[ 	]*150[ 	]+xrelease adcl %ecx,%eax
[ 	]*151[ 	]+xrelease lock adcl %ecx,%eax
[ 	]*152[ 	]+lock xrelease adcl %ecx,%eax
[ 	]*153[ 	]+xacquire adcl \(%ecx\),%eax
[ 	]*154[ 	]+xacquire lock adcl \(%ecx\),%eax
[ 	]*155[ 	]+lock xacquire adcl \(%ecx\),%eax
[ 	]*156[ 	]+xrelease adcl \(%ecx\),%eax
[ 	]*157[ 	]+xrelease lock adcl \(%ecx\),%eax
[ 	]*158[ 	]+lock xrelease adcl \(%ecx\),%eax
[ 	]*159[ 	]+
[ 	]*160[ 	]+\# Tests for op regs, regs/m16
[ 	]*161[ 	]+xacquire btcw %ax,%cx
[ 	]*162[ 	]+xacquire lock btcw %ax,%cx
[ 	]*163[ 	]+lock xacquire btcw %ax,%cx
[ 	]*164[ 	]+xrelease btcw %ax,%cx
[ 	]*165[ 	]+xrelease lock btcw %ax,%cx
[ 	]*166[ 	]+lock xrelease btcw %ax,%cx
[ 	]*167[ 	]+xacquire btcw %ax,\(%ecx\)
[ 	]*168[ 	]+xrelease btcw %ax,\(%ecx\)
[ 	]*169[ 	]+
[ 	]*170[ 	]+\# Tests for op regl regl/m32
[ 	]*171[ 	]+xacquire btcl %eax,%ecx
GAS LISTING .*


[ 	]*172[ 	]+xacquire lock btcl %eax,%ecx
[ 	]*173[ 	]+lock xacquire btcl %eax,%ecx
[ 	]*174[ 	]+xrelease btcl %eax,%ecx
[ 	]*175[ 	]+xrelease lock btcl %eax,%ecx
[ 	]*176[ 	]+lock xrelease btcl %eax,%ecx
[ 	]*177[ 	]+xacquire btcl %eax,\(%ecx\)
[ 	]*178[ 	]+xrelease btcl %eax,\(%ecx\)
[ 	]*179[ 	]+
[ 	]*180[ 	]+\# Tests for op regb/m8
[ 	]*181[ 	]+xacquire decb %cl
[ 	]*182[ 	]+xacquire lock decb %cl
[ 	]*183[ 	]+lock xacquire decb %cl
[ 	]*184[ 	]+xrelease decb %cl
[ 	]*185[ 	]+xrelease lock decb %cl
[ 	]*186[ 	]+lock xrelease decb %cl
[ 	]*187[ 	]+xacquire decb \(%ecx\)
[ 	]*188[ 	]+xrelease decb \(%ecx\)
[ 	]*189[ 	]+
[ 	]*190[ 	]+\# Tests for op regs/m16
[ 	]*191[ 	]+xacquire decw %cx
[ 	]*192[ 	]+xacquire lock decw %cx
[ 	]*193[ 	]+lock xacquire decw %cx
[ 	]*194[ 	]+xrelease decw %cx
[ 	]*195[ 	]+xrelease lock decw %cx
[ 	]*196[ 	]+lock xrelease decw %cx
[ 	]*197[ 	]+xacquire decw \(%ecx\)
[ 	]*198[ 	]+xrelease decw \(%ecx\)
[ 	]*199[ 	]+
[ 	]*200[ 	]+\# Tests for op regl/m32
[ 	]*201[ 	]+xacquire decl %ecx
[ 	]*202[ 	]+xacquire lock decl %ecx
[ 	]*203[ 	]+lock xacquire decl %ecx
[ 	]*204[ 	]+xrelease decl %ecx
[ 	]*205[ 	]+xrelease lock decl %ecx
[ 	]*206[ 	]+lock xrelease decl %ecx
[ 	]*207[ 	]+xacquire decl \(%ecx\)
[ 	]*208[ 	]+xrelease decl \(%ecx\)
[ 	]*209[ 	]+
[ 	]*210[ 	]+\# Tests for op m64
[ 	]*211[ 	]+xacquire cmpxchg8bq \(%ecx\)
[ 	]*212[ 	]+xrelease cmpxchg8bq \(%ecx\)
[ 	]*213[ 	]+
[ 	]*214[ 	]+\# Tests for op regb, regb/m8
[ 	]*215[ 	]+xacquire cmpxchgb %cl,%al
[ 	]*216[ 	]+xacquire lock cmpxchgb %cl,%al
[ 	]*217[ 	]+lock xacquire cmpxchgb %cl,%al
[ 	]*218[ 	]+xrelease cmpxchgb %cl,%al
[ 	]*219[ 	]+xrelease lock cmpxchgb %cl,%al
[ 	]*220[ 	]+lock xrelease cmpxchgb %cl,%al
[ 	]*221[ 	]+xacquire cmpxchgb %cl,\(%ecx\)
[ 	]*222[ 	]+xrelease cmpxchgb %cl,\(%ecx\)
[ 	]*223[ 	]+
[ 	]*224[ 	]+\.intel_syntax noprefix
[ 	]*225[ 	]+
[ 	]*226[ 	]+\# Tests for op imm8 al
[ 	]*227[ 	]+xacquire adc al,100
[ 	]*228[ 	]+xacquire lock adc al,100
GAS LISTING .*


[ 	]*229[ 	]+lock xacquire adc al,100
[ 	]*230[ 	]+xrelease adc al,100
[ 	]*231[ 	]+xrelease lock adc al,100
[ 	]*232[ 	]+lock xrelease adc al,100
[ 	]*233[ 	]+
[ 	]*234[ 	]+\# Tests for op imm16 ax
[ 	]*235[ 	]+xacquire adc ax,1000
[ 	]*236[ 	]+xacquire lock adc ax,1000
[ 	]*237[ 	]+lock xacquire adc ax,1000
[ 	]*238[ 	]+xrelease adc ax,1000
[ 	]*239[ 	]+xrelease lock adc ax,1000
[ 	]*240[ 	]+lock xrelease adc ax,1000
[ 	]*241[ 	]+
[ 	]*242[ 	]+\# Tests for op imm32 eax
[ 	]*243[ 	]+xacquire adc eax,10000000
[ 	]*244[ 	]+xacquire lock adc eax,10000000
[ 	]*245[ 	]+lock xacquire adc eax,10000000
[ 	]*246[ 	]+xrelease adc eax,10000000
[ 	]*247[ 	]+xrelease lock adc eax,10000000
[ 	]*248[ 	]+lock xrelease adc eax,10000000
[ 	]*249[ 	]+
[ 	]*250[ 	]+\# Tests for op imm8 regb/m8
[ 	]*251[ 	]+xacquire adc cl,100
[ 	]*252[ 	]+xacquire lock adc cl,100
[ 	]*253[ 	]+lock xacquire adc cl,100
[ 	]*254[ 	]+xrelease adc cl,100
[ 	]*255[ 	]+xrelease lock adc cl,100
[ 	]*256[ 	]+lock xrelease adc cl,100
[ 	]*257[ 	]+xacquire adc BYTE PTR \[ecx\],100
[ 	]*258[ 	]+xrelease adc BYTE PTR \[ecx\],100
[ 	]*259[ 	]+
[ 	]*260[ 	]+\# Tests for op imm16 regs/m16
[ 	]*261[ 	]+xacquire adc cx,1000
[ 	]*262[ 	]+xacquire lock adc cx,1000
[ 	]*263[ 	]+lock xacquire adc cx,1000
[ 	]*264[ 	]+xrelease adc cx,1000
[ 	]*265[ 	]+xrelease lock adc cx,1000
[ 	]*266[ 	]+lock xrelease adc cx,1000
[ 	]*267[ 	]+xacquire adc WORD PTR \[ecx\],1000
[ 	]*268[ 	]+xrelease adc WORD PTR \[ecx\],1000
[ 	]*269[ 	]+
[ 	]*270[ 	]+\# Tests for op imm32 regl/m32
[ 	]*271[ 	]+xacquire adc ecx,10000000
[ 	]*272[ 	]+xacquire lock adc ecx,10000000
[ 	]*273[ 	]+lock xacquire adc ecx,10000000
[ 	]*274[ 	]+xrelease adc ecx,10000000
[ 	]*275[ 	]+xrelease lock adc ecx,10000000
[ 	]*276[ 	]+lock xrelease adc ecx,10000000
[ 	]*277[ 	]+xacquire adc DWORD PTR \[ecx\],10000000
[ 	]*278[ 	]+xrelease adc DWORD PTR \[ecx\],10000000
[ 	]*279[ 	]+
[ 	]*280[ 	]+\# Tests for op imm8 regs/m16
[ 	]*281[ 	]+xacquire adc cx,100
[ 	]*282[ 	]+xacquire lock adc cx,100
[ 	]*283[ 	]+lock xacquire adc cx,100
[ 	]*284[ 	]+xrelease adc cx,100
[ 	]*285[ 	]+xrelease lock adc cx,100
GAS LISTING .*


[ 	]*286[ 	]+lock xrelease adc cx,100
[ 	]*287[ 	]+xacquire adc WORD PTR \[ecx\],100
[ 	]*288[ 	]+xrelease adc WORD PTR \[ecx\],100
[ 	]*289[ 	]+
[ 	]*290[ 	]+\# Tests for op imm8 regl/m32
[ 	]*291[ 	]+xacquire adc ecx,100
[ 	]*292[ 	]+xacquire lock adc ecx,100
[ 	]*293[ 	]+lock xacquire adc ecx,100
[ 	]*294[ 	]+xrelease adc ecx,100
[ 	]*295[ 	]+xrelease lock adc ecx,100
[ 	]*296[ 	]+lock xrelease adc ecx,100
[ 	]*297[ 	]+xacquire adc DWORD PTR \[ecx\],100
[ 	]*298[ 	]+xrelease adc DWORD PTR \[ecx\],100
[ 	]*299[ 	]+
[ 	]*300[ 	]+\# Tests for op imm8 regb/m8
[ 	]*301[ 	]+xacquire adc cl,100
[ 	]*302[ 	]+xacquire lock adc cl,100
[ 	]*303[ 	]+lock xacquire adc cl,100
[ 	]*304[ 	]+xrelease adc cl,100
[ 	]*305[ 	]+xrelease lock adc cl,100
[ 	]*306[ 	]+lock xrelease adc cl,100
[ 	]*307[ 	]+xacquire adc BYTE PTR \[ecx\],100
[ 	]*308[ 	]+xrelease adc BYTE PTR \[ecx\],100
[ 	]*309[ 	]+
[ 	]*310[ 	]+\# Tests for op regb regb/m8
[ 	]*311[ 	]+\# Tests for op regb/m8 regb
[ 	]*312[ 	]+xacquire adc cl,al
[ 	]*313[ 	]+xacquire lock adc cl,al
[ 	]*314[ 	]+lock xacquire adc cl,al
[ 	]*315[ 	]+xrelease adc cl,al
[ 	]*316[ 	]+xrelease lock adc cl,al
[ 	]*317[ 	]+lock xrelease adc cl,al
[ 	]*318[ 	]+xacquire adc BYTE PTR \[ecx\],al
[ 	]*319[ 	]+xrelease adc BYTE PTR \[ecx\],al
[ 	]*320[ 	]+xacquire adc al,cl
[ 	]*321[ 	]+xacquire lock adc al,cl
[ 	]*322[ 	]+lock xacquire adc al,cl
[ 	]*323[ 	]+xrelease adc al,cl
[ 	]*324[ 	]+xrelease lock adc al,cl
[ 	]*325[ 	]+lock xrelease adc al,cl
[ 	]*326[ 	]+xacquire adc al,BYTE PTR \[ecx\]
[ 	]*327[ 	]+xacquire lock adc al,BYTE PTR \[ecx\]
[ 	]*328[ 	]+lock xacquire adc al,BYTE PTR \[ecx\]
[ 	]*329[ 	]+xrelease adc al,BYTE PTR \[ecx\]
[ 	]*330[ 	]+xrelease lock adc al,BYTE PTR \[ecx\]
[ 	]*331[ 	]+lock xrelease adc al,BYTE PTR \[ecx\]
[ 	]*332[ 	]+
[ 	]*333[ 	]+\# Tests for op regs regs/m16
[ 	]*334[ 	]+\# Tests for op regs/m16 regs
[ 	]*335[ 	]+xacquire adc cx,ax
[ 	]*336[ 	]+xacquire lock adc cx,ax
[ 	]*337[ 	]+lock xacquire adc cx,ax
[ 	]*338[ 	]+xrelease adc cx,ax
[ 	]*339[ 	]+xrelease lock adc cx,ax
[ 	]*340[ 	]+lock xrelease adc cx,ax
[ 	]*341[ 	]+xacquire adc WORD PTR \[ecx\],ax
[ 	]*342[ 	]+xrelease adc WORD PTR \[ecx\],ax
GAS LISTING .*


[ 	]*343[ 	]+xacquire adc ax,cx
[ 	]*344[ 	]+xacquire lock adc ax,cx
[ 	]*345[ 	]+lock xacquire adc ax,cx
[ 	]*346[ 	]+xrelease adc ax,cx
[ 	]*347[ 	]+xrelease lock adc ax,cx
[ 	]*348[ 	]+lock xrelease adc ax,cx
[ 	]*349[ 	]+xacquire adc ax,WORD PTR \[ecx\]
[ 	]*350[ 	]+xacquire lock adc ax,WORD PTR \[ecx\]
[ 	]*351[ 	]+lock xacquire adc ax,WORD PTR \[ecx\]
[ 	]*352[ 	]+xrelease adc ax,WORD PTR \[ecx\]
[ 	]*353[ 	]+xrelease lock adc ax,WORD PTR \[ecx\]
[ 	]*354[ 	]+lock xrelease adc ax,WORD PTR \[ecx\]
[ 	]*355[ 	]+
[ 	]*356[ 	]+\# Tests for op regl regl/m32
[ 	]*357[ 	]+\# Tests for op regl/m32 regl
[ 	]*358[ 	]+xacquire adc ecx,eax
[ 	]*359[ 	]+xacquire lock adc ecx,eax
[ 	]*360[ 	]+lock xacquire adc ecx,eax
[ 	]*361[ 	]+xrelease adc ecx,eax
[ 	]*362[ 	]+xrelease lock adc ecx,eax
[ 	]*363[ 	]+lock xrelease adc ecx,eax
[ 	]*364[ 	]+xacquire adc DWORD PTR \[ecx\],eax
[ 	]*365[ 	]+xrelease adc DWORD PTR \[ecx\],eax
[ 	]*366[ 	]+xacquire adc eax,ecx
[ 	]*367[ 	]+xacquire lock adc eax,ecx
[ 	]*368[ 	]+lock xacquire adc eax,ecx
[ 	]*369[ 	]+xrelease adc eax,ecx
[ 	]*370[ 	]+xrelease lock adc eax,ecx
[ 	]*371[ 	]+lock xrelease adc eax,ecx
[ 	]*372[ 	]+xacquire adc eax,DWORD PTR \[ecx\]
[ 	]*373[ 	]+xacquire lock adc eax,DWORD PTR \[ecx\]
[ 	]*374[ 	]+lock xacquire adc eax,DWORD PTR \[ecx\]
[ 	]*375[ 	]+xrelease adc eax,DWORD PTR \[ecx\]
[ 	]*376[ 	]+xrelease lock adc eax,DWORD PTR \[ecx\]
[ 	]*377[ 	]+lock xrelease adc eax,DWORD PTR \[ecx\]
[ 	]*378[ 	]+
[ 	]*379[ 	]+\# Tests for op regs, regs/m16
[ 	]*380[ 	]+xacquire btc cx,ax
[ 	]*381[ 	]+xacquire lock btc cx,ax
[ 	]*382[ 	]+lock xacquire btc cx,ax
[ 	]*383[ 	]+xrelease btc cx,ax
[ 	]*384[ 	]+xrelease lock btc cx,ax
[ 	]*385[ 	]+lock xrelease btc cx,ax
[ 	]*386[ 	]+xacquire btc WORD PTR \[ecx\],ax
[ 	]*387[ 	]+xrelease btc WORD PTR \[ecx\],ax
[ 	]*388[ 	]+
[ 	]*389[ 	]+\# Tests for op regl regl/m32
[ 	]*390[ 	]+xacquire btc ecx,eax
[ 	]*391[ 	]+xacquire lock btc ecx,eax
[ 	]*392[ 	]+lock xacquire btc ecx,eax
[ 	]*393[ 	]+xrelease btc ecx,eax
[ 	]*394[ 	]+xrelease lock btc ecx,eax
[ 	]*395[ 	]+lock xrelease btc ecx,eax
[ 	]*396[ 	]+xacquire btc DWORD PTR \[ecx\],eax
[ 	]*397[ 	]+xrelease btc DWORD PTR \[ecx\],eax
[ 	]*398[ 	]+
[ 	]*399[ 	]+\# Tests for op regb/m8
GAS LISTING .*


[ 	]*400[ 	]+xacquire dec cl
[ 	]*401[ 	]+xacquire lock dec cl
[ 	]*402[ 	]+lock xacquire dec cl
[ 	]*403[ 	]+xrelease dec cl
[ 	]*404[ 	]+xrelease lock dec cl
[ 	]*405[ 	]+lock xrelease dec cl
[ 	]*406[ 	]+xacquire dec BYTE PTR \[ecx\]
[ 	]*407[ 	]+xrelease dec BYTE PTR \[ecx\]
[ 	]*408[ 	]+
[ 	]*409[ 	]+\# Tests for op regs/m16
[ 	]*410[ 	]+xacquire dec cx
[ 	]*411[ 	]+xacquire lock dec cx
[ 	]*412[ 	]+lock xacquire dec cx
[ 	]*413[ 	]+xrelease dec cx
[ 	]*414[ 	]+xrelease lock dec cx
[ 	]*415[ 	]+lock xrelease dec cx
[ 	]*416[ 	]+xacquire dec WORD PTR \[ecx\]
[ 	]*417[ 	]+xrelease dec WORD PTR \[ecx\]
[ 	]*418[ 	]+
[ 	]*419[ 	]+\# Tests for op regl/m32
[ 	]*420[ 	]+xacquire dec ecx
[ 	]*421[ 	]+xacquire lock dec ecx
[ 	]*422[ 	]+lock xacquire dec ecx
[ 	]*423[ 	]+xrelease dec ecx
[ 	]*424[ 	]+xrelease lock dec ecx
[ 	]*425[ 	]+lock xrelease dec ecx
[ 	]*426[ 	]+xacquire dec DWORD PTR \[ecx\]
[ 	]*427[ 	]+xrelease dec DWORD PTR \[ecx\]
[ 	]*428[ 	]+
[ 	]*429[ 	]+\# Tests for op m64
[ 	]*430[ 	]+xacquire cmpxchg8b QWORD PTR \[ecx\]
[ 	]*431[ 	]+xrelease cmpxchg8b QWORD PTR \[ecx\]
[ 	]*432[ 	]+
[ 	]*433[ 	]+\# Tests for op regb, regb/m8
[ 	]*434[ 	]+xacquire cmpxchg al,cl
[ 	]*435[ 	]+xacquire lock cmpxchg al,cl
[ 	]*436[ 	]+lock xacquire cmpxchg al,cl
[ 	]*437[ 	]+xrelease cmpxchg al,cl
[ 	]*438[ 	]+xrelease lock cmpxchg al,cl
[ 	]*439[ 	]+lock xrelease cmpxchg al,cl
[ 	]*440[ 	]+xacquire cmpxchg BYTE PTR \[ecx\],cl
[ 	]*441[ 	]+xrelease cmpxchg BYTE PTR \[ecx\],cl