1# Check 64bit AVX512{DQ,VL} instructions 2 3 .allow_index_reg 4 .text 5_start: 6 vbroadcastf64x2 (%rcx), %ymm30 # AVX512{DQ,VL} 7 vbroadcastf64x2 (%rcx), %ymm30{%k7} # AVX512{DQ,VL} 8 vbroadcastf64x2 (%rcx), %ymm30{%k7}{z} # AVX512{DQ,VL} 9 vbroadcastf64x2 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 10 vbroadcastf64x2 2032(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 11 vbroadcastf64x2 2048(%rdx), %ymm30 # AVX512{DQ,VL} 12 vbroadcastf64x2 -2048(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 13 vbroadcastf64x2 -2064(%rdx), %ymm30 # AVX512{DQ,VL} 14 vbroadcasti64x2 (%rcx), %ymm30 # AVX512{DQ,VL} 15 vbroadcasti64x2 (%rcx), %ymm30{%k7} # AVX512{DQ,VL} 16 vbroadcasti64x2 (%rcx), %ymm30{%k7}{z} # AVX512{DQ,VL} 17 vbroadcasti64x2 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 18 vbroadcasti64x2 2032(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 19 vbroadcasti64x2 2048(%rdx), %ymm30 # AVX512{DQ,VL} 20 vbroadcasti64x2 -2048(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 21 vbroadcasti64x2 -2064(%rdx), %ymm30 # AVX512{DQ,VL} 22 vbroadcastf32x2 %xmm31, %ymm30 # AVX512{DQ,VL} 23 vbroadcastf32x2 %xmm31, %ymm30{%k7} # AVX512{DQ,VL} 24 vbroadcastf32x2 %xmm31, %ymm30{%k7}{z} # AVX512{DQ,VL} 25 vbroadcastf32x2 (%rcx), %ymm30 # AVX512{DQ,VL} 26 vbroadcastf32x2 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 27 vbroadcastf32x2 1016(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 28 vbroadcastf32x2 1024(%rdx), %ymm30 # AVX512{DQ,VL} 29 vbroadcastf32x2 -1024(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 30 vbroadcastf32x2 -1032(%rdx), %ymm30 # AVX512{DQ,VL} 31 vcvtpd2qq %xmm29, %xmm30 # AVX512{DQ,VL} 32 vcvtpd2qq %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 33 vcvtpd2qq %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 34 vcvtpd2qq (%rcx), %xmm30 # AVX512{DQ,VL} 35 vcvtpd2qq 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 36 vcvtpd2qq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 37 vcvtpd2qq 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 38 vcvtpd2qq 2048(%rdx), %xmm30 # AVX512{DQ,VL} 39 vcvtpd2qq -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 40 vcvtpd2qq -2064(%rdx), %xmm30 # AVX512{DQ,VL} 41 vcvtpd2qq 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 42 vcvtpd2qq 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 43 vcvtpd2qq -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 44 vcvtpd2qq -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 45 vcvtpd2qq %ymm29, %ymm30 # AVX512{DQ,VL} 46 vcvtpd2qq %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 47 vcvtpd2qq %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 48 vcvtpd2qq (%rcx), %ymm30 # AVX512{DQ,VL} 49 vcvtpd2qq 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 50 vcvtpd2qq (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 51 vcvtpd2qq 4064(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 52 vcvtpd2qq 4096(%rdx), %ymm30 # AVX512{DQ,VL} 53 vcvtpd2qq -4096(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 54 vcvtpd2qq -4128(%rdx), %ymm30 # AVX512{DQ,VL} 55 vcvtpd2qq 1016(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 56 vcvtpd2qq 1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 57 vcvtpd2qq -1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 58 vcvtpd2qq -1032(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 59 vcvtpd2uqq %xmm29, %xmm30 # AVX512{DQ,VL} 60 vcvtpd2uqq %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 61 vcvtpd2uqq %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 62 vcvtpd2uqq (%rcx), %xmm30 # AVX512{DQ,VL} 63 vcvtpd2uqq 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 64 vcvtpd2uqq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 65 vcvtpd2uqq 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 66 vcvtpd2uqq 2048(%rdx), %xmm30 # AVX512{DQ,VL} 67 vcvtpd2uqq -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 68 vcvtpd2uqq -2064(%rdx), %xmm30 # AVX512{DQ,VL} 69 vcvtpd2uqq 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 70 vcvtpd2uqq 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 71 vcvtpd2uqq -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 72 vcvtpd2uqq -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 73 vcvtpd2uqq %ymm29, %ymm30 # AVX512{DQ,VL} 74 vcvtpd2uqq %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 75 vcvtpd2uqq %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 76 vcvtpd2uqq (%rcx), %ymm30 # AVX512{DQ,VL} 77 vcvtpd2uqq 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 78 vcvtpd2uqq (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 79 vcvtpd2uqq 4064(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 80 vcvtpd2uqq 4096(%rdx), %ymm30 # AVX512{DQ,VL} 81 vcvtpd2uqq -4096(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 82 vcvtpd2uqq -4128(%rdx), %ymm30 # AVX512{DQ,VL} 83 vcvtpd2uqq 1016(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 84 vcvtpd2uqq 1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 85 vcvtpd2uqq -1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 86 vcvtpd2uqq -1032(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 87 vcvtps2qq %xmm29, %xmm30 # AVX512{DQ,VL} 88 vcvtps2qq %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 89 vcvtps2qq %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 90 vcvtps2qq (%rcx), %xmm30 # AVX512{DQ,VL} 91 vcvtps2qq 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 92 vcvtps2qq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 93 vcvtps2qq 1016(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 94 vcvtps2qq 1024(%rdx), %xmm30 # AVX512{DQ,VL} 95 vcvtps2qq -1024(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 96 vcvtps2qq -1032(%rdx), %xmm30 # AVX512{DQ,VL} 97 vcvtps2qq 508(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 98 vcvtps2qq 512(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 99 vcvtps2qq -512(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 100 vcvtps2qq -516(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 101 vcvtps2qq %xmm29, %ymm30 # AVX512{DQ,VL} 102 vcvtps2qq %xmm29, %ymm30{%k7} # AVX512{DQ,VL} 103 vcvtps2qq %xmm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 104 vcvtps2qq (%rcx), %ymm30 # AVX512{DQ,VL} 105 vcvtps2qq 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 106 vcvtps2qq (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 107 vcvtps2qq 2032(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 108 vcvtps2qq 2048(%rdx), %ymm30 # AVX512{DQ,VL} 109 vcvtps2qq -2048(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 110 vcvtps2qq -2064(%rdx), %ymm30 # AVX512{DQ,VL} 111 vcvtps2qq 508(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 112 vcvtps2qq 512(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 113 vcvtps2qq -512(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 114 vcvtps2qq -516(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 115 vcvtps2uqq %xmm29, %xmm30 # AVX512{DQ,VL} 116 vcvtps2uqq %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 117 vcvtps2uqq %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 118 vcvtps2uqq (%rcx), %xmm30 # AVX512{DQ,VL} 119 vcvtps2uqq 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 120 vcvtps2uqq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 121 vcvtps2uqq 1016(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 122 vcvtps2uqq 1024(%rdx), %xmm30 # AVX512{DQ,VL} 123 vcvtps2uqq -1024(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 124 vcvtps2uqq -1032(%rdx), %xmm30 # AVX512{DQ,VL} 125 vcvtps2uqq 508(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 126 vcvtps2uqq 512(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 127 vcvtps2uqq -512(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 128 vcvtps2uqq -516(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 129 vcvtps2uqq %xmm29, %ymm30 # AVX512{DQ,VL} 130 vcvtps2uqq %xmm29, %ymm30{%k7} # AVX512{DQ,VL} 131 vcvtps2uqq %xmm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 132 vcvtps2uqq (%rcx), %ymm30 # AVX512{DQ,VL} 133 vcvtps2uqq 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 134 vcvtps2uqq (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 135 vcvtps2uqq 2032(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 136 vcvtps2uqq 2048(%rdx), %ymm30 # AVX512{DQ,VL} 137 vcvtps2uqq -2048(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 138 vcvtps2uqq -2064(%rdx), %ymm30 # AVX512{DQ,VL} 139 vcvtps2uqq 508(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 140 vcvtps2uqq 512(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 141 vcvtps2uqq -512(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 142 vcvtps2uqq -516(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 143 vcvtqq2pd %xmm29, %xmm30 # AVX512{DQ,VL} 144 vcvtqq2pd %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 145 vcvtqq2pd %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 146 vcvtqq2pd (%rcx), %xmm30 # AVX512{DQ,VL} 147 vcvtqq2pd 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 148 vcvtqq2pd (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 149 vcvtqq2pd 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 150 vcvtqq2pd 2048(%rdx), %xmm30 # AVX512{DQ,VL} 151 vcvtqq2pd -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 152 vcvtqq2pd -2064(%rdx), %xmm30 # AVX512{DQ,VL} 153 vcvtqq2pd 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 154 vcvtqq2pd 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 155 vcvtqq2pd -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 156 vcvtqq2pd -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 157 vcvtqq2pd %ymm29, %ymm30 # AVX512{DQ,VL} 158 vcvtqq2pd %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 159 vcvtqq2pd %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 160 vcvtqq2pd (%rcx), %ymm30 # AVX512{DQ,VL} 161 vcvtqq2pd 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 162 vcvtqq2pd (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 163 vcvtqq2pd 4064(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 164 vcvtqq2pd 4096(%rdx), %ymm30 # AVX512{DQ,VL} 165 vcvtqq2pd -4096(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 166 vcvtqq2pd -4128(%rdx), %ymm30 # AVX512{DQ,VL} 167 vcvtqq2pd 1016(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 168 vcvtqq2pd 1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 169 vcvtqq2pd -1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 170 vcvtqq2pd -1032(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 171 vcvtqq2ps %xmm29, %xmm30 # AVX512{DQ,VL} 172 vcvtqq2ps %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 173 vcvtqq2ps %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 174 vcvtqq2psx (%rcx), %xmm30 # AVX512{DQ,VL} 175 vcvtqq2psx 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 176 vcvtqq2ps (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 177 vcvtqq2psx 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 178 vcvtqq2psx 2048(%rdx), %xmm30 # AVX512{DQ,VL} 179 vcvtqq2psx -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 180 vcvtqq2psx -2064(%rdx), %xmm30 # AVX512{DQ,VL} 181 vcvtqq2psx 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 182 vcvtqq2psx 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 183 vcvtqq2psx -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 184 vcvtqq2psx -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 185 vcvtqq2ps %ymm29, %xmm30 # AVX512{DQ,VL} 186 vcvtqq2ps %ymm29, %xmm30{%k7} # AVX512{DQ,VL} 187 vcvtqq2ps %ymm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 188 vcvtqq2psy (%rcx), %xmm30 # AVX512{DQ,VL} 189 vcvtqq2psy 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 190 vcvtqq2ps (%rcx){1to4}, %xmm30 # AVX512{DQ,VL} 191 vcvtqq2psy 4064(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 192 vcvtqq2psy 4096(%rdx), %xmm30 # AVX512{DQ,VL} 193 vcvtqq2psy -4096(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 194 vcvtqq2psy -4128(%rdx), %xmm30 # AVX512{DQ,VL} 195 vcvtqq2psy 1016(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} Disp8 196 vcvtqq2psy 1024(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} 197 vcvtqq2psy -1024(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} Disp8 198 vcvtqq2psy -1032(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} 199 vcvtuqq2pd %xmm29, %xmm30 # AVX512{DQ,VL} 200 vcvtuqq2pd %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 201 vcvtuqq2pd %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 202 vcvtuqq2pd (%rcx), %xmm30 # AVX512{DQ,VL} 203 vcvtuqq2pd 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 204 vcvtuqq2pd (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 205 vcvtuqq2pd 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 206 vcvtuqq2pd 2048(%rdx), %xmm30 # AVX512{DQ,VL} 207 vcvtuqq2pd -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 208 vcvtuqq2pd -2064(%rdx), %xmm30 # AVX512{DQ,VL} 209 vcvtuqq2pd 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 210 vcvtuqq2pd 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 211 vcvtuqq2pd -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 212 vcvtuqq2pd -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 213 vcvtuqq2pd %ymm29, %ymm30 # AVX512{DQ,VL} 214 vcvtuqq2pd %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 215 vcvtuqq2pd %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 216 vcvtuqq2pd (%rcx), %ymm30 # AVX512{DQ,VL} 217 vcvtuqq2pd 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 218 vcvtuqq2pd (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 219 vcvtuqq2pd 4064(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 220 vcvtuqq2pd 4096(%rdx), %ymm30 # AVX512{DQ,VL} 221 vcvtuqq2pd -4096(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 222 vcvtuqq2pd -4128(%rdx), %ymm30 # AVX512{DQ,VL} 223 vcvtuqq2pd 1016(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 224 vcvtuqq2pd 1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 225 vcvtuqq2pd -1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 226 vcvtuqq2pd -1032(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 227 vcvtuqq2ps %xmm29, %xmm30 # AVX512{DQ,VL} 228 vcvtuqq2ps %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 229 vcvtuqq2ps %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 230 vcvtuqq2psx (%rcx), %xmm30 # AVX512{DQ,VL} 231 vcvtuqq2psx 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 232 vcvtuqq2ps (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 233 vcvtuqq2psx 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 234 vcvtuqq2psx 2048(%rdx), %xmm30 # AVX512{DQ,VL} 235 vcvtuqq2psx -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 236 vcvtuqq2psx -2064(%rdx), %xmm30 # AVX512{DQ,VL} 237 vcvtuqq2psx 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 238 vcvtuqq2psx 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 239 vcvtuqq2psx -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 240 vcvtuqq2psx -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 241 vcvtuqq2ps %ymm29, %xmm30 # AVX512{DQ,VL} 242 vcvtuqq2ps %ymm29, %xmm30{%k7} # AVX512{DQ,VL} 243 vcvtuqq2ps %ymm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 244 vcvtuqq2psy (%rcx), %xmm30 # AVX512{DQ,VL} 245 vcvtuqq2psy 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 246 vcvtuqq2ps (%rcx){1to4}, %xmm30 # AVX512{DQ,VL} 247 vcvtuqq2psy 4064(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 248 vcvtuqq2psy 4096(%rdx), %xmm30 # AVX512{DQ,VL} 249 vcvtuqq2psy -4096(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 250 vcvtuqq2psy -4128(%rdx), %xmm30 # AVX512{DQ,VL} 251 vcvtuqq2psy 1016(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} Disp8 252 vcvtuqq2psy 1024(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} 253 vcvtuqq2psy -1024(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} Disp8 254 vcvtuqq2psy -1032(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} 255 vextractf64x2 $0xab, %ymm29, %xmm30 # AVX512{DQ,VL} 256 vextractf64x2 $0xab, %ymm29, %xmm30{%k7} # AVX512{DQ,VL} 257 vextractf64x2 $0xab, %ymm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 258 vextractf64x2 $123, %ymm29, %xmm30 # AVX512{DQ,VL} 259 vextracti64x2 $0xab, %ymm29, %xmm30 # AVX512{DQ,VL} 260 vextracti64x2 $0xab, %ymm29, %xmm30{%k7} # AVX512{DQ,VL} 261 vextracti64x2 $0xab, %ymm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 262 vextracti64x2 $123, %ymm29, %xmm30 # AVX512{DQ,VL} 263 vfpclasspd $0xab, %xmm30, %k5 # AVX512{DQ,VL} 264 vfpclasspd $0xab, %xmm30, %k5{%k7} # AVX512{DQ,VL} 265 vfpclasspd $123, %xmm30, %k5 # AVX512{DQ,VL} 266 vfpclasspdx $123, (%rcx), %k5 # AVX512{DQ,VL} 267 vfpclasspdx $123, 0x123(%rax,%r14,8), %k5 # AVX512{DQ,VL} 268 vfpclasspd $123, (%rcx){1to2}, %k5 # AVX512{DQ,VL} 269 vfpclasspdx $123, 2032(%rdx), %k5 # AVX512{DQ,VL} Disp8 270 vfpclasspdx $123, 2048(%rdx), %k5 # AVX512{DQ,VL} 271 vfpclasspdx $123, -2048(%rdx), %k5 # AVX512{DQ,VL} Disp8 272 vfpclasspdx $123, -2064(%rdx), %k5 # AVX512{DQ,VL} 273 vfpclasspdx $123, 1016(%rdx){1to2}, %k5 # AVX512{DQ,VL} Disp8 274 vfpclasspdx $123, 1024(%rdx){1to2}, %k5 # AVX512{DQ,VL} 275 vfpclasspdx $123, -1024(%rdx){1to2}, %k5 # AVX512{DQ,VL} Disp8 276 vfpclasspdx $123, -1032(%rdx){1to2}, %k5 # AVX512{DQ,VL} 277 vfpclasspd $0xab, %ymm30, %k5 # AVX512{DQ,VL} 278 vfpclasspd $0xab, %ymm30, %k5{%k7} # AVX512{DQ,VL} 279 vfpclasspd $123, %ymm30, %k5 # AVX512{DQ,VL} 280 vfpclasspdy $123, (%rcx), %k5 # AVX512{DQ,VL} 281 vfpclasspdy $123, 0x123(%rax,%r14,8), %k5 # AVX512{DQ,VL} 282 vfpclasspd $123, (%rcx){1to4}, %k5 # AVX512{DQ,VL} 283 vfpclasspdy $123, 4064(%rdx), %k5 # AVX512{DQ,VL} Disp8 284 vfpclasspdy $123, 4096(%rdx), %k5 # AVX512{DQ,VL} 285 vfpclasspdy $123, -4096(%rdx), %k5 # AVX512{DQ,VL} Disp8 286 vfpclasspdy $123, -4128(%rdx), %k5 # AVX512{DQ,VL} 287 vfpclasspdy $123, 1016(%rdx){1to4}, %k5 # AVX512{DQ,VL} Disp8 288 vfpclasspdy $123, 1024(%rdx){1to4}, %k5 # AVX512{DQ,VL} 289 vfpclasspdy $123, -1024(%rdx){1to4}, %k5 # AVX512{DQ,VL} Disp8 290 vfpclasspdy $123, -1032(%rdx){1to4}, %k5 # AVX512{DQ,VL} 291 vfpclassps $0xab, %xmm30, %k5 # AVX512{DQ,VL} 292 vfpclassps $0xab, %xmm30, %k5{%k7} # AVX512{DQ,VL} 293 vfpclassps $123, %xmm30, %k5 # AVX512{DQ,VL} 294 vfpclasspsx $123, (%rcx), %k5 # AVX512{DQ,VL} 295 vfpclasspsx $123, 0x123(%rax,%r14,8), %k5 # AVX512{DQ,VL} 296 vfpclassps $123, (%rcx){1to4}, %k5 # AVX512{DQ,VL} 297 vfpclasspsx $123, 2032(%rdx), %k5 # AVX512{DQ,VL} Disp8 298 vfpclasspsx $123, 2048(%rdx), %k5 # AVX512{DQ,VL} 299 vfpclasspsx $123, -2048(%rdx), %k5 # AVX512{DQ,VL} Disp8 300 vfpclasspsx $123, -2064(%rdx), %k5 # AVX512{DQ,VL} 301 vfpclasspsx $123, 508(%rdx){1to4}, %k5 # AVX512{DQ,VL} Disp8 302 vfpclasspsx $123, 512(%rdx){1to4}, %k5 # AVX512{DQ,VL} 303 vfpclasspsx $123, -512(%rdx){1to4}, %k5 # AVX512{DQ,VL} Disp8 304 vfpclasspsx $123, -516(%rdx){1to4}, %k5 # AVX512{DQ,VL} 305 vfpclassps $0xab, %ymm30, %k5 # AVX512{DQ,VL} 306 vfpclassps $0xab, %ymm30, %k5{%k7} # AVX512{DQ,VL} 307 vfpclassps $123, %ymm30, %k5 # AVX512{DQ,VL} 308 vfpclasspsy $123, (%rcx), %k5 # AVX512{DQ,VL} 309 vfpclasspsy $123, 0x123(%rax,%r14,8), %k5 # AVX512{DQ,VL} 310 vfpclassps $123, (%rcx){1to8}, %k5 # AVX512{DQ,VL} 311 vfpclasspsy $123, 4064(%rdx), %k5 # AVX512{DQ,VL} Disp8 312 vfpclasspsy $123, 4096(%rdx), %k5 # AVX512{DQ,VL} 313 vfpclasspsy $123, -4096(%rdx), %k5 # AVX512{DQ,VL} Disp8 314 vfpclasspsy $123, -4128(%rdx), %k5 # AVX512{DQ,VL} 315 vfpclasspsy $123, 508(%rdx){1to8}, %k5 # AVX512{DQ,VL} Disp8 316 vfpclasspsy $123, 512(%rdx){1to8}, %k5 # AVX512{DQ,VL} 317 vfpclasspsy $123, -512(%rdx){1to8}, %k5 # AVX512{DQ,VL} Disp8 318 vfpclasspsy $123, -516(%rdx){1to8}, %k5 # AVX512{DQ,VL} 319 vinsertf64x2 $0xab, %xmm28, %ymm29, %ymm30 # AVX512{DQ,VL} 320 vinsertf64x2 $0xab, %xmm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 321 vinsertf64x2 $0xab, %xmm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 322 vinsertf64x2 $123, %xmm28, %ymm29, %ymm30 # AVX512{DQ,VL} 323 vinsertf64x2 $123, (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 324 vinsertf64x2 $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 325 vinsertf64x2 $123, 2032(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 326 vinsertf64x2 $123, 2048(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 327 vinsertf64x2 $123, -2048(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 328 vinsertf64x2 $123, -2064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 329 vinserti64x2 $0xab, %xmm28, %ymm29, %ymm30 # AVX512{DQ,VL} 330 vinserti64x2 $0xab, %xmm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 331 vinserti64x2 $0xab, %xmm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 332 vinserti64x2 $123, %xmm28, %ymm29, %ymm30 # AVX512{DQ,VL} 333 vinserti64x2 $123, (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 334 vinserti64x2 $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 335 vinserti64x2 $123, 2032(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 336 vinserti64x2 $123, 2048(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 337 vinserti64x2 $123, -2048(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 338 vinserti64x2 $123, -2064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 339 vbroadcasti32x2 %xmm31, %xmm30 # AVX512{DQ,VL} 340 vbroadcasti32x2 %xmm31, %xmm30{%k7} # AVX512{DQ,VL} 341 vbroadcasti32x2 %xmm31, %xmm30{%k7}{z} # AVX512{DQ,VL} 342 vbroadcasti32x2 (%rcx), %xmm30 # AVX512{DQ,VL} 343 vbroadcasti32x2 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 344 vbroadcasti32x2 1016(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 345 vbroadcasti32x2 1024(%rdx), %xmm30 # AVX512{DQ,VL} 346 vbroadcasti32x2 -1024(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 347 vbroadcasti32x2 -1032(%rdx), %xmm30 # AVX512{DQ,VL} 348 vbroadcasti32x2 %xmm31, %ymm30 # AVX512{DQ,VL} 349 vbroadcasti32x2 %xmm31, %ymm30{%k7} # AVX512{DQ,VL} 350 vbroadcasti32x2 %xmm31, %ymm30{%k7}{z} # AVX512{DQ,VL} 351 vbroadcasti32x2 (%rcx), %ymm30 # AVX512{DQ,VL} 352 vbroadcasti32x2 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 353 vbroadcasti32x2 1016(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 354 vbroadcasti32x2 1024(%rdx), %ymm30 # AVX512{DQ,VL} 355 vbroadcasti32x2 -1024(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 356 vbroadcasti32x2 -1032(%rdx), %ymm30 # AVX512{DQ,VL} 357 vpmullq %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 358 vpmullq %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 359 vpmullq %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 360 vpmullq (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 361 vpmullq 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 362 vpmullq (%rcx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 363 vpmullq 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 364 vpmullq 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 365 vpmullq -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 366 vpmullq -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 367 vpmullq 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 368 vpmullq 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 369 vpmullq -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 370 vpmullq -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 371 vpmullq %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 372 vpmullq %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 373 vpmullq %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 374 vpmullq (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 375 vpmullq 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 376 vpmullq (%rcx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 377 vpmullq 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 378 vpmullq 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 379 vpmullq -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 380 vpmullq -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 381 vpmullq 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 382 vpmullq 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 383 vpmullq -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 384 vpmullq -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 385 vrangepd $0xab, %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 386 vrangepd $0xab, %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 387 vrangepd $0xab, %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 388 vrangepd $123, %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 389 vrangepd $123, (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 390 vrangepd $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 391 vrangepd $123, (%rcx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 392 vrangepd $123, 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 393 vrangepd $123, 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 394 vrangepd $123, -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 395 vrangepd $123, -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 396 vrangepd $123, 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 397 vrangepd $123, 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 398 vrangepd $123, -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 399 vrangepd $123, -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 400 vrangepd $0xab, %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 401 vrangepd $0xab, %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 402 vrangepd $0xab, %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 403 vrangepd $123, %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 404 vrangepd $123, (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 405 vrangepd $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 406 vrangepd $123, (%rcx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 407 vrangepd $123, 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 408 vrangepd $123, 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 409 vrangepd $123, -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 410 vrangepd $123, -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 411 vrangepd $123, 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 412 vrangepd $123, 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 413 vrangepd $123, -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 414 vrangepd $123, -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 415 vrangeps $0xab, %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 416 vrangeps $0xab, %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 417 vrangeps $0xab, %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 418 vrangeps $123, %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 419 vrangeps $123, (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 420 vrangeps $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 421 vrangeps $123, (%rcx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 422 vrangeps $123, 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 423 vrangeps $123, 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 424 vrangeps $123, -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 425 vrangeps $123, -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 426 vrangeps $123, 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 427 vrangeps $123, 512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 428 vrangeps $123, -512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 429 vrangeps $123, -516(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 430 vrangeps $0xab, %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 431 vrangeps $0xab, %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 432 vrangeps $0xab, %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 433 vrangeps $123, %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 434 vrangeps $123, (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 435 vrangeps $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 436 vrangeps $123, (%rcx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 437 vrangeps $123, 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 438 vrangeps $123, 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 439 vrangeps $123, -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 440 vrangeps $123, -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 441 vrangeps $123, 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 442 vrangeps $123, 512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 443 vrangeps $123, -512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 444 vrangeps $123, -516(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 445 vandpd %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 446 vandpd %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 447 vandpd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 448 vandpd (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 449 vandpd 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 450 vandpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 451 vandpd 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 452 vandpd 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 453 vandpd -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 454 vandpd -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 455 vandpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 456 vandpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 457 vandpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 458 vandpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 459 vandpd %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 460 vandpd %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 461 vandpd %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 462 vandpd (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 463 vandpd 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 464 vandpd (%rcx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 465 vandpd 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 466 vandpd 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 467 vandpd -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 468 vandpd -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 469 vandpd 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 470 vandpd 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 471 vandpd -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 472 vandpd -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 473 vandps %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 474 vandps %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 475 vandps %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 476 vandps (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 477 vandps 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 478 vandps (%rcx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 479 vandps 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 480 vandps 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 481 vandps -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 482 vandps -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 483 vandps 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 484 vandps 512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 485 vandps -512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 486 vandps -516(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 487 vandps %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 488 vandps %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 489 vandps %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 490 vandps (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 491 vandps 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 492 vandps (%rcx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 493 vandps 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 494 vandps 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 495 vandps -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 496 vandps -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 497 vandps 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 498 vandps 512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 499 vandps -512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 500 vandps -516(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 501 vandnpd %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 502 vandnpd %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 503 vandnpd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 504 vandnpd (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 505 vandnpd 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 506 vandnpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 507 vandnpd 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 508 vandnpd 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 509 vandnpd -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 510 vandnpd -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 511 vandnpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 512 vandnpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 513 vandnpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 514 vandnpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 515 vandnpd %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 516 vandnpd %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 517 vandnpd %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 518 vandnpd (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 519 vandnpd 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 520 vandnpd (%rcx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 521 vandnpd 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 522 vandnpd 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 523 vandnpd -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 524 vandnpd -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 525 vandnpd 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 526 vandnpd 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 527 vandnpd -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 528 vandnpd -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 529 vandnps %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 530 vandnps %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 531 vandnps %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 532 vandnps (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 533 vandnps 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 534 vandnps (%rcx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 535 vandnps 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 536 vandnps 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 537 vandnps -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 538 vandnps -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 539 vandnps 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 540 vandnps 512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 541 vandnps -512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 542 vandnps -516(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 543 vandnps %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 544 vandnps %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 545 vandnps %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 546 vandnps (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 547 vandnps 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 548 vandnps (%rcx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 549 vandnps 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 550 vandnps 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 551 vandnps -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 552 vandnps -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 553 vandnps 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 554 vandnps 512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 555 vandnps -512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 556 vandnps -516(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 557 vorpd %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 558 vorpd %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 559 vorpd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 560 vorpd (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 561 vorpd 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 562 vorpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 563 vorpd 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 564 vorpd 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 565 vorpd -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 566 vorpd -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 567 vorpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 568 vorpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 569 vorpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 570 vorpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 571 vorpd %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 572 vorpd %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 573 vorpd %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 574 vorpd (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 575 vorpd 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 576 vorpd (%rcx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 577 vorpd 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 578 vorpd 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 579 vorpd -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 580 vorpd -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 581 vorpd 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 582 vorpd 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 583 vorpd -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 584 vorpd -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 585 vorps %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 586 vorps %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 587 vorps %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 588 vorps (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 589 vorps 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 590 vorps (%rcx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 591 vorps 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 592 vorps 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 593 vorps -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 594 vorps -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 595 vorps 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 596 vorps 512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 597 vorps -512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 598 vorps -516(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 599 vorps %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 600 vorps %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 601 vorps %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 602 vorps (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 603 vorps 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 604 vorps (%rcx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 605 vorps 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 606 vorps 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 607 vorps -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 608 vorps -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 609 vorps 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 610 vorps 512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 611 vorps -512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 612 vorps -516(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 613 vxorpd %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 614 vxorpd %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 615 vxorpd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 616 vxorpd (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 617 vxorpd 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 618 vxorpd (%rcx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 619 vxorpd 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 620 vxorpd 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 621 vxorpd -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 622 vxorpd -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 623 vxorpd 1016(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 624 vxorpd 1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 625 vxorpd -1024(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 626 vxorpd -1032(%rdx){1to2}, %xmm29, %xmm30 # AVX512{DQ,VL} 627 vxorpd %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 628 vxorpd %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 629 vxorpd %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 630 vxorpd (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 631 vxorpd 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 632 vxorpd (%rcx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 633 vxorpd 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 634 vxorpd 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 635 vxorpd -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 636 vxorpd -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 637 vxorpd 1016(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 638 vxorpd 1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 639 vxorpd -1024(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 640 vxorpd -1032(%rdx){1to4}, %ymm29, %ymm30 # AVX512{DQ,VL} 641 vxorps %xmm28, %xmm29, %xmm30 # AVX512{DQ,VL} 642 vxorps %xmm28, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 643 vxorps %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 644 vxorps (%rcx), %xmm29, %xmm30 # AVX512{DQ,VL} 645 vxorps 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{DQ,VL} 646 vxorps (%rcx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 647 vxorps 2032(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 648 vxorps 2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 649 vxorps -2048(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 650 vxorps -2064(%rdx), %xmm29, %xmm30 # AVX512{DQ,VL} 651 vxorps 508(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 652 vxorps 512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 653 vxorps -512(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} Disp8 654 vxorps -516(%rdx){1to4}, %xmm29, %xmm30 # AVX512{DQ,VL} 655 vxorps %ymm28, %ymm29, %ymm30 # AVX512{DQ,VL} 656 vxorps %ymm28, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 657 vxorps %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 658 vxorps (%rcx), %ymm29, %ymm30 # AVX512{DQ,VL} 659 vxorps 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{DQ,VL} 660 vxorps (%rcx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 661 vxorps 4064(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 662 vxorps 4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 663 vxorps -4096(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 664 vxorps -4128(%rdx), %ymm29, %ymm30 # AVX512{DQ,VL} 665 vxorps 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 666 vxorps 512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 667 vxorps -512(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} Disp8 668 vxorps -516(%rdx){1to8}, %ymm29, %ymm30 # AVX512{DQ,VL} 669 vreducepd $0xab, %xmm29, %xmm30 # AVX512{DQ,VL} 670 vreducepd $0xab, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 671 vreducepd $0xab, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 672 vreducepd $123, %xmm29, %xmm30 # AVX512{DQ,VL} 673 vreducepd $123, (%rcx), %xmm30 # AVX512{DQ,VL} 674 vreducepd $123, 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 675 vreducepd $123, (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 676 vreducepd $123, 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 677 vreducepd $123, 2048(%rdx), %xmm30 # AVX512{DQ,VL} 678 vreducepd $123, -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 679 vreducepd $123, -2064(%rdx), %xmm30 # AVX512{DQ,VL} 680 vreducepd $123, 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 681 vreducepd $123, 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 682 vreducepd $123, -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 683 vreducepd $123, -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 684 vreducepd $0xab, %ymm29, %ymm30 # AVX512{DQ,VL} 685 vreducepd $0xab, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 686 vreducepd $0xab, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 687 vreducepd $123, %ymm29, %ymm30 # AVX512{DQ,VL} 688 vreducepd $123, (%rcx), %ymm30 # AVX512{DQ,VL} 689 vreducepd $123, 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 690 vreducepd $123, (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 691 vreducepd $123, 4064(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 692 vreducepd $123, 4096(%rdx), %ymm30 # AVX512{DQ,VL} 693 vreducepd $123, -4096(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 694 vreducepd $123, -4128(%rdx), %ymm30 # AVX512{DQ,VL} 695 vreducepd $123, 1016(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 696 vreducepd $123, 1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 697 vreducepd $123, -1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 698 vreducepd $123, -1032(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 699 vreduceps $0xab, %xmm29, %xmm30 # AVX512{DQ,VL} 700 vreduceps $0xab, %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 701 vreduceps $0xab, %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 702 vreduceps $123, %xmm29, %xmm30 # AVX512{DQ,VL} 703 vreduceps $123, (%rcx), %xmm30 # AVX512{DQ,VL} 704 vreduceps $123, 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 705 vreduceps $123, (%rcx){1to4}, %xmm30 # AVX512{DQ,VL} 706 vreduceps $123, 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 707 vreduceps $123, 2048(%rdx), %xmm30 # AVX512{DQ,VL} 708 vreduceps $123, -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 709 vreduceps $123, -2064(%rdx), %xmm30 # AVX512{DQ,VL} 710 vreduceps $123, 508(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} Disp8 711 vreduceps $123, 512(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} 712 vreduceps $123, -512(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} Disp8 713 vreduceps $123, -516(%rdx){1to4}, %xmm30 # AVX512{DQ,VL} 714 vreduceps $0xab, %ymm29, %ymm30 # AVX512{DQ,VL} 715 vreduceps $0xab, %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 716 vreduceps $0xab, %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 717 vreduceps $123, %ymm29, %ymm30 # AVX512{DQ,VL} 718 vreduceps $123, (%rcx), %ymm30 # AVX512{DQ,VL} 719 vreduceps $123, 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 720 vreduceps $123, (%rcx){1to8}, %ymm30 # AVX512{DQ,VL} 721 vreduceps $123, 4064(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 722 vreduceps $123, 4096(%rdx), %ymm30 # AVX512{DQ,VL} 723 vreduceps $123, -4096(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 724 vreduceps $123, -4128(%rdx), %ymm30 # AVX512{DQ,VL} 725 vreduceps $123, 508(%rdx){1to8}, %ymm30 # AVX512{DQ,VL} Disp8 726 vreduceps $123, 512(%rdx){1to8}, %ymm30 # AVX512{DQ,VL} 727 vreduceps $123, -512(%rdx){1to8}, %ymm30 # AVX512{DQ,VL} Disp8 728 vreduceps $123, -516(%rdx){1to8}, %ymm30 # AVX512{DQ,VL} 729 vextractf64x2 $0xab, %ymm29, (%rcx) # AVX512{DQ,VL} 730 vextractf64x2 $0xab, %ymm29, (%rcx){%k7} # AVX512{DQ,VL} 731 vextractf64x2 $123, %ymm29, (%rcx) # AVX512{DQ,VL} 732 vextractf64x2 $123, %ymm29, 0x123(%rax,%r14,8) # AVX512{DQ,VL} 733 vextractf64x2 $123, %ymm29, 2032(%rdx) # AVX512{DQ,VL} Disp8 734 vextractf64x2 $123, %ymm29, 2048(%rdx) # AVX512{DQ,VL} 735 vextractf64x2 $123, %ymm29, -2048(%rdx) # AVX512{DQ,VL} Disp8 736 vextractf64x2 $123, %ymm29, -2064(%rdx) # AVX512{DQ,VL} 737 vextracti64x2 $0xab, %ymm29, (%rcx) # AVX512{DQ,VL} 738 vextracti64x2 $0xab, %ymm29, (%rcx){%k7} # AVX512{DQ,VL} 739 vextracti64x2 $123, %ymm29, (%rcx) # AVX512{DQ,VL} 740 vextracti64x2 $123, %ymm29, 0x123(%rax,%r14,8) # AVX512{DQ,VL} 741 vextracti64x2 $123, %ymm29, 2032(%rdx) # AVX512{DQ,VL} Disp8 742 vextracti64x2 $123, %ymm29, 2048(%rdx) # AVX512{DQ,VL} 743 vextracti64x2 $123, %ymm29, -2048(%rdx) # AVX512{DQ,VL} Disp8 744 vextracti64x2 $123, %ymm29, -2064(%rdx) # AVX512{DQ,VL} 745 vcvttpd2qq %xmm29, %xmm30 # AVX512{DQ,VL} 746 vcvttpd2qq %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 747 vcvttpd2qq %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 748 vcvttpd2qq (%rcx), %xmm30 # AVX512{DQ,VL} 749 vcvttpd2qq 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 750 vcvttpd2qq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 751 vcvttpd2qq 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 752 vcvttpd2qq 2048(%rdx), %xmm30 # AVX512{DQ,VL} 753 vcvttpd2qq -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 754 vcvttpd2qq -2064(%rdx), %xmm30 # AVX512{DQ,VL} 755 vcvttpd2qq 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 756 vcvttpd2qq 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 757 vcvttpd2qq -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 758 vcvttpd2qq -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 759 vcvttpd2qq %ymm29, %ymm30 # AVX512{DQ,VL} 760 vcvttpd2qq %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 761 vcvttpd2qq %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 762 vcvttpd2qq (%rcx), %ymm30 # AVX512{DQ,VL} 763 vcvttpd2qq 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 764 vcvttpd2qq (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 765 vcvttpd2qq 4064(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 766 vcvttpd2qq 4096(%rdx), %ymm30 # AVX512{DQ,VL} 767 vcvttpd2qq -4096(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 768 vcvttpd2qq -4128(%rdx), %ymm30 # AVX512{DQ,VL} 769 vcvttpd2qq 1016(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 770 vcvttpd2qq 1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 771 vcvttpd2qq -1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 772 vcvttpd2qq -1032(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 773 vcvttpd2uqq %xmm29, %xmm30 # AVX512{DQ,VL} 774 vcvttpd2uqq %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 775 vcvttpd2uqq %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 776 vcvttpd2uqq (%rcx), %xmm30 # AVX512{DQ,VL} 777 vcvttpd2uqq 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 778 vcvttpd2uqq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 779 vcvttpd2uqq 2032(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 780 vcvttpd2uqq 2048(%rdx), %xmm30 # AVX512{DQ,VL} 781 vcvttpd2uqq -2048(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 782 vcvttpd2uqq -2064(%rdx), %xmm30 # AVX512{DQ,VL} 783 vcvttpd2uqq 1016(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 784 vcvttpd2uqq 1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 785 vcvttpd2uqq -1024(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 786 vcvttpd2uqq -1032(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 787 vcvttpd2uqq %ymm29, %ymm30 # AVX512{DQ,VL} 788 vcvttpd2uqq %ymm29, %ymm30{%k7} # AVX512{DQ,VL} 789 vcvttpd2uqq %ymm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 790 vcvttpd2uqq (%rcx), %ymm30 # AVX512{DQ,VL} 791 vcvttpd2uqq 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 792 vcvttpd2uqq (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 793 vcvttpd2uqq 4064(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 794 vcvttpd2uqq 4096(%rdx), %ymm30 # AVX512{DQ,VL} 795 vcvttpd2uqq -4096(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 796 vcvttpd2uqq -4128(%rdx), %ymm30 # AVX512{DQ,VL} 797 vcvttpd2uqq 1016(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 798 vcvttpd2uqq 1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 799 vcvttpd2uqq -1024(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 800 vcvttpd2uqq -1032(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 801 vcvttps2qq %xmm29, %xmm30 # AVX512{DQ,VL} 802 vcvttps2qq %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 803 vcvttps2qq %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 804 vcvttps2qq (%rcx), %xmm30 # AVX512{DQ,VL} 805 vcvttps2qq 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 806 vcvttps2qq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 807 vcvttps2qq 1016(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 808 vcvttps2qq 1024(%rdx), %xmm30 # AVX512{DQ,VL} 809 vcvttps2qq -1024(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 810 vcvttps2qq -1032(%rdx), %xmm30 # AVX512{DQ,VL} 811 vcvttps2qq 508(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 812 vcvttps2qq 512(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 813 vcvttps2qq -512(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 814 vcvttps2qq -516(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 815 vcvttps2qq %xmm29, %ymm30 # AVX512{DQ,VL} 816 vcvttps2qq %xmm29, %ymm30{%k7} # AVX512{DQ,VL} 817 vcvttps2qq %xmm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 818 vcvttps2qq (%rcx), %ymm30 # AVX512{DQ,VL} 819 vcvttps2qq 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 820 vcvttps2qq (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 821 vcvttps2qq 2032(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 822 vcvttps2qq 2048(%rdx), %ymm30 # AVX512{DQ,VL} 823 vcvttps2qq -2048(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 824 vcvttps2qq -2064(%rdx), %ymm30 # AVX512{DQ,VL} 825 vcvttps2qq 508(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 826 vcvttps2qq 512(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 827 vcvttps2qq -512(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 828 vcvttps2qq -516(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 829 vcvttps2uqq %xmm29, %xmm30 # AVX512{DQ,VL} 830 vcvttps2uqq %xmm29, %xmm30{%k7} # AVX512{DQ,VL} 831 vcvttps2uqq %xmm29, %xmm30{%k7}{z} # AVX512{DQ,VL} 832 vcvttps2uqq (%rcx), %xmm30 # AVX512{DQ,VL} 833 vcvttps2uqq 0x123(%rax,%r14,8), %xmm30 # AVX512{DQ,VL} 834 vcvttps2uqq (%rcx){1to2}, %xmm30 # AVX512{DQ,VL} 835 vcvttps2uqq 1016(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 836 vcvttps2uqq 1024(%rdx), %xmm30 # AVX512{DQ,VL} 837 vcvttps2uqq -1024(%rdx), %xmm30 # AVX512{DQ,VL} Disp8 838 vcvttps2uqq -1032(%rdx), %xmm30 # AVX512{DQ,VL} 839 vcvttps2uqq 508(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 840 vcvttps2uqq 512(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 841 vcvttps2uqq -512(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} Disp8 842 vcvttps2uqq -516(%rdx){1to2}, %xmm30 # AVX512{DQ,VL} 843 vcvttps2uqq %xmm29, %ymm30 # AVX512{DQ,VL} 844 vcvttps2uqq %xmm29, %ymm30{%k7} # AVX512{DQ,VL} 845 vcvttps2uqq %xmm29, %ymm30{%k7}{z} # AVX512{DQ,VL} 846 vcvttps2uqq (%rcx), %ymm30 # AVX512{DQ,VL} 847 vcvttps2uqq 0x123(%rax,%r14,8), %ymm30 # AVX512{DQ,VL} 848 vcvttps2uqq (%rcx){1to4}, %ymm30 # AVX512{DQ,VL} 849 vcvttps2uqq 2032(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 850 vcvttps2uqq 2048(%rdx), %ymm30 # AVX512{DQ,VL} 851 vcvttps2uqq -2048(%rdx), %ymm30 # AVX512{DQ,VL} Disp8 852 vcvttps2uqq -2064(%rdx), %ymm30 # AVX512{DQ,VL} 853 vcvttps2uqq 508(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 854 vcvttps2uqq 512(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 855 vcvttps2uqq -512(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} Disp8 856 vcvttps2uqq -516(%rdx){1to4}, %ymm30 # AVX512{DQ,VL} 857 vpmovd2m %xmm30, %k5 # AVX512{DQ,VL} 858 vpmovd2m %ymm30, %k5 # AVX512{DQ,VL} 859 vpmovq2m %xmm30, %k5 # AVX512{DQ,VL} 860 vpmovq2m %ymm30, %k5 # AVX512{DQ,VL} 861 vpmovm2d %k5, %xmm30 # AVX512{DQ,VL} 862 vpmovm2d %k5, %ymm30 # AVX512{DQ,VL} 863 vpmovm2q %k5, %xmm30 # AVX512{DQ,VL} 864 vpmovm2q %k5, %ymm30 # AVX512{DQ,VL} 865 866 .intel_syntax noprefix 867 vbroadcastf64x2 ymm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 868 vbroadcastf64x2 ymm30{k7}, XMMWORD PTR [rcx] # AVX512{DQ,VL} 869 vbroadcastf64x2 ymm30{k7}{z}, XMMWORD PTR [rcx] # AVX512{DQ,VL} 870 vbroadcastf64x2 ymm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 871 vbroadcastf64x2 ymm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 872 vbroadcastf64x2 ymm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 873 vbroadcastf64x2 ymm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 874 vbroadcastf64x2 ymm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 875 vbroadcasti64x2 ymm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 876 vbroadcasti64x2 ymm30{k7}, XMMWORD PTR [rcx] # AVX512{DQ,VL} 877 vbroadcasti64x2 ymm30{k7}{z}, XMMWORD PTR [rcx] # AVX512{DQ,VL} 878 vbroadcasti64x2 ymm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 879 vbroadcasti64x2 ymm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 880 vbroadcasti64x2 ymm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 881 vbroadcasti64x2 ymm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 882 vbroadcasti64x2 ymm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 883 vbroadcastf32x2 ymm30, xmm31 # AVX512{DQ,VL} 884 vbroadcastf32x2 ymm30{k7}, xmm31 # AVX512{DQ,VL} 885 vbroadcastf32x2 ymm30{k7}{z}, xmm31 # AVX512{DQ,VL} 886 vbroadcastf32x2 ymm30, QWORD PTR [rcx] # AVX512{DQ,VL} 887 vbroadcastf32x2 ymm30, QWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 888 vbroadcastf32x2 ymm30, QWORD PTR [rdx+1016] # AVX512{DQ,VL} Disp8 889 vbroadcastf32x2 ymm30, QWORD PTR [rdx+1024] # AVX512{DQ,VL} 890 vbroadcastf32x2 ymm30, QWORD PTR [rdx-1024] # AVX512{DQ,VL} Disp8 891 vbroadcastf32x2 ymm30, QWORD PTR [rdx-1032] # AVX512{DQ,VL} 892 vcvtpd2qq xmm30, xmm29 # AVX512{DQ,VL} 893 vcvtpd2qq xmm30{k7}, xmm29 # AVX512{DQ,VL} 894 vcvtpd2qq xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 895 vcvtpd2qq xmm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 896 vcvtpd2qq xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 897 vcvtpd2qq xmm30, [rcx]{1to2} # AVX512{DQ,VL} 898 vcvtpd2qq xmm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 899 vcvtpd2qq xmm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 900 vcvtpd2qq xmm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 901 vcvtpd2qq xmm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 902 vcvtpd2qq xmm30, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 903 vcvtpd2qq xmm30, [rdx+1024]{1to2} # AVX512{DQ,VL} 904 vcvtpd2qq xmm30, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 905 vcvtpd2qq xmm30, [rdx-1032]{1to2} # AVX512{DQ,VL} 906 vcvtpd2qq ymm30, ymm29 # AVX512{DQ,VL} 907 vcvtpd2qq ymm30{k7}, ymm29 # AVX512{DQ,VL} 908 vcvtpd2qq ymm30{k7}{z}, ymm29 # AVX512{DQ,VL} 909 vcvtpd2qq ymm30, YMMWORD PTR [rcx] # AVX512{DQ,VL} 910 vcvtpd2qq ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 911 vcvtpd2qq ymm30, [rcx]{1to4} # AVX512{DQ,VL} 912 vcvtpd2qq ymm30, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 913 vcvtpd2qq ymm30, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 914 vcvtpd2qq ymm30, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 915 vcvtpd2qq ymm30, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 916 vcvtpd2qq ymm30, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 917 vcvtpd2qq ymm30, [rdx+1024]{1to4} # AVX512{DQ,VL} 918 vcvtpd2qq ymm30, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 919 vcvtpd2qq ymm30, [rdx-1032]{1to4} # AVX512{DQ,VL} 920 vcvtpd2uqq xmm30, xmm29 # AVX512{DQ,VL} 921 vcvtpd2uqq xmm30{k7}, xmm29 # AVX512{DQ,VL} 922 vcvtpd2uqq xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 923 vcvtpd2uqq xmm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 924 vcvtpd2uqq xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 925 vcvtpd2uqq xmm30, [rcx]{1to2} # AVX512{DQ,VL} 926 vcvtpd2uqq xmm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 927 vcvtpd2uqq xmm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 928 vcvtpd2uqq xmm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 929 vcvtpd2uqq xmm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 930 vcvtpd2uqq xmm30, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 931 vcvtpd2uqq xmm30, [rdx+1024]{1to2} # AVX512{DQ,VL} 932 vcvtpd2uqq xmm30, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 933 vcvtpd2uqq xmm30, [rdx-1032]{1to2} # AVX512{DQ,VL} 934 vcvtpd2uqq ymm30, ymm29 # AVX512{DQ,VL} 935 vcvtpd2uqq ymm30{k7}, ymm29 # AVX512{DQ,VL} 936 vcvtpd2uqq ymm30{k7}{z}, ymm29 # AVX512{DQ,VL} 937 vcvtpd2uqq ymm30, YMMWORD PTR [rcx] # AVX512{DQ,VL} 938 vcvtpd2uqq ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 939 vcvtpd2uqq ymm30, [rcx]{1to4} # AVX512{DQ,VL} 940 vcvtpd2uqq ymm30, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 941 vcvtpd2uqq ymm30, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 942 vcvtpd2uqq ymm30, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 943 vcvtpd2uqq ymm30, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 944 vcvtpd2uqq ymm30, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 945 vcvtpd2uqq ymm30, [rdx+1024]{1to4} # AVX512{DQ,VL} 946 vcvtpd2uqq ymm30, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 947 vcvtpd2uqq ymm30, [rdx-1032]{1to4} # AVX512{DQ,VL} 948 vcvtps2qq xmm30, xmm29 # AVX512{DQ,VL} 949 vcvtps2qq xmm30{k7}, xmm29 # AVX512{DQ,VL} 950 vcvtps2qq xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 951 vcvtps2qq xmm30, QWORD PTR [rcx] # AVX512{DQ,VL} 952 vcvtps2qq xmm30, QWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 953 vcvtps2qq xmm30, [rcx]{1to2} # AVX512{DQ,VL} 954 vcvtps2qq xmm30, QWORD PTR [rdx+1016] # AVX512{DQ,VL} Disp8 955 vcvtps2qq xmm30, QWORD PTR [rdx+1024] # AVX512{DQ,VL} 956 vcvtps2qq xmm30, QWORD PTR [rdx-1024] # AVX512{DQ,VL} Disp8 957 vcvtps2qq xmm30, QWORD PTR [rdx-1032] # AVX512{DQ,VL} 958 vcvtps2qq xmm30, [rdx+508]{1to2} # AVX512{DQ,VL} Disp8 959 vcvtps2qq xmm30, [rdx+512]{1to2} # AVX512{DQ,VL} 960 vcvtps2qq xmm30, [rdx-512]{1to2} # AVX512{DQ,VL} Disp8 961 vcvtps2qq xmm30, [rdx-516]{1to2} # AVX512{DQ,VL} 962 vcvtps2qq xmm30, DWORD PTR [rdx+508]{1to2} # AVX512{DQ,VL} Disp8 963 vcvtps2qq ymm30, xmm29 # AVX512{DQ,VL} 964 vcvtps2qq ymm30{k7}, xmm29 # AVX512{DQ,VL} 965 vcvtps2qq ymm30{k7}{z}, xmm29 # AVX512{DQ,VL} 966 vcvtps2qq ymm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 967 vcvtps2qq ymm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 968 vcvtps2qq ymm30, [rcx]{1to4} # AVX512{DQ,VL} 969 vcvtps2qq ymm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 970 vcvtps2qq ymm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 971 vcvtps2qq ymm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 972 vcvtps2qq ymm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 973 vcvtps2qq ymm30, [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 974 vcvtps2qq ymm30, [rdx+512]{1to4} # AVX512{DQ,VL} 975 vcvtps2qq ymm30, [rdx-512]{1to4} # AVX512{DQ,VL} Disp8 976 vcvtps2qq ymm30, [rdx-516]{1to4} # AVX512{DQ,VL} 977 vcvtps2qq ymm30, DWORD PTR [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 978 vcvtps2uqq xmm30, xmm29 # AVX512{DQ,VL} 979 vcvtps2uqq xmm30{k7}, xmm29 # AVX512{DQ,VL} 980 vcvtps2uqq xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 981 vcvtps2uqq xmm30, QWORD PTR [rcx] # AVX512{DQ,VL} 982 vcvtps2uqq xmm30, QWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 983 vcvtps2uqq xmm30, [rcx]{1to2} # AVX512{DQ,VL} 984 vcvtps2uqq xmm30, QWORD PTR [rdx+1016] # AVX512{DQ,VL} Disp8 985 vcvtps2uqq xmm30, QWORD PTR [rdx+1024] # AVX512{DQ,VL} 986 vcvtps2uqq xmm30, QWORD PTR [rdx-1024] # AVX512{DQ,VL} Disp8 987 vcvtps2uqq xmm30, QWORD PTR [rdx-1032] # AVX512{DQ,VL} 988 vcvtps2uqq xmm30, [rdx+508]{1to2} # AVX512{DQ,VL} Disp8 989 vcvtps2uqq xmm30, [rdx+512]{1to2} # AVX512{DQ,VL} 990 vcvtps2uqq xmm30, [rdx-512]{1to2} # AVX512{DQ,VL} Disp8 991 vcvtps2uqq xmm30, [rdx-516]{1to2} # AVX512{DQ,VL} 992 vcvtps2uqq xmm30, DWORD PTR [rdx+508]{1to2} # AVX512{DQ,VL} Disp8 993 vcvtps2uqq ymm30, xmm29 # AVX512{DQ,VL} 994 vcvtps2uqq ymm30{k7}, xmm29 # AVX512{DQ,VL} 995 vcvtps2uqq ymm30{k7}{z}, xmm29 # AVX512{DQ,VL} 996 vcvtps2uqq ymm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 997 vcvtps2uqq ymm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 998 vcvtps2uqq ymm30, [rcx]{1to4} # AVX512{DQ,VL} 999 vcvtps2uqq ymm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1000 vcvtps2uqq ymm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1001 vcvtps2uqq ymm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1002 vcvtps2uqq ymm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1003 vcvtps2uqq ymm30, [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1004 vcvtps2uqq ymm30, [rdx+512]{1to4} # AVX512{DQ,VL} 1005 vcvtps2uqq ymm30, [rdx-512]{1to4} # AVX512{DQ,VL} Disp8 1006 vcvtps2uqq ymm30, [rdx-516]{1to4} # AVX512{DQ,VL} 1007 vcvtps2uqq ymm30, DWORD PTR [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1008 vcvtqq2pd xmm30, xmm29 # AVX512{DQ,VL} 1009 vcvtqq2pd xmm30{k7}, xmm29 # AVX512{DQ,VL} 1010 vcvtqq2pd xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1011 vcvtqq2pd xmm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1012 vcvtqq2pd xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1013 vcvtqq2pd xmm30, [rcx]{1to2} # AVX512{DQ,VL} 1014 vcvtqq2pd xmm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1015 vcvtqq2pd xmm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1016 vcvtqq2pd xmm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1017 vcvtqq2pd xmm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1018 vcvtqq2pd xmm30, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1019 vcvtqq2pd xmm30, [rdx+1024]{1to2} # AVX512{DQ,VL} 1020 vcvtqq2pd xmm30, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1021 vcvtqq2pd xmm30, [rdx-1032]{1to2} # AVX512{DQ,VL} 1022 vcvtqq2pd ymm30, ymm29 # AVX512{DQ,VL} 1023 vcvtqq2pd ymm30{k7}, ymm29 # AVX512{DQ,VL} 1024 vcvtqq2pd ymm30{k7}{z}, ymm29 # AVX512{DQ,VL} 1025 vcvtqq2pd ymm30, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1026 vcvtqq2pd ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1027 vcvtqq2pd ymm30, [rcx]{1to4} # AVX512{DQ,VL} 1028 vcvtqq2pd ymm30, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1029 vcvtqq2pd ymm30, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1030 vcvtqq2pd ymm30, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1031 vcvtqq2pd ymm30, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1032 vcvtqq2pd ymm30, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1033 vcvtqq2pd ymm30, [rdx+1024]{1to4} # AVX512{DQ,VL} 1034 vcvtqq2pd ymm30, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1035 vcvtqq2pd ymm30, [rdx-1032]{1to4} # AVX512{DQ,VL} 1036 vcvtqq2ps xmm30, xmm29 # AVX512{DQ,VL} 1037 vcvtqq2ps xmm30{k7}, xmm29 # AVX512{DQ,VL} 1038 vcvtqq2ps xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1039 vcvtqq2ps xmm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1040 vcvtqq2ps xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1041 vcvtqq2ps xmm30, [rcx]{1to2} # AVX512{DQ,VL} 1042 vcvtqq2ps xmm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1043 vcvtqq2ps xmm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1044 vcvtqq2ps xmm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1045 vcvtqq2ps xmm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1046 vcvtqq2ps xmm30, QWORD PTR [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1047 vcvtqq2ps xmm30, QWORD PTR [rdx+1024]{1to2} # AVX512{DQ,VL} 1048 vcvtqq2ps xmm30, QWORD PTR [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1049 vcvtqq2ps xmm30, QWORD PTR [rdx-1032]{1to2} # AVX512{DQ,VL} 1050 vcvtqq2ps xmm30, ymm29 # AVX512{DQ,VL} 1051 vcvtqq2ps xmm30{k7}, ymm29 # AVX512{DQ,VL} 1052 vcvtqq2ps xmm30{k7}{z}, ymm29 # AVX512{DQ,VL} 1053 vcvtqq2ps xmm30, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1054 vcvtqq2ps xmm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1055 vcvtqq2ps xmm30, [rcx]{1to4} # AVX512{DQ,VL} 1056 vcvtqq2ps xmm30, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1057 vcvtqq2ps xmm30, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1058 vcvtqq2ps xmm30, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1059 vcvtqq2ps xmm30, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1060 vcvtqq2ps xmm30, QWORD PTR [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1061 vcvtqq2ps xmm30, QWORD PTR [rdx+1024]{1to4} # AVX512{DQ,VL} 1062 vcvtqq2ps xmm30, QWORD PTR [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1063 vcvtqq2ps xmm30, QWORD PTR [rdx-1032]{1to4} # AVX512{DQ,VL} 1064 vcvtuqq2pd xmm30, xmm29 # AVX512{DQ,VL} 1065 vcvtuqq2pd xmm30{k7}, xmm29 # AVX512{DQ,VL} 1066 vcvtuqq2pd xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1067 vcvtuqq2pd xmm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1068 vcvtuqq2pd xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1069 vcvtuqq2pd xmm30, [rcx]{1to2} # AVX512{DQ,VL} 1070 vcvtuqq2pd xmm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1071 vcvtuqq2pd xmm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1072 vcvtuqq2pd xmm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1073 vcvtuqq2pd xmm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1074 vcvtuqq2pd xmm30, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1075 vcvtuqq2pd xmm30, [rdx+1024]{1to2} # AVX512{DQ,VL} 1076 vcvtuqq2pd xmm30, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1077 vcvtuqq2pd xmm30, [rdx-1032]{1to2} # AVX512{DQ,VL} 1078 vcvtuqq2pd ymm30, ymm29 # AVX512{DQ,VL} 1079 vcvtuqq2pd ymm30{k7}, ymm29 # AVX512{DQ,VL} 1080 vcvtuqq2pd ymm30{k7}{z}, ymm29 # AVX512{DQ,VL} 1081 vcvtuqq2pd ymm30, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1082 vcvtuqq2pd ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1083 vcvtuqq2pd ymm30, [rcx]{1to4} # AVX512{DQ,VL} 1084 vcvtuqq2pd ymm30, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1085 vcvtuqq2pd ymm30, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1086 vcvtuqq2pd ymm30, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1087 vcvtuqq2pd ymm30, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1088 vcvtuqq2pd ymm30, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1089 vcvtuqq2pd ymm30, [rdx+1024]{1to4} # AVX512{DQ,VL} 1090 vcvtuqq2pd ymm30, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1091 vcvtuqq2pd ymm30, [rdx-1032]{1to4} # AVX512{DQ,VL} 1092 vcvtuqq2ps xmm30, xmm29 # AVX512{DQ,VL} 1093 vcvtuqq2ps xmm30{k7}, xmm29 # AVX512{DQ,VL} 1094 vcvtuqq2ps xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1095 vcvtuqq2ps xmm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1096 vcvtuqq2ps xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1097 vcvtuqq2ps xmm30, [rcx]{1to2} # AVX512{DQ,VL} 1098 vcvtuqq2ps xmm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1099 vcvtuqq2ps xmm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1100 vcvtuqq2ps xmm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1101 vcvtuqq2ps xmm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1102 vcvtuqq2ps xmm30, QWORD PTR [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1103 vcvtuqq2ps xmm30, QWORD PTR [rdx+1024]{1to2} # AVX512{DQ,VL} 1104 vcvtuqq2ps xmm30, QWORD PTR [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1105 vcvtuqq2ps xmm30, QWORD PTR [rdx-1032]{1to2} # AVX512{DQ,VL} 1106 vcvtuqq2ps xmm30, ymm29 # AVX512{DQ,VL} 1107 vcvtuqq2ps xmm30{k7}, ymm29 # AVX512{DQ,VL} 1108 vcvtuqq2ps xmm30{k7}{z}, ymm29 # AVX512{DQ,VL} 1109 vcvtuqq2ps xmm30, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1110 vcvtuqq2ps xmm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1111 vcvtuqq2ps xmm30, [rcx]{1to4} # AVX512{DQ,VL} 1112 vcvtuqq2ps xmm30, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1113 vcvtuqq2ps xmm30, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1114 vcvtuqq2ps xmm30, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1115 vcvtuqq2ps xmm30, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1116 vcvtuqq2ps xmm30, QWORD PTR [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1117 vcvtuqq2ps xmm30, QWORD PTR [rdx+1024]{1to4} # AVX512{DQ,VL} 1118 vcvtuqq2ps xmm30, QWORD PTR [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1119 vcvtuqq2ps xmm30, QWORD PTR [rdx-1032]{1to4} # AVX512{DQ,VL} 1120 vextractf64x2 xmm30, ymm29, 0xab # AVX512{DQ,VL} 1121 vextractf64x2 xmm30{k7}, ymm29, 0xab # AVX512{DQ,VL} 1122 vextractf64x2 xmm30{k7}{z}, ymm29, 0xab # AVX512{DQ,VL} 1123 vextractf64x2 xmm30, ymm29, 123 # AVX512{DQ,VL} 1124 vextracti64x2 xmm30, ymm29, 0xab # AVX512{DQ,VL} 1125 vextracti64x2 xmm30{k7}, ymm29, 0xab # AVX512{DQ,VL} 1126 vextracti64x2 xmm30{k7}{z}, ymm29, 0xab # AVX512{DQ,VL} 1127 vextracti64x2 xmm30, ymm29, 123 # AVX512{DQ,VL} 1128 vfpclasspd k5, xmm30, 0xab # AVX512{DQ,VL} 1129 vfpclasspd k5{k7}, xmm30, 0xab # AVX512{DQ,VL} 1130 vfpclasspd k5, xmm30, 123 # AVX512{DQ,VL} 1131 vfpclasspd k5, XMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1132 vfpclasspd k5, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1133 vfpclasspd k5, [rcx]{1to2}, 123 # AVX512{DQ,VL} 1134 vfpclasspd k5, XMMWORD PTR [rdx+2032], 123 # AVX512{DQ,VL} Disp8 1135 vfpclasspd k5, XMMWORD PTR [rdx+2048], 123 # AVX512{DQ,VL} 1136 vfpclasspd k5, XMMWORD PTR [rdx-2048], 123 # AVX512{DQ,VL} Disp8 1137 vfpclasspd k5, XMMWORD PTR [rdx-2064], 123 # AVX512{DQ,VL} 1138 vfpclasspd k5, QWORD PTR [rdx+1016]{1to2}, 123 # AVX512{DQ,VL} Disp8 1139 vfpclasspd k5, QWORD PTR [rdx+1024]{1to2}, 123 # AVX512{DQ,VL} 1140 vfpclasspd k5, QWORD PTR [rdx-1024]{1to2}, 123 # AVX512{DQ,VL} Disp8 1141 vfpclasspd k5, QWORD PTR [rdx-1032]{1to2}, 123 # AVX512{DQ,VL} 1142 vfpclasspd k5, ymm30, 0xab # AVX512{DQ,VL} 1143 vfpclasspd k5{k7}, ymm30, 0xab # AVX512{DQ,VL} 1144 vfpclasspd k5, ymm30, 123 # AVX512{DQ,VL} 1145 vfpclasspd k5, YMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1146 vfpclasspd k5, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1147 vfpclasspd k5, [rcx]{1to4}, 123 # AVX512{DQ,VL} 1148 vfpclasspd k5, YMMWORD PTR [rdx+4064], 123 # AVX512{DQ,VL} Disp8 1149 vfpclasspd k5, YMMWORD PTR [rdx+4096], 123 # AVX512{DQ,VL} 1150 vfpclasspd k5, YMMWORD PTR [rdx-4096], 123 # AVX512{DQ,VL} Disp8 1151 vfpclasspd k5, YMMWORD PTR [rdx-4128], 123 # AVX512{DQ,VL} 1152 vfpclasspd k5, QWORD PTR [rdx+1016]{1to4}, 123 # AVX512{DQ,VL} Disp8 1153 vfpclasspd k5, QWORD PTR [rdx+1024]{1to4}, 123 # AVX512{DQ,VL} 1154 vfpclasspd k5, QWORD PTR [rdx-1024]{1to4}, 123 # AVX512{DQ,VL} Disp8 1155 vfpclasspd k5, QWORD PTR [rdx-1032]{1to4}, 123 # AVX512{DQ,VL} 1156 vfpclassps k5, xmm30, 0xab # AVX512{DQ,VL} 1157 vfpclassps k5{k7}, xmm30, 0xab # AVX512{DQ,VL} 1158 vfpclassps k5, xmm30, 123 # AVX512{DQ,VL} 1159 vfpclassps k5, XMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1160 vfpclassps k5, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1161 vfpclassps k5, [rcx]{1to4}, 123 # AVX512{DQ,VL} 1162 vfpclassps k5, XMMWORD PTR [rdx+2032], 123 # AVX512{DQ,VL} Disp8 1163 vfpclassps k5, XMMWORD PTR [rdx+2048], 123 # AVX512{DQ,VL} 1164 vfpclassps k5, XMMWORD PTR [rdx-2048], 123 # AVX512{DQ,VL} Disp8 1165 vfpclassps k5, XMMWORD PTR [rdx-2064], 123 # AVX512{DQ,VL} 1166 vfpclassps k5, DWORD PTR [rdx+508]{1to4}, 123 # AVX512{DQ,VL} Disp8 1167 vfpclassps k5, DWORD PTR [rdx+512]{1to4}, 123 # AVX512{DQ,VL} 1168 vfpclassps k5, DWORD PTR [rdx-512]{1to4}, 123 # AVX512{DQ,VL} Disp8 1169 vfpclassps k5, DWORD PTR [rdx-516]{1to4}, 123 # AVX512{DQ,VL} 1170 vfpclassps k5, ymm30, 0xab # AVX512{DQ,VL} 1171 vfpclassps k5{k7}, ymm30, 0xab # AVX512{DQ,VL} 1172 vfpclassps k5, ymm30, 123 # AVX512{DQ,VL} 1173 vfpclassps k5, YMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1174 vfpclassps k5, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1175 vfpclassps k5, [rcx]{1to8}, 123 # AVX512{DQ,VL} 1176 vfpclassps k5, YMMWORD PTR [rdx+4064], 123 # AVX512{DQ,VL} Disp8 1177 vfpclassps k5, YMMWORD PTR [rdx+4096], 123 # AVX512{DQ,VL} 1178 vfpclassps k5, YMMWORD PTR [rdx-4096], 123 # AVX512{DQ,VL} Disp8 1179 vfpclassps k5, YMMWORD PTR [rdx-4128], 123 # AVX512{DQ,VL} 1180 vfpclassps k5, DWORD PTR [rdx+508]{1to8}, 123 # AVX512{DQ,VL} Disp8 1181 vfpclassps k5, DWORD PTR [rdx+512]{1to8}, 123 # AVX512{DQ,VL} 1182 vfpclassps k5, DWORD PTR [rdx-512]{1to8}, 123 # AVX512{DQ,VL} Disp8 1183 vfpclassps k5, DWORD PTR [rdx-516]{1to8}, 123 # AVX512{DQ,VL} 1184 vinsertf64x2 ymm30, ymm29, xmm28, 0xab # AVX512{DQ,VL} 1185 vinsertf64x2 ymm30{k7}, ymm29, xmm28, 0xab # AVX512{DQ,VL} 1186 vinsertf64x2 ymm30{k7}{z}, ymm29, xmm28, 0xab # AVX512{DQ,VL} 1187 vinsertf64x2 ymm30, ymm29, xmm28, 123 # AVX512{DQ,VL} 1188 vinsertf64x2 ymm30, ymm29, XMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1189 vinsertf64x2 ymm30, ymm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1190 vinsertf64x2 ymm30, ymm29, XMMWORD PTR [rdx+2032], 123 # AVX512{DQ,VL} Disp8 1191 vinsertf64x2 ymm30, ymm29, XMMWORD PTR [rdx+2048], 123 # AVX512{DQ,VL} 1192 vinsertf64x2 ymm30, ymm29, XMMWORD PTR [rdx-2048], 123 # AVX512{DQ,VL} Disp8 1193 vinsertf64x2 ymm30, ymm29, XMMWORD PTR [rdx-2064], 123 # AVX512{DQ,VL} 1194 vinserti64x2 ymm30, ymm29, xmm28, 0xab # AVX512{DQ,VL} 1195 vinserti64x2 ymm30{k7}, ymm29, xmm28, 0xab # AVX512{DQ,VL} 1196 vinserti64x2 ymm30{k7}{z}, ymm29, xmm28, 0xab # AVX512{DQ,VL} 1197 vinserti64x2 ymm30, ymm29, xmm28, 123 # AVX512{DQ,VL} 1198 vinserti64x2 ymm30, ymm29, XMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1199 vinserti64x2 ymm30, ymm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1200 vinserti64x2 ymm30, ymm29, XMMWORD PTR [rdx+2032], 123 # AVX512{DQ,VL} Disp8 1201 vinserti64x2 ymm30, ymm29, XMMWORD PTR [rdx+2048], 123 # AVX512{DQ,VL} 1202 vinserti64x2 ymm30, ymm29, XMMWORD PTR [rdx-2048], 123 # AVX512{DQ,VL} Disp8 1203 vinserti64x2 ymm30, ymm29, XMMWORD PTR [rdx-2064], 123 # AVX512{DQ,VL} 1204 vbroadcasti32x2 xmm30, xmm31 # AVX512{DQ,VL} 1205 vbroadcasti32x2 xmm30{k7}, xmm31 # AVX512{DQ,VL} 1206 vbroadcasti32x2 xmm30{k7}{z}, xmm31 # AVX512{DQ,VL} 1207 vbroadcasti32x2 xmm30, QWORD PTR [rcx] # AVX512{DQ,VL} 1208 vbroadcasti32x2 xmm30, QWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1209 vbroadcasti32x2 xmm30, QWORD PTR [rdx+1016] # AVX512{DQ,VL} Disp8 1210 vbroadcasti32x2 xmm30, QWORD PTR [rdx+1024] # AVX512{DQ,VL} 1211 vbroadcasti32x2 xmm30, QWORD PTR [rdx-1024] # AVX512{DQ,VL} Disp8 1212 vbroadcasti32x2 xmm30, QWORD PTR [rdx-1032] # AVX512{DQ,VL} 1213 vbroadcasti32x2 ymm30, xmm31 # AVX512{DQ,VL} 1214 vbroadcasti32x2 ymm30{k7}, xmm31 # AVX512{DQ,VL} 1215 vbroadcasti32x2 ymm30{k7}{z}, xmm31 # AVX512{DQ,VL} 1216 vbroadcasti32x2 ymm30, QWORD PTR [rcx] # AVX512{DQ,VL} 1217 vbroadcasti32x2 ymm30, QWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1218 vbroadcasti32x2 ymm30, QWORD PTR [rdx+1016] # AVX512{DQ,VL} Disp8 1219 vbroadcasti32x2 ymm30, QWORD PTR [rdx+1024] # AVX512{DQ,VL} 1220 vbroadcasti32x2 ymm30, QWORD PTR [rdx-1024] # AVX512{DQ,VL} Disp8 1221 vbroadcasti32x2 ymm30, QWORD PTR [rdx-1032] # AVX512{DQ,VL} 1222 vpmullq xmm30, xmm29, xmm28 # AVX512{DQ,VL} 1223 vpmullq xmm30{k7}, xmm29, xmm28 # AVX512{DQ,VL} 1224 vpmullq xmm30{k7}{z}, xmm29, xmm28 # AVX512{DQ,VL} 1225 vpmullq xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1226 vpmullq xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1227 vpmullq xmm30, xmm29, [rcx]{1to2} # AVX512{DQ,VL} 1228 vpmullq xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1229 vpmullq xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1230 vpmullq xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1231 vpmullq xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1232 vpmullq xmm30, xmm29, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1233 vpmullq xmm30, xmm29, [rdx+1024]{1to2} # AVX512{DQ,VL} 1234 vpmullq xmm30, xmm29, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1235 vpmullq xmm30, xmm29, [rdx-1032]{1to2} # AVX512{DQ,VL} 1236 vpmullq ymm30, ymm29, ymm28 # AVX512{DQ,VL} 1237 vpmullq ymm30{k7}, ymm29, ymm28 # AVX512{DQ,VL} 1238 vpmullq ymm30{k7}{z}, ymm29, ymm28 # AVX512{DQ,VL} 1239 vpmullq ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1240 vpmullq ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1241 vpmullq ymm30, ymm29, [rcx]{1to4} # AVX512{DQ,VL} 1242 vpmullq ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1243 vpmullq ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1244 vpmullq ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1245 vpmullq ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1246 vpmullq ymm30, ymm29, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1247 vpmullq ymm30, ymm29, [rdx+1024]{1to4} # AVX512{DQ,VL} 1248 vpmullq ymm30, ymm29, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1249 vpmullq ymm30, ymm29, [rdx-1032]{1to4} # AVX512{DQ,VL} 1250 vrangepd xmm30, xmm29, xmm28, 0xab # AVX512{DQ,VL} 1251 vrangepd xmm30{k7}, xmm29, xmm28, 0xab # AVX512{DQ,VL} 1252 vrangepd xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{DQ,VL} 1253 vrangepd xmm30, xmm29, xmm28, 123 # AVX512{DQ,VL} 1254 vrangepd xmm30, xmm29, XMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1255 vrangepd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1256 vrangepd xmm30, xmm29, [rcx]{1to2}, 123 # AVX512{DQ,VL} 1257 vrangepd xmm30, xmm29, XMMWORD PTR [rdx+2032], 123 # AVX512{DQ,VL} Disp8 1258 vrangepd xmm30, xmm29, XMMWORD PTR [rdx+2048], 123 # AVX512{DQ,VL} 1259 vrangepd xmm30, xmm29, XMMWORD PTR [rdx-2048], 123 # AVX512{DQ,VL} Disp8 1260 vrangepd xmm30, xmm29, XMMWORD PTR [rdx-2064], 123 # AVX512{DQ,VL} 1261 vrangepd xmm30, xmm29, [rdx+1016]{1to2}, 123 # AVX512{DQ,VL} Disp8 1262 vrangepd xmm30, xmm29, [rdx+1024]{1to2}, 123 # AVX512{DQ,VL} 1263 vrangepd xmm30, xmm29, [rdx-1024]{1to2}, 123 # AVX512{DQ,VL} Disp8 1264 vrangepd xmm30, xmm29, [rdx-1032]{1to2}, 123 # AVX512{DQ,VL} 1265 vrangepd ymm30, ymm29, ymm28, 0xab # AVX512{DQ,VL} 1266 vrangepd ymm30{k7}, ymm29, ymm28, 0xab # AVX512{DQ,VL} 1267 vrangepd ymm30{k7}{z}, ymm29, ymm28, 0xab # AVX512{DQ,VL} 1268 vrangepd ymm30, ymm29, ymm28, 123 # AVX512{DQ,VL} 1269 vrangepd ymm30, ymm29, YMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1270 vrangepd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1271 vrangepd ymm30, ymm29, [rcx]{1to4}, 123 # AVX512{DQ,VL} 1272 vrangepd ymm30, ymm29, YMMWORD PTR [rdx+4064], 123 # AVX512{DQ,VL} Disp8 1273 vrangepd ymm30, ymm29, YMMWORD PTR [rdx+4096], 123 # AVX512{DQ,VL} 1274 vrangepd ymm30, ymm29, YMMWORD PTR [rdx-4096], 123 # AVX512{DQ,VL} Disp8 1275 vrangepd ymm30, ymm29, YMMWORD PTR [rdx-4128], 123 # AVX512{DQ,VL} 1276 vrangepd ymm30, ymm29, [rdx+1016]{1to4}, 123 # AVX512{DQ,VL} Disp8 1277 vrangepd ymm30, ymm29, [rdx+1024]{1to4}, 123 # AVX512{DQ,VL} 1278 vrangepd ymm30, ymm29, [rdx-1024]{1to4}, 123 # AVX512{DQ,VL} Disp8 1279 vrangepd ymm30, ymm29, [rdx-1032]{1to4}, 123 # AVX512{DQ,VL} 1280 vrangeps xmm30, xmm29, xmm28, 0xab # AVX512{DQ,VL} 1281 vrangeps xmm30{k7}, xmm29, xmm28, 0xab # AVX512{DQ,VL} 1282 vrangeps xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{DQ,VL} 1283 vrangeps xmm30, xmm29, xmm28, 123 # AVX512{DQ,VL} 1284 vrangeps xmm30, xmm29, XMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1285 vrangeps xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1286 vrangeps xmm30, xmm29, [rcx]{1to4}, 123 # AVX512{DQ,VL} 1287 vrangeps xmm30, xmm29, XMMWORD PTR [rdx+2032], 123 # AVX512{DQ,VL} Disp8 1288 vrangeps xmm30, xmm29, XMMWORD PTR [rdx+2048], 123 # AVX512{DQ,VL} 1289 vrangeps xmm30, xmm29, XMMWORD PTR [rdx-2048], 123 # AVX512{DQ,VL} Disp8 1290 vrangeps xmm30, xmm29, XMMWORD PTR [rdx-2064], 123 # AVX512{DQ,VL} 1291 vrangeps xmm30, xmm29, [rdx+508]{1to4}, 123 # AVX512{DQ,VL} Disp8 1292 vrangeps xmm30, xmm29, [rdx+512]{1to4}, 123 # AVX512{DQ,VL} 1293 vrangeps xmm30, xmm29, [rdx-512]{1to4}, 123 # AVX512{DQ,VL} Disp8 1294 vrangeps xmm30, xmm29, [rdx-516]{1to4}, 123 # AVX512{DQ,VL} 1295 vrangeps ymm30, ymm29, ymm28, 0xab # AVX512{DQ,VL} 1296 vrangeps ymm30{k7}, ymm29, ymm28, 0xab # AVX512{DQ,VL} 1297 vrangeps ymm30{k7}{z}, ymm29, ymm28, 0xab # AVX512{DQ,VL} 1298 vrangeps ymm30, ymm29, ymm28, 123 # AVX512{DQ,VL} 1299 vrangeps ymm30, ymm29, YMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1300 vrangeps ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1301 vrangeps ymm30, ymm29, [rcx]{1to8}, 123 # AVX512{DQ,VL} 1302 vrangeps ymm30, ymm29, YMMWORD PTR [rdx+4064], 123 # AVX512{DQ,VL} Disp8 1303 vrangeps ymm30, ymm29, YMMWORD PTR [rdx+4096], 123 # AVX512{DQ,VL} 1304 vrangeps ymm30, ymm29, YMMWORD PTR [rdx-4096], 123 # AVX512{DQ,VL} Disp8 1305 vrangeps ymm30, ymm29, YMMWORD PTR [rdx-4128], 123 # AVX512{DQ,VL} 1306 vrangeps ymm30, ymm29, [rdx+508]{1to8}, 123 # AVX512{DQ,VL} Disp8 1307 vrangeps ymm30, ymm29, [rdx+512]{1to8}, 123 # AVX512{DQ,VL} 1308 vrangeps ymm30, ymm29, [rdx-512]{1to8}, 123 # AVX512{DQ,VL} Disp8 1309 vrangeps ymm30, ymm29, [rdx-516]{1to8}, 123 # AVX512{DQ,VL} 1310 vandpd xmm30, xmm29, xmm28 # AVX512{DQ,VL} 1311 vandpd xmm30{k7}, xmm29, xmm28 # AVX512{DQ,VL} 1312 vandpd xmm30{k7}{z}, xmm29, xmm28 # AVX512{DQ,VL} 1313 vandpd xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1314 vandpd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1315 vandpd xmm30, xmm29, [rcx]{1to2} # AVX512{DQ,VL} 1316 vandpd xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1317 vandpd xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1318 vandpd xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1319 vandpd xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1320 vandpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1321 vandpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{DQ,VL} 1322 vandpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1323 vandpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{DQ,VL} 1324 vandpd ymm30, ymm29, ymm28 # AVX512{DQ,VL} 1325 vandpd ymm30{k7}, ymm29, ymm28 # AVX512{DQ,VL} 1326 vandpd ymm30{k7}{z}, ymm29, ymm28 # AVX512{DQ,VL} 1327 vandpd ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1328 vandpd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1329 vandpd ymm30, ymm29, [rcx]{1to4} # AVX512{DQ,VL} 1330 vandpd ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1331 vandpd ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1332 vandpd ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1333 vandpd ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1334 vandpd ymm30, ymm29, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1335 vandpd ymm30, ymm29, [rdx+1024]{1to4} # AVX512{DQ,VL} 1336 vandpd ymm30, ymm29, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1337 vandpd ymm30, ymm29, [rdx-1032]{1to4} # AVX512{DQ,VL} 1338 vandps xmm30, xmm29, xmm28 # AVX512{DQ,VL} 1339 vandps xmm30{k7}, xmm29, xmm28 # AVX512{DQ,VL} 1340 vandps xmm30{k7}{z}, xmm29, xmm28 # AVX512{DQ,VL} 1341 vandps xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1342 vandps xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1343 vandps xmm30, xmm29, [rcx]{1to4} # AVX512{DQ,VL} 1344 vandps xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1345 vandps xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1346 vandps xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1347 vandps xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1348 vandps xmm30, xmm29, [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1349 vandps xmm30, xmm29, [rdx+512]{1to4} # AVX512{DQ,VL} 1350 vandps xmm30, xmm29, [rdx-512]{1to4} # AVX512{DQ,VL} Disp8 1351 vandps xmm30, xmm29, [rdx-516]{1to4} # AVX512{DQ,VL} 1352 vandps ymm30, ymm29, ymm28 # AVX512{DQ,VL} 1353 vandps ymm30{k7}, ymm29, ymm28 # AVX512{DQ,VL} 1354 vandps ymm30{k7}{z}, ymm29, ymm28 # AVX512{DQ,VL} 1355 vandps ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1356 vandps ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1357 vandps ymm30, ymm29, [rcx]{1to8} # AVX512{DQ,VL} 1358 vandps ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1359 vandps ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1360 vandps ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1361 vandps ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1362 vandps ymm30, ymm29, [rdx+508]{1to8} # AVX512{DQ,VL} Disp8 1363 vandps ymm30, ymm29, [rdx+512]{1to8} # AVX512{DQ,VL} 1364 vandps ymm30, ymm29, [rdx-512]{1to8} # AVX512{DQ,VL} Disp8 1365 vandps ymm30, ymm29, [rdx-516]{1to8} # AVX512{DQ,VL} 1366 vandnpd xmm30, xmm29, xmm28 # AVX512{DQ,VL} 1367 vandnpd xmm30{k7}, xmm29, xmm28 # AVX512{DQ,VL} 1368 vandnpd xmm30{k7}{z}, xmm29, xmm28 # AVX512{DQ,VL} 1369 vandnpd xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1370 vandnpd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1371 vandnpd xmm30, xmm29, [rcx]{1to2} # AVX512{DQ,VL} 1372 vandnpd xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1373 vandnpd xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1374 vandnpd xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1375 vandnpd xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1376 vandnpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1377 vandnpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{DQ,VL} 1378 vandnpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1379 vandnpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{DQ,VL} 1380 vandnpd ymm30, ymm29, ymm28 # AVX512{DQ,VL} 1381 vandnpd ymm30{k7}, ymm29, ymm28 # AVX512{DQ,VL} 1382 vandnpd ymm30{k7}{z}, ymm29, ymm28 # AVX512{DQ,VL} 1383 vandnpd ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1384 vandnpd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1385 vandnpd ymm30, ymm29, [rcx]{1to4} # AVX512{DQ,VL} 1386 vandnpd ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1387 vandnpd ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1388 vandnpd ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1389 vandnpd ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1390 vandnpd ymm30, ymm29, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1391 vandnpd ymm30, ymm29, [rdx+1024]{1to4} # AVX512{DQ,VL} 1392 vandnpd ymm30, ymm29, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1393 vandnpd ymm30, ymm29, [rdx-1032]{1to4} # AVX512{DQ,VL} 1394 vandnps xmm30, xmm29, xmm28 # AVX512{DQ,VL} 1395 vandnps xmm30{k7}, xmm29, xmm28 # AVX512{DQ,VL} 1396 vandnps xmm30{k7}{z}, xmm29, xmm28 # AVX512{DQ,VL} 1397 vandnps xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1398 vandnps xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1399 vandnps xmm30, xmm29, [rcx]{1to4} # AVX512{DQ,VL} 1400 vandnps xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1401 vandnps xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1402 vandnps xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1403 vandnps xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1404 vandnps xmm30, xmm29, [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1405 vandnps xmm30, xmm29, [rdx+512]{1to4} # AVX512{DQ,VL} 1406 vandnps xmm30, xmm29, [rdx-512]{1to4} # AVX512{DQ,VL} Disp8 1407 vandnps xmm30, xmm29, [rdx-516]{1to4} # AVX512{DQ,VL} 1408 vandnps ymm30, ymm29, ymm28 # AVX512{DQ,VL} 1409 vandnps ymm30{k7}, ymm29, ymm28 # AVX512{DQ,VL} 1410 vandnps ymm30{k7}{z}, ymm29, ymm28 # AVX512{DQ,VL} 1411 vandnps ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1412 vandnps ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1413 vandnps ymm30, ymm29, [rcx]{1to8} # AVX512{DQ,VL} 1414 vandnps ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1415 vandnps ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1416 vandnps ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1417 vandnps ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1418 vandnps ymm30, ymm29, [rdx+508]{1to8} # AVX512{DQ,VL} Disp8 1419 vandnps ymm30, ymm29, [rdx+512]{1to8} # AVX512{DQ,VL} 1420 vandnps ymm30, ymm29, [rdx-512]{1to8} # AVX512{DQ,VL} Disp8 1421 vandnps ymm30, ymm29, [rdx-516]{1to8} # AVX512{DQ,VL} 1422 vorpd xmm30, xmm29, xmm28 # AVX512{DQ,VL} 1423 vorpd xmm30{k7}, xmm29, xmm28 # AVX512{DQ,VL} 1424 vorpd xmm30{k7}{z}, xmm29, xmm28 # AVX512{DQ,VL} 1425 vorpd xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1426 vorpd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1427 vorpd xmm30, xmm29, [rcx]{1to2} # AVX512{DQ,VL} 1428 vorpd xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1429 vorpd xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1430 vorpd xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1431 vorpd xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1432 vorpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1433 vorpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{DQ,VL} 1434 vorpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1435 vorpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{DQ,VL} 1436 vorpd ymm30, ymm29, ymm28 # AVX512{DQ,VL} 1437 vorpd ymm30{k7}, ymm29, ymm28 # AVX512{DQ,VL} 1438 vorpd ymm30{k7}{z}, ymm29, ymm28 # AVX512{DQ,VL} 1439 vorpd ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1440 vorpd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1441 vorpd ymm30, ymm29, [rcx]{1to4} # AVX512{DQ,VL} 1442 vorpd ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1443 vorpd ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1444 vorpd ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1445 vorpd ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1446 vorpd ymm30, ymm29, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1447 vorpd ymm30, ymm29, [rdx+1024]{1to4} # AVX512{DQ,VL} 1448 vorpd ymm30, ymm29, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1449 vorpd ymm30, ymm29, [rdx-1032]{1to4} # AVX512{DQ,VL} 1450 vorps xmm30, xmm29, xmm28 # AVX512{DQ,VL} 1451 vorps xmm30{k7}, xmm29, xmm28 # AVX512{DQ,VL} 1452 vorps xmm30{k7}{z}, xmm29, xmm28 # AVX512{DQ,VL} 1453 vorps xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1454 vorps xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1455 vorps xmm30, xmm29, [rcx]{1to4} # AVX512{DQ,VL} 1456 vorps xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1457 vorps xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1458 vorps xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1459 vorps xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1460 vorps xmm30, xmm29, [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1461 vorps xmm30, xmm29, [rdx+512]{1to4} # AVX512{DQ,VL} 1462 vorps xmm30, xmm29, [rdx-512]{1to4} # AVX512{DQ,VL} Disp8 1463 vorps xmm30, xmm29, [rdx-516]{1to4} # AVX512{DQ,VL} 1464 vorps ymm30, ymm29, ymm28 # AVX512{DQ,VL} 1465 vorps ymm30{k7}, ymm29, ymm28 # AVX512{DQ,VL} 1466 vorps ymm30{k7}{z}, ymm29, ymm28 # AVX512{DQ,VL} 1467 vorps ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1468 vorps ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1469 vorps ymm30, ymm29, [rcx]{1to8} # AVX512{DQ,VL} 1470 vorps ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1471 vorps ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1472 vorps ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1473 vorps ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1474 vorps ymm30, ymm29, [rdx+508]{1to8} # AVX512{DQ,VL} Disp8 1475 vorps ymm30, ymm29, [rdx+512]{1to8} # AVX512{DQ,VL} 1476 vorps ymm30, ymm29, [rdx-512]{1to8} # AVX512{DQ,VL} Disp8 1477 vorps ymm30, ymm29, [rdx-516]{1to8} # AVX512{DQ,VL} 1478 vxorpd xmm30, xmm29, xmm28 # AVX512{DQ,VL} 1479 vxorpd xmm30{k7}, xmm29, xmm28 # AVX512{DQ,VL} 1480 vxorpd xmm30{k7}{z}, xmm29, xmm28 # AVX512{DQ,VL} 1481 vxorpd xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1482 vxorpd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1483 vxorpd xmm30, xmm29, [rcx]{1to2} # AVX512{DQ,VL} 1484 vxorpd xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1485 vxorpd xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1486 vxorpd xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1487 vxorpd xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1488 vxorpd xmm30, xmm29, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1489 vxorpd xmm30, xmm29, [rdx+1024]{1to2} # AVX512{DQ,VL} 1490 vxorpd xmm30, xmm29, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1491 vxorpd xmm30, xmm29, [rdx-1032]{1to2} # AVX512{DQ,VL} 1492 vxorpd ymm30, ymm29, ymm28 # AVX512{DQ,VL} 1493 vxorpd ymm30{k7}, ymm29, ymm28 # AVX512{DQ,VL} 1494 vxorpd ymm30{k7}{z}, ymm29, ymm28 # AVX512{DQ,VL} 1495 vxorpd ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1496 vxorpd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1497 vxorpd ymm30, ymm29, [rcx]{1to4} # AVX512{DQ,VL} 1498 vxorpd ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1499 vxorpd ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1500 vxorpd ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1501 vxorpd ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1502 vxorpd ymm30, ymm29, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1503 vxorpd ymm30, ymm29, [rdx+1024]{1to4} # AVX512{DQ,VL} 1504 vxorpd ymm30, ymm29, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1505 vxorpd ymm30, ymm29, [rdx-1032]{1to4} # AVX512{DQ,VL} 1506 vxorps xmm30, xmm29, xmm28 # AVX512{DQ,VL} 1507 vxorps xmm30{k7}, xmm29, xmm28 # AVX512{DQ,VL} 1508 vxorps xmm30{k7}{z}, xmm29, xmm28 # AVX512{DQ,VL} 1509 vxorps xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1510 vxorps xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1511 vxorps xmm30, xmm29, [rcx]{1to4} # AVX512{DQ,VL} 1512 vxorps xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1513 vxorps xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1514 vxorps xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1515 vxorps xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1516 vxorps xmm30, xmm29, [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1517 vxorps xmm30, xmm29, [rdx+512]{1to4} # AVX512{DQ,VL} 1518 vxorps xmm30, xmm29, [rdx-512]{1to4} # AVX512{DQ,VL} Disp8 1519 vxorps xmm30, xmm29, [rdx-516]{1to4} # AVX512{DQ,VL} 1520 vxorps ymm30, ymm29, ymm28 # AVX512{DQ,VL} 1521 vxorps ymm30{k7}, ymm29, ymm28 # AVX512{DQ,VL} 1522 vxorps ymm30{k7}{z}, ymm29, ymm28 # AVX512{DQ,VL} 1523 vxorps ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1524 vxorps ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1525 vxorps ymm30, ymm29, [rcx]{1to8} # AVX512{DQ,VL} 1526 vxorps ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1527 vxorps ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1528 vxorps ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1529 vxorps ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1530 vxorps ymm30, ymm29, [rdx+508]{1to8} # AVX512{DQ,VL} Disp8 1531 vxorps ymm30, ymm29, [rdx+512]{1to8} # AVX512{DQ,VL} 1532 vxorps ymm30, ymm29, [rdx-512]{1to8} # AVX512{DQ,VL} Disp8 1533 vxorps ymm30, ymm29, [rdx-516]{1to8} # AVX512{DQ,VL} 1534 vreducepd xmm30, xmm29, 0xab # AVX512{DQ,VL} 1535 vreducepd xmm30{k7}, xmm29, 0xab # AVX512{DQ,VL} 1536 vreducepd xmm30{k7}{z}, xmm29, 0xab # AVX512{DQ,VL} 1537 vreducepd xmm30, xmm29, 123 # AVX512{DQ,VL} 1538 vreducepd xmm30, XMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1539 vreducepd xmm30, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1540 vreducepd xmm30, [rcx]{1to2}, 123 # AVX512{DQ,VL} 1541 vreducepd xmm30, XMMWORD PTR [rdx+2032], 123 # AVX512{DQ,VL} Disp8 1542 vreducepd xmm30, XMMWORD PTR [rdx+2048], 123 # AVX512{DQ,VL} 1543 vreducepd xmm30, XMMWORD PTR [rdx-2048], 123 # AVX512{DQ,VL} Disp8 1544 vreducepd xmm30, XMMWORD PTR [rdx-2064], 123 # AVX512{DQ,VL} 1545 vreducepd xmm30, [rdx+1016]{1to2}, 123 # AVX512{DQ,VL} Disp8 1546 vreducepd xmm30, [rdx+1024]{1to2}, 123 # AVX512{DQ,VL} 1547 vreducepd xmm30, [rdx-1024]{1to2}, 123 # AVX512{DQ,VL} Disp8 1548 vreducepd xmm30, [rdx-1032]{1to2}, 123 # AVX512{DQ,VL} 1549 vreducepd ymm30, ymm29, 0xab # AVX512{DQ,VL} 1550 vreducepd ymm30{k7}, ymm29, 0xab # AVX512{DQ,VL} 1551 vreducepd ymm30{k7}{z}, ymm29, 0xab # AVX512{DQ,VL} 1552 vreducepd ymm30, ymm29, 123 # AVX512{DQ,VL} 1553 vreducepd ymm30, YMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1554 vreducepd ymm30, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1555 vreducepd ymm30, [rcx]{1to4}, 123 # AVX512{DQ,VL} 1556 vreducepd ymm30, YMMWORD PTR [rdx+4064], 123 # AVX512{DQ,VL} Disp8 1557 vreducepd ymm30, YMMWORD PTR [rdx+4096], 123 # AVX512{DQ,VL} 1558 vreducepd ymm30, YMMWORD PTR [rdx-4096], 123 # AVX512{DQ,VL} Disp8 1559 vreducepd ymm30, YMMWORD PTR [rdx-4128], 123 # AVX512{DQ,VL} 1560 vreducepd ymm30, [rdx+1016]{1to4}, 123 # AVX512{DQ,VL} Disp8 1561 vreducepd ymm30, [rdx+1024]{1to4}, 123 # AVX512{DQ,VL} 1562 vreducepd ymm30, [rdx-1024]{1to4}, 123 # AVX512{DQ,VL} Disp8 1563 vreducepd ymm30, [rdx-1032]{1to4}, 123 # AVX512{DQ,VL} 1564 vreduceps xmm30, xmm29, 0xab # AVX512{DQ,VL} 1565 vreduceps xmm30{k7}, xmm29, 0xab # AVX512{DQ,VL} 1566 vreduceps xmm30{k7}{z}, xmm29, 0xab # AVX512{DQ,VL} 1567 vreduceps xmm30, xmm29, 123 # AVX512{DQ,VL} 1568 vreduceps xmm30, XMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1569 vreduceps xmm30, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1570 vreduceps xmm30, [rcx]{1to4}, 123 # AVX512{DQ,VL} 1571 vreduceps xmm30, XMMWORD PTR [rdx+2032], 123 # AVX512{DQ,VL} Disp8 1572 vreduceps xmm30, XMMWORD PTR [rdx+2048], 123 # AVX512{DQ,VL} 1573 vreduceps xmm30, XMMWORD PTR [rdx-2048], 123 # AVX512{DQ,VL} Disp8 1574 vreduceps xmm30, XMMWORD PTR [rdx-2064], 123 # AVX512{DQ,VL} 1575 vreduceps xmm30, [rdx+508]{1to4}, 123 # AVX512{DQ,VL} Disp8 1576 vreduceps xmm30, [rdx+512]{1to4}, 123 # AVX512{DQ,VL} 1577 vreduceps xmm30, [rdx-512]{1to4}, 123 # AVX512{DQ,VL} Disp8 1578 vreduceps xmm30, [rdx-516]{1to4}, 123 # AVX512{DQ,VL} 1579 vreduceps ymm30, ymm29, 0xab # AVX512{DQ,VL} 1580 vreduceps ymm30{k7}, ymm29, 0xab # AVX512{DQ,VL} 1581 vreduceps ymm30{k7}{z}, ymm29, 0xab # AVX512{DQ,VL} 1582 vreduceps ymm30, ymm29, 123 # AVX512{DQ,VL} 1583 vreduceps ymm30, YMMWORD PTR [rcx], 123 # AVX512{DQ,VL} 1584 vreduceps ymm30, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{DQ,VL} 1585 vreduceps ymm30, [rcx]{1to8}, 123 # AVX512{DQ,VL} 1586 vreduceps ymm30, YMMWORD PTR [rdx+4064], 123 # AVX512{DQ,VL} Disp8 1587 vreduceps ymm30, YMMWORD PTR [rdx+4096], 123 # AVX512{DQ,VL} 1588 vreduceps ymm30, YMMWORD PTR [rdx-4096], 123 # AVX512{DQ,VL} Disp8 1589 vreduceps ymm30, YMMWORD PTR [rdx-4128], 123 # AVX512{DQ,VL} 1590 vreduceps ymm30, [rdx+508]{1to8}, 123 # AVX512{DQ,VL} Disp8 1591 vreduceps ymm30, [rdx+512]{1to8}, 123 # AVX512{DQ,VL} 1592 vreduceps ymm30, [rdx-512]{1to8}, 123 # AVX512{DQ,VL} Disp8 1593 vreduceps ymm30, [rdx-516]{1to8}, 123 # AVX512{DQ,VL} 1594 vextractf64x2 XMMWORD PTR [rcx], ymm29, 0xab # AVX512{DQ,VL} 1595 vextractf64x2 XMMWORD PTR [rcx]{k7}, ymm29, 0xab # AVX512{DQ,VL} 1596 vextractf64x2 XMMWORD PTR [rcx], ymm29, 123 # AVX512{DQ,VL} 1597 vextractf64x2 XMMWORD PTR [rax+r14*8+0x1234], ymm29, 123 # AVX512{DQ,VL} 1598 vextractf64x2 XMMWORD PTR [rdx+2032], ymm29, 123 # AVX512{DQ,VL} Disp8 1599 vextractf64x2 XMMWORD PTR [rdx+2048], ymm29, 123 # AVX512{DQ,VL} 1600 vextractf64x2 XMMWORD PTR [rdx-2048], ymm29, 123 # AVX512{DQ,VL} Disp8 1601 vextractf64x2 XMMWORD PTR [rdx-2064], ymm29, 123 # AVX512{DQ,VL} 1602 vextracti64x2 XMMWORD PTR [rcx], ymm29, 0xab # AVX512{DQ,VL} 1603 vextracti64x2 XMMWORD PTR [rcx]{k7}, ymm29, 0xab # AVX512{DQ,VL} 1604 vextracti64x2 XMMWORD PTR [rcx], ymm29, 123 # AVX512{DQ,VL} 1605 vextracti64x2 XMMWORD PTR [rax+r14*8+0x1234], ymm29, 123 # AVX512{DQ,VL} 1606 vextracti64x2 XMMWORD PTR [rdx+2032], ymm29, 123 # AVX512{DQ,VL} Disp8 1607 vextracti64x2 XMMWORD PTR [rdx+2048], ymm29, 123 # AVX512{DQ,VL} 1608 vextracti64x2 XMMWORD PTR [rdx-2048], ymm29, 123 # AVX512{DQ,VL} Disp8 1609 vextracti64x2 XMMWORD PTR [rdx-2064], ymm29, 123 # AVX512{DQ,VL} 1610 vcvttpd2qq xmm30, xmm29 # AVX512{DQ,VL} 1611 vcvttpd2qq xmm30{k7}, xmm29 # AVX512{DQ,VL} 1612 vcvttpd2qq xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1613 vcvttpd2qq xmm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1614 vcvttpd2qq xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1615 vcvttpd2qq xmm30, [rcx]{1to2} # AVX512{DQ,VL} 1616 vcvttpd2qq xmm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1617 vcvttpd2qq xmm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1618 vcvttpd2qq xmm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1619 vcvttpd2qq xmm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1620 vcvttpd2qq xmm30, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1621 vcvttpd2qq xmm30, [rdx+1024]{1to2} # AVX512{DQ,VL} 1622 vcvttpd2qq xmm30, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1623 vcvttpd2qq xmm30, [rdx-1032]{1to2} # AVX512{DQ,VL} 1624 vcvttpd2qq ymm30, ymm29 # AVX512{DQ,VL} 1625 vcvttpd2qq ymm30{k7}, ymm29 # AVX512{DQ,VL} 1626 vcvttpd2qq ymm30{k7}{z}, ymm29 # AVX512{DQ,VL} 1627 vcvttpd2qq ymm30, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1628 vcvttpd2qq ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1629 vcvttpd2qq ymm30, [rcx]{1to4} # AVX512{DQ,VL} 1630 vcvttpd2qq ymm30, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1631 vcvttpd2qq ymm30, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1632 vcvttpd2qq ymm30, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1633 vcvttpd2qq ymm30, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1634 vcvttpd2qq ymm30, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1635 vcvttpd2qq ymm30, [rdx+1024]{1to4} # AVX512{DQ,VL} 1636 vcvttpd2qq ymm30, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1637 vcvttpd2qq ymm30, [rdx-1032]{1to4} # AVX512{DQ,VL} 1638 vcvttpd2uqq xmm30, xmm29 # AVX512{DQ,VL} 1639 vcvttpd2uqq xmm30{k7}, xmm29 # AVX512{DQ,VL} 1640 vcvttpd2uqq xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1641 vcvttpd2uqq xmm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1642 vcvttpd2uqq xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1643 vcvttpd2uqq xmm30, [rcx]{1to2} # AVX512{DQ,VL} 1644 vcvttpd2uqq xmm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1645 vcvttpd2uqq xmm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1646 vcvttpd2uqq xmm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1647 vcvttpd2uqq xmm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1648 vcvttpd2uqq xmm30, [rdx+1016]{1to2} # AVX512{DQ,VL} Disp8 1649 vcvttpd2uqq xmm30, [rdx+1024]{1to2} # AVX512{DQ,VL} 1650 vcvttpd2uqq xmm30, [rdx-1024]{1to2} # AVX512{DQ,VL} Disp8 1651 vcvttpd2uqq xmm30, [rdx-1032]{1to2} # AVX512{DQ,VL} 1652 vcvttpd2uqq ymm30, ymm29 # AVX512{DQ,VL} 1653 vcvttpd2uqq ymm30{k7}, ymm29 # AVX512{DQ,VL} 1654 vcvttpd2uqq ymm30{k7}{z}, ymm29 # AVX512{DQ,VL} 1655 vcvttpd2uqq ymm30, YMMWORD PTR [rcx] # AVX512{DQ,VL} 1656 vcvttpd2uqq ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1657 vcvttpd2uqq ymm30, [rcx]{1to4} # AVX512{DQ,VL} 1658 vcvttpd2uqq ymm30, YMMWORD PTR [rdx+4064] # AVX512{DQ,VL} Disp8 1659 vcvttpd2uqq ymm30, YMMWORD PTR [rdx+4096] # AVX512{DQ,VL} 1660 vcvttpd2uqq ymm30, YMMWORD PTR [rdx-4096] # AVX512{DQ,VL} Disp8 1661 vcvttpd2uqq ymm30, YMMWORD PTR [rdx-4128] # AVX512{DQ,VL} 1662 vcvttpd2uqq ymm30, [rdx+1016]{1to4} # AVX512{DQ,VL} Disp8 1663 vcvttpd2uqq ymm30, [rdx+1024]{1to4} # AVX512{DQ,VL} 1664 vcvttpd2uqq ymm30, [rdx-1024]{1to4} # AVX512{DQ,VL} Disp8 1665 vcvttpd2uqq ymm30, [rdx-1032]{1to4} # AVX512{DQ,VL} 1666 vcvttps2qq xmm30, xmm29 # AVX512{DQ,VL} 1667 vcvttps2qq xmm30{k7}, xmm29 # AVX512{DQ,VL} 1668 vcvttps2qq xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1669 vcvttps2qq xmm30, QWORD PTR [rcx] # AVX512{DQ,VL} 1670 vcvttps2qq xmm30, QWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1671 vcvttps2qq xmm30, [rcx]{1to2} # AVX512{DQ,VL} 1672 vcvttps2qq xmm30, QWORD PTR [rdx+1016] # AVX512{DQ,VL} Disp8 1673 vcvttps2qq xmm30, QWORD PTR [rdx+1024] # AVX512{DQ,VL} 1674 vcvttps2qq xmm30, QWORD PTR [rdx-1024] # AVX512{DQ,VL} Disp8 1675 vcvttps2qq xmm30, QWORD PTR [rdx-1032] # AVX512{DQ,VL} 1676 vcvttps2qq xmm30, [rdx+508]{1to2} # AVX512{DQ,VL} Disp8 1677 vcvttps2qq xmm30, [rdx+512]{1to2} # AVX512{DQ,VL} 1678 vcvttps2qq xmm30, [rdx-512]{1to2} # AVX512{DQ,VL} Disp8 1679 vcvttps2qq xmm30, [rdx-516]{1to2} # AVX512{DQ,VL} 1680 vcvttps2qq xmm30, DWORD PTR [rdx+508]{1to2} # AVX512{DQ,VL} Disp8 1681 vcvttps2qq ymm30, xmm29 # AVX512{DQ,VL} 1682 vcvttps2qq ymm30{k7}, xmm29 # AVX512{DQ,VL} 1683 vcvttps2qq ymm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1684 vcvttps2qq ymm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1685 vcvttps2qq ymm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1686 vcvttps2qq ymm30, [rcx]{1to4} # AVX512{DQ,VL} 1687 vcvttps2qq ymm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1688 vcvttps2qq ymm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1689 vcvttps2qq ymm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1690 vcvttps2qq ymm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1691 vcvttps2qq ymm30, [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1692 vcvttps2qq ymm30, [rdx+512]{1to4} # AVX512{DQ,VL} 1693 vcvttps2qq ymm30, [rdx-512]{1to4} # AVX512{DQ,VL} Disp8 1694 vcvttps2qq ymm30, [rdx-516]{1to4} # AVX512{DQ,VL} 1695 vcvttps2qq ymm30, DWORD PTR [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1696 vcvttps2uqq xmm30, xmm29 # AVX512{DQ,VL} 1697 vcvttps2uqq xmm30{k7}, xmm29 # AVX512{DQ,VL} 1698 vcvttps2uqq xmm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1699 vcvttps2uqq xmm30, QWORD PTR [rcx] # AVX512{DQ,VL} 1700 vcvttps2uqq xmm30, QWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1701 vcvttps2uqq xmm30, [rcx]{1to2} # AVX512{DQ,VL} 1702 vcvttps2uqq xmm30, QWORD PTR [rdx+1016] # AVX512{DQ,VL} Disp8 1703 vcvttps2uqq xmm30, QWORD PTR [rdx+1024] # AVX512{DQ,VL} 1704 vcvttps2uqq xmm30, QWORD PTR [rdx-1024] # AVX512{DQ,VL} Disp8 1705 vcvttps2uqq xmm30, QWORD PTR [rdx-1032] # AVX512{DQ,VL} 1706 vcvttps2uqq xmm30, [rdx+508]{1to2} # AVX512{DQ,VL} Disp8 1707 vcvttps2uqq xmm30, [rdx+512]{1to2} # AVX512{DQ,VL} 1708 vcvttps2uqq xmm30, [rdx-512]{1to2} # AVX512{DQ,VL} Disp8 1709 vcvttps2uqq xmm30, [rdx-516]{1to2} # AVX512{DQ,VL} 1710 vcvttps2uqq xmm30, DWORD PTR [rdx+508]{1to2} # AVX512{DQ,VL} Disp8 1711 vcvttps2uqq ymm30, xmm29 # AVX512{DQ,VL} 1712 vcvttps2uqq ymm30{k7}, xmm29 # AVX512{DQ,VL} 1713 vcvttps2uqq ymm30{k7}{z}, xmm29 # AVX512{DQ,VL} 1714 vcvttps2uqq ymm30, XMMWORD PTR [rcx] # AVX512{DQ,VL} 1715 vcvttps2uqq ymm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{DQ,VL} 1716 vcvttps2uqq ymm30, [rcx]{1to4} # AVX512{DQ,VL} 1717 vcvttps2uqq ymm30, XMMWORD PTR [rdx+2032] # AVX512{DQ,VL} Disp8 1718 vcvttps2uqq ymm30, XMMWORD PTR [rdx+2048] # AVX512{DQ,VL} 1719 vcvttps2uqq ymm30, XMMWORD PTR [rdx-2048] # AVX512{DQ,VL} Disp8 1720 vcvttps2uqq ymm30, XMMWORD PTR [rdx-2064] # AVX512{DQ,VL} 1721 vcvttps2uqq ymm30, [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1722 vcvttps2uqq ymm30, [rdx+512]{1to4} # AVX512{DQ,VL} 1723 vcvttps2uqq ymm30, [rdx-512]{1to4} # AVX512{DQ,VL} Disp8 1724 vcvttps2uqq ymm30, [rdx-516]{1to4} # AVX512{DQ,VL} 1725 vcvttps2uqq ymm30, DWORD PTR [rdx+508]{1to4} # AVX512{DQ,VL} Disp8 1726 vpmovd2m k5, xmm30 # AVX512{DQ,VL} 1727 vpmovd2m k5, ymm30 # AVX512{DQ,VL} 1728 vpmovq2m k5, xmm30 # AVX512{DQ,VL} 1729 vpmovq2m k5, ymm30 # AVX512{DQ,VL} 1730 vpmovm2d xmm30, k5 # AVX512{DQ,VL} 1731 vpmovm2d ymm30, k5 # AVX512{DQ,VL} 1732 vpmovm2q xmm30, k5 # AVX512{DQ,VL} 1733 vpmovm2q ymm30, k5 # AVX512{DQ,VL} 1734