1/* 2 * Copyright (C) 2019-2021 Intel Corporation 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 */ 7 8#pragma pack(1) 9typedef struct tagBINDING_TABLE_STATE { 10 union tagTheStructure { 11 struct tagCommon { 12 uint32_t Reserved_0 : BITFIELD_RANGE(0, 5); 13 uint32_t SurfaceStatePointer : BITFIELD_RANGE(6, 31); 14 } Common; 15 uint32_t RawData[1]; 16 } TheStructure; 17 typedef enum tagPATCH_CONSTANTS { 18 SURFACESTATEPOINTER_BYTEOFFSET = 0x0, 19 SURFACESTATEPOINTER_INDEX = 0x0, 20 } PATCH_CONSTANTS; 21 inline void init() { 22 memset(&TheStructure, 0, sizeof(TheStructure)); 23 } 24 static tagBINDING_TABLE_STATE sInit() { 25 BINDING_TABLE_STATE state; 26 state.init(); 27 return state; 28 } 29 inline uint32_t &getRawData(const uint32_t index) { 30 DEBUG_BREAK_IF(index >= 1); 31 return TheStructure.RawData[index]; 32 } 33 inline const uint32_t &getRawData(const uint32_t index) const { 34 DEBUG_BREAK_IF(index >= 1); 35 return TheStructure.RawData[index]; 36 } 37 typedef enum tagSURFACESTATEPOINTER { 38 SURFACESTATEPOINTER_BIT_SHIFT = 0x6, 39 SURFACESTATEPOINTER_ALIGN_SIZE = 0x40, 40 } SURFACESTATEPOINTER; 41 inline void setSurfaceStatePointer(const uint64_t value) { 42 DEBUG_BREAK_IF(value >= 0x100000000); 43 TheStructure.Common.SurfaceStatePointer = (uint32_t)value >> SURFACESTATEPOINTER_BIT_SHIFT; 44 } 45 inline uint32_t getSurfaceStatePointer() const { 46 return (TheStructure.Common.SurfaceStatePointer << SURFACESTATEPOINTER_BIT_SHIFT); 47 } 48} BINDING_TABLE_STATE; 49STATIC_ASSERT(4 == sizeof(BINDING_TABLE_STATE)); 50typedef struct tagGPGPU_WALKER { 51 union tagTheStructure { 52 struct tagCommon { 53 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 54 uint32_t PredicateEnable : BITFIELD_RANGE(8, 8); 55 uint32_t Reserved_9 : BITFIELD_RANGE(9, 9); 56 uint32_t IndirectParameterEnable : BITFIELD_RANGE(10, 10); 57 uint32_t Reserved_11 : BITFIELD_RANGE(11, 15); 58 uint32_t Subopcode : BITFIELD_RANGE(16, 23); 59 uint32_t MediaCommandOpcode : BITFIELD_RANGE(24, 26); 60 uint32_t Pipeline : BITFIELD_RANGE(27, 28); 61 uint32_t CommandType : BITFIELD_RANGE(29, 31); 62 uint32_t InterfaceDescriptorOffset : BITFIELD_RANGE(0, 5); 63 uint32_t Reserved_38 : BITFIELD_RANGE(6, 31); 64 uint32_t IndirectDataLength : BITFIELD_RANGE(0, 16); 65 uint32_t Reserved_81 : BITFIELD_RANGE(17, 31); 66 uint32_t Reserved_96 : BITFIELD_RANGE(0, 5); 67 uint32_t IndirectDataStartAddress : BITFIELD_RANGE(6, 31); 68 uint32_t ThreadWidthCounterMaximum : BITFIELD_RANGE(0, 5); 69 uint32_t Reserved_134 : BITFIELD_RANGE(6, 7); 70 uint32_t ThreadHeightCounterMaximum : BITFIELD_RANGE(8, 13); 71 uint32_t Reserved_142 : BITFIELD_RANGE(14, 15); 72 uint32_t ThreadDepthCounterMaximum : BITFIELD_RANGE(16, 21); 73 uint32_t Reserved_150 : BITFIELD_RANGE(22, 29); 74 uint32_t SimdSize : BITFIELD_RANGE(30, 31); 75 uint32_t ThreadGroupIdStartingX; 76 uint32_t Reserved_192; 77 uint32_t ThreadGroupIdXDimension; 78 uint32_t ThreadGroupIdStartingY; 79 uint32_t Reserved_288; 80 uint32_t ThreadGroupIdYDimension; 81 uint32_t ThreadGroupIdStartingResumeZ; 82 uint32_t ThreadGroupIdZDimension; 83 uint32_t RightExecutionMask; 84 uint32_t BottomExecutionMask; 85 } Common; 86 uint32_t RawData[15]; 87 } TheStructure; 88 typedef enum tagDWORD_LENGTH { 89 DWORD_LENGTH_DWORD_COUNT_N = 0xd, 90 } DWORD_LENGTH; 91 typedef enum tagSUBOPCODE { 92 SUBOPCODE_GPGPU_WALKER_SUBOP = 0x5, 93 } SUBOPCODE; 94 typedef enum tagMEDIA_COMMAND_OPCODE { 95 MEDIA_COMMAND_OPCODE_GPGPU_WALKER = 0x1, 96 } MEDIA_COMMAND_OPCODE; 97 typedef enum tagPIPELINE { 98 PIPELINE_MEDIA = 0x2, 99 } PIPELINE; 100 typedef enum tagCOMMAND_TYPE { 101 COMMAND_TYPE_GFXPIPE = 0x3, 102 } COMMAND_TYPE; 103 typedef enum tagSIMD_SIZE { 104 SIMD_SIZE_SIMD8 = 0x0, 105 SIMD_SIZE_SIMD16 = 0x1, 106 SIMD_SIZE_SIMD32 = 0x2, 107 } SIMD_SIZE; 108 typedef enum tagPATCH_CONSTANTS { 109 INDIRECTDATASTARTADDRESS_BYTEOFFSET = 0xc, 110 INDIRECTDATASTARTADDRESS_INDEX = 0x3, 111 } PATCH_CONSTANTS; 112 inline void init() { 113 memset(&TheStructure, 0, sizeof(TheStructure)); 114 TheStructure.Common.DwordLength = DWORD_LENGTH_DWORD_COUNT_N; 115 TheStructure.Common.Subopcode = SUBOPCODE_GPGPU_WALKER_SUBOP; 116 TheStructure.Common.MediaCommandOpcode = MEDIA_COMMAND_OPCODE_GPGPU_WALKER; 117 TheStructure.Common.Pipeline = PIPELINE_MEDIA; 118 TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE; 119 TheStructure.Common.SimdSize = SIMD_SIZE_SIMD8; 120 } 121 static tagGPGPU_WALKER sInit() { 122 GPGPU_WALKER state; 123 state.init(); 124 return state; 125 } 126 inline uint32_t &getRawData(const uint32_t index) { 127 DEBUG_BREAK_IF(index >= 15); 128 return TheStructure.RawData[index]; 129 } 130 inline void setPredicateEnable(const bool value) { 131 TheStructure.Common.PredicateEnable = value; 132 } 133 inline bool getPredicateEnable() const { 134 return (TheStructure.Common.PredicateEnable); 135 } 136 inline void setIndirectParameterEnable(const bool value) { 137 TheStructure.Common.IndirectParameterEnable = value; 138 } 139 inline bool getIndirectParameterEnable() const { 140 return (TheStructure.Common.IndirectParameterEnable); 141 } 142 inline void setInterfaceDescriptorOffset(const uint32_t value) { 143 TheStructure.Common.InterfaceDescriptorOffset = value; 144 } 145 inline uint32_t getInterfaceDescriptorOffset() const { 146 return (TheStructure.Common.InterfaceDescriptorOffset); 147 } 148 inline void setIndirectDataLength(const uint32_t value) { 149 TheStructure.Common.IndirectDataLength = value; 150 } 151 inline uint32_t getIndirectDataLength() const { 152 return (TheStructure.Common.IndirectDataLength); 153 } 154 typedef enum tagINDIRECTDATASTARTADDRESS { 155 INDIRECTDATASTARTADDRESS_BIT_SHIFT = 0x6, 156 INDIRECTDATASTARTADDRESS_ALIGN_SIZE = 0x40, 157 } INDIRECTDATASTARTADDRESS; 158 inline void setIndirectDataStartAddress(const uint32_t value) { 159 TheStructure.Common.IndirectDataStartAddress = value >> INDIRECTDATASTARTADDRESS_BIT_SHIFT; 160 } 161 inline uint32_t getIndirectDataStartAddress() const { 162 return (TheStructure.Common.IndirectDataStartAddress << INDIRECTDATASTARTADDRESS_BIT_SHIFT); 163 } 164 inline void setThreadWidthCounterMaximum(const uint32_t value) { 165 TheStructure.Common.ThreadWidthCounterMaximum = value - 1; 166 } 167 inline uint32_t getThreadWidthCounterMaximum() const { 168 return (TheStructure.Common.ThreadWidthCounterMaximum + 1); 169 } 170 inline void setThreadHeightCounterMaximum(const uint32_t value) { 171 TheStructure.Common.ThreadHeightCounterMaximum = value - 1; 172 } 173 inline uint32_t getThreadHeightCounterMaximum() const { 174 return (TheStructure.Common.ThreadHeightCounterMaximum + 1); 175 } 176 inline void setThreadDepthCounterMaximum(const uint32_t value) { 177 TheStructure.Common.ThreadDepthCounterMaximum = value; 178 } 179 inline uint32_t getThreadDepthCounterMaximum() const { 180 return (TheStructure.Common.ThreadDepthCounterMaximum); 181 } 182 inline void setSimdSize(const SIMD_SIZE value) { 183 TheStructure.Common.SimdSize = value; 184 } 185 inline SIMD_SIZE getSimdSize() const { 186 return static_cast<SIMD_SIZE>(TheStructure.Common.SimdSize); 187 } 188 inline void setThreadGroupIdStartingX(const uint32_t value) { 189 TheStructure.Common.ThreadGroupIdStartingX = value; 190 } 191 inline uint32_t getThreadGroupIdStartingX() const { 192 return (TheStructure.Common.ThreadGroupIdStartingX); 193 } 194 inline void setThreadGroupIdXDimension(const uint32_t value) { 195 TheStructure.Common.ThreadGroupIdXDimension = value; 196 } 197 inline uint32_t getThreadGroupIdXDimension() const { 198 return (TheStructure.Common.ThreadGroupIdXDimension); 199 } 200 inline void setThreadGroupIdStartingY(const uint32_t value) { 201 TheStructure.Common.ThreadGroupIdStartingY = value; 202 } 203 inline uint32_t getThreadGroupIdStartingY() const { 204 return (TheStructure.Common.ThreadGroupIdStartingY); 205 } 206 inline void setThreadGroupIdYDimension(const uint32_t value) { 207 TheStructure.Common.ThreadGroupIdYDimension = value; 208 } 209 inline uint32_t getThreadGroupIdYDimension() const { 210 return (TheStructure.Common.ThreadGroupIdYDimension); 211 } 212 inline void setThreadGroupIdStartingResumeZ(const uint32_t value) { 213 TheStructure.Common.ThreadGroupIdStartingResumeZ = value; 214 } 215 inline uint32_t getThreadGroupIdStartingResumeZ() const { 216 return (TheStructure.Common.ThreadGroupIdStartingResumeZ); 217 } 218 inline void setThreadGroupIdZDimension(const uint32_t value) { 219 TheStructure.Common.ThreadGroupIdZDimension = value; 220 } 221 inline uint32_t getThreadGroupIdZDimension() const { 222 return (TheStructure.Common.ThreadGroupIdZDimension); 223 } 224 inline void setRightExecutionMask(const uint32_t value) { 225 TheStructure.Common.RightExecutionMask = value; 226 } 227 inline uint32_t getRightExecutionMask() const { 228 return (TheStructure.Common.RightExecutionMask); 229 } 230 inline void setBottomExecutionMask(const uint32_t value) { 231 TheStructure.Common.BottomExecutionMask = value; 232 } 233 inline uint32_t getBottomExecutionMask() const { 234 return (TheStructure.Common.BottomExecutionMask); 235 } 236} GPGPU_WALKER; 237STATIC_ASSERT(60 == sizeof(GPGPU_WALKER)); 238 239typedef struct tagINTERFACE_DESCRIPTOR_DATA { 240 union tagTheStructure { 241 struct tagCommon { 242 uint32_t Reserved_0 : BITFIELD_RANGE(0, 5); 243 uint32_t KernelStartPointer : BITFIELD_RANGE(6, 31); 244 uint32_t KernelStartPointerHigh : BITFIELD_RANGE(0, 15); 245 uint32_t Reserved_48 : BITFIELD_RANGE(16, 31); 246 uint32_t Reserved_64 : BITFIELD_RANGE(0, 6); 247 uint32_t SoftwareExceptionEnable : BITFIELD_RANGE(7, 7); 248 uint32_t Reserved_72 : BITFIELD_RANGE(8, 10); 249 uint32_t MaskStackExceptionEnable : BITFIELD_RANGE(11, 11); 250 uint32_t Reserved_76 : BITFIELD_RANGE(12, 12); 251 uint32_t IllegalOpcodeExceptionEnable : BITFIELD_RANGE(13, 13); 252 uint32_t Reserved_78 : BITFIELD_RANGE(14, 15); 253 uint32_t FloatingPointMode : BITFIELD_RANGE(16, 16); 254 uint32_t ThreadPriority : BITFIELD_RANGE(17, 17); 255 uint32_t SingleProgramFlow : BITFIELD_RANGE(18, 18); 256 uint32_t DenormMode : BITFIELD_RANGE(19, 19); 257 uint32_t ThreadPreemptionDisable : BITFIELD_RANGE(20, 20); 258 uint32_t Reserved_85 : BITFIELD_RANGE(21, 31); 259 uint32_t Reserved_96 : BITFIELD_RANGE(0, 1); 260 uint32_t SamplerCount : BITFIELD_RANGE(2, 4); 261 uint32_t SamplerStatePointer : BITFIELD_RANGE(5, 31); 262 uint32_t BindingTableEntryCount : BITFIELD_RANGE(0, 4); 263 uint32_t BindingTablePointer : BITFIELD_RANGE(5, 15); 264 uint32_t Reserved_144 : BITFIELD_RANGE(16, 31); 265 uint32_t ConstantUrbEntryReadOffset : BITFIELD_RANGE(0, 15); 266 uint32_t ConstantIndirectUrbEntryReadLength : BITFIELD_RANGE(16, 31); 267 uint32_t NumberOfThreadsInGpgpuThreadGroup : BITFIELD_RANGE(0, 9); 268 uint32_t Reserved_202 : BITFIELD_RANGE(10, 15); 269 uint32_t SharedLocalMemorySize : BITFIELD_RANGE(16, 20); 270 uint32_t BarrierEnable : BITFIELD_RANGE(21, 21); 271 uint32_t RoundingMode : BITFIELD_RANGE(22, 23); 272 uint32_t Reserved_216 : BITFIELD_RANGE(24, 31); 273 uint32_t Cross_ThreadConstantDataReadLength : BITFIELD_RANGE(0, 7); 274 uint32_t Reserved_232 : BITFIELD_RANGE(8, 31); 275 } Common; 276 uint32_t RawData[8]; 277 } TheStructure; 278 typedef enum tagFLOATING_POINT_MODE { 279 FLOATING_POINT_MODE_IEEE_754 = 0x0, 280 FLOATING_POINT_MODE_ALTERNATE = 0x1, 281 } FLOATING_POINT_MODE; 282 typedef enum tagTHREAD_PRIORITY { 283 THREAD_PRIORITY_NORMAL_PRIORITY = 0x0, 284 THREAD_PRIORITY_HIGH_PRIORITY = 0x1, 285 } THREAD_PRIORITY; 286 typedef enum tagSINGLE_PROGRAM_FLOW { 287 SINGLE_PROGRAM_FLOW_MULTIPLE = 0x0, 288 SINGLE_PROGRAM_FLOW_SINGLE = 0x1, 289 } SINGLE_PROGRAM_FLOW; 290 typedef enum tagDENORM_MODE { 291 DENORM_MODE_FTZ = 0x0, 292 DENORM_MODE_SETBYKERNEL = 0x1, 293 } DENORM_MODE; 294 typedef enum tagTHREAD_PREEMPTION_DISABLE { 295 THREAD_PREEMPTION_DISABLE_DISABLE = 0x0, 296 THREAD_PREEMPTION_DISABLE_ENABLE = 0x1, 297 } THREAD_PREEMPTION_DISABLE; 298 typedef enum tagSAMPLER_COUNT { 299 SAMPLER_COUNT_NO_SAMPLERS_USED = 0x0, 300 SAMPLER_COUNT_BETWEEN_1_AND_4_SAMPLERS_USED = 0x1, 301 SAMPLER_COUNT_BETWEEN_5_AND_8_SAMPLERS_USED = 0x2, 302 SAMPLER_COUNT_BETWEEN_9_AND_12_SAMPLERS_USED = 0x3, 303 SAMPLER_COUNT_BETWEEN_13_AND_16_SAMPLERS_USED = 0x4, 304 } SAMPLER_COUNT; 305 typedef enum tagSHARED_LOCAL_MEMORY_SIZE { 306 SHARED_LOCAL_MEMORY_SIZE_ENCODES_0K = 0x0, 307 SHARED_LOCAL_MEMORY_SIZE_ENCODES_1K = 0x1, 308 SHARED_LOCAL_MEMORY_SIZE_ENCODES_2K = 0x2, 309 SHARED_LOCAL_MEMORY_SIZE_ENCODES_4K = 0x3, 310 SHARED_LOCAL_MEMORY_SIZE_ENCODES_8K = 0x4, 311 SHARED_LOCAL_MEMORY_SIZE_ENCODES_16K = 0x5, 312 SHARED_LOCAL_MEMORY_SIZE_ENCODES_32K = 0x6, 313 SHARED_LOCAL_MEMORY_SIZE_ENCODES_64K = 0x7, 314 } SHARED_LOCAL_MEMORY_SIZE; 315 typedef enum tagROUNDING_MODE { 316 ROUNDING_MODE_RTNE = 0x0, 317 ROUNDING_MODE_RU = 0x1, 318 ROUNDING_MODE_RD = 0x2, 319 ROUNDING_MODE_RTZ = 0x3, 320 } ROUNDING_MODE; 321 typedef enum tagPATCH_CONSTANTS { 322 KERNELSTARTPOINTER_BYTEOFFSET = 0x0, 323 KERNELSTARTPOINTER_INDEX = 0x0, 324 KERNELSTARTPOINTERHIGH_BYTEOFFSET = 0x4, 325 KERNELSTARTPOINTERHIGH_INDEX = 0x1, 326 SAMPLERSTATEPOINTER_BYTEOFFSET = 0xc, 327 SAMPLERSTATEPOINTER_INDEX = 0x3, 328 BINDINGTABLEPOINTER_BYTEOFFSET = 0x10, 329 BINDINGTABLEPOINTER_INDEX = 0x4, 330 } PATCH_CONSTANTS; 331 inline void init() { 332 memset(&TheStructure, 0, sizeof(TheStructure)); 333 TheStructure.Common.FloatingPointMode = FLOATING_POINT_MODE_IEEE_754; 334 TheStructure.Common.ThreadPriority = THREAD_PRIORITY_NORMAL_PRIORITY; 335 TheStructure.Common.SingleProgramFlow = SINGLE_PROGRAM_FLOW_MULTIPLE; 336 TheStructure.Common.DenormMode = DENORM_MODE_FTZ; 337 TheStructure.Common.ThreadPreemptionDisable = THREAD_PREEMPTION_DISABLE_DISABLE; 338 TheStructure.Common.SamplerCount = SAMPLER_COUNT_NO_SAMPLERS_USED; 339 TheStructure.Common.SharedLocalMemorySize = SHARED_LOCAL_MEMORY_SIZE_ENCODES_0K; 340 TheStructure.Common.RoundingMode = ROUNDING_MODE_RTNE; 341 } 342 static tagINTERFACE_DESCRIPTOR_DATA sInit() { 343 INTERFACE_DESCRIPTOR_DATA state; 344 state.init(); 345 return state; 346 } 347 inline uint32_t &getRawData(const uint32_t index) { 348 DEBUG_BREAK_IF(index >= 8); 349 return TheStructure.RawData[index]; 350 } 351 typedef enum tagKERNELSTARTPOINTER { 352 KERNELSTARTPOINTER_BIT_SHIFT = 0x6, 353 KERNELSTARTPOINTER_ALIGN_SIZE = 0x40, 354 } KERNELSTARTPOINTER; 355 inline void setKernelStartPointer(const uint64_t value) { 356 DEBUG_BREAK_IF(value >= 0x100000000); 357 TheStructure.Common.KernelStartPointer = (uint32_t)value >> KERNELSTARTPOINTER_BIT_SHIFT; 358 } 359 inline uint32_t getKernelStartPointer() const { 360 return (TheStructure.Common.KernelStartPointer << KERNELSTARTPOINTER_BIT_SHIFT); 361 } 362 inline void setKernelStartPointerHigh(const uint32_t value) { 363 TheStructure.Common.KernelStartPointerHigh = value; 364 } 365 inline uint32_t getKernelStartPointerHigh() const { 366 return (TheStructure.Common.KernelStartPointerHigh); 367 } 368 inline void setSoftwareExceptionEnable(const bool value) { 369 TheStructure.Common.SoftwareExceptionEnable = value; 370 } 371 inline bool getSoftwareExceptionEnable() const { 372 return (TheStructure.Common.SoftwareExceptionEnable); 373 } 374 inline void setMaskStackExceptionEnable(const bool value) { 375 TheStructure.Common.MaskStackExceptionEnable = value; 376 } 377 inline bool getMaskStackExceptionEnable() const { 378 return (TheStructure.Common.MaskStackExceptionEnable); 379 } 380 inline void setIllegalOpcodeExceptionEnable(const bool value) { 381 TheStructure.Common.IllegalOpcodeExceptionEnable = value; 382 } 383 inline bool getIllegalOpcodeExceptionEnable() const { 384 return (TheStructure.Common.IllegalOpcodeExceptionEnable); 385 } 386 inline void setFloatingPointMode(const FLOATING_POINT_MODE value) { 387 TheStructure.Common.FloatingPointMode = value; 388 } 389 inline FLOATING_POINT_MODE getFloatingPointMode() const { 390 return static_cast<FLOATING_POINT_MODE>(TheStructure.Common.FloatingPointMode); 391 } 392 inline void setThreadPriority(const THREAD_PRIORITY value) { 393 TheStructure.Common.ThreadPriority = value; 394 } 395 inline THREAD_PRIORITY getThreadPriority() const { 396 return static_cast<THREAD_PRIORITY>(TheStructure.Common.ThreadPriority); 397 } 398 inline void setSingleProgramFlow(const SINGLE_PROGRAM_FLOW value) { 399 TheStructure.Common.SingleProgramFlow = value; 400 } 401 inline SINGLE_PROGRAM_FLOW getSingleProgramFlow() const { 402 return static_cast<SINGLE_PROGRAM_FLOW>(TheStructure.Common.SingleProgramFlow); 403 } 404 inline void setDenormMode(const DENORM_MODE value) { 405 TheStructure.Common.DenormMode = value; 406 } 407 inline DENORM_MODE getDenormMode() const { 408 return static_cast<DENORM_MODE>(TheStructure.Common.DenormMode); 409 } 410 inline void setThreadPreemptionDisable(const THREAD_PREEMPTION_DISABLE value) { 411 TheStructure.Common.ThreadPreemptionDisable = value; 412 } 413 inline THREAD_PREEMPTION_DISABLE getThreadPreemptionDisable() const { 414 return static_cast<THREAD_PREEMPTION_DISABLE>(TheStructure.Common.ThreadPreemptionDisable); 415 } 416 inline void setSamplerCount(const SAMPLER_COUNT value) { 417 TheStructure.Common.SamplerCount = value; 418 } 419 inline SAMPLER_COUNT getSamplerCount() const { 420 return static_cast<SAMPLER_COUNT>(TheStructure.Common.SamplerCount); 421 } 422 typedef enum tagSAMPLERSTATEPOINTER { 423 SAMPLERSTATEPOINTER_BIT_SHIFT = 0x5, 424 SAMPLERSTATEPOINTER_ALIGN_SIZE = 0x20, 425 } SAMPLERSTATEPOINTER; 426 inline void setSamplerStatePointer(const uint64_t value) { 427 DEBUG_BREAK_IF(value >= 0x100000000); 428 TheStructure.Common.SamplerStatePointer = (uint32_t)value >> SAMPLERSTATEPOINTER_BIT_SHIFT; 429 } 430 inline uint32_t getSamplerStatePointer() const { 431 return (TheStructure.Common.SamplerStatePointer << SAMPLERSTATEPOINTER_BIT_SHIFT); 432 } 433 inline void setBindingTableEntryCount(const uint32_t value) { 434 TheStructure.Common.BindingTableEntryCount = value; 435 } 436 inline uint32_t getBindingTableEntryCount() const { 437 return (TheStructure.Common.BindingTableEntryCount); 438 } 439 typedef enum tagBINDINGTABLEPOINTER { 440 BINDINGTABLEPOINTER_BIT_SHIFT = 0x5, 441 BINDINGTABLEPOINTER_ALIGN_SIZE = 0x20, 442 } BINDINGTABLEPOINTER; 443 inline void setBindingTablePointer(const uint64_t value) { 444 DEBUG_BREAK_IF(value >= 0x100000000); 445 TheStructure.Common.BindingTablePointer = (uint32_t)value >> BINDINGTABLEPOINTER_BIT_SHIFT; 446 } 447 inline uint32_t getBindingTablePointer() const { 448 return (TheStructure.Common.BindingTablePointer << BINDINGTABLEPOINTER_BIT_SHIFT); 449 } 450 inline void setConstantUrbEntryReadOffset(const uint32_t value) { 451 TheStructure.Common.ConstantUrbEntryReadOffset = value; 452 } 453 inline uint32_t getConstantUrbEntryReadOffset() const { 454 return (TheStructure.Common.ConstantUrbEntryReadOffset); 455 } 456 inline void setConstantIndirectUrbEntryReadLength(const uint32_t value) { 457 TheStructure.Common.ConstantIndirectUrbEntryReadLength = value; 458 } 459 inline uint32_t getConstantIndirectUrbEntryReadLength() const { 460 return (TheStructure.Common.ConstantIndirectUrbEntryReadLength); 461 } 462 inline void setNumberOfThreadsInGpgpuThreadGroup(const uint32_t value) { 463 TheStructure.Common.NumberOfThreadsInGpgpuThreadGroup = value; 464 } 465 inline uint32_t getNumberOfThreadsInGpgpuThreadGroup() const { 466 return (TheStructure.Common.NumberOfThreadsInGpgpuThreadGroup); 467 } 468 inline void setSharedLocalMemorySize(const SHARED_LOCAL_MEMORY_SIZE value) { 469 TheStructure.Common.SharedLocalMemorySize = value; 470 } 471 inline SHARED_LOCAL_MEMORY_SIZE getSharedLocalMemorySize() const { 472 return static_cast<SHARED_LOCAL_MEMORY_SIZE>(TheStructure.Common.SharedLocalMemorySize); 473 } 474 inline void setBarrierEnable(const uint32_t value) { 475 TheStructure.Common.BarrierEnable = (value > 0u) ? 1u : 0u; 476 } 477 inline bool getBarrierEnable() const { 478 return (TheStructure.Common.BarrierEnable); 479 } 480 inline void setRoundingMode(const ROUNDING_MODE value) { 481 TheStructure.Common.RoundingMode = value; 482 } 483 inline ROUNDING_MODE getRoundingMode() const { 484 return static_cast<ROUNDING_MODE>(TheStructure.Common.RoundingMode); 485 } 486 inline void setCrossThreadConstantDataReadLength(const uint32_t value) { 487 TheStructure.Common.Cross_ThreadConstantDataReadLength = value; 488 } 489 inline uint32_t getCrossThreadConstantDataReadLength() const { 490 return (TheStructure.Common.Cross_ThreadConstantDataReadLength); 491 } 492} INTERFACE_DESCRIPTOR_DATA; 493STATIC_ASSERT(32 == sizeof(INTERFACE_DESCRIPTOR_DATA)); 494 495typedef struct tagMEDIA_INTERFACE_DESCRIPTOR_LOAD { 496 union tagTheStructure { 497 struct tagCommon { 498 uint32_t DwordLength : BITFIELD_RANGE(0, 15); 499 uint32_t Subopcode : BITFIELD_RANGE(16, 23); 500 uint32_t MediaCommandOpcode : BITFIELD_RANGE(24, 26); 501 uint32_t Pipeline : BITFIELD_RANGE(27, 28); 502 uint32_t CommandType : BITFIELD_RANGE(29, 31); 503 uint32_t Reserved_32; 504 uint32_t InterfaceDescriptorTotalLength : BITFIELD_RANGE(0, 16); 505 uint32_t Reserved_81 : BITFIELD_RANGE(17, 31); 506 uint32_t InterfaceDescriptorDataStartAddress; 507 } Common; 508 uint32_t RawData[4]; 509 } TheStructure; 510 typedef enum tagDWORD_LENGTH { 511 DWORD_LENGTH_DWORD_COUNT_N = 0x2, 512 } DWORD_LENGTH; 513 typedef enum tagSUBOPCODE { 514 SUBOPCODE_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SUBOP = 0x2, 515 } SUBOPCODE; 516 typedef enum tagMEDIA_COMMAND_OPCODE { 517 MEDIA_COMMAND_OPCODE_MEDIA_INTERFACE_DESCRIPTOR_LOAD = 0x0, 518 } MEDIA_COMMAND_OPCODE; 519 typedef enum tagPIPELINE { 520 PIPELINE_MEDIA = 0x2, 521 } PIPELINE; 522 typedef enum tagCOMMAND_TYPE { 523 COMMAND_TYPE_GFXPIPE = 0x3, 524 } COMMAND_TYPE; 525 typedef enum tagPATCH_CONSTANTS { 526 INTERFACEDESCRIPTORDATASTARTADDRESS_BYTEOFFSET = 0xc, 527 INTERFACEDESCRIPTORDATASTARTADDRESS_INDEX = 0x3, 528 } PATCH_CONSTANTS; 529 inline void init() { 530 memset(&TheStructure, 0, sizeof(TheStructure)); 531 TheStructure.Common.DwordLength = DWORD_LENGTH_DWORD_COUNT_N; 532 TheStructure.Common.Subopcode = SUBOPCODE_MEDIA_INTERFACE_DESCRIPTOR_LOAD_SUBOP; 533 TheStructure.Common.MediaCommandOpcode = MEDIA_COMMAND_OPCODE_MEDIA_INTERFACE_DESCRIPTOR_LOAD; 534 TheStructure.Common.Pipeline = PIPELINE_MEDIA; 535 TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE; 536 } 537 static tagMEDIA_INTERFACE_DESCRIPTOR_LOAD sInit() { 538 MEDIA_INTERFACE_DESCRIPTOR_LOAD state; 539 state.init(); 540 return state; 541 } 542 inline uint32_t &getRawData(const uint32_t index) { 543 DEBUG_BREAK_IF(index >= 4); 544 return TheStructure.RawData[index]; 545 } 546 inline void setInterfaceDescriptorTotalLength(const uint32_t value) { 547 TheStructure.Common.InterfaceDescriptorTotalLength = value; 548 } 549 inline uint32_t getInterfaceDescriptorTotalLength() const { 550 return (TheStructure.Common.InterfaceDescriptorTotalLength); 551 } 552 inline void setInterfaceDescriptorDataStartAddress(const uint32_t value) { 553 TheStructure.Common.InterfaceDescriptorDataStartAddress = value; 554 } 555 inline uint32_t getInterfaceDescriptorDataStartAddress() const { 556 return (TheStructure.Common.InterfaceDescriptorDataStartAddress); 557 } 558} MEDIA_INTERFACE_DESCRIPTOR_LOAD; 559STATIC_ASSERT(16 == sizeof(MEDIA_INTERFACE_DESCRIPTOR_LOAD)); 560 561typedef struct tagMEDIA_STATE_FLUSH { 562 union tagTheStructure { 563 struct tagCommon { 564 uint32_t DwordLength : BITFIELD_RANGE(0, 15); 565 uint32_t Subopcode : BITFIELD_RANGE(16, 23); 566 uint32_t MediaCommandOpcode : BITFIELD_RANGE(24, 26); 567 uint32_t Pipeline : BITFIELD_RANGE(27, 28); 568 uint32_t CommandType : BITFIELD_RANGE(29, 31); 569 uint32_t InterfaceDescriptorOffset : BITFIELD_RANGE(0, 5); 570 uint32_t Reserved_38 : BITFIELD_RANGE(6, 6); 571 uint32_t FlushToGo : BITFIELD_RANGE(7, 7); 572 uint32_t Reserved_40 : BITFIELD_RANGE(8, 31); 573 } Common; 574 uint32_t RawData[2]; 575 } TheStructure; 576 typedef enum tagDWORD_LENGTH { 577 DWORD_LENGTH_DWORD_COUNT_N = 0x0, 578 } DWORD_LENGTH; 579 typedef enum tagSUBOPCODE { 580 SUBOPCODE_MEDIA_STATE_FLUSH_SUBOP = 0x4, 581 } SUBOPCODE; 582 typedef enum tagMEDIA_COMMAND_OPCODE { 583 MEDIA_COMMAND_OPCODE_MEDIA_STATE_FLUSH = 0x0, 584 } MEDIA_COMMAND_OPCODE; 585 typedef enum tagPIPELINE { 586 PIPELINE_MEDIA = 0x2, 587 } PIPELINE; 588 typedef enum tagCOMMAND_TYPE { 589 COMMAND_TYPE_GFXPIPE = 0x3, 590 } COMMAND_TYPE; 591 inline void init() { 592 memset(&TheStructure, 0, sizeof(TheStructure)); 593 TheStructure.Common.DwordLength = DWORD_LENGTH_DWORD_COUNT_N; 594 TheStructure.Common.Subopcode = SUBOPCODE_MEDIA_STATE_FLUSH_SUBOP; 595 TheStructure.Common.MediaCommandOpcode = MEDIA_COMMAND_OPCODE_MEDIA_STATE_FLUSH; 596 TheStructure.Common.Pipeline = PIPELINE_MEDIA; 597 TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE; 598 } 599 static tagMEDIA_STATE_FLUSH sInit() { 600 MEDIA_STATE_FLUSH state; 601 state.init(); 602 return state; 603 } 604 inline uint32_t &getRawData(const uint32_t index) { 605 DEBUG_BREAK_IF(index >= 2); 606 return TheStructure.RawData[index]; 607 } 608 inline void setInterfaceDescriptorOffset(const uint32_t value) { 609 TheStructure.Common.InterfaceDescriptorOffset = value; 610 } 611 inline uint32_t getInterfaceDescriptorOffset() const { 612 return (TheStructure.Common.InterfaceDescriptorOffset); 613 } 614 inline void setFlushToGo(const bool value) { 615 TheStructure.Common.FlushToGo = value; 616 } 617 inline bool getFlushToGo() const { 618 return (TheStructure.Common.FlushToGo); 619 } 620} MEDIA_STATE_FLUSH; 621STATIC_ASSERT(8 == sizeof(MEDIA_STATE_FLUSH)); 622 623typedef struct tagMEDIA_VFE_STATE { 624 union tagTheStructure { 625 struct tagCommon { 626 uint32_t DwordLength : BITFIELD_RANGE(0, 15); 627 uint32_t Subopcode : BITFIELD_RANGE(16, 23); 628 uint32_t MediaCommandOpcode : BITFIELD_RANGE(24, 26); 629 uint32_t Pipeline : BITFIELD_RANGE(27, 28); 630 uint32_t CommandType : BITFIELD_RANGE(29, 31); 631 uint32_t PerThreadScratchSpace : BITFIELD_RANGE(0, 3); 632 uint32_t StackSize : BITFIELD_RANGE(4, 7); 633 uint32_t Reserved_40 : BITFIELD_RANGE(8, 9); 634 uint32_t ScratchSpaceBasePointer : BITFIELD_RANGE(10, 31); 635 uint32_t ScratchSpaceBasePointerHigh : BITFIELD_RANGE(0, 15); 636 uint32_t Reserved_80 : BITFIELD_RANGE(16, 31); 637 uint32_t Reserved_96 : BITFIELD_RANGE(0, 1); 638 uint32_t DispatchLoadBalance : BITFIELD_RANGE(2, 2); 639 uint32_t Reserved_99 : BITFIELD_RANGE(3, 5); 640 uint32_t DisableSlice0Subslice2 : BITFIELD_RANGE(6, 6); 641 uint32_t Reserved_103 : BITFIELD_RANGE(7, 7); 642 uint32_t NumberOfUrbEntries : BITFIELD_RANGE(8, 15); 643 uint32_t MaximumNumberOfThreads : BITFIELD_RANGE(16, 31); 644 uint32_t MaximumNumberOfDual_Subslices : BITFIELD_RANGE(0, 7); 645 uint32_t Reserved_136 : BITFIELD_RANGE(8, 31); 646 uint32_t CurbeAllocationSize : BITFIELD_RANGE(0, 15); 647 uint32_t UrbEntryAllocationSize : BITFIELD_RANGE(16, 31); 648 uint32_t Reserved_192; 649 uint32_t Reserved_224; 650 uint32_t Reserved_256; 651 } Common; 652 uint32_t RawData[9]; 653 } TheStructure; 654 typedef enum tagDWORD_LENGTH { 655 DWORD_LENGTH_DWORD_COUNT_N = 0x7, 656 } DWORD_LENGTH; 657 typedef enum tagSUBOPCODE { 658 SUBOPCODE_MEDIA_VFE_STATE_SUBOP = 0x0, 659 } SUBOPCODE; 660 typedef enum tagMEDIA_COMMAND_OPCODE { 661 MEDIA_COMMAND_OPCODE_MEDIA_VFE_STATE = 0x0, 662 } MEDIA_COMMAND_OPCODE; 663 typedef enum tagPIPELINE { 664 PIPELINE_MEDIA = 0x2, 665 } PIPELINE; 666 typedef enum tagCOMMAND_TYPE { 667 COMMAND_TYPE_GFXPIPE = 0x3, 668 } COMMAND_TYPE; 669 typedef enum tagDISPATCH_LOAD_BALANCE { 670 DISPATCH_LOAD_BALANCE_LEAST_LOADED = 0x0, 671 DISPATCH_LOAD_BALANCE_COLOR_LSB = 0x1, 672 } DISPATCH_LOAD_BALANCE; 673 typedef enum tagPATCH_CONSTANTS { 674 SCRATCHSPACEBASEPOINTER_BYTEOFFSET = 0x4, 675 SCRATCHSPACEBASEPOINTER_INDEX = 0x1, 676 SCRATCHSPACEBASEPOINTERHIGH_BYTEOFFSET = 0x8, 677 SCRATCHSPACEBASEPOINTERHIGH_INDEX = 0x2, 678 } PATCH_CONSTANTS; 679 inline void init() { 680 memset(&TheStructure, 0, sizeof(TheStructure)); 681 TheStructure.Common.DwordLength = DWORD_LENGTH_DWORD_COUNT_N; 682 TheStructure.Common.Subopcode = SUBOPCODE_MEDIA_VFE_STATE_SUBOP; 683 TheStructure.Common.MediaCommandOpcode = MEDIA_COMMAND_OPCODE_MEDIA_VFE_STATE; 684 TheStructure.Common.Pipeline = PIPELINE_MEDIA; 685 TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE; 686 TheStructure.Common.DispatchLoadBalance = DISPATCH_LOAD_BALANCE_LEAST_LOADED; 687 } 688 static tagMEDIA_VFE_STATE sInit() { 689 MEDIA_VFE_STATE state; 690 state.init(); 691 return state; 692 } 693 inline uint32_t &getRawData(const uint32_t index) { 694 DEBUG_BREAK_IF(index >= 9); 695 return TheStructure.RawData[index]; 696 } 697 inline void setPerThreadScratchSpace(const uint32_t value) { 698 TheStructure.Common.PerThreadScratchSpace = value; 699 } 700 inline uint32_t getPerThreadScratchSpace() const { 701 return (TheStructure.Common.PerThreadScratchSpace); 702 } 703 inline void setStackSize(const uint32_t value) { 704 TheStructure.Common.StackSize = value; 705 } 706 inline uint32_t getStackSize() const { 707 return (TheStructure.Common.StackSize); 708 } 709 typedef enum tagSCRATCHSPACEBASEPOINTER { 710 SCRATCHSPACEBASEPOINTER_BIT_SHIFT = 0xa, 711 SCRATCHSPACEBASEPOINTER_ALIGN_SIZE = 0x400, 712 } SCRATCHSPACEBASEPOINTER; 713 inline void setScratchSpaceBasePointer(const uint32_t value) { 714 TheStructure.Common.ScratchSpaceBasePointer = value >> SCRATCHSPACEBASEPOINTER_BIT_SHIFT; 715 } 716 inline uint32_t getScratchSpaceBasePointer() const { 717 return (TheStructure.Common.ScratchSpaceBasePointer << SCRATCHSPACEBASEPOINTER_BIT_SHIFT); 718 } 719 inline void setScratchSpaceBasePointerHigh(const uint32_t value) { 720 TheStructure.Common.ScratchSpaceBasePointerHigh = value; 721 } 722 inline uint32_t getScratchSpaceBasePointerHigh() const { 723 return (TheStructure.Common.ScratchSpaceBasePointerHigh); 724 } 725 inline void setDispatchLoadBalance(const DISPATCH_LOAD_BALANCE value) { 726 TheStructure.Common.DispatchLoadBalance = value; 727 } 728 inline DISPATCH_LOAD_BALANCE getDispatchLoadBalance() const { 729 return static_cast<DISPATCH_LOAD_BALANCE>(TheStructure.Common.DispatchLoadBalance); 730 } 731 inline void setDisableSlice0Subslice2(const bool value) { 732 TheStructure.Common.DisableSlice0Subslice2 = value; 733 } 734 inline bool getDisableSlice0Subslice2() const { 735 return (TheStructure.Common.DisableSlice0Subslice2); 736 } 737 inline void setNumberOfUrbEntries(const uint32_t value) { 738 TheStructure.Common.NumberOfUrbEntries = value; 739 } 740 inline uint32_t getNumberOfUrbEntries() const { 741 return (TheStructure.Common.NumberOfUrbEntries); 742 } 743 inline void setMaximumNumberOfThreads(const uint32_t value) { 744 TheStructure.Common.MaximumNumberOfThreads = value - 1; 745 } 746 inline uint32_t getMaximumNumberOfThreads() const { 747 return (TheStructure.Common.MaximumNumberOfThreads + 1); 748 } 749 inline void setMaximumNumberOfDualSubslices(const uint32_t value) { 750 TheStructure.Common.MaximumNumberOfDual_Subslices = value; 751 } 752 inline uint32_t getMaximumNumberOfDualSubslices() const { 753 return (TheStructure.Common.MaximumNumberOfDual_Subslices); 754 } 755 inline void setCurbeAllocationSize(const uint32_t value) { 756 TheStructure.Common.CurbeAllocationSize = value; 757 } 758 inline uint32_t getCurbeAllocationSize() const { 759 return (TheStructure.Common.CurbeAllocationSize); 760 } 761 inline void setUrbEntryAllocationSize(const uint32_t value) { 762 TheStructure.Common.UrbEntryAllocationSize = value; 763 } 764 inline uint32_t getUrbEntryAllocationSize() const { 765 return (TheStructure.Common.UrbEntryAllocationSize); 766 } 767} MEDIA_VFE_STATE; 768STATIC_ASSERT(36 == sizeof(MEDIA_VFE_STATE)); 769 770typedef struct tagMI_ARB_CHECK { 771 union tagTheStructure { 772 struct tagCommon { 773 uint32_t Reserved_0 : BITFIELD_RANGE(0, 22); 774 uint32_t MiInstructionOpcode : BITFIELD_RANGE(23, 28); 775 uint32_t MiInstructionType : BITFIELD_RANGE(29, 31); 776 } Common; 777 uint32_t RawData[1]; 778 } TheStructure; 779 typedef enum tagMI_INSTRUCTION_OPCODE { 780 MI_INSTRUCTION_OPCODE_MI_ARB_CHECK = 0x5, 781 } MI_INSTRUCTION_OPCODE; 782 typedef enum tagMI_INSTRUCTION_TYPE { 783 MI_INSTRUCTION_TYPE_MI_INSTRUCTION = 0x0, 784 } MI_INSTRUCTION_TYPE; 785 inline void init() { 786 memset(&TheStructure, 0, sizeof(TheStructure)); 787 TheStructure.Common.MiInstructionOpcode = MI_INSTRUCTION_OPCODE_MI_ARB_CHECK; 788 TheStructure.Common.MiInstructionType = MI_INSTRUCTION_TYPE_MI_INSTRUCTION; 789 } 790 static tagMI_ARB_CHECK sInit() { 791 MI_ARB_CHECK state; 792 state.init(); 793 return state; 794 } 795 inline uint32_t &getRawData(const uint32_t index) { 796 DEBUG_BREAK_IF(index >= 1); 797 return TheStructure.RawData[index]; 798 } 799 inline void setMiInstructionOpcode(const MI_INSTRUCTION_OPCODE value) { 800 TheStructure.Common.MiInstructionOpcode = value; 801 } 802 inline MI_INSTRUCTION_OPCODE getMiInstructionOpcode() const { 803 return static_cast<MI_INSTRUCTION_OPCODE>(TheStructure.Common.MiInstructionOpcode); 804 } 805 inline void setMiInstructionType(const MI_INSTRUCTION_TYPE value) { 806 TheStructure.Common.MiInstructionType = value; 807 } 808 inline MI_INSTRUCTION_TYPE getMiInstructionType() const { 809 return static_cast<MI_INSTRUCTION_TYPE>(TheStructure.Common.MiInstructionType); 810 } 811} MI_ARB_CHECK; 812STATIC_ASSERT(4 == sizeof(MI_ARB_CHECK)); 813 814typedef struct tagMI_ATOMIC { 815 union tagTheStructure { 816 struct tagCommon { 817 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 818 uint32_t AtomicOpcode : BITFIELD_RANGE(8, 15); 819 uint32_t ReturnDataControl : BITFIELD_RANGE(16, 16); 820 uint32_t CsStall : BITFIELD_RANGE(17, 17); 821 uint32_t InlineData : BITFIELD_RANGE(18, 18); 822 uint32_t DataSize : BITFIELD_RANGE(19, 20); 823 uint32_t Post_SyncOperation : BITFIELD_RANGE(21, 21); 824 uint32_t MemoryType : BITFIELD_RANGE(22, 22); 825 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 826 uint32_t CommandType : BITFIELD_RANGE(29, 31); 827 uint32_t Reserved_32 : BITFIELD_RANGE(0, 1); 828 uint32_t MemoryAddress : BITFIELD_RANGE(2, 31); 829 uint32_t MemoryAddressHigh : BITFIELD_RANGE(0, 15); 830 uint32_t Reserved_80 : BITFIELD_RANGE(16, 31); 831 uint32_t Operand1DataDword0; 832 uint32_t Operand2DataDword0; 833 uint32_t Operand1DataDword1; 834 uint32_t Operand2DataDword1; 835 uint32_t Operand1DataDword2; 836 uint32_t Operand2DataDword2; 837 uint32_t Operand1DataDword3; 838 uint32_t Operand2DataDword3; 839 } Common; 840 uint32_t RawData[11]; 841 } TheStructure; 842 typedef enum tagDWORD_LENGTH { 843 DWORD_LENGTH_INLINE_DATA_0 = 0x1, 844 DWORD_LENGTH_INLINE_DATA_1 = 0x9, 845 } DWORD_LENGTH; 846 typedef enum tagDATA_SIZE { 847 DATA_SIZE_DWORD = 0x0, 848 DATA_SIZE_QWORD = 0x1, 849 DATA_SIZE_OCTWORD = 0x2, 850 } DATA_SIZE; 851 typedef enum tagPOST_SYNC_OPERATION { 852 POST_SYNC_OPERATION_NO_POST_SYNC_OPERATION = 0x0, 853 POST_SYNC_OPERATION_POST_SYNC_OPERATION = 0x1, 854 } POST_SYNC_OPERATION; 855 typedef enum tagMEMORY_TYPE { 856 MEMORY_TYPE_PER_PROCESS_GRAPHICS_ADDRESS = 0x0, 857 MEMORY_TYPE_GLOBAL_GRAPHICS_ADDRESS = 0x1, 858 } MEMORY_TYPE; 859 typedef enum tagMI_COMMAND_OPCODE { 860 MI_COMMAND_OPCODE_MI_ATOMIC = 0x2f, 861 } MI_COMMAND_OPCODE; 862 typedef enum tagCOMMAND_TYPE { 863 COMMAND_TYPE_MI_COMMAND = 0x0, 864 } COMMAND_TYPE; 865 typedef enum tagPATCH_CONSTANTS { 866 MEMORYADDRESS_BYTEOFFSET = 0x4, 867 MEMORYADDRESS_INDEX = 0x1, 868 } PATCH_CONSTANTS; 869 typedef enum tagATOMIC_OPCODES { 870 ATOMIC_4B_MOVE = 0x4, 871 ATOMIC_4B_INCREMENT = 0x5, 872 ATOMIC_4B_DECREMENT = 0x6, 873 ATOMIC_8B_MOVE = 0x24, 874 ATOMIC_8B_INCREMENT = 0x25, 875 ATOMIC_8B_DECREMENT = 0x26, 876 } ATOMIC_OPCODES; 877 inline void init() { 878 memset(&TheStructure, 0, sizeof(TheStructure)); 879 TheStructure.Common.DwordLength = DWORD_LENGTH_INLINE_DATA_0; 880 TheStructure.Common.DataSize = DATA_SIZE_DWORD; 881 TheStructure.Common.Post_SyncOperation = POST_SYNC_OPERATION_NO_POST_SYNC_OPERATION; 882 TheStructure.Common.MemoryType = MEMORY_TYPE_PER_PROCESS_GRAPHICS_ADDRESS; 883 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_ATOMIC; 884 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 885 } 886 static tagMI_ATOMIC sInit() { 887 MI_ATOMIC state; 888 state.init(); 889 return state; 890 } 891 inline uint32_t &getRawData(const uint32_t index) { 892 DEBUG_BREAK_IF(index >= 11); 893 return TheStructure.RawData[index]; 894 } 895 inline void setDwordLength(const DWORD_LENGTH value) { 896 TheStructure.Common.DwordLength = value; 897 } 898 inline DWORD_LENGTH getDwordLength() const { 899 return static_cast<DWORD_LENGTH>(TheStructure.Common.DwordLength); 900 } 901 inline void setAtomicOpcode(const uint32_t value) { 902 TheStructure.Common.AtomicOpcode = value; 903 } 904 inline uint32_t getAtomicOpcode() const { 905 return (TheStructure.Common.AtomicOpcode); 906 } 907 inline void setReturnDataControl(const uint32_t value) { 908 TheStructure.Common.ReturnDataControl = value; 909 } 910 inline uint32_t getReturnDataControl() const { 911 return (TheStructure.Common.ReturnDataControl); 912 } 913 inline void setCsStall(const uint32_t value) { 914 TheStructure.Common.CsStall = value; 915 } 916 inline uint32_t getCsStall() const { 917 return (TheStructure.Common.CsStall); 918 } 919 inline void setInlineData(const uint32_t value) { 920 TheStructure.Common.InlineData = value; 921 } 922 inline uint32_t getInlineData() const { 923 return (TheStructure.Common.InlineData); 924 } 925 inline void setDataSize(const DATA_SIZE value) { 926 TheStructure.Common.DataSize = value; 927 } 928 inline DATA_SIZE getDataSize() const { 929 return static_cast<DATA_SIZE>(TheStructure.Common.DataSize); 930 } 931 inline void setPostSyncOperation(const POST_SYNC_OPERATION value) { 932 TheStructure.Common.Post_SyncOperation = value; 933 } 934 inline POST_SYNC_OPERATION getPostSyncOperation() const { 935 return static_cast<POST_SYNC_OPERATION>(TheStructure.Common.Post_SyncOperation); 936 } 937 inline void setMemoryType(const MEMORY_TYPE value) { 938 TheStructure.Common.MemoryType = value; 939 } 940 inline MEMORY_TYPE getMemoryType() const { 941 return static_cast<MEMORY_TYPE>(TheStructure.Common.MemoryType); 942 } 943 typedef enum tagMEMORYADDRESS { 944 MEMORYADDRESS_BIT_SHIFT = 0x2, 945 MEMORYADDRESS_ALIGN_SIZE = 0x4, 946 } MEMORYADDRESS; 947 inline void setMemoryAddress(const uint32_t value) { 948 TheStructure.Common.MemoryAddress = value >> MEMORYADDRESS_BIT_SHIFT; 949 } 950 inline uint32_t getMemoryAddress() const { 951 return (TheStructure.Common.MemoryAddress << MEMORYADDRESS_BIT_SHIFT); 952 } 953 inline void setMemoryAddressHigh(const uint32_t value) { 954 TheStructure.Common.MemoryAddressHigh = value; 955 } 956 inline uint32_t getMemoryAddressHigh() const { 957 return (TheStructure.Common.MemoryAddressHigh); 958 } 959 inline void setOperand1DataDword0(const uint32_t value) { 960 TheStructure.Common.Operand1DataDword0 = value; 961 } 962 inline uint32_t getOperand1DataDword0() const { 963 return (TheStructure.Common.Operand1DataDword0); 964 } 965 inline void setOperand2DataDword0(const uint32_t value) { 966 TheStructure.Common.Operand2DataDword0 = value; 967 } 968 inline uint32_t getOperand2DataDword0() const { 969 return (TheStructure.Common.Operand2DataDword0); 970 } 971 inline void setOperand1DataDword1(const uint32_t value) { 972 TheStructure.Common.Operand1DataDword1 = value; 973 } 974 inline uint32_t getOperand1DataDword1() const { 975 return (TheStructure.Common.Operand1DataDword1); 976 } 977 inline void setOperand2DataDword1(const uint32_t value) { 978 TheStructure.Common.Operand2DataDword1 = value; 979 } 980 inline uint32_t getOperand2DataDword1() const { 981 return (TheStructure.Common.Operand2DataDword1); 982 } 983 inline void setOperand1DataDword2(const uint32_t value) { 984 TheStructure.Common.Operand1DataDword2 = value; 985 } 986 inline uint32_t getOperand1DataDword2() const { 987 return (TheStructure.Common.Operand1DataDword2); 988 } 989 inline void setOperand2DataDword2(const uint32_t value) { 990 TheStructure.Common.Operand2DataDword2 = value; 991 } 992 inline uint32_t getOperand2DataDword2() const { 993 return (TheStructure.Common.Operand2DataDword2); 994 } 995 inline void setOperand1DataDword3(const uint32_t value) { 996 TheStructure.Common.Operand1DataDword3 = value; 997 } 998 inline uint32_t getOperand1DataDword3() const { 999 return (TheStructure.Common.Operand1DataDword3); 1000 } 1001 inline void setOperand2DataDword3(const uint32_t value) { 1002 TheStructure.Common.Operand2DataDword3 = value; 1003 } 1004 inline uint32_t getOperand2DataDword3() const { 1005 return (TheStructure.Common.Operand2DataDword3); 1006 } 1007} MI_ATOMIC; 1008STATIC_ASSERT(44 == sizeof(MI_ATOMIC)); 1009 1010typedef struct tagMI_BATCH_BUFFER_END { 1011 union tagTheStructure { 1012 struct tagCommon { 1013 uint32_t EndContext : BITFIELD_RANGE(0, 0); 1014 uint32_t Reserved_1 : BITFIELD_RANGE(1, 22); 1015 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 1016 uint32_t CommandType : BITFIELD_RANGE(29, 31); 1017 } Common; 1018 uint32_t RawData[1]; 1019 } TheStructure; 1020 typedef enum tagMI_COMMAND_OPCODE { 1021 MI_COMMAND_OPCODE_MI_BATCH_BUFFER_END = 0xa, 1022 } MI_COMMAND_OPCODE; 1023 typedef enum tagCOMMAND_TYPE { 1024 COMMAND_TYPE_MI_COMMAND = 0x0, 1025 } COMMAND_TYPE; 1026 inline void init() { 1027 memset(&TheStructure, 0, sizeof(TheStructure)); 1028 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_BATCH_BUFFER_END; 1029 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 1030 } 1031 static tagMI_BATCH_BUFFER_END sInit() { 1032 MI_BATCH_BUFFER_END state; 1033 state.init(); 1034 return state; 1035 } 1036 inline uint32_t &getRawData(const uint32_t index) { 1037 DEBUG_BREAK_IF(index >= 1); 1038 return TheStructure.RawData[index]; 1039 } 1040 inline void setEndContext(const bool value) { 1041 TheStructure.Common.EndContext = value; 1042 } 1043 inline bool getEndContext() const { 1044 return (TheStructure.Common.EndContext); 1045 } 1046} MI_BATCH_BUFFER_END; 1047STATIC_ASSERT(4 == sizeof(MI_BATCH_BUFFER_END)); 1048 1049typedef struct tagMI_LOAD_REGISTER_IMM { 1050 union tagTheStructure { 1051 struct tagCommon { 1052 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 1053 uint32_t ByteWriteDisables : BITFIELD_RANGE(8, 11); 1054 uint32_t Reserved_12 : BITFIELD_RANGE(12, 18); 1055 uint32_t AddCsMmioStartOffset : BITFIELD_RANGE(19, 19); 1056 uint32_t Reserved_20 : BITFIELD_RANGE(20, 22); 1057 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 1058 uint32_t CommandType : BITFIELD_RANGE(29, 31); 1059 uint32_t Reserved_32 : BITFIELD_RANGE(0, 1); 1060 uint32_t RegisterOffset : BITFIELD_RANGE(2, 22); 1061 uint32_t Reserved_55 : BITFIELD_RANGE(23, 31); 1062 uint32_t DataDword; 1063 } Common; 1064 uint32_t RawData[3]; 1065 } TheStructure; 1066 typedef enum tagDWORD_LENGTH { 1067 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x1, 1068 } DWORD_LENGTH; 1069 typedef enum tagMI_COMMAND_OPCODE { 1070 MI_COMMAND_OPCODE_MI_LOAD_REGISTER_IMM = 0x22, 1071 } MI_COMMAND_OPCODE; 1072 typedef enum tagCOMMAND_TYPE { 1073 COMMAND_TYPE_MI_COMMAND = 0x0, 1074 } COMMAND_TYPE; 1075 inline void init() { 1076 memset(&TheStructure, 0, sizeof(TheStructure)); 1077 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 1078 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_LOAD_REGISTER_IMM; 1079 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 1080 } 1081 static tagMI_LOAD_REGISTER_IMM sInit() { 1082 MI_LOAD_REGISTER_IMM state; 1083 state.init(); 1084 return state; 1085 } 1086 inline uint32_t &getRawData(const uint32_t index) { 1087 DEBUG_BREAK_IF(index >= 3); 1088 return TheStructure.RawData[index]; 1089 } 1090 inline void setByteWriteDisables(const uint32_t value) { 1091 TheStructure.Common.ByteWriteDisables = value; 1092 } 1093 inline uint32_t getByteWriteDisables() const { 1094 return (TheStructure.Common.ByteWriteDisables); 1095 } 1096 inline void setAddCsMmioStartOffset(const uint32_t value) { 1097 TheStructure.Common.AddCsMmioStartOffset = value; 1098 } 1099 inline uint32_t getAddCsMmioStartOffset() const { 1100 return (TheStructure.Common.AddCsMmioStartOffset); 1101 } 1102 typedef enum tagREGISTEROFFSET { 1103 REGISTEROFFSET_BIT_SHIFT = 0x2, 1104 REGISTEROFFSET_ALIGN_SIZE = 0x4, 1105 } REGISTEROFFSET; 1106 inline void setRegisterOffset(const uint32_t value) { 1107 TheStructure.Common.RegisterOffset = value >> REGISTEROFFSET_BIT_SHIFT; 1108 } 1109 inline uint32_t getRegisterOffset() const { 1110 return (TheStructure.Common.RegisterOffset << REGISTEROFFSET_BIT_SHIFT); 1111 } 1112 inline void setDataDword(const uint32_t value) { 1113 TheStructure.Common.DataDword = value; 1114 } 1115 inline uint32_t getDataDword() const { 1116 return (TheStructure.Common.DataDword); 1117 } 1118} MI_LOAD_REGISTER_IMM; 1119STATIC_ASSERT(12 == sizeof(MI_LOAD_REGISTER_IMM)); 1120 1121typedef struct tagMI_LOAD_REGISTER_MEM { 1122 union tagTheStructure { 1123 struct tagCommon { 1124 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 1125 uint32_t Reserved_8 : BITFIELD_RANGE(8, 18); 1126 uint32_t AddCsMmioStartOffset : BITFIELD_RANGE(19, 19); 1127 uint32_t Reserved_20 : BITFIELD_RANGE(20, 20); 1128 uint32_t AsyncModeEnable : BITFIELD_RANGE(21, 21); 1129 uint32_t UseGlobalGtt : BITFIELD_RANGE(22, 22); 1130 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 1131 uint32_t CommandType : BITFIELD_RANGE(29, 31); 1132 uint32_t Reserved_32 : BITFIELD_RANGE(0, 1); 1133 uint32_t RegisterAddress : BITFIELD_RANGE(2, 22); 1134 uint32_t Reserved_55 : BITFIELD_RANGE(23, 31); 1135 uint64_t Reserved_64 : BITFIELD_RANGE(0, 1); 1136 uint64_t MemoryAddress : BITFIELD_RANGE(2, 63); 1137 } Common; 1138 uint32_t RawData[4]; 1139 } TheStructure; 1140 typedef enum tagDWORD_LENGTH { 1141 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x2, 1142 } DWORD_LENGTH; 1143 typedef enum tagMI_COMMAND_OPCODE { 1144 MI_COMMAND_OPCODE_MI_LOAD_REGISTER_MEM = 0x29, 1145 } MI_COMMAND_OPCODE; 1146 typedef enum tagCOMMAND_TYPE { 1147 COMMAND_TYPE_MI_COMMAND = 0x0, 1148 } COMMAND_TYPE; 1149 typedef enum tagPATCH_CONSTANTS { 1150 MEMORYADDRESS_BYTEOFFSET = 0x8, 1151 MEMORYADDRESS_INDEX = 0x2, 1152 } PATCH_CONSTANTS; 1153 inline void init() { 1154 memset(&TheStructure, 0, sizeof(TheStructure)); 1155 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 1156 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_LOAD_REGISTER_MEM; 1157 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 1158 } 1159 static tagMI_LOAD_REGISTER_MEM sInit() { 1160 MI_LOAD_REGISTER_MEM state; 1161 state.init(); 1162 return state; 1163 } 1164 inline uint32_t &getRawData(const uint32_t index) { 1165 DEBUG_BREAK_IF(index >= 4); 1166 return TheStructure.RawData[index]; 1167 } 1168 inline void setAddCsMmioStartOffset(const uint32_t value) { 1169 TheStructure.Common.AddCsMmioStartOffset = value; 1170 } 1171 inline uint32_t getAddCsMmioStartOffset() const { 1172 return (TheStructure.Common.AddCsMmioStartOffset); 1173 } 1174 inline void setAsyncModeEnable(const bool value) { 1175 TheStructure.Common.AsyncModeEnable = value; 1176 } 1177 inline bool getAsyncModeEnable() const { 1178 return (TheStructure.Common.AsyncModeEnable); 1179 } 1180 inline void setUseGlobalGtt(const bool value) { 1181 TheStructure.Common.UseGlobalGtt = value; 1182 } 1183 inline bool getUseGlobalGtt() const { 1184 return (TheStructure.Common.UseGlobalGtt); 1185 } 1186 typedef enum tagREGISTERADDRESS { 1187 REGISTERADDRESS_BIT_SHIFT = 0x2, 1188 REGISTERADDRESS_ALIGN_SIZE = 0x4, 1189 } REGISTERADDRESS; 1190 inline void setRegisterAddress(const uint32_t value) { 1191 TheStructure.Common.RegisterAddress = value >> REGISTERADDRESS_BIT_SHIFT; 1192 } 1193 inline uint32_t getRegisterAddress() const { 1194 return (TheStructure.Common.RegisterAddress << REGISTERADDRESS_BIT_SHIFT); 1195 } 1196 typedef enum tagMEMORYADDRESS { 1197 MEMORYADDRESS_BIT_SHIFT = 0x2, 1198 MEMORYADDRESS_ALIGN_SIZE = 0x4, 1199 } MEMORYADDRESS; 1200 inline void setMemoryAddress(const uint64_t value) { 1201 TheStructure.Common.MemoryAddress = value >> MEMORYADDRESS_BIT_SHIFT; 1202 } 1203 inline uint64_t getMemoryAddress() const { 1204 return (TheStructure.Common.MemoryAddress << MEMORYADDRESS_BIT_SHIFT); 1205 } 1206} MI_LOAD_REGISTER_MEM; 1207STATIC_ASSERT(16 == sizeof(MI_LOAD_REGISTER_MEM)); 1208 1209typedef struct tagMI_LOAD_REGISTER_REG { 1210 union tagTheStructure { 1211 struct tagCommon { 1212 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 1213 uint32_t Reserved_8 : BITFIELD_RANGE(8, 17); 1214 uint32_t AddCsMmioStartOffsetSource : BITFIELD_RANGE(18, 18); 1215 uint32_t AddCsMmioStartOffsetDestination : BITFIELD_RANGE(19, 19); 1216 uint32_t Reserved_20 : BITFIELD_RANGE(20, 22); 1217 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 1218 uint32_t CommandType : BITFIELD_RANGE(29, 31); 1219 uint32_t Reserved_32 : BITFIELD_RANGE(0, 1); 1220 uint32_t SourceRegisterAddress : BITFIELD_RANGE(2, 22); 1221 uint32_t Reserved_55 : BITFIELD_RANGE(23, 31); 1222 uint32_t Reserved_64 : BITFIELD_RANGE(0, 1); 1223 uint32_t DestinationRegisterAddress : BITFIELD_RANGE(2, 22); 1224 uint32_t Reserved_87 : BITFIELD_RANGE(23, 31); 1225 } Common; 1226 uint32_t RawData[3]; 1227 } TheStructure; 1228 typedef enum tagDWORD_LENGTH { 1229 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x1, 1230 } DWORD_LENGTH; 1231 typedef enum tagMI_COMMAND_OPCODE { 1232 MI_COMMAND_OPCODE_MI_LOAD_REGISTER_REG = 0x2a, 1233 } MI_COMMAND_OPCODE; 1234 typedef enum tagCOMMAND_TYPE { 1235 COMMAND_TYPE_MI_COMMAND = 0x0, 1236 } COMMAND_TYPE; 1237 inline void init() { 1238 memset(&TheStructure, 0, sizeof(TheStructure)); 1239 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 1240 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_LOAD_REGISTER_REG; 1241 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 1242 } 1243 static tagMI_LOAD_REGISTER_REG sInit() { 1244 MI_LOAD_REGISTER_REG state; 1245 state.init(); 1246 return state; 1247 } 1248 inline uint32_t &getRawData(const uint32_t index) { 1249 DEBUG_BREAK_IF(index >= 3); 1250 return TheStructure.RawData[index]; 1251 } 1252 inline void setAddCsMmioStartOffsetSource(const uint32_t value) { 1253 TheStructure.Common.AddCsMmioStartOffsetSource = value; 1254 } 1255 inline uint32_t getAddCsMmioStartOffsetSource() const { 1256 return (TheStructure.Common.AddCsMmioStartOffsetSource); 1257 } 1258 inline void setAddCsMmioStartOffsetDestination(const uint32_t value) { 1259 TheStructure.Common.AddCsMmioStartOffsetDestination = value; 1260 } 1261 inline uint32_t getAddCsMmioStartOffsetDestination() const { 1262 return (TheStructure.Common.AddCsMmioStartOffsetDestination); 1263 } 1264 typedef enum tagSOURCEREGISTERADDRESS { 1265 SOURCEREGISTERADDRESS_BIT_SHIFT = 0x2, 1266 SOURCEREGISTERADDRESS_ALIGN_SIZE = 0x4, 1267 } SOURCEREGISTERADDRESS; 1268 inline void setSourceRegisterAddress(const uint32_t value) { 1269 TheStructure.Common.SourceRegisterAddress = value >> SOURCEREGISTERADDRESS_BIT_SHIFT; 1270 } 1271 inline uint32_t getSourceRegisterAddress() const { 1272 return (TheStructure.Common.SourceRegisterAddress << SOURCEREGISTERADDRESS_BIT_SHIFT); 1273 } 1274 typedef enum tagDESTINATIONREGISTERADDRESS { 1275 DESTINATIONREGISTERADDRESS_BIT_SHIFT = 0x2, 1276 DESTINATIONREGISTERADDRESS_ALIGN_SIZE = 0x4, 1277 } DESTINATIONREGISTERADDRESS; 1278 inline void setDestinationRegisterAddress(const uint32_t value) { 1279 TheStructure.Common.DestinationRegisterAddress = value >> DESTINATIONREGISTERADDRESS_BIT_SHIFT; 1280 } 1281 inline uint32_t getDestinationRegisterAddress() const { 1282 return (TheStructure.Common.DestinationRegisterAddress << DESTINATIONREGISTERADDRESS_BIT_SHIFT); 1283 } 1284} MI_LOAD_REGISTER_REG; 1285STATIC_ASSERT(12 == sizeof(MI_LOAD_REGISTER_REG)); 1286 1287typedef struct tagMI_NOOP { 1288 union tagTheStructure { 1289 struct tagCommon { 1290 uint32_t IdentificationNumber : BITFIELD_RANGE(0, 21); 1291 uint32_t IdentificationNumberRegisterWriteEnable : BITFIELD_RANGE(22, 22); 1292 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 1293 uint32_t CommandType : BITFIELD_RANGE(29, 31); 1294 } Common; 1295 uint32_t RawData[1]; 1296 } TheStructure; 1297 typedef enum tagMI_COMMAND_OPCODE { 1298 MI_COMMAND_OPCODE_MI_NOOP = 0x0, 1299 } MI_COMMAND_OPCODE; 1300 typedef enum tagCOMMAND_TYPE { 1301 COMMAND_TYPE_MI_COMMAND = 0x0, 1302 } COMMAND_TYPE; 1303 inline void init() { 1304 memset(&TheStructure, 0, sizeof(TheStructure)); 1305 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_NOOP; 1306 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 1307 } 1308 static tagMI_NOOP sInit() { 1309 MI_NOOP state; 1310 state.init(); 1311 return state; 1312 } 1313 inline uint32_t &getRawData(const uint32_t index) { 1314 DEBUG_BREAK_IF(index >= 1); 1315 return TheStructure.RawData[index]; 1316 } 1317 inline void setIdentificationNumber(const uint32_t value) { 1318 TheStructure.Common.IdentificationNumber = value; 1319 } 1320 inline uint32_t getIdentificationNumber() const { 1321 return (TheStructure.Common.IdentificationNumber); 1322 } 1323 inline void setIdentificationNumberRegisterWriteEnable(const bool value) { 1324 TheStructure.Common.IdentificationNumberRegisterWriteEnable = value; 1325 } 1326 inline bool getIdentificationNumberRegisterWriteEnable() const { 1327 return (TheStructure.Common.IdentificationNumberRegisterWriteEnable); 1328 } 1329} MI_NOOP; 1330STATIC_ASSERT(4 == sizeof(MI_NOOP)); 1331 1332typedef struct tagMI_STORE_REGISTER_MEM { 1333 union tagTheStructure { 1334 struct tagCommon { 1335 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 1336 uint32_t Reserved_8 : BITFIELD_RANGE(8, 18); 1337 uint32_t AddCsMmioStartOffset : BITFIELD_RANGE(19, 19); 1338 uint32_t Reserved_20 : BITFIELD_RANGE(20, 20); 1339 uint32_t PredicateEnable : BITFIELD_RANGE(21, 21); 1340 uint32_t UseGlobalGtt : BITFIELD_RANGE(22, 22); 1341 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 1342 uint32_t CommandType : BITFIELD_RANGE(29, 31); 1343 uint32_t Reserved_32 : BITFIELD_RANGE(0, 1); 1344 uint32_t RegisterAddress : BITFIELD_RANGE(2, 22); 1345 uint32_t Reserved_55 : BITFIELD_RANGE(23, 31); 1346 uint64_t Reserved_64 : BITFIELD_RANGE(0, 1); 1347 uint64_t MemoryAddress : BITFIELD_RANGE(2, 63); 1348 } Common; 1349 uint32_t RawData[4]; 1350 } TheStructure; 1351 typedef enum tagDWORD_LENGTH { 1352 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x2, 1353 } DWORD_LENGTH; 1354 typedef enum tagMI_COMMAND_OPCODE { 1355 MI_COMMAND_OPCODE_MI_STORE_REGISTER_MEM = 0x24, 1356 } MI_COMMAND_OPCODE; 1357 typedef enum tagCOMMAND_TYPE { 1358 COMMAND_TYPE_MI_COMMAND = 0x0, 1359 } COMMAND_TYPE; 1360 typedef enum tagPATCH_CONSTANTS { 1361 MEMORYADDRESS_BYTEOFFSET = 0x8, 1362 MEMORYADDRESS_INDEX = 0x2, 1363 } PATCH_CONSTANTS; 1364 inline void init() { 1365 memset(&TheStructure, 0, sizeof(TheStructure)); 1366 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 1367 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_STORE_REGISTER_MEM; 1368 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 1369 } 1370 static tagMI_STORE_REGISTER_MEM sInit() { 1371 MI_STORE_REGISTER_MEM state; 1372 state.init(); 1373 return state; 1374 } 1375 inline uint32_t &getRawData(const uint32_t index) { 1376 DEBUG_BREAK_IF(index >= 4); 1377 return TheStructure.RawData[index]; 1378 } 1379 inline void setAddCsMmioStartOffset(const uint32_t value) { 1380 TheStructure.Common.AddCsMmioStartOffset = value; 1381 } 1382 inline uint32_t getAddCsMmioStartOffset() const { 1383 return (TheStructure.Common.AddCsMmioStartOffset); 1384 } 1385 inline void setPredicateEnable(const bool value) { 1386 TheStructure.Common.PredicateEnable = value; 1387 } 1388 inline bool getPredicateEnable() const { 1389 return (TheStructure.Common.PredicateEnable); 1390 } 1391 inline void setUseGlobalGtt(const bool value) { 1392 TheStructure.Common.UseGlobalGtt = value; 1393 } 1394 inline bool getUseGlobalGtt() const { 1395 return (TheStructure.Common.UseGlobalGtt); 1396 } 1397 typedef enum tagREGISTERADDRESS { 1398 REGISTERADDRESS_BIT_SHIFT = 0x2, 1399 REGISTERADDRESS_ALIGN_SIZE = 0x4, 1400 } REGISTERADDRESS; 1401 inline void setRegisterAddress(const uint32_t value) { 1402 TheStructure.Common.RegisterAddress = value >> REGISTERADDRESS_BIT_SHIFT; 1403 } 1404 inline uint32_t getRegisterAddress() const { 1405 return (TheStructure.Common.RegisterAddress << REGISTERADDRESS_BIT_SHIFT); 1406 } 1407 typedef enum tagMEMORYADDRESS { 1408 MEMORYADDRESS_BIT_SHIFT = 0x2, 1409 MEMORYADDRESS_ALIGN_SIZE = 0x4, 1410 } MEMORYADDRESS; 1411 inline void setMemoryAddress(const uint64_t value) { 1412 TheStructure.Common.MemoryAddress = value >> MEMORYADDRESS_BIT_SHIFT; 1413 } 1414 inline uint64_t getMemoryAddress() const { 1415 return (TheStructure.Common.MemoryAddress << MEMORYADDRESS_BIT_SHIFT); 1416 } 1417} MI_STORE_REGISTER_MEM; 1418STATIC_ASSERT(16 == sizeof(MI_STORE_REGISTER_MEM)); 1419 1420typedef struct tagPIPELINE_SELECT { 1421 union tagTheStructure { 1422 struct tagCommon { 1423 uint32_t PipelineSelection : BITFIELD_RANGE(0, 1); 1424 uint32_t RenderSliceCommonPowerGateEnable : BITFIELD_RANGE(2, 2); 1425 uint32_t RenderSamplerPowerGateEnable : BITFIELD_RANGE(3, 3); 1426 uint32_t MediaSamplerDopClockGateEnable : BITFIELD_RANGE(4, 4); 1427 uint32_t ForceMediaAwake : BITFIELD_RANGE(5, 5); 1428 uint32_t MediaSamplerPowerClockGateDisable : BITFIELD_RANGE(6, 6); 1429 uint32_t Reserved_7 : BITFIELD_RANGE(7, 7); 1430 uint32_t MaskBits : BITFIELD_RANGE(8, 15); 1431 uint32_t _3DCommandSubOpcode : BITFIELD_RANGE(16, 23); 1432 uint32_t _3DCommandOpcode : BITFIELD_RANGE(24, 26); 1433 uint32_t CommandSubtype : BITFIELD_RANGE(27, 28); 1434 uint32_t CommandType : BITFIELD_RANGE(29, 31); 1435 } Common; 1436 uint32_t RawData[1]; 1437 } TheStructure; 1438 typedef enum tagPIPELINE_SELECTION { 1439 PIPELINE_SELECTION_3D = 0x0, 1440 PIPELINE_SELECTION_MEDIA = 0x1, 1441 PIPELINE_SELECTION_GPGPU = 0x2, 1442 } PIPELINE_SELECTION; 1443 typedef enum tag_3D_COMMAND_SUB_OPCODE { 1444 _3D_COMMAND_SUB_OPCODE_PIPELINE_SELECT = 0x4, 1445 } _3D_COMMAND_SUB_OPCODE; 1446 typedef enum tag_3D_COMMAND_OPCODE { 1447 _3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED = 0x1, 1448 } _3D_COMMAND_OPCODE; 1449 typedef enum tagCOMMAND_SUBTYPE { 1450 COMMAND_SUBTYPE_GFXPIPE_SINGLE_DW = 0x1, 1451 } COMMAND_SUBTYPE; 1452 typedef enum tagCOMMAND_TYPE { 1453 COMMAND_TYPE_GFXPIPE = 0x3, 1454 } COMMAND_TYPE; 1455 inline void init() { 1456 memset(&TheStructure, 0, sizeof(TheStructure)); 1457 TheStructure.Common.PipelineSelection = PIPELINE_SELECTION_3D; 1458 TheStructure.Common._3DCommandSubOpcode = _3D_COMMAND_SUB_OPCODE_PIPELINE_SELECT; 1459 TheStructure.Common._3DCommandOpcode = _3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED; 1460 TheStructure.Common.CommandSubtype = COMMAND_SUBTYPE_GFXPIPE_SINGLE_DW; 1461 TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE; 1462 } 1463 static tagPIPELINE_SELECT sInit() { 1464 PIPELINE_SELECT state; 1465 state.init(); 1466 return state; 1467 } 1468 inline uint32_t &getRawData(const uint32_t index) { 1469 DEBUG_BREAK_IF(index >= 1); 1470 return TheStructure.RawData[index]; 1471 } 1472 inline void setPipelineSelection(const PIPELINE_SELECTION value) { 1473 TheStructure.Common.PipelineSelection = value; 1474 } 1475 inline PIPELINE_SELECTION getPipelineSelection() const { 1476 return static_cast<PIPELINE_SELECTION>(TheStructure.Common.PipelineSelection); 1477 } 1478 inline void setRenderSliceCommonPowerGateEnable(const bool value) { 1479 TheStructure.Common.RenderSliceCommonPowerGateEnable = value; 1480 } 1481 inline bool getRenderSliceCommonPowerGateEnable() const { 1482 return (TheStructure.Common.RenderSliceCommonPowerGateEnable); 1483 } 1484 inline void setRenderSamplerPowerGateEnable(const bool value) { 1485 TheStructure.Common.RenderSamplerPowerGateEnable = value; 1486 } 1487 inline bool getRenderSamplerPowerGateEnable() const { 1488 return (TheStructure.Common.RenderSamplerPowerGateEnable); 1489 } 1490 inline void setMediaSamplerDopClockGateEnable(const bool value) { 1491 TheStructure.Common.MediaSamplerDopClockGateEnable = value; 1492 } 1493 inline bool getMediaSamplerDopClockGateEnable() const { 1494 return (TheStructure.Common.MediaSamplerDopClockGateEnable); 1495 } 1496 inline void setForceMediaAwake(const bool value) { 1497 TheStructure.Common.ForceMediaAwake = value; 1498 } 1499 inline bool getForceMediaAwake() const { 1500 return (TheStructure.Common.ForceMediaAwake); 1501 } 1502 inline void setMediaSamplerPowerClockGateDisable(const uint32_t value) { 1503 TheStructure.Common.MediaSamplerPowerClockGateDisable = value; 1504 } 1505 inline uint32_t getMediaSamplerPowerClockGateDisable() const { 1506 return (TheStructure.Common.MediaSamplerPowerClockGateDisable); 1507 } 1508 inline void setMaskBits(const uint32_t value) { 1509 TheStructure.Common.MaskBits = value; 1510 } 1511 inline uint32_t getMaskBits() const { 1512 return (TheStructure.Common.MaskBits); 1513 } 1514} PIPELINE_SELECT; 1515STATIC_ASSERT(4 == sizeof(PIPELINE_SELECT)); 1516 1517typedef struct tagPIPE_CONTROL { 1518 union tagTheStructure { 1519 struct tagCommon { 1520 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 1521 uint32_t Reserved_8 : BITFIELD_RANGE(8, 15); 1522 uint32_t _3DCommandSubOpcode : BITFIELD_RANGE(16, 23); 1523 uint32_t _3DCommandOpcode : BITFIELD_RANGE(24, 26); 1524 uint32_t CommandSubtype : BITFIELD_RANGE(27, 28); 1525 uint32_t CommandType : BITFIELD_RANGE(29, 31); 1526 uint32_t DepthCacheFlushEnable : BITFIELD_RANGE(0, 0); 1527 uint32_t StallAtPixelScoreboard : BITFIELD_RANGE(1, 1); 1528 uint32_t StateCacheInvalidationEnable : BITFIELD_RANGE(2, 2); 1529 uint32_t ConstantCacheInvalidationEnable : BITFIELD_RANGE(3, 3); 1530 uint32_t VfCacheInvalidationEnable : BITFIELD_RANGE(4, 4); 1531 uint32_t DcFlushEnable : BITFIELD_RANGE(5, 5); 1532 uint32_t ProtectedMemoryApplicationId : BITFIELD_RANGE(6, 6); 1533 uint32_t PipeControlFlushEnable : BITFIELD_RANGE(7, 7); 1534 uint32_t NotifyEnable : BITFIELD_RANGE(8, 8); 1535 uint32_t IndirectStatePointersDisable : BITFIELD_RANGE(9, 9); 1536 uint32_t TextureCacheInvalidationEnable : BITFIELD_RANGE(10, 10); 1537 uint32_t InstructionCacheInvalidateEnable : BITFIELD_RANGE(11, 11); 1538 uint32_t RenderTargetCacheFlushEnable : BITFIELD_RANGE(12, 12); 1539 uint32_t DepthStallEnable : BITFIELD_RANGE(13, 13); 1540 uint32_t PostSyncOperation : BITFIELD_RANGE(14, 15); 1541 uint32_t GenericMediaStateClear : BITFIELD_RANGE(16, 16); 1542 uint32_t PsdSyncEnable : BITFIELD_RANGE(17, 17); 1543 uint32_t TlbInvalidate : BITFIELD_RANGE(18, 18); 1544 uint32_t GlobalSnapshotCountReset : BITFIELD_RANGE(19, 19); 1545 uint32_t CommandStreamerStallEnable : BITFIELD_RANGE(20, 20); 1546 uint32_t StoreDataIndex : BITFIELD_RANGE(21, 21); 1547 uint32_t Reserved_54 : BITFIELD_RANGE(22, 22); 1548 uint32_t LriPostSyncOperation : BITFIELD_RANGE(23, 23); 1549 uint32_t DestinationAddressType : BITFIELD_RANGE(24, 24); 1550 uint32_t Reserved_57 : BITFIELD_RANGE(25, 25); 1551 uint32_t FlushLlc : BITFIELD_RANGE(26, 26); 1552 uint32_t ProtectedMemoryDisable : BITFIELD_RANGE(27, 27); 1553 uint32_t TileCacheFlushEnable : BITFIELD_RANGE(28, 28); 1554 uint32_t Reserved_61 : BITFIELD_RANGE(29, 31); 1555 uint32_t Reserved_64 : BITFIELD_RANGE(0, 1); 1556 uint32_t Address : BITFIELD_RANGE(2, 31); 1557 uint32_t AddressHigh; 1558 uint64_t ImmediateData; 1559 } Common; 1560 uint32_t RawData[6]; 1561 } TheStructure; 1562 typedef enum tagDWORD_LENGTH { 1563 DWORD_LENGTH_DWORD_COUNT_N = 0x4, 1564 } DWORD_LENGTH; 1565 typedef enum tag_3D_COMMAND_SUB_OPCODE { 1566 _3D_COMMAND_SUB_OPCODE_PIPE_CONTROL = 0x0, 1567 } _3D_COMMAND_SUB_OPCODE; 1568 typedef enum tag_3D_COMMAND_OPCODE { 1569 _3D_COMMAND_OPCODE_PIPE_CONTROL = 0x2, 1570 } _3D_COMMAND_OPCODE; 1571 typedef enum tagCOMMAND_SUBTYPE { 1572 COMMAND_SUBTYPE_GFXPIPE_3D = 0x3, 1573 } COMMAND_SUBTYPE; 1574 typedef enum tagCOMMAND_TYPE { 1575 COMMAND_TYPE_GFXPIPE = 0x3, 1576 } COMMAND_TYPE; 1577 typedef enum tagPOST_SYNC_OPERATION { 1578 POST_SYNC_OPERATION_NO_WRITE = 0x0, 1579 POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA = 0x1, 1580 POST_SYNC_OPERATION_WRITE_PS_DEPTH_COUNT = 0x2, 1581 POST_SYNC_OPERATION_WRITE_TIMESTAMP = 0x3, 1582 } POST_SYNC_OPERATION; 1583 typedef enum tagGLOBAL_SNAPSHOT_COUNT_RESET { 1584 GLOBAL_SNAPSHOT_COUNT_RESET_DON_T_RESET = 0x0, 1585 GLOBAL_SNAPSHOT_COUNT_RESET_RESET = 0x1, 1586 } GLOBAL_SNAPSHOT_COUNT_RESET; 1587 typedef enum tagLRI_POST_SYNC_OPERATION { 1588 LRI_POST_SYNC_OPERATION_NO_LRI_OPERATION = 0x0, 1589 LRI_POST_SYNC_OPERATION_MMIO_WRITE_IMMEDIATE_DATA = 0x1, 1590 } LRI_POST_SYNC_OPERATION; 1591 typedef enum tagDESTINATION_ADDRESS_TYPE { 1592 DESTINATION_ADDRESS_TYPE_PPGTT = 0x0, 1593 DESTINATION_ADDRESS_TYPE_GGTT = 0x1, 1594 } DESTINATION_ADDRESS_TYPE; 1595 typedef enum tagPATCH_CONSTANTS { 1596 ADDRESS_BYTEOFFSET = 0x8, 1597 ADDRESS_INDEX = 0x2, 1598 ADDRESSHIGH_BYTEOFFSET = 0xc, 1599 ADDRESSHIGH_INDEX = 0x3, 1600 } PATCH_CONSTANTS; 1601 inline void init() { 1602 memset(&TheStructure, 0, sizeof(TheStructure)); 1603 TheStructure.Common.DwordLength = DWORD_LENGTH_DWORD_COUNT_N; 1604 TheStructure.Common._3DCommandSubOpcode = _3D_COMMAND_SUB_OPCODE_PIPE_CONTROL; 1605 TheStructure.Common._3DCommandOpcode = _3D_COMMAND_OPCODE_PIPE_CONTROL; 1606 TheStructure.Common.CommandSubtype = COMMAND_SUBTYPE_GFXPIPE_3D; 1607 TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE; 1608 TheStructure.Common.PostSyncOperation = POST_SYNC_OPERATION_NO_WRITE; 1609 TheStructure.Common.GlobalSnapshotCountReset = GLOBAL_SNAPSHOT_COUNT_RESET_DON_T_RESET; 1610 TheStructure.Common.LriPostSyncOperation = LRI_POST_SYNC_OPERATION_NO_LRI_OPERATION; 1611 TheStructure.Common.DestinationAddressType = DESTINATION_ADDRESS_TYPE_PPGTT; 1612 } 1613 static tagPIPE_CONTROL sInit() { 1614 PIPE_CONTROL state; 1615 state.init(); 1616 return state; 1617 } 1618 inline uint32_t &getRawData(const uint32_t index) { 1619 DEBUG_BREAK_IF(index >= 6); 1620 return TheStructure.RawData[index]; 1621 } 1622 inline void setDepthCacheFlushEnable(const bool value) { 1623 TheStructure.Common.DepthCacheFlushEnable = value; 1624 } 1625 inline bool getDepthCacheFlushEnable() const { 1626 return (TheStructure.Common.DepthCacheFlushEnable); 1627 } 1628 inline void setStallAtPixelScoreboard(const bool value) { 1629 TheStructure.Common.StallAtPixelScoreboard = value; 1630 } 1631 inline bool getStallAtPixelScoreboard() const { 1632 return (TheStructure.Common.StallAtPixelScoreboard); 1633 } 1634 inline void setStateCacheInvalidationEnable(const bool value) { 1635 TheStructure.Common.StateCacheInvalidationEnable = value; 1636 } 1637 inline bool getStateCacheInvalidationEnable() const { 1638 return (TheStructure.Common.StateCacheInvalidationEnable); 1639 } 1640 inline void setConstantCacheInvalidationEnable(const bool value) { 1641 TheStructure.Common.ConstantCacheInvalidationEnable = value; 1642 } 1643 inline bool getConstantCacheInvalidationEnable() const { 1644 return (TheStructure.Common.ConstantCacheInvalidationEnable); 1645 } 1646 inline void setVfCacheInvalidationEnable(const bool value) { 1647 TheStructure.Common.VfCacheInvalidationEnable = value; 1648 } 1649 inline bool getVfCacheInvalidationEnable() const { 1650 return (TheStructure.Common.VfCacheInvalidationEnable); 1651 } 1652 inline void setDcFlushEnable(const bool value) { 1653 TheStructure.Common.DcFlushEnable = value; 1654 } 1655 inline bool getDcFlushEnable() const { 1656 return (TheStructure.Common.DcFlushEnable); 1657 } 1658 inline void setProtectedMemoryApplicationId(const uint32_t value) { 1659 TheStructure.Common.ProtectedMemoryApplicationId = value; 1660 } 1661 inline uint32_t getProtectedMemoryApplicationId() const { 1662 return (TheStructure.Common.ProtectedMemoryApplicationId); 1663 } 1664 inline void setPipeControlFlushEnable(const bool value) { 1665 TheStructure.Common.PipeControlFlushEnable = value; 1666 } 1667 inline bool getPipeControlFlushEnable() const { 1668 return (TheStructure.Common.PipeControlFlushEnable); 1669 } 1670 inline void setNotifyEnable(const bool value) { 1671 TheStructure.Common.NotifyEnable = value; 1672 } 1673 inline bool getNotifyEnable() const { 1674 return (TheStructure.Common.NotifyEnable); 1675 } 1676 inline void setIndirectStatePointersDisable(const bool value) { 1677 TheStructure.Common.IndirectStatePointersDisable = value; 1678 } 1679 inline bool getIndirectStatePointersDisable() const { 1680 return (TheStructure.Common.IndirectStatePointersDisable); 1681 } 1682 inline void setTextureCacheInvalidationEnable(const bool value) { 1683 TheStructure.Common.TextureCacheInvalidationEnable = value; 1684 } 1685 inline bool getTextureCacheInvalidationEnable() const { 1686 return (TheStructure.Common.TextureCacheInvalidationEnable); 1687 } 1688 inline void setInstructionCacheInvalidateEnable(const bool value) { 1689 TheStructure.Common.InstructionCacheInvalidateEnable = value; 1690 } 1691 inline bool getInstructionCacheInvalidateEnable() const { 1692 return (TheStructure.Common.InstructionCacheInvalidateEnable); 1693 } 1694 inline void setRenderTargetCacheFlushEnable(const bool value) { 1695 TheStructure.Common.RenderTargetCacheFlushEnable = value; 1696 } 1697 inline bool getRenderTargetCacheFlushEnable() const { 1698 return (TheStructure.Common.RenderTargetCacheFlushEnable); 1699 } 1700 inline void setDepthStallEnable(const bool value) { 1701 TheStructure.Common.DepthStallEnable = value; 1702 } 1703 inline bool getDepthStallEnable() const { 1704 return (TheStructure.Common.DepthStallEnable); 1705 } 1706 inline void setPostSyncOperation(const POST_SYNC_OPERATION value) { 1707 TheStructure.Common.PostSyncOperation = value; 1708 } 1709 inline POST_SYNC_OPERATION getPostSyncOperation() const { 1710 return static_cast<POST_SYNC_OPERATION>(TheStructure.Common.PostSyncOperation); 1711 } 1712 inline void setGenericMediaStateClear(const bool value) { 1713 TheStructure.Common.GenericMediaStateClear = value; 1714 } 1715 inline bool getGenericMediaStateClear() const { 1716 return (TheStructure.Common.GenericMediaStateClear); 1717 } 1718 inline void setPsdSyncEnable(const bool value) { 1719 TheStructure.Common.PsdSyncEnable = value; 1720 } 1721 inline bool getPsdSyncEnable() const { 1722 return (TheStructure.Common.PsdSyncEnable); 1723 } 1724 inline void setTlbInvalidate(const uint32_t value) { 1725 TheStructure.Common.TlbInvalidate = value; 1726 } 1727 inline uint32_t getTlbInvalidate() const { 1728 return (TheStructure.Common.TlbInvalidate); 1729 } 1730 inline void setGlobalSnapshotCountReset(const GLOBAL_SNAPSHOT_COUNT_RESET value) { 1731 TheStructure.Common.GlobalSnapshotCountReset = value; 1732 } 1733 inline GLOBAL_SNAPSHOT_COUNT_RESET getGlobalSnapshotCountReset() const { 1734 return static_cast<GLOBAL_SNAPSHOT_COUNT_RESET>(TheStructure.Common.GlobalSnapshotCountReset); 1735 } 1736 inline void setCommandStreamerStallEnable(const uint32_t value) { 1737 TheStructure.Common.CommandStreamerStallEnable = value; 1738 } 1739 inline uint32_t getCommandStreamerStallEnable() const { 1740 return (TheStructure.Common.CommandStreamerStallEnable); 1741 } 1742 inline void setStoreDataIndex(const uint32_t value) { 1743 TheStructure.Common.StoreDataIndex = value; 1744 } 1745 inline uint32_t getStoreDataIndex() const { 1746 return (TheStructure.Common.StoreDataIndex); 1747 } 1748 inline void setLriPostSyncOperation(const LRI_POST_SYNC_OPERATION value) { 1749 TheStructure.Common.LriPostSyncOperation = value; 1750 } 1751 inline LRI_POST_SYNC_OPERATION getLriPostSyncOperation() const { 1752 return static_cast<LRI_POST_SYNC_OPERATION>(TheStructure.Common.LriPostSyncOperation); 1753 } 1754 inline void setDestinationAddressType(const DESTINATION_ADDRESS_TYPE value) { 1755 TheStructure.Common.DestinationAddressType = value; 1756 } 1757 inline DESTINATION_ADDRESS_TYPE getDestinationAddressType() const { 1758 return static_cast<DESTINATION_ADDRESS_TYPE>(TheStructure.Common.DestinationAddressType); 1759 } 1760 inline void setFlushLlc(const bool value) { 1761 TheStructure.Common.FlushLlc = value; 1762 } 1763 inline bool getFlushLlc() const { 1764 return (TheStructure.Common.FlushLlc); 1765 } 1766 inline void setProtectedMemoryDisable(const uint32_t value) { 1767 TheStructure.Common.ProtectedMemoryDisable = value; 1768 } 1769 inline uint32_t getProtectedMemoryDisable() const { 1770 return (TheStructure.Common.ProtectedMemoryDisable); 1771 } 1772 inline void setTileCacheFlushEnable(const uint32_t value) { 1773 TheStructure.Common.TileCacheFlushEnable = value; 1774 } 1775 inline uint32_t getTileCacheFlushEnable() const { 1776 return (TheStructure.Common.TileCacheFlushEnable); 1777 } 1778 typedef enum tagADDRESS { 1779 ADDRESS_BIT_SHIFT = 0x2, 1780 ADDRESS_ALIGN_SIZE = 0x4, 1781 } ADDRESS; 1782 inline void setAddress(const uint32_t value) { 1783 TheStructure.Common.Address = value >> ADDRESS_BIT_SHIFT; 1784 } 1785 inline uint32_t getAddress() const { 1786 return (TheStructure.Common.Address << ADDRESS_BIT_SHIFT); 1787 } 1788 inline void setAddressHigh(const uint32_t value) { 1789 TheStructure.Common.AddressHigh = value; 1790 } 1791 inline uint32_t getAddressHigh() const { 1792 return (TheStructure.Common.AddressHigh); 1793 } 1794 inline void setImmediateData(const uint64_t value) { 1795 TheStructure.Common.ImmediateData = value; 1796 } 1797 inline uint64_t getImmediateData() const { 1798 return (TheStructure.Common.ImmediateData); 1799 } 1800} PIPE_CONTROL; 1801STATIC_ASSERT(24 == sizeof(PIPE_CONTROL)); 1802 1803typedef struct tagRENDER_SURFACE_STATE { 1804 union tagTheStructure { 1805 struct tagCommon { 1806 uint32_t Reserved_0 : BITFIELD_RANGE(0, 5); 1807 uint32_t MediaBoundaryPixelMode : BITFIELD_RANGE(6, 7); 1808 uint32_t RenderCacheReadWriteMode : BITFIELD_RANGE(8, 8); 1809 uint32_t SamplerL2OutOfOrderModeDisable : BITFIELD_RANGE(9, 9); 1810 uint32_t VerticalLineStrideOffset : BITFIELD_RANGE(10, 10); 1811 uint32_t VerticalLineStride : BITFIELD_RANGE(11, 11); 1812 uint32_t TileMode : BITFIELD_RANGE(12, 13); 1813 uint32_t SurfaceHorizontalAlignment : BITFIELD_RANGE(14, 15); 1814 uint32_t SurfaceVerticalAlignment : BITFIELD_RANGE(16, 17); 1815 uint32_t SurfaceFormat : BITFIELD_RANGE(18, 26); 1816 uint32_t Astc_Enable : BITFIELD_RANGE(27, 27); 1817 uint32_t SurfaceArray : BITFIELD_RANGE(28, 28); 1818 uint32_t SurfaceType : BITFIELD_RANGE(29, 31); 1819 uint32_t SurfaceQpitch : BITFIELD_RANGE(0, 14); 1820 uint32_t SampleTapDiscardDisable : BITFIELD_RANGE(15, 15); 1821 uint32_t Reserved_48 : BITFIELD_RANGE(16, 17); 1822 uint32_t CornerTexelMode : BITFIELD_RANGE(18, 18); 1823 uint32_t BaseMipLevel : BITFIELD_RANGE(19, 23); 1824 uint32_t MemoryObjectControlState_Reserved : BITFIELD_RANGE(24, 24); 1825 uint32_t MemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(25, 30); 1826 uint32_t EnableUnormPathInColorPipe : BITFIELD_RANGE(31, 31); 1827 uint32_t Width : BITFIELD_RANGE(0, 13); 1828 uint32_t Reserved_78 : BITFIELD_RANGE(14, 15); 1829 uint32_t Height : BITFIELD_RANGE(16, 29); 1830 uint32_t Reserved_94 : BITFIELD_RANGE(30, 31); 1831 uint32_t SurfacePitch : BITFIELD_RANGE(0, 17); 1832 uint32_t Reserved_114 : BITFIELD_RANGE(18, 18); 1833 uint32_t StandardTilingModeExtensions : BITFIELD_RANGE(19, 19); 1834 uint32_t TileAddressMappingMode : BITFIELD_RANGE(20, 20); 1835 uint32_t Depth : BITFIELD_RANGE(21, 31); 1836 uint32_t Reserved_128; 1837 uint32_t MipCountLod : BITFIELD_RANGE(0, 3); 1838 uint32_t SurfaceMinLod : BITFIELD_RANGE(4, 7); 1839 uint32_t MipTailStartLod : BITFIELD_RANGE(8, 11); 1840 uint32_t Reserved_172 : BITFIELD_RANGE(12, 13); 1841 uint32_t CoherencyType : BITFIELD_RANGE(14, 14); 1842 uint32_t Reserved_175 : BITFIELD_RANGE(15, 17); 1843 uint32_t TiledResourceMode : BITFIELD_RANGE(18, 19); 1844 uint32_t EwaDisableForCube : BITFIELD_RANGE(20, 20); 1845 uint32_t YOffset : BITFIELD_RANGE(21, 23); 1846 uint32_t Reserved_184 : BITFIELD_RANGE(24, 24); 1847 uint32_t XOffset : BITFIELD_RANGE(25, 31); 1848 uint32_t Reserved_192 : BITFIELD_RANGE(0, 14); 1849 uint32_t YuvInterpolationEnable : BITFIELD_RANGE(15, 15); 1850 uint32_t Reserved_208 : BITFIELD_RANGE(16, 31); 1851 uint32_t ResourceMinLod : BITFIELD_RANGE(0, 11); 1852 uint32_t Reserved_236 : BITFIELD_RANGE(12, 15); 1853 uint32_t ShaderChannelSelectAlpha : BITFIELD_RANGE(16, 18); 1854 uint32_t ShaderChannelSelectBlue : BITFIELD_RANGE(19, 21); 1855 uint32_t ShaderChannelSelectGreen : BITFIELD_RANGE(22, 24); 1856 uint32_t ShaderChannelSelectRed : BITFIELD_RANGE(25, 27); 1857 uint32_t Reserved_252 : BITFIELD_RANGE(28, 29); 1858 uint32_t MemoryCompressionEnable : BITFIELD_RANGE(30, 30); 1859 uint32_t MemoryCompressionMode : BITFIELD_RANGE(31, 31); 1860 uint64_t SurfaceBaseAddress; 1861 uint64_t QuiltWidth : BITFIELD_RANGE(0, 4); 1862 uint64_t QuiltHeight : BITFIELD_RANGE(5, 9); 1863 uint64_t ClearValueAddressEnable : BITFIELD_RANGE(10, 10); 1864 uint64_t Reserved_331 : BITFIELD_RANGE(11, 63); 1865 uint32_t Reserved_384; 1866 uint32_t Reserved_416; 1867 uint32_t Reserved_448; 1868 uint32_t Reserved_480; 1869 } Common; 1870 struct tagSurfaceTypeIsnotSurftype_Cube { 1871 uint32_t Reserved_0; 1872 uint32_t Reserved_32; 1873 uint32_t Reserved_64; 1874 uint32_t Reserved_96; 1875 uint32_t Reserved_128; 1876 uint32_t Reserved_160; 1877 uint32_t Reserved_192; 1878 uint32_t Reserved_224; 1879 uint64_t Reserved_256; 1880 uint64_t Reserved_320; 1881 uint32_t Reserved_384; 1882 uint32_t Reserved_416; 1883 uint32_t Reserved_448; 1884 uint32_t Reserved_480; 1885 } SurfaceTypeIsnotSurftype_Cube; 1886 struct tagSurfaceTypeIsSurftype_Cube { 1887 uint32_t CubeFaceEnable_PositiveZ : BITFIELD_RANGE(0, 0); 1888 uint32_t CubeFaceEnable_NegativeZ : BITFIELD_RANGE(1, 1); 1889 uint32_t CubeFaceEnable_PositiveY : BITFIELD_RANGE(2, 2); 1890 uint32_t CubeFaceEnable_NegativeY : BITFIELD_RANGE(3, 3); 1891 uint32_t CubeFaceEnable_PositiveX : BITFIELD_RANGE(4, 4); 1892 uint32_t CubeFaceEnable_NegativeX : BITFIELD_RANGE(5, 5); 1893 uint32_t Reserved_6 : BITFIELD_RANGE(6, 31); 1894 uint32_t Reserved_32; 1895 uint32_t Reserved_64; 1896 uint32_t Reserved_96; 1897 uint32_t Reserved_128; 1898 uint32_t Reserved_160; 1899 uint32_t Reserved_192; 1900 uint32_t Reserved_224; 1901 uint64_t Reserved_256; 1902 uint64_t Reserved_320; 1903 uint32_t Reserved_384; 1904 uint32_t Reserved_416; 1905 uint32_t Reserved_448; 1906 uint32_t Reserved_480; 1907 } SurfaceTypeIsSurftype_Cube; 1908 struct tagSurfaceTypeIsSurftype_Strbuf { 1909 uint32_t Reserved_0; 1910 uint32_t Reserved_32; 1911 uint32_t Reserved_64; 1912 uint32_t Reserved_96; 1913 uint32_t Reserved_128; 1914 uint32_t Reserved_160; 1915 uint32_t Reserved_192; 1916 uint32_t Reserved_224; 1917 uint64_t Reserved_256; 1918 uint64_t Reserved_320; 1919 uint32_t Reserved_384; 1920 uint32_t Reserved_416; 1921 uint32_t Reserved_448; 1922 uint32_t Reserved_480; 1923 } SurfaceTypeIsSurftype_Strbuf; 1924 struct tagSurfaceTypeIsnotSurftype_Strbuf { 1925 uint32_t Reserved_0; 1926 uint32_t Reserved_32; 1927 uint32_t Reserved_64; 1928 uint32_t Reserved_96; 1929 uint32_t MultisamplePositionPaletteIndex : BITFIELD_RANGE(0, 2); 1930 uint32_t NumberOfMultisamples : BITFIELD_RANGE(3, 5); 1931 uint32_t MultisampledSurfaceStorageFormat : BITFIELD_RANGE(6, 6); 1932 uint32_t RenderTargetViewExtent : BITFIELD_RANGE(7, 17); 1933 uint32_t MinimumArrayElement : BITFIELD_RANGE(18, 28); 1934 uint32_t RenderTargetAndSampleUnormRotation : BITFIELD_RANGE(29, 30); 1935 uint32_t Reserved_159 : BITFIELD_RANGE(31, 31); 1936 uint32_t Reserved_160; 1937 uint32_t Reserved_192; 1938 uint32_t Reserved_224; 1939 uint64_t Reserved_256; 1940 uint64_t Reserved_320; 1941 uint32_t Reserved_384; 1942 uint32_t Reserved_416; 1943 uint32_t Reserved_448; 1944 uint32_t Reserved_480; 1945 } SurfaceTypeIsnotSurftype_Strbuf; 1946 struct tag_SurfaceFormatIsnotPlanar { 1947 uint32_t Reserved_0; 1948 uint32_t Reserved_32; 1949 uint32_t Reserved_64; 1950 uint32_t Reserved_96; 1951 uint32_t Reserved_128; 1952 uint32_t Reserved_160; 1953 uint32_t AuxiliarySurfaceMode : BITFIELD_RANGE(0, 2); 1954 uint32_t AuxiliarySurfacePitch : BITFIELD_RANGE(3, 11); 1955 uint32_t Reserved_204 : BITFIELD_RANGE(12, 15); 1956 uint32_t AuxiliarySurfaceQpitch : BITFIELD_RANGE(16, 30); 1957 uint32_t Reserved_223 : BITFIELD_RANGE(31, 31); 1958 uint32_t Reserved_224; 1959 uint64_t Reserved_256; 1960 uint64_t Reserved_320; 1961 uint32_t Reserved_384; 1962 uint32_t Reserved_416; 1963 uint32_t Reserved_448; 1964 uint32_t Reserved_480; 1965 } _SurfaceFormatIsnotPlanar; 1966 struct tag_SurfaceFormatIsPlanar { 1967 uint32_t Reserved_0; 1968 uint32_t Reserved_32; 1969 uint32_t Reserved_64; 1970 uint32_t Reserved_96; 1971 uint32_t Reserved_128; 1972 uint32_t Reserved_160; 1973 uint32_t YOffsetForUOrUvPlane : BITFIELD_RANGE(0, 13); 1974 uint32_t Reserved_206 : BITFIELD_RANGE(14, 15); 1975 uint32_t XOffsetForUOrUvPlane : BITFIELD_RANGE(16, 29); 1976 uint32_t HalfPitchForChroma : BITFIELD_RANGE(30, 30); 1977 uint32_t SeparateUvPlaneEnable : BITFIELD_RANGE(31, 31); 1978 uint32_t Reserved_224; 1979 uint64_t Reserved_256; 1980 uint64_t Reserved_320 : BITFIELD_RANGE(0, 31); 1981 uint64_t YOffsetForVPlane : BITFIELD_RANGE(32, 45); 1982 uint64_t Reserved_366 : BITFIELD_RANGE(46, 47); 1983 uint64_t XOffsetForVPlane : BITFIELD_RANGE(48, 61); 1984 uint64_t Reserved_382 : BITFIELD_RANGE(62, 63); 1985 uint32_t Reserved_384; 1986 uint32_t Reserved_416; 1987 uint32_t Reserved_448; 1988 uint32_t Reserved_480; 1989 } _SurfaceFormatIsPlanar; 1990 struct tag_SurfaceFormatIsnotPlanarAndMemoryCompressionEnableIs0 { 1991 uint32_t Reserved_0; 1992 uint32_t Reserved_32; 1993 uint32_t Reserved_64; 1994 uint32_t Reserved_96; 1995 uint32_t Reserved_128; 1996 uint32_t Reserved_160; 1997 uint32_t Reserved_192; 1998 uint32_t Reserved_224; 1999 uint64_t Reserved_256; 2000 uint64_t Reserved_320 : BITFIELD_RANGE(0, 11); 2001 uint64_t AuxiliarySurfaceBaseAddress : BITFIELD_RANGE(12, 63); 2002 uint32_t Reserved_384; 2003 uint32_t Reserved_416; 2004 uint32_t Reserved_448; 2005 uint32_t Reserved_480; 2006 } _SurfaceFormatIsnotPlanarAndMemoryCompressionEnableIs0; 2007 struct tagMemoryCompressionEnableIs1 { 2008 uint32_t Reserved_0; 2009 uint32_t Reserved_32; 2010 uint32_t Reserved_64; 2011 uint32_t Reserved_96; 2012 uint32_t Reserved_128; 2013 uint32_t Reserved_160; 2014 uint32_t Reserved_192; 2015 uint32_t Reserved_224; 2016 uint64_t Reserved_256; 2017 uint64_t Reserved_320 : BITFIELD_RANGE(0, 20); 2018 uint64_t AuxiliaryTableIndexForMediaCompressedSurface : BITFIELD_RANGE(21, 31); 2019 uint64_t Reserved_352 : BITFIELD_RANGE(32, 63); 2020 uint32_t Reserved_384; 2021 uint32_t Reserved_416; 2022 uint32_t Reserved_448; 2023 uint32_t Reserved_480; 2024 } MemoryCompressionEnableIs1; 2025 struct tag__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsEnable { 2026 uint32_t Reserved_0; 2027 uint32_t Reserved_32; 2028 uint32_t Reserved_64; 2029 uint32_t Reserved_96; 2030 uint32_t Reserved_128; 2031 uint32_t Reserved_160; 2032 uint32_t Reserved_192; 2033 uint32_t Reserved_224; 2034 uint64_t Reserved_256; 2035 uint64_t Reserved_320; 2036 uint32_t Reserved_384 : BITFIELD_RANGE(0, 4); 2037 uint32_t ClearColorConversionEnable : BITFIELD_RANGE(5, 5); 2038 uint32_t Reserved_390 : BITFIELD_RANGE(6, 31); 2039 uint32_t ClearColorAddressHigh : BITFIELD_RANGE(0, 15); 2040 uint32_t Reserved_432 : BITFIELD_RANGE(16, 31); 2041 uint32_t Reserved_448; 2042 uint32_t Reserved_480; 2043 } __AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsEnable; 2044 struct tag_AuxiliarySurfaceModeIsnotAux_Ccs_DAnd_AuxiliarySurfaceModeIsnotAux_Ccs_EAnd_AuxiliarySurfaceModeIsnotAux_Hiz { 2045 uint32_t Reserved_0; 2046 uint32_t Reserved_32; 2047 uint32_t Reserved_64; 2048 uint32_t Reserved_96; 2049 uint32_t Reserved_128; 2050 uint32_t Reserved_160; 2051 uint32_t Reserved_192; 2052 uint32_t Reserved_224; 2053 uint64_t Reserved_256; 2054 uint64_t Reserved_320; 2055 uint32_t Reserved_384; 2056 uint32_t Reserved_416; 2057 uint32_t Reserved_448; 2058 uint32_t Reserved_480; 2059 } _AuxiliarySurfaceModeIsnotAux_Ccs_DAnd_AuxiliarySurfaceModeIsnotAux_Ccs_EAnd_AuxiliarySurfaceModeIsnotAux_Hiz; 2060 struct tag_AuxiliarySurfaceModeIsAux_HizAnd_ClearValueAddressEnableIsEnable { 2061 uint32_t Reserved_0; 2062 uint32_t Reserved_32; 2063 uint32_t Reserved_64; 2064 uint32_t Reserved_96; 2065 uint32_t Reserved_128; 2066 uint32_t Reserved_160; 2067 uint32_t Reserved_192; 2068 uint32_t Reserved_224; 2069 uint64_t Reserved_256; 2070 uint64_t Reserved_320; 2071 uint32_t Reserved_384 : BITFIELD_RANGE(0, 5); 2072 uint32_t ClearDepthAddressLow : BITFIELD_RANGE(6, 31); 2073 uint32_t ClearDepthAddressHigh : BITFIELD_RANGE(0, 15); 2074 uint32_t Reserved_432 : BITFIELD_RANGE(16, 31); 2075 uint32_t Reserved_448; 2076 uint32_t Reserved_480; 2077 } _AuxiliarySurfaceModeIsAux_HizAnd_ClearValueAddressEnableIsEnable; 2078 struct tag__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EOrAuxiliarySurfaceModeIsAux_HizAndClearValueAddressEnableIsDisable { 2079 uint32_t Reserved_0; 2080 uint32_t Reserved_32; 2081 uint32_t Reserved_64; 2082 uint32_t Reserved_96; 2083 uint32_t Reserved_128; 2084 uint32_t Reserved_160; 2085 uint32_t Reserved_192; 2086 uint32_t Reserved_224; 2087 uint64_t Reserved_256; 2088 uint64_t Reserved_320; 2089 uint32_t RedClearColor; 2090 uint32_t Reserved_416; 2091 uint32_t Reserved_448; 2092 uint32_t Reserved_480; 2093 } __AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EOrAuxiliarySurfaceModeIsAux_HizAndClearValueAddressEnableIsDisable; 2094 struct tagClearValueAddressEnableIsEnable { 2095 uint32_t Reserved_0; 2096 uint32_t Reserved_32; 2097 uint32_t Reserved_64; 2098 uint32_t Reserved_96; 2099 uint32_t Reserved_128; 2100 uint32_t Reserved_160; 2101 uint32_t Reserved_192; 2102 uint32_t Reserved_224; 2103 uint64_t Reserved_256; 2104 uint64_t Reserved_320; 2105 uint32_t Reserved_384 : BITFIELD_RANGE(0, 5); 2106 uint32_t ClearColorAddress : BITFIELD_RANGE(6, 31); 2107 uint32_t Reserved_416; 2108 uint32_t Reserved_448; 2109 uint32_t Reserved_480; 2110 } ClearValueAddressEnableIsEnable; 2111 struct tagAuxiliarySurfaceModeIsAux_Hiz { 2112 uint32_t Reserved_0; 2113 uint32_t Reserved_32; 2114 uint32_t Reserved_64; 2115 uint32_t Reserved_96; 2116 uint32_t Reserved_128; 2117 uint32_t Reserved_160; 2118 uint32_t Reserved_192; 2119 uint32_t Reserved_224; 2120 uint64_t Reserved_256; 2121 uint64_t Reserved_320; 2122 uint32_t Reserved_384; 2123 uint32_t Reserved_416; 2124 uint32_t Reserved_448; 2125 uint32_t Reserved_480; 2126 } AuxiliarySurfaceModeIsAux_Hiz; 2127 struct tag__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsDisable { 2128 uint32_t Reserved_0; 2129 uint32_t Reserved_32; 2130 uint32_t Reserved_64; 2131 uint32_t Reserved_96; 2132 uint32_t Reserved_128; 2133 uint32_t Reserved_160; 2134 uint32_t Reserved_192; 2135 uint32_t Reserved_224; 2136 uint64_t Reserved_256; 2137 uint64_t Reserved_320; 2138 uint32_t Reserved_384; 2139 uint32_t GreenClearColor; 2140 uint32_t BlueClearColor; 2141 uint32_t AlphaClearColor; 2142 } __AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsDisable; 2143 struct tag__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EOrAuxiliarySurfaceModeIsAux_HizAndClearValueAddressEnableIsEnable { 2144 uint32_t Reserved_0; 2145 uint32_t Reserved_32; 2146 uint32_t Reserved_64; 2147 uint32_t Reserved_96; 2148 uint32_t Reserved_128; 2149 uint32_t Reserved_160; 2150 uint32_t Reserved_192; 2151 uint32_t Reserved_224; 2152 uint64_t Reserved_256; 2153 uint64_t Reserved_320; 2154 uint32_t Reserved_384; 2155 uint32_t Reserved_416; 2156 uint32_t Reserved_448; 2157 uint32_t Reserved_480; 2158 } __AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EOrAuxiliarySurfaceModeIsAux_HizAndClearValueAddressEnableIsEnable; 2159 uint32_t RawData[16]; 2160 } TheStructure; 2161 typedef enum tagMEDIA_BOUNDARY_PIXEL_MODE { 2162 MEDIA_BOUNDARY_PIXEL_MODE_NORMAL_MODE = 0x0, 2163 MEDIA_BOUNDARY_PIXEL_MODE_PROGRESSIVE_FRAME = 0x2, 2164 MEDIA_BOUNDARY_PIXEL_MODE_INTERLACED_FRAME = 0x3, 2165 } MEDIA_BOUNDARY_PIXEL_MODE; 2166 typedef enum tagRENDER_CACHE_READ_WRITE_MODE { 2167 RENDER_CACHE_READ_WRITE_MODE_WRITE_ONLY_CACHE = 0x0, 2168 RENDER_CACHE_READ_WRITE_MODE_READ_WRITE_CACHE = 0x1, 2169 } RENDER_CACHE_READ_WRITE_MODE; 2170 typedef enum tagTILE_MODE { 2171 TILE_MODE_LINEAR = 0x0, 2172 TILE_MODE_WMAJOR = 0x1, 2173 TILE_MODE_XMAJOR = 0x2, 2174 TILE_MODE_YMAJOR = 0x3, 2175 } TILE_MODE; 2176 typedef enum tagSURFACE_HORIZONTAL_ALIGNMENT { 2177 SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_4 = 0x1, 2178 SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_8 = 0x2, 2179 SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_16 = 0x3, 2180 } SURFACE_HORIZONTAL_ALIGNMENT; 2181 typedef enum tagSURFACE_VERTICAL_ALIGNMENT { 2182 SURFACE_VERTICAL_ALIGNMENT_VALIGN_4 = 0x1, 2183 SURFACE_VERTICAL_ALIGNMENT_VALIGN_8 = 0x2, 2184 SURFACE_VERTICAL_ALIGNMENT_VALIGN_16 = 0x3, 2185 } SURFACE_VERTICAL_ALIGNMENT; 2186 typedef enum tagSURFACE_FORMAT { 2187 SURFACE_FORMAT_R32G32B32A32_FLOAT = 0x0, 2188 SURFACE_FORMAT_R32G32B32A32_SINT = 0x1, 2189 SURFACE_FORMAT_R32G32B32A32_UINT = 0x2, 2190 SURFACE_FORMAT_R32G32B32A32_UNORM = 0x3, 2191 SURFACE_FORMAT_R32G32B32A32_SNORM = 0x4, 2192 SURFACE_FORMAT_R64G64_FLOAT = 0x5, 2193 SURFACE_FORMAT_R32G32B32X32_FLOAT = 0x6, 2194 SURFACE_FORMAT_R32G32B32A32_SSCALED = 0x7, 2195 SURFACE_FORMAT_R32G32B32A32_USCALED = 0x8, 2196 SURFACE_FORMAT_R32G32B32A32_SFIXED = 0x20, 2197 SURFACE_FORMAT_R64G64_PASSTHRU = 0x21, 2198 SURFACE_FORMAT_R32G32B32_FLOAT = 0x40, 2199 SURFACE_FORMAT_R32G32B32_SINT = 0x41, 2200 SURFACE_FORMAT_R32G32B32_UINT = 0x42, 2201 SURFACE_FORMAT_R32G32B32_UNORM = 0x43, 2202 SURFACE_FORMAT_R32G32B32_SNORM = 0x44, 2203 SURFACE_FORMAT_R32G32B32_SSCALED = 0x45, 2204 SURFACE_FORMAT_R32G32B32_USCALED = 0x46, 2205 SURFACE_FORMAT_R32G32B32_SFIXED = 0x50, 2206 SURFACE_FORMAT_R16G16B16A16_UNORM = 0x80, 2207 SURFACE_FORMAT_R16G16B16A16_SNORM = 0x81, 2208 SURFACE_FORMAT_R16G16B16A16_SINT = 0x82, 2209 SURFACE_FORMAT_R16G16B16A16_UINT = 0x83, 2210 SURFACE_FORMAT_R16G16B16A16_FLOAT = 0x84, 2211 SURFACE_FORMAT_R32G32_FLOAT = 0x85, 2212 SURFACE_FORMAT_R32G32_SINT = 0x86, 2213 SURFACE_FORMAT_R32G32_UINT = 0x87, 2214 SURFACE_FORMAT_R32_FLOAT_X8X24_TYPELESS = 0x88, 2215 SURFACE_FORMAT_X32_TYPELESS_G8X24_UINT = 0x89, 2216 SURFACE_FORMAT_L32A32_FLOAT = 0x8a, 2217 SURFACE_FORMAT_R32G32_UNORM = 0x8b, 2218 SURFACE_FORMAT_R32G32_SNORM = 0x8c, 2219 SURFACE_FORMAT_R64_FLOAT = 0x8d, 2220 SURFACE_FORMAT_R16G16B16X16_UNORM = 0x8e, 2221 SURFACE_FORMAT_R16G16B16X16_FLOAT = 0x8f, 2222 SURFACE_FORMAT_A32X32_FLOAT = 0x90, 2223 SURFACE_FORMAT_L32X32_FLOAT = 0x91, 2224 SURFACE_FORMAT_I32X32_FLOAT = 0x92, 2225 SURFACE_FORMAT_R16G16B16A16_SSCALED = 0x93, 2226 SURFACE_FORMAT_R16G16B16A16_USCALED = 0x94, 2227 SURFACE_FORMAT_R32G32_SSCALED = 0x95, 2228 SURFACE_FORMAT_R32G32_USCALED = 0x96, 2229 SURFACE_FORMAT_R32G32_SFIXED = 0xa0, 2230 SURFACE_FORMAT_R64_PASSTHRU = 0xa1, 2231 SURFACE_FORMAT_B8G8R8A8_UNORM = 0xc0, 2232 SURFACE_FORMAT_B8G8R8A8_UNORM_SRGB = 0xc1, 2233 SURFACE_FORMAT_R10G10B10A2_UNORM = 0xc2, 2234 SURFACE_FORMAT_R10G10B10A2_UNORM_SRGB = 0xc3, 2235 SURFACE_FORMAT_R10G10B10A2_UINT = 0xc4, 2236 SURFACE_FORMAT_R10G10B10_SNORM_A2_UNORM = 0xc5, 2237 SURFACE_FORMAT_R8G8B8A8_UNORM = 0xc7, 2238 SURFACE_FORMAT_R8G8B8A8_UNORM_SRGB = 0xc8, 2239 SURFACE_FORMAT_R8G8B8A8_SNORM = 0xc9, 2240 SURFACE_FORMAT_R8G8B8A8_SINT = 0xca, 2241 SURFACE_FORMAT_R8G8B8A8_UINT = 0xcb, 2242 SURFACE_FORMAT_R16G16_UNORM = 0xcc, 2243 SURFACE_FORMAT_R16G16_SNORM = 0xcd, 2244 SURFACE_FORMAT_R16G16_SINT = 0xce, 2245 SURFACE_FORMAT_R16G16_UINT = 0xcf, 2246 SURFACE_FORMAT_R16G16_FLOAT = 0xd0, 2247 SURFACE_FORMAT_B10G10R10A2_UNORM = 0xd1, 2248 SURFACE_FORMAT_B10G10R10A2_UNORM_SRGB = 0xd2, 2249 SURFACE_FORMAT_R11G11B10_FLOAT = 0xd3, 2250 SURFACE_FORMAT_R32_SINT = 0xd6, 2251 SURFACE_FORMAT_R32_UINT = 0xd7, 2252 SURFACE_FORMAT_R32_FLOAT = 0xd8, 2253 SURFACE_FORMAT_R24_UNORM_X8_TYPELESS = 0xd9, 2254 SURFACE_FORMAT_X24_TYPELESS_G8_UINT = 0xda, 2255 SURFACE_FORMAT_L32_UNORM = 0xdd, 2256 SURFACE_FORMAT_A32_UNORM = 0xde, 2257 SURFACE_FORMAT_L16A16_UNORM = 0xdf, 2258 SURFACE_FORMAT_I24X8_UNORM = 0xe0, 2259 SURFACE_FORMAT_L24X8_UNORM = 0xe1, 2260 SURFACE_FORMAT_A24X8_UNORM = 0xe2, 2261 SURFACE_FORMAT_I32_FLOAT = 0xe3, 2262 SURFACE_FORMAT_L32_FLOAT = 0xe4, 2263 SURFACE_FORMAT_A32_FLOAT = 0xe5, 2264 SURFACE_FORMAT_X8B8_UNORM_G8R8_SNORM = 0xe6, 2265 SURFACE_FORMAT_A8X8_UNORM_G8R8_SNORM = 0xe7, 2266 SURFACE_FORMAT_B8X8_UNORM_G8R8_SNORM = 0xe8, 2267 SURFACE_FORMAT_B8G8R8X8_UNORM = 0xe9, 2268 SURFACE_FORMAT_B8G8R8X8_UNORM_SRGB = 0xea, 2269 SURFACE_FORMAT_R8G8B8X8_UNORM = 0xeb, 2270 SURFACE_FORMAT_R8G8B8X8_UNORM_SRGB = 0xec, 2271 SURFACE_FORMAT_R9G9B9E5_SHAREDEXP = 0xed, 2272 SURFACE_FORMAT_B10G10R10X2_UNORM = 0xee, 2273 SURFACE_FORMAT_L16A16_FLOAT = 0xf0, 2274 SURFACE_FORMAT_R32_UNORM = 0xf1, 2275 SURFACE_FORMAT_R32_SNORM = 0xf2, 2276 SURFACE_FORMAT_R10G10B10X2_USCALED = 0xf3, 2277 SURFACE_FORMAT_R8G8B8A8_SSCALED = 0xf4, 2278 SURFACE_FORMAT_R8G8B8A8_USCALED = 0xf5, 2279 SURFACE_FORMAT_R16G16_SSCALED = 0xf6, 2280 SURFACE_FORMAT_R16G16_USCALED = 0xf7, 2281 SURFACE_FORMAT_R32_SSCALED = 0xf8, 2282 SURFACE_FORMAT_R32_USCALED = 0xf9, 2283 SURFACE_FORMAT_B5G6R5_UNORM = 0x100, 2284 SURFACE_FORMAT_B5G6R5_UNORM_SRGB = 0x101, 2285 SURFACE_FORMAT_B5G5R5A1_UNORM = 0x102, 2286 SURFACE_FORMAT_B5G5R5A1_UNORM_SRGB = 0x103, 2287 SURFACE_FORMAT_B4G4R4A4_UNORM = 0x104, 2288 SURFACE_FORMAT_B4G4R4A4_UNORM_SRGB = 0x105, 2289 SURFACE_FORMAT_R8G8_UNORM = 0x106, 2290 SURFACE_FORMAT_R8G8_SNORM = 0x107, 2291 SURFACE_FORMAT_R8G8_SINT = 0x108, 2292 SURFACE_FORMAT_R8G8_UINT = 0x109, 2293 SURFACE_FORMAT_R16_UNORM = 0x10a, 2294 SURFACE_FORMAT_R16_SNORM = 0x10b, 2295 SURFACE_FORMAT_R16_SINT = 0x10c, 2296 SURFACE_FORMAT_R16_UINT = 0x10d, 2297 SURFACE_FORMAT_R16_FLOAT = 0x10e, 2298 SURFACE_FORMAT_A8P8_UNORM_PALETTE0 = 0x10f, 2299 SURFACE_FORMAT_A8P8_UNORM_PALETTE1 = 0x110, 2300 SURFACE_FORMAT_I16_UNORM = 0x111, 2301 SURFACE_FORMAT_L16_UNORM = 0x112, 2302 SURFACE_FORMAT_A16_UNORM = 0x113, 2303 SURFACE_FORMAT_L8A8_UNORM = 0x114, 2304 SURFACE_FORMAT_I16_FLOAT = 0x115, 2305 SURFACE_FORMAT_L16_FLOAT = 0x116, 2306 SURFACE_FORMAT_A16_FLOAT = 0x117, 2307 SURFACE_FORMAT_L8A8_UNORM_SRGB = 0x118, 2308 SURFACE_FORMAT_R5G5_SNORM_B6_UNORM = 0x119, 2309 SURFACE_FORMAT_B5G5R5X1_UNORM = 0x11a, 2310 SURFACE_FORMAT_B5G5R5X1_UNORM_SRGB = 0x11b, 2311 SURFACE_FORMAT_R8G8_SSCALED = 0x11c, 2312 SURFACE_FORMAT_R8G8_USCALED = 0x11d, 2313 SURFACE_FORMAT_R16_SSCALED = 0x11e, 2314 SURFACE_FORMAT_R16_USCALED = 0x11f, 2315 SURFACE_FORMAT_P8A8_UNORM_PALETTE0 = 0x122, 2316 SURFACE_FORMAT_P8A8_UNORM_PALETTE1 = 0x123, 2317 SURFACE_FORMAT_A1B5G5R5_UNORM = 0x124, 2318 SURFACE_FORMAT_A4B4G4R4_UNORM = 0x125, 2319 SURFACE_FORMAT_L8A8_UINT = 0x126, 2320 SURFACE_FORMAT_L8A8_SINT = 0x127, 2321 SURFACE_FORMAT_R8_UNORM = 0x140, 2322 SURFACE_FORMAT_R8_SNORM = 0x141, 2323 SURFACE_FORMAT_R8_SINT = 0x142, 2324 SURFACE_FORMAT_R8_UINT = 0x143, 2325 SURFACE_FORMAT_A8_UNORM = 0x144, 2326 SURFACE_FORMAT_I8_UNORM = 0x145, 2327 SURFACE_FORMAT_L8_UNORM = 0x146, 2328 SURFACE_FORMAT_P4A4_UNORM_PALETTE0 = 0x147, 2329 SURFACE_FORMAT_A4P4_UNORM_PALETTE0 = 0x148, 2330 SURFACE_FORMAT_R8_SSCALED = 0x149, 2331 SURFACE_FORMAT_R8_USCALED = 0x14a, 2332 SURFACE_FORMAT_P8_UNORM_PALETTE0 = 0x14b, 2333 SURFACE_FORMAT_L8_UNORM_SRGB = 0x14c, 2334 SURFACE_FORMAT_P8_UNORM_PALETTE1 = 0x14d, 2335 SURFACE_FORMAT_P4A4_UNORM_PALETTE1 = 0x14e, 2336 SURFACE_FORMAT_A4P4_UNORM_PALETTE1 = 0x14f, 2337 SURFACE_FORMAT_Y8_UNORM = 0x150, 2338 SURFACE_FORMAT_L8_UINT = 0x152, 2339 SURFACE_FORMAT_L8_SINT = 0x153, 2340 SURFACE_FORMAT_I8_UINT = 0x154, 2341 SURFACE_FORMAT_I8_SINT = 0x155, 2342 SURFACE_FORMAT_DXT1_RGB_SRGB = 0x180, 2343 SURFACE_FORMAT_R1_UNORM = 0x181, 2344 SURFACE_FORMAT_YCRCB_NORMAL = 0x182, 2345 SURFACE_FORMAT_YCRCB_SWAPUVY = 0x183, 2346 SURFACE_FORMAT_P2_UNORM_PALETTE0 = 0x184, 2347 SURFACE_FORMAT_P2_UNORM_PALETTE1 = 0x185, 2348 SURFACE_FORMAT_BC1_UNORM = 0x186, 2349 SURFACE_FORMAT_BC2_UNORM = 0x187, 2350 SURFACE_FORMAT_BC3_UNORM = 0x188, 2351 SURFACE_FORMAT_BC4_UNORM = 0x189, 2352 SURFACE_FORMAT_BC5_UNORM = 0x18a, 2353 SURFACE_FORMAT_BC1_UNORM_SRGB = 0x18b, 2354 SURFACE_FORMAT_BC2_UNORM_SRGB = 0x18c, 2355 SURFACE_FORMAT_BC3_UNORM_SRGB = 0x18d, 2356 SURFACE_FORMAT_MONO8 = 0x18e, 2357 SURFACE_FORMAT_YCRCB_SWAPUV = 0x18f, 2358 SURFACE_FORMAT_YCRCB_SWAPY = 0x190, 2359 SURFACE_FORMAT_DXT1_RGB = 0x191, 2360 SURFACE_FORMAT_FXT1 = 0x192, 2361 SURFACE_FORMAT_R8G8B8_UNORM = 0x193, 2362 SURFACE_FORMAT_R8G8B8_SNORM = 0x194, 2363 SURFACE_FORMAT_R8G8B8_SSCALED = 0x195, 2364 SURFACE_FORMAT_R8G8B8_USCALED = 0x196, 2365 SURFACE_FORMAT_R64G64B64A64_FLOAT = 0x197, 2366 SURFACE_FORMAT_R64G64B64_FLOAT = 0x198, 2367 SURFACE_FORMAT_BC4_SNORM = 0x199, 2368 SURFACE_FORMAT_BC5_SNORM = 0x19a, 2369 SURFACE_FORMAT_R16G16B16_FLOAT = 0x19b, 2370 SURFACE_FORMAT_R16G16B16_UNORM = 0x19c, 2371 SURFACE_FORMAT_R16G16B16_SNORM = 0x19d, 2372 SURFACE_FORMAT_R16G16B16_SSCALED = 0x19e, 2373 SURFACE_FORMAT_R16G16B16_USCALED = 0x19f, 2374 SURFACE_FORMAT_BC6H_SF16 = 0x1a1, 2375 SURFACE_FORMAT_BC7_UNORM = 0x1a2, 2376 SURFACE_FORMAT_BC7_UNORM_SRGB = 0x1a3, 2377 SURFACE_FORMAT_BC6H_UF16 = 0x1a4, 2378 SURFACE_FORMAT_PLANAR_420_8 = 0x1a5, 2379 SURFACE_FORMAT_PLANAR_420_16 = 0x1a6, 2380 SURFACE_FORMAT_R8G8B8_UNORM_SRGB = 0x1a8, 2381 SURFACE_FORMAT_ETC1_RGB8 = 0x1a9, 2382 SURFACE_FORMAT_ETC2_RGB8 = 0x1aa, 2383 SURFACE_FORMAT_EAC_R11 = 0x1ab, 2384 SURFACE_FORMAT_EAC_RG11 = 0x1ac, 2385 SURFACE_FORMAT_EAC_SIGNED_R11 = 0x1ad, 2386 SURFACE_FORMAT_EAC_SIGNED_RG11 = 0x1ae, 2387 SURFACE_FORMAT_ETC2_SRGB8 = 0x1af, 2388 SURFACE_FORMAT_R16G16B16_UINT = 0x1b0, 2389 SURFACE_FORMAT_R16G16B16_SINT = 0x1b1, 2390 SURFACE_FORMAT_R32_SFIXED = 0x1b2, 2391 SURFACE_FORMAT_R10G10B10A2_SNORM = 0x1b3, 2392 SURFACE_FORMAT_R10G10B10A2_USCALED = 0x1b4, 2393 SURFACE_FORMAT_R10G10B10A2_SSCALED = 0x1b5, 2394 SURFACE_FORMAT_R10G10B10A2_SINT = 0x1b6, 2395 SURFACE_FORMAT_B10G10R10A2_SNORM = 0x1b7, 2396 SURFACE_FORMAT_B10G10R10A2_USCALED = 0x1b8, 2397 SURFACE_FORMAT_B10G10R10A2_SSCALED = 0x1b9, 2398 SURFACE_FORMAT_B10G10R10A2_UINT = 0x1ba, 2399 SURFACE_FORMAT_B10G10R10A2_SINT = 0x1bb, 2400 SURFACE_FORMAT_R64G64B64A64_PASSTHRU = 0x1bc, 2401 SURFACE_FORMAT_R64G64B64_PASSTHRU = 0x1bd, 2402 SURFACE_FORMAT_ETC2_RGB8_PTA = 0x1c0, 2403 SURFACE_FORMAT_ETC2_SRGB8_PTA = 0x1c1, 2404 SURFACE_FORMAT_ETC2_EAC_RGBA8 = 0x1c2, 2405 SURFACE_FORMAT_ETC2_EAC_SRGB8_A8 = 0x1c3, 2406 SURFACE_FORMAT_R8G8B8_UINT = 0x1c8, 2407 SURFACE_FORMAT_R8G8B8_SINT = 0x1c9, 2408 SURFACE_FORMAT_RAW = 0x1ff, 2409 } SURFACE_FORMAT; 2410 typedef enum tagSURFACE_TYPE { 2411 SURFACE_TYPE_SURFTYPE_1D = 0x0, 2412 SURFACE_TYPE_SURFTYPE_2D = 0x1, 2413 SURFACE_TYPE_SURFTYPE_3D = 0x2, 2414 SURFACE_TYPE_SURFTYPE_CUBE = 0x3, 2415 SURFACE_TYPE_SURFTYPE_BUFFER = 0x4, 2416 SURFACE_TYPE_SURFTYPE_STRBUF = 0x5, 2417 SURFACE_TYPE_SURFTYPE_NULL = 0x7, 2418 } SURFACE_TYPE; 2419 typedef enum tagSAMPLE_TAP_DISCARD_DISABLE { 2420 SAMPLE_TAP_DISCARD_DISABLE_DISABLE = 0x0, 2421 SAMPLE_TAP_DISCARD_DISABLE_ENABLE = 0x1, 2422 } SAMPLE_TAP_DISCARD_DISABLE; 2423 typedef enum tagCORNER_TEXEL_MODE { 2424 CORNER_TEXEL_MODE_DISABLE = 0x0, 2425 CORNER_TEXEL_MODE_ENABLE = 0x1, 2426 } CORNER_TEXEL_MODE; 2427 typedef enum tagSTANDARD_TILING_MODE_EXTENSIONS { 2428 STANDARD_TILING_MODE_EXTENSIONS_DISABLE = 0x0, 2429 STANDARD_TILING_MODE_EXTENSIONS_ENABLE = 0x1, 2430 } STANDARD_TILING_MODE_EXTENSIONS; 2431 typedef enum tagTILE_ADDRESS_MAPPING_MODE { 2432 TILE_ADDRESS_MAPPING_MODE_GEN9 = 0x0, 2433 TILE_ADDRESS_MAPPING_MODE_GEN10 = 0x1, 2434 } TILE_ADDRESS_MAPPING_MODE; 2435 typedef enum tagNUMBER_OF_MULTISAMPLES { 2436 NUMBER_OF_MULTISAMPLES_MULTISAMPLECOUNT_1 = 0x0, 2437 NUMBER_OF_MULTISAMPLES_MULTISAMPLECOUNT_2 = 0x1, 2438 NUMBER_OF_MULTISAMPLES_MULTISAMPLECOUNT_4 = 0x2, 2439 NUMBER_OF_MULTISAMPLES_MULTISAMPLECOUNT_8 = 0x3, 2440 NUMBER_OF_MULTISAMPLES_MULTISAMPLECOUNT_16 = 0x4, 2441 } NUMBER_OF_MULTISAMPLES; 2442 typedef enum tagMULTISAMPLED_SURFACE_STORAGE_FORMAT { 2443 MULTISAMPLED_SURFACE_STORAGE_FORMAT_MSS = 0x0, 2444 MULTISAMPLED_SURFACE_STORAGE_FORMAT_DEPTH_STENCIL = 0x1, 2445 } MULTISAMPLED_SURFACE_STORAGE_FORMAT; 2446 typedef enum tagRENDER_TARGET_AND_SAMPLE_UNORM_ROTATION { 2447 RENDER_TARGET_AND_SAMPLE_UNORM_ROTATION_0DEG = 0x0, 2448 RENDER_TARGET_AND_SAMPLE_UNORM_ROTATION_90DEG = 0x1, 2449 RENDER_TARGET_AND_SAMPLE_UNORM_ROTATION_180DEG = 0x2, 2450 RENDER_TARGET_AND_SAMPLE_UNORM_ROTATION_270DEG = 0x3, 2451 } RENDER_TARGET_AND_SAMPLE_UNORM_ROTATION; 2452 typedef enum tagCOHERENCY_TYPE { 2453 COHERENCY_TYPE_GPU_COHERENT = 0x0, 2454 COHERENCY_TYPE_IA_COHERENT = 0x1, 2455 } COHERENCY_TYPE; 2456 typedef enum tagTILED_RESOURCE_MODE { 2457 TILED_RESOURCE_MODE_NONE = 0x0, 2458 TILED_RESOURCE_MODE_4KB = 0x1, 2459 TILED_RESOURCE_MODE_TILEYF = 0x1, 2460 TILED_RESOURCE_MODE_64KB = 0x2, 2461 TILED_RESOURCE_MODE_TILEYS = 0x2, 2462 } TILED_RESOURCE_MODE; 2463 typedef enum tagAUXILIARY_SURFACE_MODE { 2464 AUXILIARY_SURFACE_MODE_AUX_NONE = 0x0, 2465 AUXILIARY_SURFACE_MODE_AUX_CCS_D = 0x1, 2466 AUXILIARY_SURFACE_MODE_AUX_APPEND = 0x2, 2467 AUXILIARY_SURFACE_MODE_AUX_HIZ = 0x3, 2468 AUXILIARY_SURFACE_MODE_AUX_CCS_E = 0x5, 2469 } AUXILIARY_SURFACE_MODE; 2470 typedef enum tagHALF_PITCH_FOR_CHROMA { 2471 HALF_PITCH_FOR_CHROMA_DISABLE = 0x0, 2472 HALF_PITCH_FOR_CHROMA_ENABLE = 0x1, 2473 } HALF_PITCH_FOR_CHROMA; 2474 typedef enum tagSHADER_CHANNEL_SELECT { 2475 SHADER_CHANNEL_SELECT_ZERO = 0x0, 2476 SHADER_CHANNEL_SELECT_ONE = 0x1, 2477 SHADER_CHANNEL_SELECT_RED = 0x4, 2478 SHADER_CHANNEL_SELECT_GREEN = 0x5, 2479 SHADER_CHANNEL_SELECT_BLUE = 0x6, 2480 SHADER_CHANNEL_SELECT_ALPHA = 0x7, 2481 } SHADER_CHANNEL_SELECT; 2482 typedef enum tagMEMORY_COMPRESSION_MODE { 2483 MEMORY_COMPRESSION_MODE_HORIZONTAL = 0x0, 2484 MEMORY_COMPRESSION_MODE_VERTICAL = 0x1, 2485 } MEMORY_COMPRESSION_MODE; 2486 typedef enum tagCLEAR_COLOR_CONVERSION_ENABLE { 2487 CLEAR_COLOR_CONVERSION_ENABLE_DISABLE = 0x0, 2488 CLEAR_COLOR_CONVERSION_ENABLE_ENABLE = 0x1, 2489 } CLEAR_COLOR_CONVERSION_ENABLE; 2490 typedef enum tagPATCH_CONSTANTS { 2491 SURFACEBASEADDRESS_BYTEOFFSET = 0x20, 2492 SURFACEBASEADDRESS_INDEX = 0x8, 2493 AUXILIARYSURFACEBASEADDRESS_BYTEOFFSET = 0x28, 2494 AUXILIARYSURFACEBASEADDRESS_INDEX = 0xa, 2495 CLEARDEPTHADDRESSLOW_BYTEOFFSET = 0x30, 2496 CLEARDEPTHADDRESSLOW_INDEX = 0xc, 2497 CLEARCOLORADDRESS_BYTEOFFSET = 0x30, 2498 CLEARCOLORADDRESS_INDEX = 0xc, 2499 CLEARCOLORADDRESSHIGH_BYTEOFFSET = 0x34, 2500 CLEARCOLORADDRESSHIGH_INDEX = 0xd, 2501 CLEARDEPTHADDRESSHIGH_BYTEOFFSET = 0x34, 2502 CLEARDEPTHADDRESSHIGH_INDEX = 0xd, 2503 } PATCH_CONSTANTS; 2504 inline void init() { 2505 memset(&TheStructure, 0, sizeof(TheStructure)); 2506 TheStructure.Common.MediaBoundaryPixelMode = MEDIA_BOUNDARY_PIXEL_MODE_NORMAL_MODE; 2507 TheStructure.Common.RenderCacheReadWriteMode = RENDER_CACHE_READ_WRITE_MODE_WRITE_ONLY_CACHE; 2508 TheStructure.Common.TileMode = TILE_MODE_LINEAR; 2509 TheStructure.Common.SurfaceHorizontalAlignment = SURFACE_HORIZONTAL_ALIGNMENT_HALIGN_4; 2510 TheStructure.Common.SurfaceVerticalAlignment = SURFACE_VERTICAL_ALIGNMENT_VALIGN_4; 2511 TheStructure.Common.SurfaceType = SURFACE_TYPE_SURFTYPE_1D; 2512 TheStructure.Common.SampleTapDiscardDisable = SAMPLE_TAP_DISCARD_DISABLE_DISABLE; 2513 TheStructure.Common.CornerTexelMode = CORNER_TEXEL_MODE_DISABLE; 2514 TheStructure.Common.StandardTilingModeExtensions = STANDARD_TILING_MODE_EXTENSIONS_DISABLE; 2515 TheStructure.Common.TileAddressMappingMode = TILE_ADDRESS_MAPPING_MODE_GEN9; 2516 TheStructure.Common.CoherencyType = COHERENCY_TYPE_GPU_COHERENT; 2517 TheStructure.Common.TiledResourceMode = TILED_RESOURCE_MODE_NONE; 2518 TheStructure.Common.ShaderChannelSelectAlpha = SHADER_CHANNEL_SELECT_ZERO; 2519 TheStructure.Common.ShaderChannelSelectBlue = SHADER_CHANNEL_SELECT_ZERO; 2520 TheStructure.Common.ShaderChannelSelectGreen = SHADER_CHANNEL_SELECT_ZERO; 2521 TheStructure.Common.ShaderChannelSelectRed = SHADER_CHANNEL_SELECT_ZERO; 2522 TheStructure.Common.MemoryCompressionMode = MEMORY_COMPRESSION_MODE_HORIZONTAL; 2523 TheStructure.SurfaceTypeIsnotSurftype_Strbuf.NumberOfMultisamples = NUMBER_OF_MULTISAMPLES_MULTISAMPLECOUNT_1; 2524 TheStructure.SurfaceTypeIsnotSurftype_Strbuf.MultisampledSurfaceStorageFormat = MULTISAMPLED_SURFACE_STORAGE_FORMAT_MSS; 2525 TheStructure.SurfaceTypeIsnotSurftype_Strbuf.RenderTargetAndSampleUnormRotation = RENDER_TARGET_AND_SAMPLE_UNORM_ROTATION_0DEG; 2526 TheStructure._SurfaceFormatIsnotPlanar.AuxiliarySurfaceMode = AUXILIARY_SURFACE_MODE_AUX_NONE; 2527 TheStructure._SurfaceFormatIsPlanar.HalfPitchForChroma = HALF_PITCH_FOR_CHROMA_DISABLE; 2528 TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsEnable.ClearColorConversionEnable = CLEAR_COLOR_CONVERSION_ENABLE_ENABLE; 2529 } 2530 static tagRENDER_SURFACE_STATE sInit() { 2531 RENDER_SURFACE_STATE state; 2532 state.init(); 2533 return state; 2534 } 2535 inline uint32_t &getRawData(const uint32_t index) { 2536 DEBUG_BREAK_IF(index >= 16); 2537 return TheStructure.RawData[index]; 2538 } 2539 inline void setMediaBoundaryPixelMode(const MEDIA_BOUNDARY_PIXEL_MODE value) { 2540 TheStructure.Common.MediaBoundaryPixelMode = value; 2541 } 2542 inline MEDIA_BOUNDARY_PIXEL_MODE getMediaBoundaryPixelMode() const { 2543 return static_cast<MEDIA_BOUNDARY_PIXEL_MODE>(TheStructure.Common.MediaBoundaryPixelMode); 2544 } 2545 inline void setRenderCacheReadWriteMode(const RENDER_CACHE_READ_WRITE_MODE value) { 2546 TheStructure.Common.RenderCacheReadWriteMode = value; 2547 } 2548 inline RENDER_CACHE_READ_WRITE_MODE getRenderCacheReadWriteMode() const { 2549 return static_cast<RENDER_CACHE_READ_WRITE_MODE>(TheStructure.Common.RenderCacheReadWriteMode); 2550 } 2551 inline void setSamplerL2OutOfOrderModeDisable(const bool value) { 2552 TheStructure.Common.SamplerL2OutOfOrderModeDisable = value; 2553 } 2554 inline bool getSamplerL2OutOfOrderModeDisable() const { 2555 return (TheStructure.Common.SamplerL2OutOfOrderModeDisable); 2556 } 2557 inline void setVerticalLineStrideOffset(const uint32_t value) { 2558 TheStructure.Common.VerticalLineStrideOffset = value; 2559 } 2560 inline uint32_t getVerticalLineStrideOffset() const { 2561 return (TheStructure.Common.VerticalLineStrideOffset); 2562 } 2563 inline void setVerticalLineStride(const uint32_t value) { 2564 TheStructure.Common.VerticalLineStride = value; 2565 } 2566 inline uint32_t getVerticalLineStride() const { 2567 return (TheStructure.Common.VerticalLineStride); 2568 } 2569 inline void setTileMode(const TILE_MODE value) { 2570 TheStructure.Common.TileMode = value; 2571 } 2572 inline TILE_MODE getTileMode() const { 2573 return static_cast<TILE_MODE>(TheStructure.Common.TileMode); 2574 } 2575 inline void setSurfaceHorizontalAlignment(const SURFACE_HORIZONTAL_ALIGNMENT value) { 2576 TheStructure.Common.SurfaceHorizontalAlignment = value; 2577 } 2578 inline SURFACE_HORIZONTAL_ALIGNMENT getSurfaceHorizontalAlignment() const { 2579 return static_cast<SURFACE_HORIZONTAL_ALIGNMENT>(TheStructure.Common.SurfaceHorizontalAlignment); 2580 } 2581 inline void setSurfaceVerticalAlignment(const SURFACE_VERTICAL_ALIGNMENT value) { 2582 TheStructure.Common.SurfaceVerticalAlignment = value; 2583 } 2584 inline SURFACE_VERTICAL_ALIGNMENT getSurfaceVerticalAlignment() const { 2585 return static_cast<SURFACE_VERTICAL_ALIGNMENT>(TheStructure.Common.SurfaceVerticalAlignment); 2586 } 2587 inline void setSurfaceFormat(const SURFACE_FORMAT value) { 2588 TheStructure.Common.SurfaceFormat = value; 2589 } 2590 inline SURFACE_FORMAT getSurfaceFormat() const { 2591 return static_cast<SURFACE_FORMAT>(TheStructure.Common.SurfaceFormat); 2592 } 2593 inline void setAstcEnable(const bool value) { 2594 TheStructure.Common.Astc_Enable = value; 2595 } 2596 inline bool getAstcEnable() const { 2597 return (TheStructure.Common.Astc_Enable); 2598 } 2599 inline void setSurfaceArray(const bool value) { 2600 TheStructure.Common.SurfaceArray = value; 2601 } 2602 inline bool getSurfaceArray() const { 2603 return (TheStructure.Common.SurfaceArray); 2604 } 2605 inline void setSurfaceType(const SURFACE_TYPE value) { 2606 TheStructure.Common.SurfaceType = value; 2607 } 2608 inline SURFACE_TYPE getSurfaceType() const { 2609 return static_cast<SURFACE_TYPE>(TheStructure.Common.SurfaceType); 2610 } 2611 typedef enum tagSURFACEQPITCH { 2612 SURFACEQPITCH_BIT_SHIFT = 0x2, 2613 SURFACEQPITCH_ALIGN_SIZE = 0x4, 2614 } SURFACEQPITCH; 2615 inline void setSurfaceQpitch(const uint32_t value) { 2616 TheStructure.Common.SurfaceQpitch = value >> SURFACEQPITCH_BIT_SHIFT; 2617 } 2618 inline uint32_t getSurfaceQpitch() const { 2619 return (TheStructure.Common.SurfaceQpitch << SURFACEQPITCH_BIT_SHIFT); 2620 } 2621 inline void setSampleTapDiscardDisable(const SAMPLE_TAP_DISCARD_DISABLE value) { 2622 TheStructure.Common.SampleTapDiscardDisable = value; 2623 } 2624 inline SAMPLE_TAP_DISCARD_DISABLE getSampleTapDiscardDisable() const { 2625 return static_cast<SAMPLE_TAP_DISCARD_DISABLE>(TheStructure.Common.SampleTapDiscardDisable); 2626 } 2627 inline void setCornerTexelMode(const CORNER_TEXEL_MODE value) { 2628 TheStructure.Common.CornerTexelMode = value; 2629 } 2630 inline CORNER_TEXEL_MODE getCornerTexelMode() const { 2631 return static_cast<CORNER_TEXEL_MODE>(TheStructure.Common.CornerTexelMode); 2632 } 2633 inline void setBaseMipLevel(const uint32_t value) { 2634 TheStructure.Common.BaseMipLevel = value; 2635 } 2636 inline uint32_t getBaseMipLevel() const { 2637 return (TheStructure.Common.BaseMipLevel); 2638 } 2639 inline void setMemoryObjectControlStateReserved(const uint32_t value) { 2640 TheStructure.Common.MemoryObjectControlState_Reserved = value; 2641 } 2642 inline uint32_t getMemoryObjectControlStateReserved() const { 2643 return (TheStructure.Common.MemoryObjectControlState_Reserved); 2644 } 2645 inline void setMemoryObjectControlState(const uint32_t value) { 2646 TheStructure.Common.MemoryObjectControlState_Reserved = value; 2647 TheStructure.Common.MemoryObjectControlState_IndexToMocsTables = (value >> 1); 2648 } 2649 inline uint32_t getMemoryObjectControlState() const { 2650 uint32_t mocs = TheStructure.Common.MemoryObjectControlState_Reserved; 2651 mocs |= (TheStructure.Common.MemoryObjectControlState_IndexToMocsTables << 1); 2652 return (mocs); 2653 } 2654 inline void setEnableUnormPathInColorPipe(const uint32_t value) { 2655 TheStructure.Common.EnableUnormPathInColorPipe = value; 2656 } 2657 inline uint32_t getEnableUnormPathInColorPipe() const { 2658 return (TheStructure.Common.EnableUnormPathInColorPipe); 2659 } 2660 inline void setWidth(const uint32_t value) { 2661 TheStructure.Common.Width = value - 1; 2662 } 2663 inline uint32_t getWidth() const { 2664 return (TheStructure.Common.Width + 1); 2665 } 2666 inline void setHeight(const uint32_t value) { 2667 TheStructure.Common.Height = value - 1; 2668 } 2669 inline uint32_t getHeight() const { 2670 return (TheStructure.Common.Height + 1); 2671 } 2672 inline void setSurfacePitch(const uint32_t value) { 2673 TheStructure.Common.SurfacePitch = value - 1; 2674 } 2675 inline uint32_t getSurfacePitch() const { 2676 return (TheStructure.Common.SurfacePitch + 1); 2677 } 2678 inline void setStandardTilingModeExtensions(const STANDARD_TILING_MODE_EXTENSIONS value) { 2679 TheStructure.Common.StandardTilingModeExtensions = value; 2680 } 2681 inline STANDARD_TILING_MODE_EXTENSIONS getStandardTilingModeExtensions() const { 2682 return static_cast<STANDARD_TILING_MODE_EXTENSIONS>(TheStructure.Common.StandardTilingModeExtensions); 2683 } 2684 inline void setTileAddressMappingMode(const TILE_ADDRESS_MAPPING_MODE value) { 2685 TheStructure.Common.TileAddressMappingMode = value; 2686 } 2687 inline TILE_ADDRESS_MAPPING_MODE getTileAddressMappingMode() const { 2688 return static_cast<TILE_ADDRESS_MAPPING_MODE>(TheStructure.Common.TileAddressMappingMode); 2689 } 2690 inline void setDepth(const uint32_t value) { 2691 TheStructure.Common.Depth = value - 1; 2692 } 2693 inline uint32_t getDepth() const { 2694 return (TheStructure.Common.Depth + 1); 2695 } 2696 inline void setMipCountLod(const uint32_t value) { 2697 TheStructure.Common.MipCountLod = value; 2698 } 2699 inline uint32_t getMipCountLod() const { 2700 return (TheStructure.Common.MipCountLod); 2701 } 2702 inline void setSurfaceMinLod(const uint32_t value) { 2703 TheStructure.Common.SurfaceMinLod = value; 2704 } 2705 inline uint32_t getSurfaceMinLod() const { 2706 return (TheStructure.Common.SurfaceMinLod); 2707 } 2708 inline void setMipTailStartLod(const uint32_t value) { 2709 TheStructure.Common.MipTailStartLod = value; 2710 } 2711 inline uint32_t getMipTailStartLod() const { 2712 return (TheStructure.Common.MipTailStartLod); 2713 } 2714 inline void setCoherencyType(const COHERENCY_TYPE value) { 2715 TheStructure.Common.CoherencyType = value; 2716 } 2717 inline COHERENCY_TYPE getCoherencyType() const { 2718 return static_cast<COHERENCY_TYPE>(TheStructure.Common.CoherencyType); 2719 } 2720 inline void setTiledResourceMode(const TILED_RESOURCE_MODE value) { 2721 TheStructure.Common.TiledResourceMode = value; 2722 } 2723 inline TILED_RESOURCE_MODE getTiledResourceMode() const { 2724 return static_cast<TILED_RESOURCE_MODE>(TheStructure.Common.TiledResourceMode); 2725 } 2726 inline void setEwaDisableForCube(const bool value) { 2727 TheStructure.Common.EwaDisableForCube = value; 2728 } 2729 inline bool getEwaDisableForCube() const { 2730 return (TheStructure.Common.EwaDisableForCube); 2731 } 2732 typedef enum tagYOFFSET { 2733 YOFFSET_BIT_SHIFT = 0x2, 2734 YOFFSET_ALIGN_SIZE = 0x4, 2735 } YOFFSET; 2736 inline void setYOffset(const uint32_t value) { 2737 TheStructure.Common.YOffset = value >> YOFFSET_BIT_SHIFT; 2738 } 2739 inline uint32_t getYOffset() const { 2740 return (TheStructure.Common.YOffset << YOFFSET_BIT_SHIFT); 2741 } 2742 typedef enum tagXOFFSET { 2743 XOFFSET_BIT_SHIFT = 0x2, 2744 XOFFSET_ALIGN_SIZE = 0x4, 2745 } XOFFSET; 2746 inline void setXOffset(const uint32_t value) { 2747 TheStructure.Common.XOffset = value >> XOFFSET_BIT_SHIFT; 2748 } 2749 inline uint32_t getXOffset() const { 2750 return (TheStructure.Common.XOffset << XOFFSET_BIT_SHIFT); 2751 } 2752 inline void setYuvInterpolationEnable(const bool value) { 2753 TheStructure.Common.YuvInterpolationEnable = value; 2754 } 2755 inline bool getYuvInterpolationEnable() const { 2756 return (TheStructure.Common.YuvInterpolationEnable); 2757 } 2758 inline void setResourceMinLod(const uint32_t value) { 2759 TheStructure.Common.ResourceMinLod = value; 2760 } 2761 inline uint32_t getResourceMinLod() const { 2762 return (TheStructure.Common.ResourceMinLod); 2763 } 2764 inline void setShaderChannelSelectAlpha(const SHADER_CHANNEL_SELECT value) { 2765 TheStructure.Common.ShaderChannelSelectAlpha = value; 2766 } 2767 inline SHADER_CHANNEL_SELECT getShaderChannelSelectAlpha() const { 2768 return static_cast<SHADER_CHANNEL_SELECT>(TheStructure.Common.ShaderChannelSelectAlpha); 2769 } 2770 inline void setShaderChannelSelectBlue(const SHADER_CHANNEL_SELECT value) { 2771 TheStructure.Common.ShaderChannelSelectBlue = value; 2772 } 2773 inline SHADER_CHANNEL_SELECT getShaderChannelSelectBlue() const { 2774 return static_cast<SHADER_CHANNEL_SELECT>(TheStructure.Common.ShaderChannelSelectBlue); 2775 } 2776 inline void setShaderChannelSelectGreen(const SHADER_CHANNEL_SELECT value) { 2777 TheStructure.Common.ShaderChannelSelectGreen = value; 2778 } 2779 inline SHADER_CHANNEL_SELECT getShaderChannelSelectGreen() const { 2780 return static_cast<SHADER_CHANNEL_SELECT>(TheStructure.Common.ShaderChannelSelectGreen); 2781 } 2782 inline void setShaderChannelSelectRed(const SHADER_CHANNEL_SELECT value) { 2783 TheStructure.Common.ShaderChannelSelectRed = value; 2784 } 2785 inline SHADER_CHANNEL_SELECT getShaderChannelSelectRed() const { 2786 return static_cast<SHADER_CHANNEL_SELECT>(TheStructure.Common.ShaderChannelSelectRed); 2787 } 2788 inline void setMemoryCompressionEnable(const bool value) { 2789 TheStructure.Common.MemoryCompressionEnable = value; 2790 } 2791 inline bool getMemoryCompressionEnable() const { 2792 return (TheStructure.Common.MemoryCompressionEnable); 2793 } 2794 inline void setMemoryCompressionMode(const MEMORY_COMPRESSION_MODE value) { 2795 TheStructure.Common.MemoryCompressionMode = value; 2796 } 2797 inline MEMORY_COMPRESSION_MODE getMemoryCompressionMode() const { 2798 return static_cast<MEMORY_COMPRESSION_MODE>(TheStructure.Common.MemoryCompressionMode); 2799 } 2800 inline void setSurfaceBaseAddress(const uint64_t value) { 2801 TheStructure.Common.SurfaceBaseAddress = value; 2802 } 2803 inline uint64_t getSurfaceBaseAddress() const { 2804 return (TheStructure.Common.SurfaceBaseAddress); 2805 } 2806 inline void setQuiltWidth(const uint64_t value) { 2807 TheStructure.Common.QuiltWidth = value; 2808 } 2809 inline uint64_t getQuiltWidth() const { 2810 return (TheStructure.Common.QuiltWidth); 2811 } 2812 inline void setQuiltHeight(const uint64_t value) { 2813 TheStructure.Common.QuiltHeight = value; 2814 } 2815 inline uint64_t getQuiltHeight() const { 2816 return (TheStructure.Common.QuiltHeight); 2817 } 2818 inline void setClearValueAddressEnable(const bool value) { 2819 TheStructure.Common.ClearValueAddressEnable = value; 2820 } 2821 inline bool getClearValueAddressEnable() const { 2822 return (TheStructure.Common.ClearValueAddressEnable); 2823 } 2824 inline void setCubeFaceEnablePositiveZ(const bool value) { 2825 TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_PositiveZ = value; 2826 } 2827 inline bool getCubeFaceEnablePositiveZ() const { 2828 return (TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_PositiveZ); 2829 } 2830 inline void setCubeFaceEnableNegativeZ(const bool value) { 2831 TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_NegativeZ = value; 2832 } 2833 inline bool getCubeFaceEnableNegativeZ() const { 2834 return (TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_NegativeZ); 2835 } 2836 inline void setCubeFaceEnablePositiveY(const bool value) { 2837 TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_PositiveY = value; 2838 } 2839 inline bool getCubeFaceEnablePositiveY() const { 2840 return (TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_PositiveY); 2841 } 2842 inline void setCubeFaceEnableNegativeY(const bool value) { 2843 TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_NegativeY = value; 2844 } 2845 inline bool getCubeFaceEnableNegativeY() const { 2846 return (TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_NegativeY); 2847 } 2848 inline void setCubeFaceEnablePositiveX(const bool value) { 2849 TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_PositiveX = value; 2850 } 2851 inline bool getCubeFaceEnablePositiveX() const { 2852 return (TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_PositiveX); 2853 } 2854 inline void setCubeFaceEnableNegativeX(const bool value) { 2855 TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_NegativeX = value; 2856 } 2857 inline bool getCubeFaceEnableNegativeX() const { 2858 return (TheStructure.SurfaceTypeIsSurftype_Cube.CubeFaceEnable_NegativeX); 2859 } 2860 inline void setMultisamplePositionPaletteIndex(const uint32_t value) { 2861 TheStructure.SurfaceTypeIsnotSurftype_Strbuf.MultisamplePositionPaletteIndex = value; 2862 } 2863 inline uint32_t getMultisamplePositionPaletteIndex() const { 2864 return (TheStructure.SurfaceTypeIsnotSurftype_Strbuf.MultisamplePositionPaletteIndex); 2865 } 2866 inline void setNumberOfMultisamples(const NUMBER_OF_MULTISAMPLES value) { 2867 TheStructure.SurfaceTypeIsnotSurftype_Strbuf.NumberOfMultisamples = value; 2868 } 2869 inline NUMBER_OF_MULTISAMPLES getNumberOfMultisamples() const { 2870 return static_cast<NUMBER_OF_MULTISAMPLES>(TheStructure.SurfaceTypeIsnotSurftype_Strbuf.NumberOfMultisamples); 2871 } 2872 inline void setMultisampledSurfaceStorageFormat(const MULTISAMPLED_SURFACE_STORAGE_FORMAT value) { 2873 TheStructure.SurfaceTypeIsnotSurftype_Strbuf.MultisampledSurfaceStorageFormat = value; 2874 } 2875 inline MULTISAMPLED_SURFACE_STORAGE_FORMAT getMultisampledSurfaceStorageFormat() const { 2876 return static_cast<MULTISAMPLED_SURFACE_STORAGE_FORMAT>(TheStructure.SurfaceTypeIsnotSurftype_Strbuf.MultisampledSurfaceStorageFormat); 2877 } 2878 inline void setRenderTargetViewExtent(const uint32_t value) { 2879 TheStructure.SurfaceTypeIsnotSurftype_Strbuf.RenderTargetViewExtent = value - 1; 2880 } 2881 inline uint32_t getRenderTargetViewExtent() const { 2882 return (TheStructure.SurfaceTypeIsnotSurftype_Strbuf.RenderTargetViewExtent + 1); 2883 } 2884 inline void setMinimumArrayElement(const uint32_t value) { 2885 TheStructure.SurfaceTypeIsnotSurftype_Strbuf.MinimumArrayElement = value; 2886 } 2887 inline uint32_t getMinimumArrayElement() const { 2888 return (TheStructure.SurfaceTypeIsnotSurftype_Strbuf.MinimumArrayElement); 2889 } 2890 inline void setRenderTargetAndSampleUnormRotation(const RENDER_TARGET_AND_SAMPLE_UNORM_ROTATION value) { 2891 TheStructure.SurfaceTypeIsnotSurftype_Strbuf.RenderTargetAndSampleUnormRotation = value; 2892 } 2893 inline RENDER_TARGET_AND_SAMPLE_UNORM_ROTATION getRenderTargetAndSampleUnormRotation() const { 2894 return static_cast<RENDER_TARGET_AND_SAMPLE_UNORM_ROTATION>(TheStructure.SurfaceTypeIsnotSurftype_Strbuf.RenderTargetAndSampleUnormRotation); 2895 } 2896 inline void setAuxiliarySurfaceMode(const AUXILIARY_SURFACE_MODE value) { 2897 TheStructure._SurfaceFormatIsnotPlanar.AuxiliarySurfaceMode = value; 2898 } 2899 inline AUXILIARY_SURFACE_MODE getAuxiliarySurfaceMode() const { 2900 return static_cast<AUXILIARY_SURFACE_MODE>(TheStructure._SurfaceFormatIsnotPlanar.AuxiliarySurfaceMode); 2901 } 2902 inline void setAuxiliarySurfacePitch(const uint32_t value) { 2903 TheStructure._SurfaceFormatIsnotPlanar.AuxiliarySurfacePitch = value - 1; 2904 } 2905 inline uint32_t getAuxiliarySurfacePitch() const { 2906 return (TheStructure._SurfaceFormatIsnotPlanar.AuxiliarySurfacePitch + 1); 2907 } 2908 typedef enum tagAUXILIARYSURFACEQPITCH { 2909 AUXILIARYSURFACEQPITCH_BIT_SHIFT = 0x2, 2910 AUXILIARYSURFACEQPITCH_ALIGN_SIZE = 0x4, 2911 } AUXILIARYSURFACEQPITCH; 2912 inline void setAuxiliarySurfaceQpitch(const uint32_t value) { 2913 TheStructure._SurfaceFormatIsnotPlanar.AuxiliarySurfaceQpitch = value >> AUXILIARYSURFACEQPITCH_BIT_SHIFT; 2914 } 2915 inline uint32_t getAuxiliarySurfaceQpitch() const { 2916 return (TheStructure._SurfaceFormatIsnotPlanar.AuxiliarySurfaceQpitch << AUXILIARYSURFACEQPITCH_BIT_SHIFT); 2917 } 2918 inline void setYOffsetForUOrUvPlane(const uint32_t value) { 2919 TheStructure._SurfaceFormatIsPlanar.YOffsetForUOrUvPlane = value; 2920 } 2921 inline uint32_t getYOffsetForUOrUvPlane() const { 2922 return (TheStructure._SurfaceFormatIsPlanar.YOffsetForUOrUvPlane); 2923 } 2924 inline void setXOffsetForUOrUvPlane(const uint32_t value) { 2925 TheStructure._SurfaceFormatIsPlanar.XOffsetForUOrUvPlane = value; 2926 } 2927 inline uint32_t getXOffsetForUOrUvPlane() const { 2928 return (TheStructure._SurfaceFormatIsPlanar.XOffsetForUOrUvPlane); 2929 } 2930 inline void setHalfPitchForChroma(const HALF_PITCH_FOR_CHROMA value) { 2931 TheStructure._SurfaceFormatIsPlanar.HalfPitchForChroma = value; 2932 } 2933 inline HALF_PITCH_FOR_CHROMA getHalfPitchForChroma() const { 2934 return static_cast<HALF_PITCH_FOR_CHROMA>(TheStructure._SurfaceFormatIsPlanar.HalfPitchForChroma); 2935 } 2936 inline void setSeparateUvPlaneEnable(const bool value) { 2937 TheStructure._SurfaceFormatIsPlanar.SeparateUvPlaneEnable = value; 2938 } 2939 inline bool getSeparateUvPlaneEnable() const { 2940 return (TheStructure._SurfaceFormatIsPlanar.SeparateUvPlaneEnable); 2941 } 2942 inline void setYOffsetForVPlane(const uint64_t value) { 2943 TheStructure._SurfaceFormatIsPlanar.YOffsetForVPlane = value; 2944 } 2945 inline uint64_t getYOffsetForVPlane() const { 2946 return (TheStructure._SurfaceFormatIsPlanar.YOffsetForVPlane); 2947 } 2948 inline void setXOffsetForVPlane(const uint64_t value) { 2949 TheStructure._SurfaceFormatIsPlanar.XOffsetForVPlane = value; 2950 } 2951 inline uint64_t getXOffsetForVPlane() const { 2952 return (TheStructure._SurfaceFormatIsPlanar.XOffsetForVPlane); 2953 } 2954 typedef enum tagAUXILIARYSURFACEBASEADDRESS { 2955 AUXILIARYSURFACEBASEADDRESS_BIT_SHIFT = 0xc, 2956 AUXILIARYSURFACEBASEADDRESS_ALIGN_SIZE = 0x1000, 2957 } AUXILIARYSURFACEBASEADDRESS; 2958 inline void setAuxiliarySurfaceBaseAddress(const uint64_t value) { 2959 TheStructure._SurfaceFormatIsnotPlanarAndMemoryCompressionEnableIs0.AuxiliarySurfaceBaseAddress = value >> AUXILIARYSURFACEBASEADDRESS_BIT_SHIFT; 2960 } 2961 inline uint64_t getAuxiliarySurfaceBaseAddress() const { 2962 return (TheStructure._SurfaceFormatIsnotPlanarAndMemoryCompressionEnableIs0.AuxiliarySurfaceBaseAddress << AUXILIARYSURFACEBASEADDRESS_BIT_SHIFT); 2963 } 2964 inline void setAuxiliaryTableIndexForMediaCompressedSurface(const uint64_t value) { 2965 TheStructure.MemoryCompressionEnableIs1.AuxiliaryTableIndexForMediaCompressedSurface = value; 2966 } 2967 inline uint64_t getAuxiliaryTableIndexForMediaCompressedSurface() const { 2968 return (TheStructure.MemoryCompressionEnableIs1.AuxiliaryTableIndexForMediaCompressedSurface); 2969 } 2970 inline void setClearColorConversionEnable(const CLEAR_COLOR_CONVERSION_ENABLE value) { 2971 TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsEnable.ClearColorConversionEnable = value; 2972 } 2973 inline CLEAR_COLOR_CONVERSION_ENABLE getClearColorConversionEnable() const { 2974 return static_cast<CLEAR_COLOR_CONVERSION_ENABLE>(TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsEnable.ClearColorConversionEnable); 2975 } 2976 inline void setClearColorAddressHigh(const uint32_t value) { 2977 TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsEnable.ClearColorAddressHigh = value; 2978 } 2979 inline uint32_t getClearColorAddressHigh() const { 2980 return (TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsEnable.ClearColorAddressHigh); 2981 } 2982 typedef enum tagCLEARDEPTHADDRESSLOW { 2983 CLEARDEPTHADDRESSLOW_BIT_SHIFT = 0x6, 2984 CLEARDEPTHADDRESSLOW_ALIGN_SIZE = 0x40, 2985 } CLEARDEPTHADDRESSLOW; 2986 inline void setClearDepthAddressLow(const uint32_t value) { 2987 TheStructure._AuxiliarySurfaceModeIsAux_HizAnd_ClearValueAddressEnableIsEnable.ClearDepthAddressLow = value >> CLEARDEPTHADDRESSLOW_BIT_SHIFT; 2988 } 2989 inline uint32_t getClearDepthAddressLow() const { 2990 return (TheStructure._AuxiliarySurfaceModeIsAux_HizAnd_ClearValueAddressEnableIsEnable.ClearDepthAddressLow << CLEARDEPTHADDRESSLOW_BIT_SHIFT); 2991 } 2992 inline void setClearDepthAddressHigh(const uint32_t value) { 2993 TheStructure._AuxiliarySurfaceModeIsAux_HizAnd_ClearValueAddressEnableIsEnable.ClearDepthAddressHigh = value; 2994 } 2995 inline uint32_t getClearDepthAddressHigh() const { 2996 return (TheStructure._AuxiliarySurfaceModeIsAux_HizAnd_ClearValueAddressEnableIsEnable.ClearDepthAddressHigh); 2997 } 2998 inline void setRedClearColor(const uint32_t value) { 2999 TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EOrAuxiliarySurfaceModeIsAux_HizAndClearValueAddressEnableIsDisable.RedClearColor = value; 3000 } 3001 inline uint32_t getRedClearColor() const { 3002 return (TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EOrAuxiliarySurfaceModeIsAux_HizAndClearValueAddressEnableIsDisable.RedClearColor); 3003 } 3004 typedef enum tagCLEARCOLORADDRESS { 3005 CLEARCOLORADDRESS_BIT_SHIFT = 0x6, 3006 CLEARCOLORADDRESS_ALIGN_SIZE = 0x40, 3007 } CLEARCOLORADDRESS; 3008 inline void setClearColorAddress(const uint32_t value) { 3009 TheStructure.ClearValueAddressEnableIsEnable.ClearColorAddress = value >> CLEARCOLORADDRESS_BIT_SHIFT; 3010 } 3011 inline uint32_t getClearColorAddress() const { 3012 return (TheStructure.ClearValueAddressEnableIsEnable.ClearColorAddress << CLEARCOLORADDRESS_BIT_SHIFT); 3013 } 3014 inline void setGreenClearColor(const uint32_t value) { 3015 TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsDisable.GreenClearColor = value; 3016 } 3017 inline uint32_t getGreenClearColor() const { 3018 return (TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsDisable.GreenClearColor); 3019 } 3020 inline void setBlueClearColor(const uint32_t value) { 3021 TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsDisable.BlueClearColor = value; 3022 } 3023 inline uint32_t getBlueClearColor() const { 3024 return (TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsDisable.BlueClearColor); 3025 } 3026 inline void setAlphaClearColor(const uint32_t value) { 3027 TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsDisable.AlphaClearColor = value; 3028 } 3029 inline uint32_t getAlphaClearColor() const { 3030 return (TheStructure.__AuxiliarySurfaceModeIsAux_Ccs_DOrAuxiliarySurfaceModeIsAux_Ccs_EAndClearValueAddressEnableIsDisable.AlphaClearColor); 3031 } 3032} RENDER_SURFACE_STATE; 3033STATIC_ASSERT(64 == sizeof(RENDER_SURFACE_STATE)); 3034 3035typedef struct tagSAMPLER_STATE { 3036 union tagTheStructure { 3037 struct tagCommon { 3038 uint32_t LodAlgorithm : BITFIELD_RANGE(0, 0); 3039 uint32_t TextureLodBias : BITFIELD_RANGE(1, 13); 3040 uint32_t MinModeFilter : BITFIELD_RANGE(14, 16); 3041 uint32_t MagModeFilter : BITFIELD_RANGE(17, 19); 3042 uint32_t MipModeFilter : BITFIELD_RANGE(20, 21); 3043 uint32_t CoarseLodQualityMode : BITFIELD_RANGE(22, 26); 3044 uint32_t LodPreclampMode : BITFIELD_RANGE(27, 28); 3045 uint32_t TextureBorderColorMode : BITFIELD_RANGE(29, 29); 3046 uint32_t CpsLodCompensationEnable : BITFIELD_RANGE(30, 30); 3047 uint32_t SamplerDisable : BITFIELD_RANGE(31, 31); 3048 uint32_t CubeSurfaceControlMode : BITFIELD_RANGE(0, 0); 3049 uint32_t ShadowFunction : BITFIELD_RANGE(1, 3); 3050 uint32_t ChromakeyMode : BITFIELD_RANGE(4, 4); 3051 uint32_t ChromakeyIndex : BITFIELD_RANGE(5, 6); 3052 uint32_t ChromakeyEnable : BITFIELD_RANGE(7, 7); 3053 uint32_t MaxLod : BITFIELD_RANGE(8, 19); 3054 uint32_t MinLod : BITFIELD_RANGE(20, 31); 3055 uint32_t LodClampMagnificationMode : BITFIELD_RANGE(0, 0); 3056 uint32_t SrgbDecode : BITFIELD_RANGE(1, 1); 3057 uint32_t ReturnFilterWeightForNullTexels : BITFIELD_RANGE(2, 2); 3058 uint32_t ReturnFilterWeightForBorderTexels : BITFIELD_RANGE(3, 3); 3059 uint32_t Reserved_68 : BITFIELD_RANGE(4, 5); 3060 uint32_t IndirectStatePointer : BITFIELD_RANGE(6, 23); 3061 uint32_t Reserved_88 : BITFIELD_RANGE(24, 31); 3062 uint32_t TczAddressControlMode : BITFIELD_RANGE(0, 2); 3063 uint32_t TcyAddressControlMode : BITFIELD_RANGE(3, 5); 3064 uint32_t TcxAddressControlMode : BITFIELD_RANGE(6, 8); 3065 uint32_t ReductionTypeEnable : BITFIELD_RANGE(9, 9); 3066 uint32_t Non_NormalizedCoordinateEnable : BITFIELD_RANGE(10, 10); 3067 uint32_t TrilinearFilterQuality : BITFIELD_RANGE(11, 12); 3068 uint32_t RAddressMinFilterRoundingEnable : BITFIELD_RANGE(13, 13); 3069 uint32_t RAddressMagFilterRoundingEnable : BITFIELD_RANGE(14, 14); 3070 uint32_t VAddressMinFilterRoundingEnable : BITFIELD_RANGE(15, 15); 3071 uint32_t VAddressMagFilterRoundingEnable : BITFIELD_RANGE(16, 16); 3072 uint32_t UAddressMinFilterRoundingEnable : BITFIELD_RANGE(17, 17); 3073 uint32_t UAddressMagFilterRoundingEnable : BITFIELD_RANGE(18, 18); 3074 uint32_t MaximumAnisotropy : BITFIELD_RANGE(19, 21); 3075 uint32_t ReductionType : BITFIELD_RANGE(22, 23); 3076 uint32_t Reserved_120 : BITFIELD_RANGE(24, 31); 3077 } Common; 3078 uint32_t RawData[4]; 3079 } TheStructure; 3080 typedef enum tagLOD_ALGORITHM { 3081 LOD_ALGORITHM_LEGACY = 0x0, 3082 LOD_ALGORITHM_EWA_APPROXIMATION = 0x1, 3083 } LOD_ALGORITHM; 3084 typedef enum tagMIN_MODE_FILTER { 3085 MIN_MODE_FILTER_NEAREST = 0x0, 3086 MIN_MODE_FILTER_LINEAR = 0x1, 3087 MIN_MODE_FILTER_ANISOTROPIC = 0x2, 3088 MIN_MODE_FILTER_MONO = 0x6, 3089 } MIN_MODE_FILTER; 3090 typedef enum tagMAG_MODE_FILTER { 3091 MAG_MODE_FILTER_NEAREST = 0x0, 3092 MAG_MODE_FILTER_LINEAR = 0x1, 3093 MAG_MODE_FILTER_ANISOTROPIC = 0x2, 3094 MAG_MODE_FILTER_MONO = 0x6, 3095 } MAG_MODE_FILTER; 3096 typedef enum tagMIP_MODE_FILTER { 3097 MIP_MODE_FILTER_NONE = 0x0, 3098 MIP_MODE_FILTER_NEAREST = 0x1, 3099 MIP_MODE_FILTER_LINEAR = 0x3, 3100 } MIP_MODE_FILTER; 3101 typedef enum tagCOARSE_LOD_QUALITY_MODE { 3102 COARSE_LOD_QUALITY_MODE_DISABLED = 0x0, 3103 } COARSE_LOD_QUALITY_MODE; 3104 typedef enum tagLOD_PRECLAMP_MODE { 3105 LOD_PRECLAMP_MODE_NONE = 0x0, 3106 LOD_PRECLAMP_MODE_OGL = 0x2, 3107 } LOD_PRECLAMP_MODE; 3108 typedef enum tagTEXTURE_BORDER_COLOR_MODE { 3109 TEXTURE_BORDER_COLOR_MODE_DX10_OGL = 0x0, 3110 TEXTURE_BORDER_COLOR_MODE_DX9 = 0x1, 3111 } TEXTURE_BORDER_COLOR_MODE; 3112 typedef enum tagCUBE_SURFACE_CONTROL_MODE { 3113 CUBE_SURFACE_CONTROL_MODE_PROGRAMMED = 0x0, 3114 CUBE_SURFACE_CONTROL_MODE_OVERRIDE = 0x1, 3115 } CUBE_SURFACE_CONTROL_MODE; 3116 typedef enum tagSHADOW_FUNCTION { 3117 SHADOW_FUNCTION_PREFILTEROP_ALWAYS = 0x0, 3118 SHADOW_FUNCTION_PREFILTEROP_NEVER = 0x1, 3119 SHADOW_FUNCTION_PREFILTEROP_LESS = 0x2, 3120 SHADOW_FUNCTION_PREFILTEROP_EQUAL = 0x3, 3121 SHADOW_FUNCTION_PREFILTEROP_LEQUAL = 0x4, 3122 SHADOW_FUNCTION_PREFILTEROP_GREATER = 0x5, 3123 SHADOW_FUNCTION_PREFILTEROP_NOTEQUAL = 0x6, 3124 SHADOW_FUNCTION_PREFILTEROP_GEQUAL = 0x7, 3125 } SHADOW_FUNCTION; 3126 typedef enum tagCHROMAKEY_MODE { 3127 CHROMAKEY_MODE_KEYFILTER_KILL_ON_ANY_MATCH = 0x0, 3128 CHROMAKEY_MODE_KEYFILTER_REPLACE_BLACK = 0x1, 3129 } CHROMAKEY_MODE; 3130 typedef enum tagLOD_CLAMP_MAGNIFICATION_MODE { 3131 LOD_CLAMP_MAGNIFICATION_MODE_MIPNONE = 0x0, 3132 LOD_CLAMP_MAGNIFICATION_MODE_MIPFILTER = 0x1, 3133 } LOD_CLAMP_MAGNIFICATION_MODE; 3134 typedef enum tagSRGB_DECODE { 3135 SRGB_DECODE_DECODE_EXT = 0x0, 3136 SRGB_DECODE_SKIP_DECODE_EXT = 0x1, 3137 } SRGB_DECODE; 3138 typedef enum tagRETURN_FILTER_WEIGHT_FOR_NULL_TEXELS { 3139 RETURN_FILTER_WEIGHT_FOR_NULL_TEXELS_DISABLE = 0x0, 3140 RETURN_FILTER_WEIGHT_FOR_NULL_TEXELS_ENABLE = 0x1, 3141 } RETURN_FILTER_WEIGHT_FOR_NULL_TEXELS; 3142 typedef enum tagRETURN_FILTER_WEIGHT_FOR_BORDER_TEXELS { 3143 RETURN_FILTER_WEIGHT_FOR_BORDER_TEXELS_DISABLE = 0x0, 3144 RETURN_FILTER_WEIGHT_FOR_BORDER_TEXELS_ENABLE = 0x1, 3145 } RETURN_FILTER_WEIGHT_FOR_BORDER_TEXELS; 3146 typedef enum tagTEXTURE_COORDINATE_MODE { 3147 TEXTURE_COORDINATE_MODE_WRAP = 0x0, 3148 TEXTURE_COORDINATE_MODE_MIRROR = 0x1, 3149 TEXTURE_COORDINATE_MODE_CLAMP = 0x2, 3150 TEXTURE_COORDINATE_MODE_CUBE = 0x3, 3151 TEXTURE_COORDINATE_MODE_CLAMP_BORDER = 0x4, 3152 TEXTURE_COORDINATE_MODE_MIRROR_ONCE = 0x5, 3153 TEXTURE_COORDINATE_MODE_HALF_BORDER = 0x6, 3154 TEXTURE_COORDINATE_MODE_MIRROR_101 = 0x7, 3155 } TEXTURE_COORDINATE_MODE; 3156 typedef enum tagTRILINEAR_FILTER_QUALITY { 3157 TRILINEAR_FILTER_QUALITY_FULL = 0x0, 3158 TRILINEAR_FILTER_QUALITY_TRIQUAL_HIGH_MAG_CLAMP_MIPFILTER = 0x1, 3159 TRILINEAR_FILTER_QUALITY_MED = 0x2, 3160 TRILINEAR_FILTER_QUALITY_LOW = 0x3, 3161 } TRILINEAR_FILTER_QUALITY; 3162 typedef enum tagMAXIMUM_ANISOTROPY { 3163 MAXIMUM_ANISOTROPY_RATIO_21 = 0x0, 3164 MAXIMUM_ANISOTROPY_RATIO_41 = 0x1, 3165 MAXIMUM_ANISOTROPY_RATIO_61 = 0x2, 3166 MAXIMUM_ANISOTROPY_RATIO_81 = 0x3, 3167 MAXIMUM_ANISOTROPY_RATIO_101 = 0x4, 3168 MAXIMUM_ANISOTROPY_RATIO_121 = 0x5, 3169 MAXIMUM_ANISOTROPY_RATIO_141 = 0x6, 3170 MAXIMUM_ANISOTROPY_RATIO_161 = 0x7, 3171 } MAXIMUM_ANISOTROPY; 3172 typedef enum tagREDUCTION_TYPE { 3173 REDUCTION_TYPE_STD_FILTER = 0x0, 3174 REDUCTION_TYPE_COMPARISON = 0x1, 3175 REDUCTION_TYPE_MINIMUM = 0x2, 3176 REDUCTION_TYPE_MAXIMUM = 0x3, 3177 } REDUCTION_TYPE; 3178 inline void init() { 3179 memset(&TheStructure, 0, sizeof(TheStructure)); 3180 TheStructure.Common.LodAlgorithm = LOD_ALGORITHM_LEGACY; 3181 TheStructure.Common.MinModeFilter = MIN_MODE_FILTER_NEAREST; 3182 TheStructure.Common.MagModeFilter = MAG_MODE_FILTER_NEAREST; 3183 TheStructure.Common.MipModeFilter = MIP_MODE_FILTER_NONE; 3184 TheStructure.Common.CoarseLodQualityMode = COARSE_LOD_QUALITY_MODE_DISABLED; 3185 TheStructure.Common.LodPreclampMode = LOD_PRECLAMP_MODE_NONE; 3186 TheStructure.Common.TextureBorderColorMode = TEXTURE_BORDER_COLOR_MODE_DX10_OGL; 3187 TheStructure.Common.CubeSurfaceControlMode = CUBE_SURFACE_CONTROL_MODE_PROGRAMMED; 3188 TheStructure.Common.ShadowFunction = SHADOW_FUNCTION_PREFILTEROP_ALWAYS; 3189 TheStructure.Common.ChromakeyMode = CHROMAKEY_MODE_KEYFILTER_KILL_ON_ANY_MATCH; 3190 TheStructure.Common.LodClampMagnificationMode = LOD_CLAMP_MAGNIFICATION_MODE_MIPNONE; 3191 TheStructure.Common.SrgbDecode = SRGB_DECODE_DECODE_EXT; 3192 TheStructure.Common.ReturnFilterWeightForNullTexels = RETURN_FILTER_WEIGHT_FOR_NULL_TEXELS_DISABLE; 3193 TheStructure.Common.ReturnFilterWeightForBorderTexels = RETURN_FILTER_WEIGHT_FOR_BORDER_TEXELS_DISABLE; 3194 TheStructure.Common.TczAddressControlMode = TEXTURE_COORDINATE_MODE_WRAP; 3195 TheStructure.Common.TcyAddressControlMode = TEXTURE_COORDINATE_MODE_WRAP; 3196 TheStructure.Common.TcxAddressControlMode = TEXTURE_COORDINATE_MODE_WRAP; 3197 TheStructure.Common.TrilinearFilterQuality = TRILINEAR_FILTER_QUALITY_FULL; 3198 TheStructure.Common.MaximumAnisotropy = MAXIMUM_ANISOTROPY_RATIO_21; 3199 TheStructure.Common.ReductionType = REDUCTION_TYPE_STD_FILTER; 3200 } 3201 static tagSAMPLER_STATE sInit() { 3202 SAMPLER_STATE state; 3203 state.init(); 3204 return state; 3205 } 3206 inline uint32_t &getRawData(const uint32_t index) { 3207 DEBUG_BREAK_IF(index >= 4); 3208 return TheStructure.RawData[index]; 3209 } 3210 inline void setLodAlgorithm(const LOD_ALGORITHM value) { 3211 TheStructure.Common.LodAlgorithm = value; 3212 } 3213 inline LOD_ALGORITHM getLodAlgorithm() const { 3214 return static_cast<LOD_ALGORITHM>(TheStructure.Common.LodAlgorithm); 3215 } 3216 inline void setTextureLodBias(const uint32_t value) { 3217 TheStructure.Common.TextureLodBias = value; 3218 } 3219 inline uint32_t getTextureLodBias() const { 3220 return (TheStructure.Common.TextureLodBias); 3221 } 3222 inline void setMinModeFilter(const MIN_MODE_FILTER value) { 3223 TheStructure.Common.MinModeFilter = value; 3224 } 3225 inline MIN_MODE_FILTER getMinModeFilter() const { 3226 return static_cast<MIN_MODE_FILTER>(TheStructure.Common.MinModeFilter); 3227 } 3228 inline void setMagModeFilter(const MAG_MODE_FILTER value) { 3229 TheStructure.Common.MagModeFilter = value; 3230 } 3231 inline MAG_MODE_FILTER getMagModeFilter() const { 3232 return static_cast<MAG_MODE_FILTER>(TheStructure.Common.MagModeFilter); 3233 } 3234 inline void setMipModeFilter(const MIP_MODE_FILTER value) { 3235 TheStructure.Common.MipModeFilter = value; 3236 } 3237 inline MIP_MODE_FILTER getMipModeFilter() const { 3238 return static_cast<MIP_MODE_FILTER>(TheStructure.Common.MipModeFilter); 3239 } 3240 inline void setCoarseLodQualityMode(const COARSE_LOD_QUALITY_MODE value) { 3241 TheStructure.Common.CoarseLodQualityMode = value; 3242 } 3243 inline COARSE_LOD_QUALITY_MODE getCoarseLodQualityMode() const { 3244 return static_cast<COARSE_LOD_QUALITY_MODE>(TheStructure.Common.CoarseLodQualityMode); 3245 } 3246 inline void setLodPreclampMode(const LOD_PRECLAMP_MODE value) { 3247 TheStructure.Common.LodPreclampMode = value; 3248 } 3249 inline LOD_PRECLAMP_MODE getLodPreclampMode() const { 3250 return static_cast<LOD_PRECLAMP_MODE>(TheStructure.Common.LodPreclampMode); 3251 } 3252 inline void setTextureBorderColorMode(const TEXTURE_BORDER_COLOR_MODE value) { 3253 TheStructure.Common.TextureBorderColorMode = value; 3254 } 3255 inline TEXTURE_BORDER_COLOR_MODE getTextureBorderColorMode() const { 3256 return static_cast<TEXTURE_BORDER_COLOR_MODE>(TheStructure.Common.TextureBorderColorMode); 3257 } 3258 inline void setCpsLodCompensationEnable(const bool value) { 3259 TheStructure.Common.CpsLodCompensationEnable = value; 3260 } 3261 inline bool getCpsLodCompensationEnable() const { 3262 return (TheStructure.Common.CpsLodCompensationEnable); 3263 } 3264 inline void setSamplerDisable(const bool value) { 3265 TheStructure.Common.SamplerDisable = value; 3266 } 3267 inline bool getSamplerDisable() const { 3268 return (TheStructure.Common.SamplerDisable); 3269 } 3270 inline void setCubeSurfaceControlMode(const CUBE_SURFACE_CONTROL_MODE value) { 3271 TheStructure.Common.CubeSurfaceControlMode = value; 3272 } 3273 inline CUBE_SURFACE_CONTROL_MODE getCubeSurfaceControlMode() const { 3274 return static_cast<CUBE_SURFACE_CONTROL_MODE>(TheStructure.Common.CubeSurfaceControlMode); 3275 } 3276 inline void setShadowFunction(const SHADOW_FUNCTION value) { 3277 TheStructure.Common.ShadowFunction = value; 3278 } 3279 inline SHADOW_FUNCTION getShadowFunction() const { 3280 return static_cast<SHADOW_FUNCTION>(TheStructure.Common.ShadowFunction); 3281 } 3282 inline void setChromakeyMode(const CHROMAKEY_MODE value) { 3283 TheStructure.Common.ChromakeyMode = value; 3284 } 3285 inline CHROMAKEY_MODE getChromakeyMode() const { 3286 return static_cast<CHROMAKEY_MODE>(TheStructure.Common.ChromakeyMode); 3287 } 3288 inline void setChromakeyIndex(const uint32_t value) { 3289 TheStructure.Common.ChromakeyIndex = value; 3290 } 3291 inline uint32_t getChromakeyIndex() const { 3292 return (TheStructure.Common.ChromakeyIndex); 3293 } 3294 inline void setChromakeyEnable(const bool value) { 3295 TheStructure.Common.ChromakeyEnable = value; 3296 } 3297 inline bool getChromakeyEnable() const { 3298 return (TheStructure.Common.ChromakeyEnable); 3299 } 3300 inline void setMaxLod(const uint32_t value) { 3301 TheStructure.Common.MaxLod = value; 3302 } 3303 inline uint32_t getMaxLod() const { 3304 return (TheStructure.Common.MaxLod); 3305 } 3306 inline void setMinLod(const uint32_t value) { 3307 TheStructure.Common.MinLod = value; 3308 } 3309 inline uint32_t getMinLod() const { 3310 return (TheStructure.Common.MinLod); 3311 } 3312 inline void setLodClampMagnificationMode(const LOD_CLAMP_MAGNIFICATION_MODE value) { 3313 TheStructure.Common.LodClampMagnificationMode = value; 3314 } 3315 inline LOD_CLAMP_MAGNIFICATION_MODE getLodClampMagnificationMode() const { 3316 return static_cast<LOD_CLAMP_MAGNIFICATION_MODE>(TheStructure.Common.LodClampMagnificationMode); 3317 } 3318 inline void setSrgbDecode(const SRGB_DECODE value) { 3319 TheStructure.Common.SrgbDecode = value; 3320 } 3321 inline SRGB_DECODE getSrgbDecode() const { 3322 return static_cast<SRGB_DECODE>(TheStructure.Common.SrgbDecode); 3323 } 3324 inline void setReturnFilterWeightForNullTexels(const RETURN_FILTER_WEIGHT_FOR_NULL_TEXELS value) { 3325 TheStructure.Common.ReturnFilterWeightForNullTexels = value; 3326 } 3327 inline RETURN_FILTER_WEIGHT_FOR_NULL_TEXELS getReturnFilterWeightForNullTexels() const { 3328 return static_cast<RETURN_FILTER_WEIGHT_FOR_NULL_TEXELS>(TheStructure.Common.ReturnFilterWeightForNullTexels); 3329 } 3330 inline void setReturnFilterWeightForBorderTexels(const RETURN_FILTER_WEIGHT_FOR_BORDER_TEXELS value) { 3331 TheStructure.Common.ReturnFilterWeightForBorderTexels = value; 3332 } 3333 inline RETURN_FILTER_WEIGHT_FOR_BORDER_TEXELS getReturnFilterWeightForBorderTexels() const { 3334 return static_cast<RETURN_FILTER_WEIGHT_FOR_BORDER_TEXELS>(TheStructure.Common.ReturnFilterWeightForBorderTexels); 3335 } 3336 typedef enum tagINDIRECTSTATEPOINTER { 3337 INDIRECTSTATEPOINTER_BIT_SHIFT = 0x6, 3338 INDIRECTSTATEPOINTER_ALIGN_SIZE = 0x40, 3339 } INDIRECTSTATEPOINTER; 3340 inline void setIndirectStatePointer(const uint64_t value) { 3341 DEBUG_BREAK_IF(value >= 0x100000000); 3342 TheStructure.Common.IndirectStatePointer = (uint32_t)value >> INDIRECTSTATEPOINTER_BIT_SHIFT; 3343 } 3344 inline uint32_t getIndirectStatePointer() const { 3345 return (TheStructure.Common.IndirectStatePointer << INDIRECTSTATEPOINTER_BIT_SHIFT); 3346 } 3347 inline void setTczAddressControlMode(const TEXTURE_COORDINATE_MODE value) { 3348 TheStructure.Common.TczAddressControlMode = value; 3349 } 3350 inline TEXTURE_COORDINATE_MODE getTczAddressControlMode() const { 3351 return static_cast<TEXTURE_COORDINATE_MODE>(TheStructure.Common.TczAddressControlMode); 3352 } 3353 inline void setTcyAddressControlMode(const TEXTURE_COORDINATE_MODE value) { 3354 TheStructure.Common.TcyAddressControlMode = value; 3355 } 3356 inline TEXTURE_COORDINATE_MODE getTcyAddressControlMode() const { 3357 return static_cast<TEXTURE_COORDINATE_MODE>(TheStructure.Common.TcyAddressControlMode); 3358 } 3359 inline void setTcxAddressControlMode(const TEXTURE_COORDINATE_MODE value) { 3360 TheStructure.Common.TcxAddressControlMode = value; 3361 } 3362 inline TEXTURE_COORDINATE_MODE getTcxAddressControlMode() const { 3363 return static_cast<TEXTURE_COORDINATE_MODE>(TheStructure.Common.TcxAddressControlMode); 3364 } 3365 inline void setReductionTypeEnable(const bool value) { 3366 TheStructure.Common.ReductionTypeEnable = value; 3367 } 3368 inline bool getReductionTypeEnable() const { 3369 return (TheStructure.Common.ReductionTypeEnable); 3370 } 3371 inline void setNonNormalizedCoordinateEnable(const bool value) { 3372 TheStructure.Common.Non_NormalizedCoordinateEnable = value; 3373 } 3374 inline bool getNonNormalizedCoordinateEnable() const { 3375 return (TheStructure.Common.Non_NormalizedCoordinateEnable); 3376 } 3377 inline void setTrilinearFilterQuality(const TRILINEAR_FILTER_QUALITY value) { 3378 TheStructure.Common.TrilinearFilterQuality = value; 3379 } 3380 inline TRILINEAR_FILTER_QUALITY getTrilinearFilterQuality() const { 3381 return static_cast<TRILINEAR_FILTER_QUALITY>(TheStructure.Common.TrilinearFilterQuality); 3382 } 3383 inline void setRAddressMinFilterRoundingEnable(const bool value) { 3384 TheStructure.Common.RAddressMinFilterRoundingEnable = value; 3385 } 3386 inline bool getRAddressMinFilterRoundingEnable() const { 3387 return (TheStructure.Common.RAddressMinFilterRoundingEnable); 3388 } 3389 inline void setRAddressMagFilterRoundingEnable(const bool value) { 3390 TheStructure.Common.RAddressMagFilterRoundingEnable = value; 3391 } 3392 inline bool getRAddressMagFilterRoundingEnable() const { 3393 return (TheStructure.Common.RAddressMagFilterRoundingEnable); 3394 } 3395 inline void setVAddressMinFilterRoundingEnable(const bool value) { 3396 TheStructure.Common.VAddressMinFilterRoundingEnable = value; 3397 } 3398 inline bool getVAddressMinFilterRoundingEnable() const { 3399 return (TheStructure.Common.VAddressMinFilterRoundingEnable); 3400 } 3401 inline void setVAddressMagFilterRoundingEnable(const bool value) { 3402 TheStructure.Common.VAddressMagFilterRoundingEnable = value; 3403 } 3404 inline bool getVAddressMagFilterRoundingEnable() const { 3405 return (TheStructure.Common.VAddressMagFilterRoundingEnable); 3406 } 3407 inline void setUAddressMinFilterRoundingEnable(const bool value) { 3408 TheStructure.Common.UAddressMinFilterRoundingEnable = value; 3409 } 3410 inline bool getUAddressMinFilterRoundingEnable() const { 3411 return (TheStructure.Common.UAddressMinFilterRoundingEnable); 3412 } 3413 inline void setUAddressMagFilterRoundingEnable(const bool value) { 3414 TheStructure.Common.UAddressMagFilterRoundingEnable = value; 3415 } 3416 inline bool getUAddressMagFilterRoundingEnable() const { 3417 return (TheStructure.Common.UAddressMagFilterRoundingEnable); 3418 } 3419 inline void setMaximumAnisotropy(const MAXIMUM_ANISOTROPY value) { 3420 TheStructure.Common.MaximumAnisotropy = value; 3421 } 3422 inline MAXIMUM_ANISOTROPY getMaximumAnisotropy() const { 3423 return static_cast<MAXIMUM_ANISOTROPY>(TheStructure.Common.MaximumAnisotropy); 3424 } 3425 inline void setReductionType(const REDUCTION_TYPE value) { 3426 TheStructure.Common.ReductionType = value; 3427 } 3428 inline REDUCTION_TYPE getReductionType() const { 3429 return static_cast<REDUCTION_TYPE>(TheStructure.Common.ReductionType); 3430 } 3431} SAMPLER_STATE; 3432STATIC_ASSERT(16 == sizeof(SAMPLER_STATE)); 3433 3434typedef struct tagSTATE_BASE_ADDRESS { 3435 union tagTheStructure { 3436 struct tagCommon { 3437 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 3438 uint32_t Reserved_8 : BITFIELD_RANGE(8, 15); 3439 uint32_t _3DCommandSubOpcode : BITFIELD_RANGE(16, 23); 3440 uint32_t _3DCommandOpcode : BITFIELD_RANGE(24, 26); 3441 uint32_t CommandSubtype : BITFIELD_RANGE(27, 28); 3442 uint32_t CommandType : BITFIELD_RANGE(29, 31); 3443 uint64_t GeneralStateBaseAddressModifyEnable : BITFIELD_RANGE(0, 0); 3444 uint64_t Reserved_33 : BITFIELD_RANGE(1, 3); 3445 uint64_t GeneralStateMemoryObjectControlState_Reserved : BITFIELD_RANGE(4, 4); 3446 uint64_t GeneralStateMemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(5, 10); 3447 uint64_t Reserved_43 : BITFIELD_RANGE(11, 11); 3448 uint64_t GeneralStateBaseAddress : BITFIELD_RANGE(12, 63); 3449 uint32_t Reserved_96 : BITFIELD_RANGE(0, 15); 3450 uint32_t StatelessDataPortAccessMemoryObjectControlState_Reserved : BITFIELD_RANGE(16, 16); 3451 uint32_t StatelessDataPortAccessMemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(17, 22); 3452 uint32_t Reserved_119 : BITFIELD_RANGE(23, 31); 3453 uint64_t SurfaceStateBaseAddressModifyEnable : BITFIELD_RANGE(0, 0); 3454 uint64_t Reserved_129 : BITFIELD_RANGE(1, 3); 3455 uint64_t SurfaceStateMemoryObjectControlState_Reserved : BITFIELD_RANGE(4, 4); 3456 uint64_t SurfaceStateMemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(5, 10); 3457 uint64_t Reserved_139 : BITFIELD_RANGE(11, 11); 3458 uint64_t SurfaceStateBaseAddress : BITFIELD_RANGE(12, 63); 3459 uint64_t DynamicStateBaseAddressModifyEnable : BITFIELD_RANGE(0, 0); 3460 uint64_t Reserved_193 : BITFIELD_RANGE(1, 3); 3461 uint64_t DynamicStateMemoryObjectControlState_Reserved : BITFIELD_RANGE(4, 4); 3462 uint64_t DynamicStateMemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(5, 10); 3463 uint64_t Reserved_203 : BITFIELD_RANGE(11, 11); 3464 uint64_t DynamicStateBaseAddress : BITFIELD_RANGE(12, 63); 3465 uint64_t IndirectObjectBaseAddressModifyEnable : BITFIELD_RANGE(0, 0); 3466 uint64_t Reserved_257 : BITFIELD_RANGE(1, 3); 3467 uint64_t IndirectObjectMemoryObjectControlState_Reserved : BITFIELD_RANGE(4, 4); 3468 uint64_t IndirectObjectMemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(5, 10); 3469 uint64_t Reserved_267 : BITFIELD_RANGE(11, 11); 3470 uint64_t IndirectObjectBaseAddress : BITFIELD_RANGE(12, 63); 3471 uint64_t InstructionBaseAddressModifyEnable : BITFIELD_RANGE(0, 0); 3472 uint64_t Reserved_321 : BITFIELD_RANGE(1, 3); 3473 uint64_t InstructionMemoryObjectControlState_Reserved : BITFIELD_RANGE(4, 4); 3474 uint64_t InstructionMemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(5, 10); 3475 uint64_t Reserved_331 : BITFIELD_RANGE(11, 11); 3476 uint64_t InstructionBaseAddress : BITFIELD_RANGE(12, 63); 3477 uint32_t GeneralStateBufferSizeModifyEnable : BITFIELD_RANGE(0, 0); 3478 uint32_t Reserved_385 : BITFIELD_RANGE(1, 11); 3479 uint32_t GeneralStateBufferSize : BITFIELD_RANGE(12, 31); 3480 uint32_t DynamicStateBufferSizeModifyEnable : BITFIELD_RANGE(0, 0); 3481 uint32_t Reserved_417 : BITFIELD_RANGE(1, 11); 3482 uint32_t DynamicStateBufferSize : BITFIELD_RANGE(12, 31); 3483 uint32_t IndirectObjectBufferSizeModifyEnable : BITFIELD_RANGE(0, 0); 3484 uint32_t Reserved_449 : BITFIELD_RANGE(1, 11); 3485 uint32_t IndirectObjectBufferSize : BITFIELD_RANGE(12, 31); 3486 uint32_t InstructionBufferSizeModifyEnable : BITFIELD_RANGE(0, 0); 3487 uint32_t Reserved_481 : BITFIELD_RANGE(1, 11); 3488 uint32_t InstructionBufferSize : BITFIELD_RANGE(12, 31); 3489 uint64_t BindlessSurfaceStateBaseAddressModifyEnable : BITFIELD_RANGE(0, 0); 3490 uint64_t Reserved_513 : BITFIELD_RANGE(1, 3); 3491 uint64_t BindlessSurfaceStateMemoryObjectControlState_Reserved : BITFIELD_RANGE(4, 4); 3492 uint64_t BindlessSurfaceStateMemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(5, 10); 3493 uint64_t Reserved_523 : BITFIELD_RANGE(11, 11); 3494 uint64_t BindlessSurfaceStateBaseAddress : BITFIELD_RANGE(12, 63); 3495 uint32_t Reserved_576 : BITFIELD_RANGE(0, 11); 3496 uint32_t BindlessSurfaceStateSize : BITFIELD_RANGE(12, 31); 3497 uint64_t BindlessSamplerStateBaseAddressModifyEnable : BITFIELD_RANGE(0, 0); 3498 uint64_t Reserved_609 : BITFIELD_RANGE(1, 3); 3499 uint64_t BindlessSamplerStateMemoryObjectControlState_Reserved : BITFIELD_RANGE(4, 4); 3500 uint64_t BindlessSamplerStateMemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(5, 10); 3501 uint64_t Reserved_619 : BITFIELD_RANGE(11, 11); 3502 uint64_t BindlessSamplerStateBaseAddress : BITFIELD_RANGE(12, 63); 3503 uint32_t Reserved_672 : BITFIELD_RANGE(0, 11); 3504 uint32_t BindlessSamplerStateBufferSize : BITFIELD_RANGE(12, 31); 3505 } Common; 3506 uint32_t RawData[22]; 3507 } TheStructure; 3508 typedef enum tagDWORD_LENGTH { 3509 DWORD_LENGTH_DWORD_COUNT_N = 0x14, 3510 } DWORD_LENGTH; 3511 typedef enum tag_3D_COMMAND_SUB_OPCODE { 3512 _3D_COMMAND_SUB_OPCODE_STATE_BASE_ADDRESS = 0x1, 3513 } _3D_COMMAND_SUB_OPCODE; 3514 typedef enum tag_3D_COMMAND_OPCODE { 3515 _3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED = 0x1, 3516 } _3D_COMMAND_OPCODE; 3517 typedef enum tagCOMMAND_SUBTYPE { 3518 COMMAND_SUBTYPE_GFXPIPE_COMMON = 0x0, 3519 } COMMAND_SUBTYPE; 3520 typedef enum tagCOMMAND_TYPE { 3521 COMMAND_TYPE_GFXPIPE = 0x3, 3522 } COMMAND_TYPE; 3523 typedef enum tagPATCH_CONSTANTS { 3524 GENERALSTATEBASEADDRESS_BYTEOFFSET = 0x4, 3525 GENERALSTATEBASEADDRESS_INDEX = 0x1, 3526 SURFACESTATEBASEADDRESS_BYTEOFFSET = 0x10, 3527 SURFACESTATEBASEADDRESS_INDEX = 0x4, 3528 DYNAMICSTATEBASEADDRESS_BYTEOFFSET = 0x18, 3529 DYNAMICSTATEBASEADDRESS_INDEX = 0x6, 3530 INDIRECTOBJECTBASEADDRESS_BYTEOFFSET = 0x20, 3531 INDIRECTOBJECTBASEADDRESS_INDEX = 0x8, 3532 INSTRUCTIONBASEADDRESS_BYTEOFFSET = 0x28, 3533 INSTRUCTIONBASEADDRESS_INDEX = 0xa, 3534 BINDLESSSURFACESTATEBASEADDRESS_BYTEOFFSET = 0x40, 3535 BINDLESSSURFACESTATEBASEADDRESS_INDEX = 0x10, 3536 BINDLESSSAMPLERSTATEBASEADDRESS_BYTEOFFSET = 0x4c, 3537 BINDLESSSAMPLERSTATEBASEADDRESS_INDEX = 0x13, 3538 } PATCH_CONSTANTS; 3539 inline void init() { 3540 memset(&TheStructure, 0, sizeof(TheStructure)); 3541 TheStructure.Common.DwordLength = DWORD_LENGTH_DWORD_COUNT_N; 3542 TheStructure.Common._3DCommandSubOpcode = _3D_COMMAND_SUB_OPCODE_STATE_BASE_ADDRESS; 3543 TheStructure.Common._3DCommandOpcode = _3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED; 3544 TheStructure.Common.CommandSubtype = COMMAND_SUBTYPE_GFXPIPE_COMMON; 3545 TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE; 3546 } 3547 static tagSTATE_BASE_ADDRESS sInit() { 3548 STATE_BASE_ADDRESS state; 3549 state.init(); 3550 return state; 3551 } 3552 inline uint32_t &getRawData(const uint32_t index) { 3553 DEBUG_BREAK_IF(index >= 22); 3554 return TheStructure.RawData[index]; 3555 } 3556 inline void setGeneralStateBaseAddressModifyEnable(const bool value) { 3557 TheStructure.Common.GeneralStateBaseAddressModifyEnable = value; 3558 } 3559 inline bool getGeneralStateBaseAddressModifyEnable() const { 3560 return (TheStructure.Common.GeneralStateBaseAddressModifyEnable); 3561 } 3562 inline void setGeneralStateMemoryObjectControlStateReserved(const uint64_t value) { 3563 TheStructure.Common.GeneralStateMemoryObjectControlState_Reserved = value; 3564 } 3565 inline uint64_t getGeneralStateMemoryObjectControlStateReserved() const { 3566 return (TheStructure.Common.GeneralStateMemoryObjectControlState_Reserved); 3567 } 3568 inline void setGeneralStateMemoryObjectControlState(const uint64_t value) { 3569 TheStructure.Common.GeneralStateMemoryObjectControlState_IndexToMocsTables = value >> 1; 3570 } 3571 inline uint64_t getGeneralStateMemoryObjectControlState() const { 3572 return (TheStructure.Common.GeneralStateMemoryObjectControlState_IndexToMocsTables << 1); 3573 } 3574 typedef enum tagGENERALSTATEBASEADDRESS { 3575 GENERALSTATEBASEADDRESS_BIT_SHIFT = 0xc, 3576 GENERALSTATEBASEADDRESS_ALIGN_SIZE = 0x1000, 3577 } GENERALSTATEBASEADDRESS; 3578 inline void setGeneralStateBaseAddress(const uint64_t value) { 3579 TheStructure.Common.GeneralStateBaseAddress = value >> GENERALSTATEBASEADDRESS_BIT_SHIFT; 3580 } 3581 inline uint64_t getGeneralStateBaseAddress() const { 3582 return (TheStructure.Common.GeneralStateBaseAddress << GENERALSTATEBASEADDRESS_BIT_SHIFT); 3583 } 3584 inline void setStatelessDataPortAccessMemoryObjectControlStateReserved(const uint32_t value) { 3585 TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_Reserved = value; 3586 } 3587 inline uint32_t getStatelessDataPortAccessMemoryObjectControlStateReserved() const { 3588 return (TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_Reserved); 3589 } 3590 inline void setStatelessDataPortAccessMemoryObjectControlState(const uint32_t value) { 3591 TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_Reserved = value; 3592 TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_IndexToMocsTables = (value >> 1); 3593 } 3594 inline uint32_t getStatelessDataPortAccessMemoryObjectControlState() const { 3595 uint32_t mocs = TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_Reserved; 3596 mocs |= (TheStructure.Common.StatelessDataPortAccessMemoryObjectControlState_IndexToMocsTables << 1); 3597 return (mocs); 3598 } 3599 inline void setSurfaceStateBaseAddressModifyEnable(const bool value) { 3600 TheStructure.Common.SurfaceStateBaseAddressModifyEnable = value; 3601 } 3602 inline bool getSurfaceStateBaseAddressModifyEnable() const { 3603 return (TheStructure.Common.SurfaceStateBaseAddressModifyEnable); 3604 } 3605 inline void setSurfaceStateMemoryObjectControlStateReserved(const uint64_t value) { 3606 TheStructure.Common.SurfaceStateMemoryObjectControlState_Reserved = value; 3607 } 3608 inline uint64_t getSurfaceStateMemoryObjectControlStateReserved() const { 3609 return (TheStructure.Common.SurfaceStateMemoryObjectControlState_Reserved); 3610 } 3611 inline void setSurfaceStateMemoryObjectControlState(const uint64_t value) { 3612 TheStructure.Common.SurfaceStateMemoryObjectControlState_IndexToMocsTables = value >> 1; 3613 } 3614 inline uint64_t getSurfaceStateMemoryObjectControlState() const { 3615 return (TheStructure.Common.SurfaceStateMemoryObjectControlState_IndexToMocsTables << 1); 3616 } 3617 typedef enum tagSURFACESTATEBASEADDRESS { 3618 SURFACESTATEBASEADDRESS_BIT_SHIFT = 0xc, 3619 SURFACESTATEBASEADDRESS_ALIGN_SIZE = 0x1000, 3620 } SURFACESTATEBASEADDRESS; 3621 inline void setSurfaceStateBaseAddress(const uint64_t value) { 3622 TheStructure.Common.SurfaceStateBaseAddress = value >> SURFACESTATEBASEADDRESS_BIT_SHIFT; 3623 } 3624 inline uint64_t getSurfaceStateBaseAddress() const { 3625 return (TheStructure.Common.SurfaceStateBaseAddress << SURFACESTATEBASEADDRESS_BIT_SHIFT); 3626 } 3627 inline void setDynamicStateBaseAddressModifyEnable(const bool value) { 3628 TheStructure.Common.DynamicStateBaseAddressModifyEnable = value; 3629 } 3630 inline bool getDynamicStateBaseAddressModifyEnable() const { 3631 return (TheStructure.Common.DynamicStateBaseAddressModifyEnable); 3632 } 3633 inline void setDynamicStateMemoryObjectControlStateReserved(const uint64_t value) { 3634 TheStructure.Common.DynamicStateMemoryObjectControlState_Reserved = value; 3635 } 3636 inline uint64_t getDynamicStateMemoryObjectControlStateReserved() const { 3637 return (TheStructure.Common.DynamicStateMemoryObjectControlState_Reserved); 3638 } 3639 inline void setDynamicStateMemoryObjectControlState(const uint64_t value) { 3640 TheStructure.Common.DynamicStateMemoryObjectControlState_IndexToMocsTables = value >> 1; 3641 } 3642 inline uint64_t getDynamicStateMemoryObjectControlState() const { 3643 return (TheStructure.Common.DynamicStateMemoryObjectControlState_IndexToMocsTables << 1); 3644 } 3645 typedef enum tagDYNAMICSTATEBASEADDRESS { 3646 DYNAMICSTATEBASEADDRESS_BIT_SHIFT = 0xc, 3647 DYNAMICSTATEBASEADDRESS_ALIGN_SIZE = 0x1000, 3648 } DYNAMICSTATEBASEADDRESS; 3649 inline void setDynamicStateBaseAddress(const uint64_t value) { 3650 TheStructure.Common.DynamicStateBaseAddress = value >> DYNAMICSTATEBASEADDRESS_BIT_SHIFT; 3651 } 3652 inline uint64_t getDynamicStateBaseAddress() const { 3653 return (TheStructure.Common.DynamicStateBaseAddress << DYNAMICSTATEBASEADDRESS_BIT_SHIFT); 3654 } 3655 inline void setIndirectObjectBaseAddressModifyEnable(const bool value) { 3656 TheStructure.Common.IndirectObjectBaseAddressModifyEnable = value; 3657 } 3658 inline bool getIndirectObjectBaseAddressModifyEnable() const { 3659 return (TheStructure.Common.IndirectObjectBaseAddressModifyEnable); 3660 } 3661 inline void setIndirectObjectMemoryObjectControlStateReserved(const uint64_t value) { 3662 TheStructure.Common.IndirectObjectMemoryObjectControlState_Reserved = value; 3663 } 3664 inline uint64_t getIndirectObjectMemoryObjectControlStateReserved() const { 3665 return (TheStructure.Common.IndirectObjectMemoryObjectControlState_Reserved); 3666 } 3667 inline void setIndirectObjectMemoryObjectControlState(const uint64_t value) { 3668 TheStructure.Common.IndirectObjectMemoryObjectControlState_IndexToMocsTables = value >> 1; 3669 } 3670 inline uint64_t getIndirectObjectMemoryObjectControlState() const { 3671 return (TheStructure.Common.IndirectObjectMemoryObjectControlState_IndexToMocsTables << 1); 3672 } 3673 typedef enum tagINDIRECTOBJECTBASEADDRESS { 3674 INDIRECTOBJECTBASEADDRESS_BIT_SHIFT = 0xc, 3675 INDIRECTOBJECTBASEADDRESS_ALIGN_SIZE = 0x1000, 3676 } INDIRECTOBJECTBASEADDRESS; 3677 inline void setIndirectObjectBaseAddress(const uint64_t value) { 3678 TheStructure.Common.IndirectObjectBaseAddress = value >> INDIRECTOBJECTBASEADDRESS_BIT_SHIFT; 3679 } 3680 inline uint64_t getIndirectObjectBaseAddress() const { 3681 return (TheStructure.Common.IndirectObjectBaseAddress << INDIRECTOBJECTBASEADDRESS_BIT_SHIFT); 3682 } 3683 inline void setInstructionBaseAddressModifyEnable(const bool value) { 3684 TheStructure.Common.InstructionBaseAddressModifyEnable = value; 3685 } 3686 inline bool getInstructionBaseAddressModifyEnable() const { 3687 return (TheStructure.Common.InstructionBaseAddressModifyEnable); 3688 } 3689 inline void setInstructionMemoryObjectControlStateReserved(const uint64_t value) { 3690 TheStructure.Common.InstructionMemoryObjectControlState_Reserved = value; 3691 } 3692 inline uint64_t getInstructionMemoryObjectControlStateReserved() const { 3693 return (TheStructure.Common.InstructionMemoryObjectControlState_Reserved); 3694 } 3695 inline void setInstructionMemoryObjectControlState(const uint32_t value) { 3696 uint64_t val = static_cast<uint64_t>(value); 3697 TheStructure.Common.InstructionMemoryObjectControlState_Reserved = val; 3698 TheStructure.Common.InstructionMemoryObjectControlState_IndexToMocsTables = (val >> 1); 3699 } 3700 inline uint32_t getInstructionMemoryObjectControlState() const { 3701 uint64_t mocs = TheStructure.Common.InstructionMemoryObjectControlState_Reserved; 3702 mocs |= (TheStructure.Common.InstructionMemoryObjectControlState_IndexToMocsTables << 1); 3703 return static_cast<uint32_t>(mocs); 3704 } 3705 typedef enum tagINSTRUCTIONBASEADDRESS { 3706 INSTRUCTIONBASEADDRESS_BIT_SHIFT = 0xc, 3707 INSTRUCTIONBASEADDRESS_ALIGN_SIZE = 0x1000, 3708 } INSTRUCTIONBASEADDRESS; 3709 inline void setInstructionBaseAddress(const uint64_t value) { 3710 TheStructure.Common.InstructionBaseAddress = value >> INSTRUCTIONBASEADDRESS_BIT_SHIFT; 3711 } 3712 inline uint64_t getInstructionBaseAddress() const { 3713 return (TheStructure.Common.InstructionBaseAddress << INSTRUCTIONBASEADDRESS_BIT_SHIFT); 3714 } 3715 inline void setGeneralStateBufferSizeModifyEnable(const bool value) { 3716 TheStructure.Common.GeneralStateBufferSizeModifyEnable = value; 3717 } 3718 inline bool getGeneralStateBufferSizeModifyEnable() const { 3719 return (TheStructure.Common.GeneralStateBufferSizeModifyEnable); 3720 } 3721 inline void setGeneralStateBufferSize(const uint32_t value) { 3722 TheStructure.Common.GeneralStateBufferSize = value; 3723 } 3724 inline uint32_t getGeneralStateBufferSize() const { 3725 return (TheStructure.Common.GeneralStateBufferSize); 3726 } 3727 inline void setDynamicStateBufferSizeModifyEnable(const bool value) { 3728 TheStructure.Common.DynamicStateBufferSizeModifyEnable = value; 3729 } 3730 inline bool getDynamicStateBufferSizeModifyEnable() const { 3731 return (TheStructure.Common.DynamicStateBufferSizeModifyEnable); 3732 } 3733 inline void setDynamicStateBufferSize(const uint32_t value) { 3734 TheStructure.Common.DynamicStateBufferSize = value; 3735 } 3736 inline uint32_t getDynamicStateBufferSize() const { 3737 return (TheStructure.Common.DynamicStateBufferSize); 3738 } 3739 inline void setIndirectObjectBufferSizeModifyEnable(const bool value) { 3740 TheStructure.Common.IndirectObjectBufferSizeModifyEnable = value; 3741 } 3742 inline bool getIndirectObjectBufferSizeModifyEnable() const { 3743 return (TheStructure.Common.IndirectObjectBufferSizeModifyEnable); 3744 } 3745 inline void setIndirectObjectBufferSize(const uint32_t value) { 3746 TheStructure.Common.IndirectObjectBufferSize = value; 3747 } 3748 inline uint32_t getIndirectObjectBufferSize() const { 3749 return (TheStructure.Common.IndirectObjectBufferSize); 3750 } 3751 inline void setInstructionBufferSizeModifyEnable(const bool value) { 3752 TheStructure.Common.InstructionBufferSizeModifyEnable = value; 3753 } 3754 inline bool getInstructionBufferSizeModifyEnable() const { 3755 return (TheStructure.Common.InstructionBufferSizeModifyEnable); 3756 } 3757 inline void setInstructionBufferSize(const uint32_t value) { 3758 TheStructure.Common.InstructionBufferSize = value; 3759 } 3760 inline uint32_t getInstructionBufferSize() const { 3761 return (TheStructure.Common.InstructionBufferSize); 3762 } 3763 inline void setBindlessSurfaceStateBaseAddressModifyEnable(const bool value) { 3764 TheStructure.Common.BindlessSurfaceStateBaseAddressModifyEnable = value; 3765 } 3766 inline bool getBindlessSurfaceStateBaseAddressModifyEnable() const { 3767 return (TheStructure.Common.BindlessSurfaceStateBaseAddressModifyEnable); 3768 } 3769 inline void setBindlessSurfaceStateMemoryObjectControlStateReserved(const uint64_t value) { 3770 TheStructure.Common.BindlessSurfaceStateMemoryObjectControlState_Reserved = value; 3771 } 3772 inline uint64_t getBindlessSurfaceStateMemoryObjectControlStateReserved() const { 3773 return (TheStructure.Common.BindlessSurfaceStateMemoryObjectControlState_Reserved); 3774 } 3775 inline void setBindlessSurfaceStateMemoryObjectControlState(const uint64_t value) { 3776 TheStructure.Common.BindlessSurfaceStateMemoryObjectControlState_IndexToMocsTables = value >> 1; 3777 } 3778 inline uint64_t getBindlessSurfaceStateMemoryObjectControlState() const { 3779 return (TheStructure.Common.BindlessSurfaceStateMemoryObjectControlState_IndexToMocsTables << 1); 3780 } 3781 typedef enum tagBINDLESSSURFACESTATEBASEADDRESS { 3782 BINDLESSSURFACESTATEBASEADDRESS_BIT_SHIFT = 0xc, 3783 BINDLESSSURFACESTATEBASEADDRESS_ALIGN_SIZE = 0x1000, 3784 } BINDLESSSURFACESTATEBASEADDRESS; 3785 inline void setBindlessSurfaceStateBaseAddress(const uint64_t value) { 3786 TheStructure.Common.BindlessSurfaceStateBaseAddress = value >> BINDLESSSURFACESTATEBASEADDRESS_BIT_SHIFT; 3787 } 3788 inline uint64_t getBindlessSurfaceStateBaseAddress() const { 3789 return (TheStructure.Common.BindlessSurfaceStateBaseAddress << BINDLESSSURFACESTATEBASEADDRESS_BIT_SHIFT); 3790 } 3791 inline void setBindlessSurfaceStateSize(const uint32_t value) { 3792 TheStructure.Common.BindlessSurfaceStateSize = value; 3793 } 3794 inline uint32_t getBindlessSurfaceStateSize() const { 3795 return (TheStructure.Common.BindlessSurfaceStateSize); 3796 } 3797 inline void setBindlessSamplerStateBaseAddressModifyEnable(const bool value) { 3798 TheStructure.Common.BindlessSamplerStateBaseAddressModifyEnable = value; 3799 } 3800 inline bool getBindlessSamplerStateBaseAddressModifyEnable() const { 3801 return (TheStructure.Common.BindlessSamplerStateBaseAddressModifyEnable); 3802 } 3803 inline void setBindlessSamplerStateMemoryObjectControlStateReserved(const uint64_t value) { 3804 TheStructure.Common.BindlessSamplerStateMemoryObjectControlState_Reserved = value; 3805 } 3806 inline uint64_t getBindlessSamplerStateMemoryObjectControlStateReserved() const { 3807 return (TheStructure.Common.BindlessSamplerStateMemoryObjectControlState_Reserved); 3808 } 3809 inline void setBindlessSamplerStateMemoryObjectControlState(const uint64_t value) { 3810 TheStructure.Common.BindlessSamplerStateMemoryObjectControlState_IndexToMocsTables = value >> 1; 3811 } 3812 inline uint64_t getBindlessSamplerStateMemoryObjectControlState() const { 3813 return (TheStructure.Common.BindlessSamplerStateMemoryObjectControlState_IndexToMocsTables << 1); 3814 } 3815 typedef enum tagBINDLESSSAMPLERSTATEBASEADDRESS { 3816 BINDLESSSAMPLERSTATEBASEADDRESS_BIT_SHIFT = 0xc, 3817 BINDLESSSAMPLERSTATEBASEADDRESS_ALIGN_SIZE = 0x1000, 3818 } BINDLESSSAMPLERSTATEBASEADDRESS; 3819 inline void setBindlessSamplerStateBaseAddress(const uint64_t value) { 3820 TheStructure.Common.BindlessSamplerStateBaseAddress = value >> BINDLESSSAMPLERSTATEBASEADDRESS_BIT_SHIFT; 3821 } 3822 inline uint64_t getBindlessSamplerStateBaseAddress() const { 3823 return (TheStructure.Common.BindlessSamplerStateBaseAddress << BINDLESSSAMPLERSTATEBASEADDRESS_BIT_SHIFT); 3824 } 3825 inline void setBindlessSamplerStateBufferSize(const uint32_t value) { 3826 TheStructure.Common.BindlessSamplerStateBufferSize = value; 3827 } 3828 inline uint32_t getBindlessSamplerStateBufferSize() const { 3829 return (TheStructure.Common.BindlessSamplerStateBufferSize); 3830 } 3831} STATE_BASE_ADDRESS; 3832STATIC_ASSERT(88 == sizeof(STATE_BASE_ADDRESS)); 3833 3834typedef struct tagMI_REPORT_PERF_COUNT { 3835 union tagTheStructure { 3836 struct tagCommon { 3837 uint32_t DwordLength : BITFIELD_RANGE(0, 5); 3838 uint32_t Reserved_6 : BITFIELD_RANGE(6, 22); 3839 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 3840 uint32_t CommandType : BITFIELD_RANGE(29, 31); 3841 uint64_t UseGlobalGtt : BITFIELD_RANGE(0, 0); 3842 uint64_t Reserved_33 : BITFIELD_RANGE(1, 3); 3843 uint64_t CoreModeEnable : BITFIELD_RANGE(4, 4); 3844 uint64_t Reserved_37 : BITFIELD_RANGE(5, 5); 3845 uint64_t MemoryAddress : BITFIELD_RANGE(6, 63); 3846 uint32_t ReportId; 3847 } Common; 3848 uint32_t RawData[4]; 3849 } TheStructure; 3850 typedef enum tagDWORD_LENGTH { 3851 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x2, 3852 } DWORD_LENGTH; 3853 typedef enum tagMI_COMMAND_OPCODE { 3854 MI_COMMAND_OPCODE_MI_REPORT_PERF_COUNT = 0x28, 3855 } MI_COMMAND_OPCODE; 3856 typedef enum tagCOMMAND_TYPE { 3857 COMMAND_TYPE_MI_COMMAND = 0x0, 3858 } COMMAND_TYPE; 3859 typedef enum tagPATCH_CONSTANTS { 3860 MEMORYADDRESS_BYTEOFFSET = 0x4, 3861 MEMORYADDRESS_INDEX = 0x1, 3862 } PATCH_CONSTANTS; 3863 inline void init() { 3864 memset(&TheStructure, 0, sizeof(TheStructure)); 3865 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 3866 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_REPORT_PERF_COUNT; 3867 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 3868 } 3869 static tagMI_REPORT_PERF_COUNT sInit() { 3870 MI_REPORT_PERF_COUNT state; 3871 state.init(); 3872 return state; 3873 } 3874 inline uint32_t &getRawData(const uint32_t index) { 3875 DEBUG_BREAK_IF(index >= 4); 3876 return TheStructure.RawData[index]; 3877 } 3878 inline void setUseGlobalGtt(const bool value) { 3879 TheStructure.Common.UseGlobalGtt = value; 3880 } 3881 inline bool getUseGlobalGtt() const { 3882 return (TheStructure.Common.UseGlobalGtt); 3883 } 3884 inline void setCoreModeEnable(const uint64_t value) { 3885 TheStructure.Common.CoreModeEnable = value; 3886 } 3887 inline uint64_t getCoreModeEnable() const { 3888 return (TheStructure.Common.CoreModeEnable); 3889 } 3890 typedef enum tagMEMORYADDRESS { 3891 MEMORYADDRESS_BIT_SHIFT = 0x6, 3892 MEMORYADDRESS_ALIGN_SIZE = 0x40, 3893 } MEMORYADDRESS; 3894 inline void setMemoryAddress(const uint64_t value) { 3895 TheStructure.Common.MemoryAddress = value >> MEMORYADDRESS_BIT_SHIFT; 3896 } 3897 inline uint64_t getMemoryAddress() const { 3898 return (TheStructure.Common.MemoryAddress << MEMORYADDRESS_BIT_SHIFT); 3899 } 3900 inline void setReportId(const uint32_t value) { 3901 TheStructure.Common.ReportId = value; 3902 } 3903 inline uint32_t getReportId() const { 3904 return (TheStructure.Common.ReportId); 3905 } 3906} MI_REPORT_PERF_COUNT; 3907STATIC_ASSERT(16 == sizeof(MI_REPORT_PERF_COUNT)); 3908 3909typedef struct tagGPGPU_CSR_BASE_ADDRESS { 3910 union tagTheStructure { 3911 struct tagCommon { 3912 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 3913 uint32_t Reserved_8 : BITFIELD_RANGE(8, 15); 3914 uint32_t _3DCommandSubOpcode : BITFIELD_RANGE(16, 23); 3915 uint32_t _3DCommandOpcode : BITFIELD_RANGE(24, 26); 3916 uint32_t CommandSubtype : BITFIELD_RANGE(27, 28); 3917 uint32_t CommandType : BITFIELD_RANGE(29, 31); 3918 uint64_t Reserved_32 : BITFIELD_RANGE(0, 11); 3919 uint64_t GpgpuCsrBaseAddress : BITFIELD_RANGE(12, 63); 3920 } Common; 3921 uint32_t RawData[3]; 3922 } TheStructure; 3923 typedef enum tagDWORD_LENGTH { 3924 DWORD_LENGTH_UNNAMED_1 = 0x1, 3925 } DWORD_LENGTH; 3926 typedef enum tag_3D_COMMAND_SUB_OPCODE { 3927 _3D_COMMAND_SUB_OPCODE_GPGPU_CSR_BASE_ADDRESS = 0x4, 3928 } _3D_COMMAND_SUB_OPCODE; 3929 typedef enum tag_3D_COMMAND_OPCODE { 3930 _3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED = 0x1, 3931 } _3D_COMMAND_OPCODE; 3932 typedef enum tagCOMMAND_SUBTYPE { 3933 COMMAND_SUBTYPE_GFXPIPE_COMMON = 0x0, 3934 } COMMAND_SUBTYPE; 3935 typedef enum tagCOMMAND_TYPE { 3936 COMMAND_TYPE_GFXPIPE = 0x3, 3937 } COMMAND_TYPE; 3938 typedef enum tagPATCH_CONSTANTS { 3939 GPGPUCSRBASEADDRESS_BYTEOFFSET = 0x4, 3940 GPGPUCSRBASEADDRESS_INDEX = 0x1, 3941 } PATCH_CONSTANTS; 3942 inline void init() { 3943 memset(&TheStructure, 0, sizeof(TheStructure)); 3944 TheStructure.Common.DwordLength = DWORD_LENGTH_UNNAMED_1; 3945 TheStructure.Common._3DCommandSubOpcode = _3D_COMMAND_SUB_OPCODE_GPGPU_CSR_BASE_ADDRESS; 3946 TheStructure.Common._3DCommandOpcode = _3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED; 3947 TheStructure.Common.CommandSubtype = COMMAND_SUBTYPE_GFXPIPE_COMMON; 3948 TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE; 3949 } 3950 static tagGPGPU_CSR_BASE_ADDRESS sInit() { 3951 GPGPU_CSR_BASE_ADDRESS state; 3952 state.init(); 3953 return state; 3954 } 3955 inline uint32_t &getRawData(uint32_t const index) { 3956 DEBUG_BREAK_IF(index >= 3); 3957 return TheStructure.RawData[index]; 3958 } 3959 typedef enum tagGPGPUCSRBASEADDRESS { 3960 GPGPUCSRBASEADDRESS_BIT_SHIFT = 0xC, 3961 GPGPUCSRBASEADDRESS_ALIGN_SIZE = 0x1000, 3962 } GPGPUCSRBASEADDRESS; 3963 inline uint64_t getGpgpuCsrBaseAddress() const { 3964 return (uint64_t)TheStructure.Common.GpgpuCsrBaseAddress << GPGPUCSRBASEADDRESS_BIT_SHIFT; 3965 } 3966 inline void setGpgpuCsrBaseAddress(uint64_t value) { 3967 TheStructure.Common.GpgpuCsrBaseAddress = value >> GPGPUCSRBASEADDRESS_BIT_SHIFT; 3968 } 3969} GPGPU_CSR_BASE_ADDRESS; 3970STATIC_ASSERT(12 == sizeof(GPGPU_CSR_BASE_ADDRESS)); 3971 3972typedef struct tagSTATE_SIP { 3973 union tagTheStructure { 3974 struct tagCommon { 3975 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 3976 uint32_t Reserved_8 : BITFIELD_RANGE(8, 15); 3977 uint32_t _3DCommandSubOpcode : BITFIELD_RANGE(16, 23); 3978 uint32_t _3DCommandOpcode : BITFIELD_RANGE(24, 26); 3979 uint32_t CommandSubtype : BITFIELD_RANGE(27, 28); 3980 uint32_t CommandType : BITFIELD_RANGE(29, 31); 3981 uint64_t Reserved_32 : BITFIELD_RANGE(0, 3); 3982 uint64_t SystemInstructionPointer : BITFIELD_RANGE(4, 63); 3983 } Common; 3984 uint32_t RawData[3]; 3985 } TheStructure; 3986 typedef enum tagDWORD_LENGTH { 3987 DWORD_LENGTH_DWORD_COUNT_N = 0x1, 3988 } DWORD_LENGTH; 3989 typedef enum tag_3D_COMMAND_SUB_OPCODE { 3990 _3D_COMMAND_SUB_OPCODE_STATE_SIP = 0x2, 3991 } _3D_COMMAND_SUB_OPCODE; 3992 typedef enum tag_3D_COMMAND_OPCODE { 3993 _3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED = 0x1, 3994 } _3D_COMMAND_OPCODE; 3995 typedef enum tagCOMMAND_SUBTYPE { 3996 COMMAND_SUBTYPE_GFXPIPE_COMMON = 0x0, 3997 } COMMAND_SUBTYPE; 3998 typedef enum tagCOMMAND_TYPE { 3999 COMMAND_TYPE_GFXPIPE = 0x3, 4000 } COMMAND_TYPE; 4001 typedef enum tagPATCH_CONSTANTS { 4002 SYSTEMINSTRUCTIONPOINTER_BYTEOFFSET = 0x4, 4003 SYSTEMINSTRUCTIONPOINTER_INDEX = 0x1, 4004 } PATCH_CONSTANTS; 4005 void init() { 4006 memset(&TheStructure, 0, sizeof(TheStructure)); 4007 TheStructure.Common.DwordLength = DWORD_LENGTH_DWORD_COUNT_N; 4008 TheStructure.Common._3DCommandSubOpcode = _3D_COMMAND_SUB_OPCODE_STATE_SIP; 4009 TheStructure.Common._3DCommandOpcode = _3D_COMMAND_OPCODE_GFXPIPE_NONPIPELINED; 4010 TheStructure.Common.CommandSubtype = COMMAND_SUBTYPE_GFXPIPE_COMMON; 4011 TheStructure.Common.CommandType = COMMAND_TYPE_GFXPIPE; 4012 } 4013 static tagSTATE_SIP sInit() { 4014 STATE_SIP state; 4015 state.init(); 4016 return state; 4017 } 4018 inline uint32_t &getRawData(uint32_t const index) { 4019 DEBUG_BREAK_IF(index >= 3); 4020 return TheStructure.RawData[index]; 4021 } 4022 typedef enum tagSYSTEMINSTRUCTIONPOINTER { 4023 SYSTEMINSTRUCTIONPOINTER_BIT_SHIFT = 0x4, 4024 SYSTEMINSTRUCTIONPOINTER_ALIGN_SIZE = 0x10, 4025 } SYSTEMINSTRUCTIONPOINTER; 4026 inline uint64_t getSystemInstructionPointer() const { 4027 return (uint64_t)TheStructure.Common.SystemInstructionPointer << SYSTEMINSTRUCTIONPOINTER_BIT_SHIFT; 4028 } 4029 inline void setSystemInstructionPointer(uint64_t value) { 4030 TheStructure.Common.SystemInstructionPointer = value >> SYSTEMINSTRUCTIONPOINTER_BIT_SHIFT; 4031 } 4032} STATE_SIP; 4033STATIC_ASSERT(12 == sizeof(STATE_SIP)); 4034 4035struct MI_USER_INTERRUPT { 4036 union tagTheStructure { 4037 struct tagCommon { 4038 uint32_t Reserved_0 : BITFIELD_RANGE(0, 22); 4039 uint32_t MICommandOpcode : BITFIELD_RANGE(23, 28); 4040 uint32_t CommandType : BITFIELD_RANGE(29, 31); 4041 } Common; 4042 uint32_t RawData[1]; 4043 } TheStructure; 4044 enum MI_COMMAND_OPCODE { 4045 MI_COMMAND_OPCODE_MI_USER_INTERRUPT = 2, 4046 }; 4047 enum COMMAND_TYPE { 4048 COMMAND_TYPE_MI_COMMAND = 0, 4049 }; 4050 inline void init() { 4051 memset(&TheStructure, 0, sizeof(TheStructure)); 4052 TheStructure.Common.MICommandOpcode = MI_COMMAND_OPCODE_MI_USER_INTERRUPT; 4053 } 4054 static MI_USER_INTERRUPT sInit() { 4055 MI_USER_INTERRUPT state; 4056 state.init(); 4057 return state; 4058 } 4059 inline uint32_t &getRawData(const uint32_t index) { 4060 return TheStructure.RawData[index]; 4061 } 4062}; 4063STATIC_ASSERT(4 == sizeof(MI_USER_INTERRUPT)); 4064 4065typedef struct tagMI_FLUSH_DW { 4066 union tagTheStructure { 4067 struct tagCommon { 4068 // DWORD 0 4069 uint32_t DwordLength : BITFIELD_RANGE(0, 5); 4070 uint32_t Reserved_6 : BITFIELD_RANGE(6, 7); 4071 uint32_t NotifyEnable : BITFIELD_RANGE(8, 8); 4072 uint32_t FlushLlc : BITFIELD_RANGE(9, 9); 4073 uint32_t Reserved_10 : BITFIELD_RANGE(10, 13); 4074 uint32_t PostSyncOperation : BITFIELD_RANGE(14, 15); 4075 uint32_t Reserved_16 : BITFIELD_RANGE(16, 16); 4076 uint32_t Reserved_17 : BITFIELD_RANGE(17, 17); 4077 uint32_t TlbInvalidate : BITFIELD_RANGE(18, 18); 4078 uint32_t Reserved_19 : BITFIELD_RANGE(19, 20); 4079 uint32_t StoreDataIndex : BITFIELD_RANGE(21, 21); 4080 uint32_t Reserved_22 : BITFIELD_RANGE(22, 22); 4081 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 4082 uint32_t CommandType : BITFIELD_RANGE(29, 31); 4083 // DWORD 1 4084 uint64_t Reserved_32 : BITFIELD_RANGE(0, 1); 4085 uint64_t DestinationAddressType : BITFIELD_RANGE(2, 2); 4086 uint64_t DestinationAddress : BITFIELD_RANGE(3, 47); 4087 uint64_t Reserved_80 : BITFIELD_RANGE(48, 63); 4088 // DWORD 3 4089 uint64_t ImmediateData; 4090 } Common; 4091 uint32_t RawData[5]; 4092 } TheStructure; 4093 typedef enum tagDWORD_LENGTH { 4094 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x3, 4095 } DWORD_LENGTH; 4096 typedef enum tagPOST_SYNC_OPERATION { 4097 POST_SYNC_OPERATION_NO_WRITE = 0x0, 4098 POST_SYNC_OPERATION_WRITE_IMMEDIATE_DATA_QWORD = 0x1, 4099 POST_SYNC_OPERATION_WRITE_TIMESTAMP_REGISTER = 0x3, 4100 } POST_SYNC_OPERATION; 4101 typedef enum tagMI_COMMAND_OPCODE { 4102 MI_COMMAND_OPCODE_MI_FLUSH_DW = 0x26, 4103 } MI_COMMAND_OPCODE; 4104 typedef enum tagCOMMAND_TYPE { 4105 COMMAND_TYPE_MI_COMMAND = 0x0, 4106 } COMMAND_TYPE; 4107 typedef enum tagDESTINATION_ADDRESS_TYPE { 4108 DESTINATION_ADDRESS_TYPE_PPGTT = 0x0, 4109 DESTINATION_ADDRESS_TYPE_GGTT = 0x1, 4110 } DESTINATION_ADDRESS_TYPE; 4111 inline void init() { 4112 memset(&TheStructure, 0, sizeof(TheStructure)); 4113 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 4114 TheStructure.Common.PostSyncOperation = POST_SYNC_OPERATION_NO_WRITE; 4115 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_FLUSH_DW; 4116 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 4117 TheStructure.Common.DestinationAddressType = DESTINATION_ADDRESS_TYPE_PPGTT; 4118 } 4119 static tagMI_FLUSH_DW sInit() { 4120 MI_FLUSH_DW state; 4121 state.init(); 4122 return state; 4123 } 4124 inline uint32_t &getRawData(const uint32_t index) { 4125 UNRECOVERABLE_IF(index >= 5); 4126 return TheStructure.RawData[index]; 4127 } 4128 inline void setNotifyEnable(const bool value) { 4129 TheStructure.Common.NotifyEnable = value; 4130 } 4131 inline bool getNotifyEnable() const { 4132 return TheStructure.Common.NotifyEnable; 4133 } 4134 inline void setFlushLlc(const bool value) { 4135 TheStructure.Common.FlushLlc = value; 4136 } 4137 inline bool getFlushLlc() const { 4138 return TheStructure.Common.FlushLlc; 4139 } 4140 inline void setPostSyncOperation(const POST_SYNC_OPERATION value) { 4141 TheStructure.Common.PostSyncOperation = value; 4142 } 4143 inline POST_SYNC_OPERATION getPostSyncOperation() const { 4144 return static_cast<POST_SYNC_OPERATION>(TheStructure.Common.PostSyncOperation); 4145 } 4146 inline void setTlbInvalidate(const bool value) { 4147 TheStructure.Common.TlbInvalidate = value; 4148 } 4149 inline bool getTlbInvalidate() const { 4150 return TheStructure.Common.TlbInvalidate; 4151 } 4152 inline void setStoreDataIndex(const bool value) { 4153 TheStructure.Common.StoreDataIndex = value; 4154 } 4155 inline bool getStoreDataIndex() const { 4156 return TheStructure.Common.StoreDataIndex; 4157 } 4158 inline void setDestinationAddressType(const DESTINATION_ADDRESS_TYPE value) { 4159 TheStructure.Common.DestinationAddressType = value; 4160 } 4161 inline DESTINATION_ADDRESS_TYPE getDestinationAddressType() const { 4162 return static_cast<DESTINATION_ADDRESS_TYPE>(TheStructure.Common.DestinationAddressType); 4163 } 4164 typedef enum tagDESTINATIONADDRESS { 4165 DESTINATIONADDRESS_BIT_SHIFT = 0x3, 4166 DESTINATIONADDRESS_ALIGN_SIZE = 0x8, 4167 } DESTINATIONADDRESS; 4168 inline void setDestinationAddress(const uint64_t value) { 4169 UNRECOVERABLE_IF(value > 0xfffffffffff8L); 4170 TheStructure.Common.DestinationAddress = value >> DESTINATIONADDRESS_BIT_SHIFT; 4171 } 4172 inline uint64_t getDestinationAddress() const { 4173 return TheStructure.Common.DestinationAddress << DESTINATIONADDRESS_BIT_SHIFT; 4174 } 4175 inline void setImmediateData(const uint64_t value) { 4176 TheStructure.Common.ImmediateData = value; 4177 } 4178 inline uint64_t getImmediateData() const { 4179 return TheStructure.Common.ImmediateData; 4180 } 4181} MI_FLUSH_DW; 4182STATIC_ASSERT(20 == sizeof(MI_FLUSH_DW)); 4183 4184typedef struct tagXY_SRC_COPY_BLT { 4185 union tagTheStructure { 4186 struct tagCommon { 4187 // DWORD 0 4188 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 4189 uint32_t Reserved_8 : BITFIELD_RANGE(8, 10); 4190 uint32_t DestTilingEnable : BITFIELD_RANGE(11, 11); 4191 uint32_t Reserved_12 : BITFIELD_RANGE(12, 14); 4192 uint32_t SrcTilingEnable : BITFIELD_RANGE(15, 15); 4193 uint32_t Reserved_16 : BITFIELD_RANGE(16, 19); 4194 uint32_t _32BppByteMask : BITFIELD_RANGE(20, 21); 4195 uint32_t InstructionTarget_Opcode : BITFIELD_RANGE(22, 28); 4196 uint32_t Client : BITFIELD_RANGE(29, 31); 4197 // DWORD 1 4198 uint32_t DestinationPitch : BITFIELD_RANGE(0, 15); 4199 uint32_t RasterOperation : BITFIELD_RANGE(16, 23); 4200 uint32_t ColorDepth : BITFIELD_RANGE(24, 25); 4201 uint32_t Reserved_58 : BITFIELD_RANGE(26, 29); 4202 uint32_t ClippingEnabled : BITFIELD_RANGE(30, 30); 4203 uint32_t Reserved_63 : BITFIELD_RANGE(31, 31); 4204 // DWORD 2 4205 uint32_t DestinationX1Coordinate_Left : BITFIELD_RANGE(0, 15); 4206 uint32_t DestinationY1Coordinate_Top : BITFIELD_RANGE(16, 31); 4207 // DWORD 3 4208 uint32_t DestinationX2Coordinate_Right : BITFIELD_RANGE(0, 15); 4209 uint32_t DestinationY2Coordinate_Bottom : BITFIELD_RANGE(16, 31); 4210 // DWORD 4 4211 uint64_t DestinationBaseAddress; 4212 // DWORD 6 4213 uint32_t SourceX1Coordinate_Left : BITFIELD_RANGE(0, 15); 4214 uint32_t SourceY1Coordinate_Top : BITFIELD_RANGE(16, 31); 4215 // DWORD 7 4216 uint32_t SourcePitch : BITFIELD_RANGE(0, 15); 4217 uint32_t Reserved_240 : BITFIELD_RANGE(16, 31); 4218 // DWORD 8 4219 uint64_t SourceBaseAddress; 4220 } Common; 4221 uint32_t RawData[10]; 4222 } TheStructure; 4223 typedef enum tagDEST_TILING_ENABLE { 4224 DEST_TILING_ENABLE_TILING_DISABLED_LINEAR_BLIT = 0x0, 4225 DEST_TILING_ENABLE_TILING_ENABLED = 0x1, 4226 } DEST_TILING_ENABLE; 4227 typedef enum tagSRC_TILING_ENABLE { 4228 SRC_TILING_ENABLE_TILING_DISABLED_LINEAR = 0x0, 4229 SRC_TILING_ENABLE_TILING_ENABLED = 0x1, 4230 } SRC_TILING_ENABLE; 4231 typedef enum tag_32BPP_BYTE_MASK { 4232 _32BPP_BYTE_MASK_WRITE_RGB_CHANNEL = 0x1, 4233 _32BPP_BYTE_MASK_WRITE_ALPHA_CHANNEL = 0x2, 4234 } _32BPP_BYTE_MASK; 4235 typedef enum tagCLIENT { 4236 CLIENT_2D_PROCESSOR = 0x2, 4237 } CLIENT; 4238 typedef enum tagCOLOR_DEPTH { 4239 COLOR_DEPTH_8_BIT_COLOR = 0x0, 4240 COLOR_DEPTH_16_BIT_COLOR565 = 0x1, 4241 COLOR_DEPTH_16_BIT_COLOR1555 = 0x2, 4242 COLOR_DEPTH_32_BIT_COLOR = 0x3, 4243 } COLOR_DEPTH; 4244 typedef enum tagCLIPPING_ENABLED { 4245 CLIPPING_ENABLED_DISABLED = 0x0, 4246 CLIPPING_ENABLED_ENABLED = 0x1, 4247 } CLIPPING_ENABLED; 4248 typedef enum tagINSTRUCTIONTARGET_OPCODE { 4249 INSTRUCTIONTARGET_OPCODE_OPCODE = 0x53, 4250 } INSTRUCTIONTARGET_OPCODE; 4251 typedef enum tagDWORD_LENGTH { 4252 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x8, 4253 } DWORD_LENGTH; 4254 inline void init() { 4255 memset(&TheStructure, 0, sizeof(TheStructure)); 4256 TheStructure.Common.DestTilingEnable = DEST_TILING_ENABLE_TILING_DISABLED_LINEAR_BLIT; 4257 TheStructure.Common.SrcTilingEnable = SRC_TILING_ENABLE_TILING_DISABLED_LINEAR; 4258 TheStructure.Common.Client = CLIENT_2D_PROCESSOR; 4259 TheStructure.Common.ColorDepth = COLOR_DEPTH_8_BIT_COLOR; 4260 TheStructure.Common.ClippingEnabled = CLIPPING_ENABLED_DISABLED; 4261 TheStructure.Common.InstructionTarget_Opcode = INSTRUCTIONTARGET_OPCODE_OPCODE; 4262 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 4263 TheStructure.Common.RasterOperation = 0xCC; 4264 } 4265 static tagXY_SRC_COPY_BLT sInit() { 4266 XY_SRC_COPY_BLT state; 4267 state.init(); 4268 return state; 4269 } 4270 inline uint32_t &getRawData(const uint32_t index) { 4271 UNRECOVERABLE_IF(index >= 10); 4272 return TheStructure.RawData[index]; 4273 } 4274 inline void setDestTilingEnable(const DEST_TILING_ENABLE value) { 4275 TheStructure.Common.DestTilingEnable = value; 4276 } 4277 inline DEST_TILING_ENABLE getDestTilingEnable() const { 4278 return static_cast<DEST_TILING_ENABLE>(TheStructure.Common.DestTilingEnable); 4279 } 4280 inline void setSrcTilingEnable(const SRC_TILING_ENABLE value) { 4281 TheStructure.Common.SrcTilingEnable = value; 4282 } 4283 inline SRC_TILING_ENABLE getSrcTilingEnable() const { 4284 return static_cast<SRC_TILING_ENABLE>(TheStructure.Common.SrcTilingEnable); 4285 } 4286 inline void set32BppByteMask(const _32BPP_BYTE_MASK value) { 4287 TheStructure.Common._32BppByteMask = value; 4288 } 4289 inline _32BPP_BYTE_MASK get32BppByteMask() const { 4290 return static_cast<_32BPP_BYTE_MASK>(TheStructure.Common._32BppByteMask); 4291 } 4292 inline void setInstructionTargetOpcode(const uint32_t value) { 4293 UNRECOVERABLE_IF(value > 0x1fc00000); 4294 TheStructure.Common.InstructionTarget_Opcode = value; 4295 } 4296 inline uint32_t getInstructionTargetOpcode() const { 4297 return TheStructure.Common.InstructionTarget_Opcode; 4298 } 4299 inline void setClient(const CLIENT value) { 4300 TheStructure.Common.Client = value; 4301 } 4302 inline CLIENT getClient() const { 4303 return static_cast<CLIENT>(TheStructure.Common.Client); 4304 } 4305 inline void setDestinationPitch(const uint32_t value) { 4306 UNRECOVERABLE_IF(value > 0xffff); 4307 TheStructure.Common.DestinationPitch = value; 4308 } 4309 inline uint32_t getDestinationPitch() const { 4310 return TheStructure.Common.DestinationPitch; 4311 } 4312 inline void setRasterOperation(const uint32_t value) { 4313 UNRECOVERABLE_IF(value > 0xff0000); 4314 TheStructure.Common.RasterOperation = value; 4315 } 4316 inline uint32_t getRasterOperation() const { 4317 return TheStructure.Common.RasterOperation; 4318 } 4319 inline void setColorDepth(const COLOR_DEPTH value) { 4320 TheStructure.Common.ColorDepth = value; 4321 } 4322 inline COLOR_DEPTH getColorDepth() const { 4323 return static_cast<COLOR_DEPTH>(TheStructure.Common.ColorDepth); 4324 } 4325 inline void setClippingEnabled(const CLIPPING_ENABLED value) { 4326 TheStructure.Common.ClippingEnabled = value; 4327 } 4328 inline CLIPPING_ENABLED getClippingEnabled() const { 4329 return static_cast<CLIPPING_ENABLED>(TheStructure.Common.ClippingEnabled); 4330 } 4331 inline void setDestinationX1CoordinateLeft(const uint32_t value) { 4332 UNRECOVERABLE_IF(value > 0xffff); 4333 TheStructure.Common.DestinationX1Coordinate_Left = value; 4334 } 4335 inline uint32_t getDestinationX1CoordinateLeft() const { 4336 return TheStructure.Common.DestinationX1Coordinate_Left; 4337 } 4338 inline void setDestinationY1CoordinateTop(const uint32_t value) { 4339 UNRECOVERABLE_IF(value > 0xffff0000); 4340 TheStructure.Common.DestinationY1Coordinate_Top = value; 4341 } 4342 inline uint32_t getDestinationY1CoordinateTop() const { 4343 return TheStructure.Common.DestinationY1Coordinate_Top; 4344 } 4345 inline void setDestinationX2CoordinateRight(const uint32_t value) { 4346 UNRECOVERABLE_IF(value > 0xffff); 4347 TheStructure.Common.DestinationX2Coordinate_Right = value; 4348 } 4349 inline uint32_t getDestinationX2CoordinateRight() const { 4350 return TheStructure.Common.DestinationX2Coordinate_Right; 4351 } 4352 inline void setDestinationY2CoordinateBottom(const uint32_t value) { 4353 UNRECOVERABLE_IF(value > 0xffff0000); 4354 TheStructure.Common.DestinationY2Coordinate_Bottom = value; 4355 } 4356 inline uint32_t getDestinationY2CoordinateBottom() const { 4357 return TheStructure.Common.DestinationY2Coordinate_Bottom; 4358 } 4359 inline void setDestinationBaseAddress(const uint64_t value) { 4360 TheStructure.Common.DestinationBaseAddress = value; 4361 } 4362 inline uint64_t getDestinationBaseAddress() const { 4363 return TheStructure.Common.DestinationBaseAddress; 4364 } 4365 inline void setSourceX1CoordinateLeft(const uint32_t value) { 4366 UNRECOVERABLE_IF(value > 0xffff); 4367 TheStructure.Common.SourceX1Coordinate_Left = value; 4368 } 4369 inline uint32_t getSourceX1CoordinateLeft() const { 4370 return TheStructure.Common.SourceX1Coordinate_Left; 4371 } 4372 inline void setSourceY1CoordinateTop(const uint32_t value) { 4373 UNRECOVERABLE_IF(value > 0xffff0000); 4374 TheStructure.Common.SourceY1Coordinate_Top = value; 4375 } 4376 inline uint32_t getSourceY1CoordinateTop() const { 4377 return TheStructure.Common.SourceY1Coordinate_Top; 4378 } 4379 inline void setSourcePitch(const uint32_t value) { 4380 UNRECOVERABLE_IF(value > 0xffff); 4381 TheStructure.Common.SourcePitch = value; 4382 } 4383 inline uint32_t getSourcePitch() const { 4384 return TheStructure.Common.SourcePitch; 4385 } 4386 inline void setSourceBaseAddress(const uint64_t value) { 4387 TheStructure.Common.SourceBaseAddress = value; 4388 } 4389 inline uint64_t getSourceBaseAddress() const { 4390 return TheStructure.Common.SourceBaseAddress; 4391 } 4392} XY_SRC_COPY_BLT; 4393STATIC_ASSERT(40 == sizeof(XY_SRC_COPY_BLT)); 4394 4395typedef struct tagXY_COLOR_BLT { 4396 union tagTheStructure { 4397 struct tagCommon { 4398 // DWORD 0 4399 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 4400 uint32_t Reserved_8 : BITFIELD_RANGE(8, 10); 4401 uint32_t DestTilingEnable : BITFIELD_RANGE(11, 11); 4402 uint32_t Reserved_12 : BITFIELD_RANGE(12, 19); 4403 uint32_t _32BppByteMask : BITFIELD_RANGE(20, 21); 4404 uint32_t InstructionTarget_Opcode : BITFIELD_RANGE(22, 28); 4405 uint32_t Client : BITFIELD_RANGE(29, 31); 4406 // DWORD 1 4407 uint32_t DestinationPitch : BITFIELD_RANGE(0, 15); 4408 uint32_t RasterOperation : BITFIELD_RANGE(16, 23); 4409 uint32_t ColorDepth : BITFIELD_RANGE(24, 25); 4410 uint32_t Reserved_58 : BITFIELD_RANGE(26, 29); 4411 uint32_t ClippingEnabled : BITFIELD_RANGE(30, 30); 4412 uint32_t Reserved_63 : BITFIELD_RANGE(31, 31); 4413 // DWORD 2 4414 uint32_t DestinationX1Coordinate_Left : BITFIELD_RANGE(0, 15); 4415 uint32_t DestinationY1Coordinate_Top : BITFIELD_RANGE(16, 31); 4416 // DWORD 3 4417 uint32_t DestinationX2Coordinate_Right : BITFIELD_RANGE(0, 15); 4418 uint32_t DestinationY2Coordinate_Bottom : BITFIELD_RANGE(16, 31); 4419 // DWORD 4-5 4420 uint64_t DestinationBaseAddress; 4421 // DWORD 6 4422 uint32_t SolidPaternColor; 4423 } Common; 4424 uint32_t RawData[7]; 4425 } TheStructure; 4426 typedef enum tagDEST_TILING_ENABLE { 4427 DEST_TILING_ENABLE_TILING_DISABLED_LINEAR_BLIT = 0x0, 4428 DEST_TILING_ENABLE_TILING_ENABLED = 0x1, 4429 } DEST_TILING_ENABLE; 4430 typedef enum tag_32BPP_BYTE_MASK { 4431 _32BPP_BYTE_MASK_WRITE_RGB_CHANNEL = 0x1, 4432 _32BPP_BYTE_MASK_WRITE_ALPHA_CHANNEL = 0x2, 4433 _32BPP_BYTE_MASK_WRITE_RGBA_CHANNEL = 0x3 4434 } _32BPP_BYTE_MASK; 4435 typedef enum tagCLIENT { 4436 CLIENT_2D_PROCESSOR = 0x2, 4437 } CLIENT; 4438 typedef enum tagCOLOR_DEPTH { 4439 COLOR_DEPTH_8_BIT_COLOR = 0x0, 4440 COLOR_DEPTH_16_BIT_COLOR565 = 0x1, 4441 COLOR_DEPTH_16_BIT_COLOR1555 = 0x2, 4442 COLOR_DEPTH_32_BIT_COLOR = 0x3, 4443 } COLOR_DEPTH; 4444 typedef enum tagCLIPPING_ENABLED { 4445 CLIPPING_ENABLED_DISABLED = 0x0, 4446 CLIPPING_ENABLED_ENABLED = 0x1, 4447 } CLIPPING_ENABLED; 4448 typedef enum tagINSTRUCTIONTARGET_OPCODE { 4449 INSTRUCTIONTARGET_OPCODE_OPCODE = 0x50, 4450 } INSTRUCTIONTARGET_OPCODE; 4451 typedef enum tagDWORD_LENGTH { 4452 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x5, 4453 } DWORD_LENGTH; 4454 inline void init() { 4455 memset(&TheStructure, 0, sizeof(TheStructure)); 4456 TheStructure.Common.DestTilingEnable = DEST_TILING_ENABLE_TILING_DISABLED_LINEAR_BLIT; 4457 TheStructure.Common.Client = CLIENT_2D_PROCESSOR; 4458 TheStructure.Common.ColorDepth = COLOR_DEPTH_8_BIT_COLOR; 4459 TheStructure.Common.ClippingEnabled = CLIPPING_ENABLED_DISABLED; 4460 TheStructure.Common.InstructionTarget_Opcode = INSTRUCTIONTARGET_OPCODE_OPCODE; 4461 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 4462 TheStructure.Common.RasterOperation = 0xF0; 4463 } 4464 static tagXY_COLOR_BLT sInit() { 4465 XY_COLOR_BLT state; 4466 state.init(); 4467 return state; 4468 } 4469 inline uint32_t &getRawData(const uint32_t index) { 4470 UNRECOVERABLE_IF(index >= 10); 4471 return TheStructure.RawData[index]; 4472 } 4473 inline void setDestTilingEnable(const DEST_TILING_ENABLE value) { 4474 TheStructure.Common.DestTilingEnable = value; 4475 } 4476 inline DEST_TILING_ENABLE getDestTilingEnable() const { 4477 return static_cast<DEST_TILING_ENABLE>(TheStructure.Common.DestTilingEnable); 4478 } 4479 inline void set32BppByteMask(const _32BPP_BYTE_MASK value) { 4480 TheStructure.Common._32BppByteMask = value; 4481 } 4482 inline _32BPP_BYTE_MASK get32BppByteMask() const { 4483 return static_cast<_32BPP_BYTE_MASK>(TheStructure.Common._32BppByteMask); 4484 } 4485 inline void setInstructionTargetOpcode(const uint32_t value) { 4486 UNRECOVERABLE_IF(value > 0x1fc00000); 4487 TheStructure.Common.InstructionTarget_Opcode = value; 4488 } 4489 inline uint32_t getInstructionTargetOpcode() const { 4490 return TheStructure.Common.InstructionTarget_Opcode; 4491 } 4492 inline void setClient(const CLIENT value) { 4493 TheStructure.Common.Client = value; 4494 } 4495 inline CLIENT getClient() const { 4496 return static_cast<CLIENT>(TheStructure.Common.Client); 4497 } 4498 inline void setDestinationPitch(const uint32_t value) { 4499 UNRECOVERABLE_IF(value > 0xffff); 4500 TheStructure.Common.DestinationPitch = value; 4501 } 4502 inline uint32_t getDestinationPitch() const { 4503 return TheStructure.Common.DestinationPitch; 4504 } 4505 inline void setRasterOperation(const uint32_t value) { 4506 UNRECOVERABLE_IF(value > 0xff0000); 4507 TheStructure.Common.RasterOperation = value; 4508 } 4509 inline uint32_t getRasterOperation() const { 4510 return TheStructure.Common.RasterOperation; 4511 } 4512 inline void setColorDepth(const COLOR_DEPTH value) { 4513 TheStructure.Common.ColorDepth = value; 4514 } 4515 inline COLOR_DEPTH getColorDepth() const { 4516 return static_cast<COLOR_DEPTH>(TheStructure.Common.ColorDepth); 4517 } 4518 inline void setClippingEnabled(const CLIPPING_ENABLED value) { 4519 TheStructure.Common.ClippingEnabled = value; 4520 } 4521 inline CLIPPING_ENABLED getClippingEnabled() const { 4522 return static_cast<CLIPPING_ENABLED>(TheStructure.Common.ClippingEnabled); 4523 } 4524 inline void setDestinationX1CoordinateLeft(const uint32_t value) { 4525 UNRECOVERABLE_IF(value > 0xffff); 4526 TheStructure.Common.DestinationX1Coordinate_Left = value; 4527 } 4528 inline uint32_t getDestinationX1CoordinateLeft() const { 4529 return TheStructure.Common.DestinationX1Coordinate_Left; 4530 } 4531 inline void setDestinationY1CoordinateTop(const uint32_t value) { 4532 UNRECOVERABLE_IF(value > 0xffff0000); 4533 TheStructure.Common.DestinationY1Coordinate_Top = value; 4534 } 4535 inline uint32_t getDestinationY1CoordinateTop() const { 4536 return TheStructure.Common.DestinationY1Coordinate_Top; 4537 } 4538 inline void setDestinationX2CoordinateRight(const uint32_t value) { 4539 UNRECOVERABLE_IF(value > 0xffff); 4540 TheStructure.Common.DestinationX2Coordinate_Right = value; 4541 } 4542 inline uint32_t getDestinationX2CoordinateRight() const { 4543 return TheStructure.Common.DestinationX2Coordinate_Right; 4544 } 4545 inline void setDestinationY2CoordinateBottom(const uint32_t value) { 4546 UNRECOVERABLE_IF(value > 0xffff0000); 4547 TheStructure.Common.DestinationY2Coordinate_Bottom = value; 4548 } 4549 inline uint32_t getDestinationY2CoordinateBottom() const { 4550 return TheStructure.Common.DestinationY2Coordinate_Bottom; 4551 } 4552 inline void setDestinationBaseAddress(const uint64_t value) { 4553 TheStructure.Common.DestinationBaseAddress = value; 4554 } 4555 inline uint64_t getDestinationBaseAddress() const { 4556 return TheStructure.Common.DestinationBaseAddress; 4557 } 4558 inline void setFillColor(const uint32_t *value) { 4559 TheStructure.Common.SolidPaternColor = *value; 4560 } 4561} XY_COLOR_BLT; 4562STATIC_ASSERT(28 == sizeof(XY_COLOR_BLT)); 4563 4564typedef struct tagGRF { 4565 union tagTheStructure { 4566 float fRegs[8]; 4567 uint32_t dwRegs[8]; 4568 uint16_t wRegs[16]; 4569 uint32_t RawData[8]; 4570 } TheStructure; 4571} GRF; 4572STATIC_ASSERT(32 == sizeof(GRF)); 4573 4574typedef struct tagMI_BATCH_BUFFER_START { 4575 union tagTheStructure { 4576 struct tagCommon { 4577 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 4578 uint32_t AddressSpaceIndicator : BITFIELD_RANGE(8, 8); 4579 uint32_t Reserved_9 : BITFIELD_RANGE(9, 9); 4580 uint32_t ResourceStreamerEnable : BITFIELD_RANGE(10, 10); 4581 uint32_t Reserved_11 : BITFIELD_RANGE(11, 14); 4582 uint32_t PredicationEnable : BITFIELD_RANGE(15, 15); 4583 uint32_t Reserved_16 : BITFIELD_RANGE(16, 19); 4584 uint32_t PoshEnable : BITFIELD_RANGE(20, 20); 4585 uint32_t PoshStart : BITFIELD_RANGE(21, 21); 4586 uint32_t SecondLevelBatchBuffer : BITFIELD_RANGE(22, 22); 4587 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 4588 uint32_t CommandType : BITFIELD_RANGE(29, 31); 4589 uint64_t Reserved_32 : BITFIELD_RANGE(0, 1); 4590 uint64_t BatchBufferStartAddress_Graphicsaddress39_2 : BITFIELD_RANGE(2, 47); 4591 uint64_t BatchBufferStartAddress_Reserved : BITFIELD_RANGE(48, 63); 4592 } Common; 4593 uint32_t RawData[3]; 4594 } TheStructure; 4595 typedef enum tagDWORD_LENGTH { 4596 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x1, 4597 } DWORD_LENGTH; 4598 typedef enum tagADDRESS_SPACE_INDICATOR { 4599 ADDRESS_SPACE_INDICATOR_GGTT = 0x0, 4600 ADDRESS_SPACE_INDICATOR_PPGTT = 0x1, 4601 } ADDRESS_SPACE_INDICATOR; 4602 typedef enum tagSECOND_LEVEL_BATCH_BUFFER { 4603 SECOND_LEVEL_BATCH_BUFFER_FIRST_LEVEL_BATCH = 0x0, 4604 SECOND_LEVEL_BATCH_BUFFER_SECOND_LEVEL_BATCH = 0x1, 4605 } SECOND_LEVEL_BATCH_BUFFER; 4606 typedef enum tagMI_COMMAND_OPCODE { 4607 MI_COMMAND_OPCODE_MI_BATCH_BUFFER_START = 0x31, 4608 } MI_COMMAND_OPCODE; 4609 typedef enum tagCOMMAND_TYPE { 4610 COMMAND_TYPE_MI_COMMAND = 0x0, 4611 } COMMAND_TYPE; 4612 inline void init() { 4613 memset(&TheStructure, 0, sizeof(TheStructure)); 4614 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 4615 TheStructure.Common.AddressSpaceIndicator = ADDRESS_SPACE_INDICATOR_GGTT; 4616 TheStructure.Common.SecondLevelBatchBuffer = SECOND_LEVEL_BATCH_BUFFER_FIRST_LEVEL_BATCH; 4617 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_BATCH_BUFFER_START; 4618 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 4619 } 4620 static tagMI_BATCH_BUFFER_START sInit() { 4621 MI_BATCH_BUFFER_START state; 4622 state.init(); 4623 return state; 4624 } 4625 inline uint32_t &getRawData(const uint32_t index) { 4626 DEBUG_BREAK_IF(index >= 3); 4627 return TheStructure.RawData[index]; 4628 } 4629 inline void setAddressSpaceIndicator(const ADDRESS_SPACE_INDICATOR value) { 4630 TheStructure.Common.AddressSpaceIndicator = value; 4631 } 4632 inline ADDRESS_SPACE_INDICATOR getAddressSpaceIndicator() const { 4633 return static_cast<ADDRESS_SPACE_INDICATOR>(TheStructure.Common.AddressSpaceIndicator); 4634 } 4635 inline void setResourceStreamerEnable(const bool value) { 4636 TheStructure.Common.ResourceStreamerEnable = value; 4637 } 4638 inline bool getResourceStreamerEnable() const { 4639 return (TheStructure.Common.ResourceStreamerEnable); 4640 } 4641 inline void setPredicationEnable(const uint32_t value) { 4642 TheStructure.Common.PredicationEnable = value; 4643 } 4644 inline uint32_t getPredicationEnable() const { 4645 return (TheStructure.Common.PredicationEnable); 4646 } 4647 inline void setPoshEnable(const uint32_t value) { 4648 TheStructure.Common.PoshEnable = value; 4649 } 4650 inline uint32_t getPoshEnable() const { 4651 return (TheStructure.Common.PoshEnable); 4652 } 4653 inline void setPoshStart(const uint32_t value) { 4654 TheStructure.Common.PoshStart = value; 4655 } 4656 inline uint32_t getPoshStart() const { 4657 return (TheStructure.Common.PoshStart); 4658 } 4659 inline void setSecondLevelBatchBuffer(const SECOND_LEVEL_BATCH_BUFFER value) { 4660 TheStructure.Common.SecondLevelBatchBuffer = value; 4661 } 4662 inline SECOND_LEVEL_BATCH_BUFFER getSecondLevelBatchBuffer() const { 4663 return static_cast<SECOND_LEVEL_BATCH_BUFFER>(TheStructure.Common.SecondLevelBatchBuffer); 4664 } 4665 typedef enum tagBATCHBUFFERSTARTADDRESS_GRAPHICSADDRESS39_2 { 4666 BATCHBUFFERSTARTADDRESS_GRAPHICSADDRESS39_2_BIT_SHIFT = 0x2, 4667 BATCHBUFFERSTARTADDRESS_GRAPHICSADDRESS39_2_ALIGN_SIZE = 0x4, 4668 } BATCHBUFFERSTARTADDRESS_GRAPHICSADDRESS39_2; 4669 inline void setBatchBufferStartAddress(const uint64_t value) { 4670 TheStructure.Common.BatchBufferStartAddress_Graphicsaddress39_2 = value >> BATCHBUFFERSTARTADDRESS_GRAPHICSADDRESS39_2_BIT_SHIFT; 4671 } 4672 inline uint64_t getBatchBufferStartAddress() const { 4673 return (TheStructure.Common.BatchBufferStartAddress_Graphicsaddress39_2 << BATCHBUFFERSTARTADDRESS_GRAPHICSADDRESS39_2_BIT_SHIFT); 4674 } 4675 typedef enum tagBATCHBUFFERSTARTADDRESS_RESERVED { 4676 BATCHBUFFERSTARTADDRESS_RESERVED_BIT_SHIFT = 0x2, 4677 BATCHBUFFERSTARTADDRESS_RESERVED_ALIGN_SIZE = 0x4, 4678 } BATCHBUFFERSTARTADDRESS_RESERVED; 4679 inline void setBatchBufferStartAddressReserved(const uint64_t value) { 4680 TheStructure.Common.BatchBufferStartAddress_Reserved = value >> BATCHBUFFERSTARTADDRESS_RESERVED_BIT_SHIFT; 4681 } 4682 inline uint64_t getBatchBufferStartAddressReserved() const { 4683 return (TheStructure.Common.BatchBufferStartAddress_Reserved << BATCHBUFFERSTARTADDRESS_RESERVED_BIT_SHIFT); 4684 } 4685} MI_BATCH_BUFFER_START; 4686STATIC_ASSERT(12 == sizeof(MI_BATCH_BUFFER_START)); 4687 4688typedef struct tagMEDIA_SURFACE_STATE { 4689 union tagTheStructure { 4690 struct tagCommon { 4691 uint32_t Reserved_0 : BITFIELD_RANGE(0, 29); 4692 uint32_t Rotation : BITFIELD_RANGE(30, 31); 4693 uint32_t Cr_VCb_UPixelOffsetVDirection : BITFIELD_RANGE(0, 1); 4694 uint32_t PictureStructure : BITFIELD_RANGE(2, 3); 4695 uint32_t Width : BITFIELD_RANGE(4, 17); 4696 uint32_t Height : BITFIELD_RANGE(18, 31); 4697 uint32_t TileMode : BITFIELD_RANGE(0, 1); 4698 uint32_t HalfPitchForChroma : BITFIELD_RANGE(2, 2); 4699 uint32_t SurfacePitch : BITFIELD_RANGE(3, 20); 4700 uint32_t AddressControl : BITFIELD_RANGE(21, 21); 4701 uint32_t MemoryCompressionEnable : BITFIELD_RANGE(22, 22); 4702 uint32_t MemoryCompressionMode : BITFIELD_RANGE(23, 23); 4703 uint32_t Cr_VCb_UPixelOffsetVDirectionMsb : BITFIELD_RANGE(24, 24); 4704 uint32_t Cr_VCb_UPixelOffsetUDirection : BITFIELD_RANGE(25, 25); 4705 uint32_t InterleaveChroma : BITFIELD_RANGE(26, 26); 4706 uint32_t SurfaceFormat : BITFIELD_RANGE(27, 31); 4707 uint32_t YOffsetForU_Cb : BITFIELD_RANGE(0, 13); 4708 uint32_t Reserved_110 : BITFIELD_RANGE(14, 15); 4709 uint32_t XOffsetForU_Cb : BITFIELD_RANGE(16, 29); 4710 uint32_t Reserved_126 : BITFIELD_RANGE(30, 31); 4711 uint32_t Reserved_128; 4712 uint32_t SurfaceMemoryObjectControlState_Reserved : BITFIELD_RANGE(0, 0); 4713 uint32_t SurfaceMemoryObjectControlState_IndexToMocsTables : BITFIELD_RANGE(1, 6); 4714 uint32_t Reserved_167 : BITFIELD_RANGE(7, 17); 4715 uint32_t TiledResourceMode : BITFIELD_RANGE(18, 19); 4716 uint32_t Depth : BITFIELD_RANGE(20, 23); 4717 uint32_t Reserved_184 : BITFIELD_RANGE(24, 29); 4718 uint32_t VerticalLineStrideOffset : BITFIELD_RANGE(30, 30); 4719 uint32_t VerticalLineStride : BITFIELD_RANGE(31, 31); 4720 uint32_t SurfaceBaseAddressLow; 4721 uint32_t SurfaceBaseAddressHigh : BITFIELD_RANGE(0, 15); 4722 uint32_t Reserved_240 : BITFIELD_RANGE(16, 31); 4723 } Common; 4724 struct tagSurfaceFormatIsNotOneOfPlanarFormats { 4725 uint32_t Reserved_0; 4726 uint32_t Reserved_32; 4727 uint32_t Reserved_64; 4728 uint32_t Reserved_96; 4729 uint32_t Reserved_128; 4730 uint32_t Reserved_160; 4731 uint32_t Reserved_192; 4732 uint32_t Reserved_224; 4733 } SurfaceFormatIsNotOneOfPlanarFormats; 4734 struct tagSurfaceFormatIsOneOfPlanarFormats { 4735 uint32_t Reserved_0 : BITFIELD_RANGE(0, 15); 4736 uint32_t YOffset : BITFIELD_RANGE(16, 19); 4737 uint32_t XOffset : BITFIELD_RANGE(20, 26); 4738 uint32_t Reserved_27 : BITFIELD_RANGE(27, 31); 4739 uint32_t Reserved_32; 4740 uint32_t Reserved_64; 4741 uint32_t Reserved_96; 4742 uint32_t Reserved_128; 4743 uint32_t Reserved_160; 4744 uint32_t Reserved_192; 4745 uint32_t Reserved_224; 4746 } SurfaceFormatIsOneOfPlanarFormats; 4747 struct tag_SurfaceFormatIsOneOfPlanarAnd_InterleaveChromaIs0 { 4748 uint32_t Reserved_0; 4749 uint32_t Reserved_32; 4750 uint32_t Reserved_64; 4751 uint32_t Reserved_96; 4752 uint32_t YOffsetForV_Cr : BITFIELD_RANGE(0, 14); 4753 uint32_t Reserved_143 : BITFIELD_RANGE(15, 15); 4754 uint32_t XOffsetForV_Cr : BITFIELD_RANGE(16, 29); 4755 uint32_t Reserved_158 : BITFIELD_RANGE(30, 31); 4756 uint32_t Reserved_160; 4757 uint32_t Reserved_192; 4758 uint32_t Reserved_224; 4759 } _SurfaceFormatIsOneOfPlanarAnd_InterleaveChromaIs0; 4760 uint32_t RawData[8]; 4761 } TheStructure; 4762 typedef enum tagROTATION { 4763 ROTATION_NO_ROTATION_OR_0_DEGREE = 0x0, 4764 ROTATION_90_DEGREE_ROTATION = 0x1, 4765 ROTATION_180_DEGREE_ROTATION = 0x2, 4766 ROTATION_270_DEGREE_ROTATION = 0x3, 4767 } ROTATION; 4768 typedef enum tagPICTURE_STRUCTURE { 4769 PICTURE_STRUCTURE_FRAME_PICTURE = 0x0, 4770 PICTURE_STRUCTURE_TOP_FIELD_PICTURE = 0x1, 4771 PICTURE_STRUCTURE_BOTTOM_FIELD_PICTURE = 0x2, 4772 PICTURE_STRUCTURE_INVALID_NOT_ALLOWED = 0x3, 4773 } PICTURE_STRUCTURE; 4774 typedef enum tagTILE_MODE { 4775 TILE_MODE_TILEMODE_LINEAR = 0x0, 4776 TILE_MODE_TILEMODE_XMAJOR = 0x2, 4777 TILE_MODE_TILEMODE_YMAJOR = 0x3, 4778 } TILE_MODE; 4779 typedef enum tagADDRESS_CONTROL { 4780 ADDRESS_CONTROL_CLAMP = 0x0, 4781 ADDRESS_CONTROL_MIRROR = 0x1, 4782 } ADDRESS_CONTROL; 4783 typedef enum tagMEMORY_COMPRESSION_MODE { 4784 MEMORY_COMPRESSION_MODE_HORIZONTAL_COMPRESSION_MODE = 0x0, 4785 MEMORY_COMPRESSION_MODE_VERTICAL_COMPRESSION_MODE = 0x1, 4786 } MEMORY_COMPRESSION_MODE; 4787 typedef enum tagSURFACE_FORMAT { 4788 SURFACE_FORMAT_YCRCB_NORMAL = 0x0, 4789 SURFACE_FORMAT_YCRCB_SWAPUVY = 0x1, 4790 SURFACE_FORMAT_YCRCB_SWAPUV = 0x2, 4791 SURFACE_FORMAT_YCRCB_SWAPY = 0x3, 4792 SURFACE_FORMAT_PLANAR_420_8 = 0x4, 4793 SURFACE_FORMAT_Y8_UNORM_VA = 0x5, 4794 SURFACE_FORMAT_Y16_SNORM = 0x6, 4795 SURFACE_FORMAT_Y16_UNORM_VA = 0x7, 4796 SURFACE_FORMAT_R10G10B10A2_UNORM = 0x8, 4797 SURFACE_FORMAT_R8G8B8A8_UNORM = 0x9, 4798 SURFACE_FORMAT_R8B8_UNORM_CRCB = 0xa, 4799 SURFACE_FORMAT_R8_UNORM_CR_CB = 0xb, 4800 SURFACE_FORMAT_Y8_UNORM = 0xc, 4801 SURFACE_FORMAT_A8Y8U8V8_UNORM = 0xd, 4802 SURFACE_FORMAT_B8G8R8A8_UNORM = 0xe, 4803 SURFACE_FORMAT_R16G16B16A16 = 0xf, 4804 SURFACE_FORMAT_Y1_UNORM = 0x10, 4805 SURFACE_FORMAT_Y32_UNORM = 0x11, 4806 SURFACE_FORMAT_PLANAR_422_8 = 0x12, 4807 SURFACE_FORMAT_FM_STRBUF_Y1 = 0x13, 4808 SURFACE_FORMAT_FM_STRBUF_Y8 = 0x14, 4809 SURFACE_FORMAT_FM_STRBUF_Y16 = 0x15, 4810 SURFACE_FORMAT_FM_STRBUF_Y32 = 0x16, 4811 SURFACE_FORMAT_PLANAR_420_16 = 0x17, 4812 SURFACE_FORMAT_R16B16_UNORM_CRCB = 0x18, 4813 SURFACE_FORMAT_R16_UNORM_CR_CB = 0x19, 4814 SURFACE_FORMAT_Y16_UNORM = 0x1a, 4815 } SURFACE_FORMAT; 4816 typedef enum tagSURFACE_MEMORY_OBJECT_CONTROL_STATE { 4817 SURFACE_MEMORY_OBJECT_CONTROL_STATE_DEFAULTVAUEDESC = 0x0, 4818 } SURFACE_MEMORY_OBJECT_CONTROL_STATE; 4819 typedef enum tagTILED_RESOURCE_MODE { 4820 TILED_RESOURCE_MODE_TRMODE_NONE = 0x0, 4821 TILED_RESOURCE_MODE_TRMODE_TILEYF = 0x1, 4822 TILED_RESOURCE_MODE_TRMODE_TILEYS = 0x2, 4823 } TILED_RESOURCE_MODE; 4824 typedef enum tagPATCH_CONSTANTS { 4825 SURFACEBASEADDRESS_BYTEOFFSET = 0x18, 4826 SURFACEBASEADDRESS_INDEX = 0x6, 4827 SURFACEBASEADDRESSHIGH_BYTEOFFSET = 0x1c, 4828 SURFACEBASEADDRESSHIGH_INDEX = 0x7, 4829 } PATCH_CONSTANTS; 4830 inline void init() { 4831 memset(&TheStructure, 0, sizeof(TheStructure)); 4832 TheStructure.Common.Rotation = ROTATION_NO_ROTATION_OR_0_DEGREE; 4833 TheStructure.Common.PictureStructure = PICTURE_STRUCTURE_FRAME_PICTURE; 4834 TheStructure.Common.TileMode = TILE_MODE_TILEMODE_LINEAR; 4835 TheStructure.Common.AddressControl = ADDRESS_CONTROL_CLAMP; 4836 TheStructure.Common.MemoryCompressionMode = MEMORY_COMPRESSION_MODE_HORIZONTAL_COMPRESSION_MODE; 4837 TheStructure.Common.SurfaceFormat = SURFACE_FORMAT_YCRCB_NORMAL; 4838 TheStructure.Common.TiledResourceMode = TILED_RESOURCE_MODE_TRMODE_NONE; 4839 } 4840 static tagMEDIA_SURFACE_STATE sInit() { 4841 MEDIA_SURFACE_STATE state; 4842 state.init(); 4843 return state; 4844 } 4845 inline uint32_t &getRawData(const uint32_t index) { 4846 DEBUG_BREAK_IF(index >= 8); 4847 return TheStructure.RawData[index]; 4848 } 4849 inline void setRotation(const ROTATION value) { 4850 TheStructure.Common.Rotation = value; 4851 } 4852 inline ROTATION getRotation() const { 4853 return static_cast<ROTATION>(TheStructure.Common.Rotation); 4854 } 4855 inline void setCrVCbUPixelOffsetVDirection(const uint32_t value) { 4856 TheStructure.Common.Cr_VCb_UPixelOffsetVDirection = value; 4857 } 4858 inline uint32_t getCrVCbUPixelOffsetVDirection() const { 4859 return (TheStructure.Common.Cr_VCb_UPixelOffsetVDirection); 4860 } 4861 inline void setPictureStructure(const PICTURE_STRUCTURE value) { 4862 TheStructure.Common.PictureStructure = value; 4863 } 4864 inline PICTURE_STRUCTURE getPictureStructure() const { 4865 return static_cast<PICTURE_STRUCTURE>(TheStructure.Common.PictureStructure); 4866 } 4867 inline void setWidth(const uint32_t value) { 4868 TheStructure.Common.Width = value - 1; 4869 } 4870 inline uint32_t getWidth() const { 4871 return (TheStructure.Common.Width + 1); 4872 } 4873 inline void setHeight(const uint32_t value) { 4874 TheStructure.Common.Height = value - 1; 4875 } 4876 inline uint32_t getHeight() const { 4877 return (TheStructure.Common.Height + 1); 4878 } 4879 inline void setTileMode(const TILE_MODE value) { 4880 TheStructure.Common.TileMode = value; 4881 } 4882 inline TILE_MODE getTileMode() const { 4883 return static_cast<TILE_MODE>(TheStructure.Common.TileMode); 4884 } 4885 inline void setHalfPitchForChroma(const bool value) { 4886 TheStructure.Common.HalfPitchForChroma = value; 4887 } 4888 inline bool getHalfPitchForChroma() const { 4889 return (TheStructure.Common.HalfPitchForChroma); 4890 } 4891 inline void setSurfacePitch(const uint32_t value) { 4892 TheStructure.Common.SurfacePitch = value - 1; 4893 } 4894 inline uint32_t getSurfacePitch() const { 4895 return (TheStructure.Common.SurfacePitch + 1); 4896 } 4897 inline void setAddressControl(const ADDRESS_CONTROL value) { 4898 TheStructure.Common.AddressControl = value; 4899 } 4900 inline ADDRESS_CONTROL getAddressControl() const { 4901 return static_cast<ADDRESS_CONTROL>(TheStructure.Common.AddressControl); 4902 } 4903 inline void setMemoryCompressionEnable(const bool value) { 4904 TheStructure.Common.MemoryCompressionEnable = value; 4905 } 4906 inline bool getMemoryCompressionEnable() const { 4907 return (TheStructure.Common.MemoryCompressionEnable); 4908 } 4909 inline void setMemoryCompressionMode(const MEMORY_COMPRESSION_MODE value) { 4910 TheStructure.Common.MemoryCompressionMode = value; 4911 } 4912 inline MEMORY_COMPRESSION_MODE getMemoryCompressionMode() const { 4913 return static_cast<MEMORY_COMPRESSION_MODE>(TheStructure.Common.MemoryCompressionMode); 4914 } 4915 inline void setCrVCbUPixelOffsetVDirectionMsb(const uint32_t value) { 4916 TheStructure.Common.Cr_VCb_UPixelOffsetVDirectionMsb = value; 4917 } 4918 inline uint32_t getCrVCbUPixelOffsetVDirectionMsb() const { 4919 return (TheStructure.Common.Cr_VCb_UPixelOffsetVDirectionMsb); 4920 } 4921 inline void setCrVCbUPixelOffsetUDirection(const uint32_t value) { 4922 TheStructure.Common.Cr_VCb_UPixelOffsetUDirection = value; 4923 } 4924 inline uint32_t getCrVCbUPixelOffsetUDirection() const { 4925 return (TheStructure.Common.Cr_VCb_UPixelOffsetUDirection); 4926 } 4927 inline void setInterleaveChroma(const bool value) { 4928 TheStructure.Common.InterleaveChroma = value; 4929 } 4930 inline bool getInterleaveChroma() const { 4931 return (TheStructure.Common.InterleaveChroma); 4932 } 4933 inline void setSurfaceFormat(const SURFACE_FORMAT value) { 4934 TheStructure.Common.SurfaceFormat = value; 4935 } 4936 inline SURFACE_FORMAT getSurfaceFormat() const { 4937 return static_cast<SURFACE_FORMAT>(TheStructure.Common.SurfaceFormat); 4938 } 4939 inline void setYOffsetForUCb(const uint32_t value) { 4940 TheStructure.Common.YOffsetForU_Cb = value; 4941 } 4942 inline uint32_t getYOffsetForUCb() const { 4943 return (TheStructure.Common.YOffsetForU_Cb); 4944 } 4945 inline void setXOffsetForUCb(const uint32_t value) { 4946 TheStructure.Common.XOffsetForU_Cb = value; 4947 } 4948 inline uint32_t getXOffsetForUCb() const { 4949 return (TheStructure.Common.XOffsetForU_Cb); 4950 } 4951 inline void setSurfaceMemoryObjectControlStateReserved(const uint32_t value) { 4952 TheStructure.Common.SurfaceMemoryObjectControlState_Reserved = value; 4953 } 4954 inline uint32_t getSurfaceMemoryObjectControlStateReserved() const { 4955 return (TheStructure.Common.SurfaceMemoryObjectControlState_Reserved); 4956 } 4957 inline void setSurfaceMemoryObjectControlState(const uint32_t value) { 4958 TheStructure.Common.SurfaceMemoryObjectControlState_IndexToMocsTables = value >> 1; 4959 } 4960 inline uint32_t getSurfaceMemoryObjectControlState() const { 4961 return (TheStructure.Common.SurfaceMemoryObjectControlState_IndexToMocsTables << 1); 4962 } 4963 inline void setTiledResourceMode(const TILED_RESOURCE_MODE value) { 4964 TheStructure.Common.TiledResourceMode = value; 4965 } 4966 inline TILED_RESOURCE_MODE getTiledResourceMode() const { 4967 return static_cast<TILED_RESOURCE_MODE>(TheStructure.Common.TiledResourceMode); 4968 } 4969 inline void setDepth(const uint32_t value) { 4970 TheStructure.Common.Depth = value; 4971 } 4972 inline uint32_t getDepth() const { 4973 return (TheStructure.Common.Depth); 4974 } 4975 inline void setVerticalLineStrideOffset(const uint32_t value) { 4976 TheStructure.Common.VerticalLineStrideOffset = value; 4977 } 4978 inline uint32_t getVerticalLineStrideOffset() const { 4979 return (TheStructure.Common.VerticalLineStrideOffset); 4980 } 4981 inline void setVerticalLineStride(const uint32_t value) { 4982 TheStructure.Common.VerticalLineStride = value; 4983 } 4984 inline uint32_t getVerticalLineStride() const { 4985 return (TheStructure.Common.VerticalLineStride); 4986 } 4987 inline void setSurfaceBaseAddress(const uint64_t value) { 4988 TheStructure.Common.SurfaceBaseAddressLow = static_cast<uint32_t>(value & 0xffffffff); 4989 TheStructure.Common.SurfaceBaseAddressHigh = (value >> 32) & 0xffffffff; 4990 } 4991 inline uint64_t getSurfaceBaseAddress() const { 4992 return (TheStructure.Common.SurfaceBaseAddressLow | 4993 static_cast<uint64_t>(TheStructure.Common.SurfaceBaseAddressHigh) << 32); 4994 } 4995 inline void setSurfaceBaseAddressHigh(const uint32_t value) { 4996 TheStructure.Common.SurfaceBaseAddressHigh = value; 4997 } 4998 inline uint32_t getSurfaceBaseAddressHigh() const { 4999 return (TheStructure.Common.SurfaceBaseAddressHigh); 5000 } 5001 typedef enum tagYOFFSET { 5002 YOFFSET_BIT_SHIFT = 0x2, 5003 YOFFSET_ALIGN_SIZE = 0x4, 5004 } YOFFSET; 5005 inline void setYOffset(const uint32_t value) { 5006 TheStructure.SurfaceFormatIsOneOfPlanarFormats.YOffset = value >> YOFFSET_BIT_SHIFT; 5007 } 5008 inline uint32_t getYOffset() const { 5009 return (TheStructure.SurfaceFormatIsOneOfPlanarFormats.YOffset << YOFFSET_BIT_SHIFT); 5010 } 5011 typedef enum tagXOFFSET { 5012 XOFFSET_BIT_SHIFT = 0x2, 5013 XOFFSET_ALIGN_SIZE = 0x4, 5014 } XOFFSET; 5015 inline void setXOffset(const uint32_t value) { 5016 TheStructure.SurfaceFormatIsOneOfPlanarFormats.XOffset = value >> XOFFSET_BIT_SHIFT; 5017 } 5018 inline uint32_t getXOffset() const { 5019 return (TheStructure.SurfaceFormatIsOneOfPlanarFormats.XOffset << XOFFSET_BIT_SHIFT); 5020 } 5021 inline void setYOffsetForVCr(const uint32_t value) { 5022 TheStructure._SurfaceFormatIsOneOfPlanarAnd_InterleaveChromaIs0.YOffsetForV_Cr = value; 5023 } 5024 inline uint32_t getYOffsetForVCr() const { 5025 return (TheStructure._SurfaceFormatIsOneOfPlanarAnd_InterleaveChromaIs0.YOffsetForV_Cr); 5026 } 5027 inline void setXOffsetForVCr(const uint32_t value) { 5028 TheStructure._SurfaceFormatIsOneOfPlanarAnd_InterleaveChromaIs0.XOffsetForV_Cr = value; 5029 } 5030 inline uint32_t getXOffsetForVCr() const { 5031 return (TheStructure._SurfaceFormatIsOneOfPlanarAnd_InterleaveChromaIs0.XOffsetForV_Cr); 5032 } 5033} MEDIA_SURFACE_STATE; 5034STATIC_ASSERT(32 == sizeof(MEDIA_SURFACE_STATE)); 5035 5036typedef struct tagMI_MATH { 5037 union _DW0 { 5038 struct _BitField { 5039 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 5040 uint32_t Reserved : BITFIELD_RANGE(8, 22); 5041 uint32_t InstructionOpcode : BITFIELD_RANGE(23, 28); 5042 uint32_t InstructionType : BITFIELD_RANGE(29, 31); 5043 } BitField; 5044 uint32_t Value; 5045 } DW0; 5046 typedef enum tagMI_COMMAND_OPCODE { 5047 MI_COMMAND_OPCODE_MI_MATH = 0x1A, 5048 } MI_COMMAND_OPCODE; 5049 typedef enum tagCOMMAND_TYPE { 5050 COMMAND_TYPE_MI_COMMAND = 0x0, 5051 } COMMAND_TYPE; 5052} MI_MATH; 5053typedef struct tagMI_MATH_ALU_INST_INLINE { 5054 union _DW0 { 5055 struct _BitField { 5056 uint32_t Operand2 : BITFIELD_RANGE(0, 9); 5057 uint32_t Operand1 : BITFIELD_RANGE(10, 19); 5058 uint32_t ALUOpcode : BITFIELD_RANGE(20, 31); 5059 } BitField; 5060 uint32_t Value; 5061 } DW0; 5062} MI_MATH_ALU_INST_INLINE; 5063typedef struct tagMI_SEMAPHORE_WAIT { 5064 union tagTheStructure { 5065 struct tagCommon { 5066 uint32_t DwordLength : BITFIELD_RANGE(0, 7); 5067 uint32_t Reserved_8 : BITFIELD_RANGE(8, 11); 5068 uint32_t CompareOperation : BITFIELD_RANGE(12, 14); 5069 uint32_t WaitMode : BITFIELD_RANGE(15, 15); 5070 uint32_t RegisterPollMode : BITFIELD_RANGE(16, 16); 5071 uint32_t Reserved_17 : BITFIELD_RANGE(17, 21); 5072 uint32_t MemoryType : BITFIELD_RANGE(22, 22); 5073 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 5074 uint32_t CommandType : BITFIELD_RANGE(29, 31); 5075 uint32_t SemaphoreDataDword; 5076 uint64_t Reserved_64 : BITFIELD_RANGE(0, 1); 5077 uint64_t SemaphoreAddress_Graphicsaddress : BITFIELD_RANGE(2, 63); 5078 } Common; 5079 uint32_t RawData[4]; 5080 } TheStructure; 5081 typedef enum tagDWORD_LENGTH { 5082 DWORD_LENGTH_EXCLUDES_DWORD_0_1 = 0x2, 5083 } DWORD_LENGTH; 5084 typedef enum tagCOMPARE_OPERATION { 5085 COMPARE_OPERATION_SAD_GREATER_THAN_SDD = 0x0, 5086 COMPARE_OPERATION_SAD_GREATER_THAN_OR_EQUAL_SDD = 0x1, 5087 COMPARE_OPERATION_SAD_LESS_THAN_SDD = 0x2, 5088 COMPARE_OPERATION_SAD_LESS_THAN_OR_EQUAL_SDD = 0x3, 5089 COMPARE_OPERATION_SAD_EQUAL_SDD = 0x4, 5090 COMPARE_OPERATION_SAD_NOT_EQUAL_SDD = 0x5, 5091 } COMPARE_OPERATION; 5092 typedef enum tagWAIT_MODE { 5093 WAIT_MODE_SIGNAL_MODE = 0x0, 5094 WAIT_MODE_POLLING_MODE = 0x1, 5095 } WAIT_MODE; 5096 typedef enum tagREGISTER_POLL_MODE { 5097 REGISTER_POLL_MODE_MEMORY_POLL = 0x0, 5098 REGISTER_POLL_MODE_REGISTER_POLL = 0x1, 5099 } REGISTER_POLL_MODE; 5100 typedef enum tagMEMORY_TYPE { 5101 MEMORY_TYPE_PER_PROCESS_GRAPHICS_ADDRESS = 0x0, 5102 MEMORY_TYPE_GLOBAL_GRAPHICS_ADDRESS = 0x1, 5103 } MEMORY_TYPE; 5104 typedef enum tagMI_COMMAND_OPCODE { 5105 MI_COMMAND_OPCODE_MI_SEMAPHORE_WAIT = 0x1c, 5106 } MI_COMMAND_OPCODE; 5107 typedef enum tagCOMMAND_TYPE { 5108 COMMAND_TYPE_MI_COMMAND = 0x0, 5109 } COMMAND_TYPE; 5110 inline void init() { 5111 memset(&TheStructure, 0, sizeof(TheStructure)); 5112 TheStructure.Common.DwordLength = DWORD_LENGTH_EXCLUDES_DWORD_0_1; 5113 TheStructure.Common.CompareOperation = COMPARE_OPERATION_SAD_GREATER_THAN_SDD; 5114 TheStructure.Common.WaitMode = WAIT_MODE_SIGNAL_MODE; 5115 TheStructure.Common.RegisterPollMode = REGISTER_POLL_MODE_MEMORY_POLL; 5116 TheStructure.Common.MemoryType = MEMORY_TYPE_PER_PROCESS_GRAPHICS_ADDRESS; 5117 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_SEMAPHORE_WAIT; 5118 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 5119 } 5120 static tagMI_SEMAPHORE_WAIT sInit() { 5121 MI_SEMAPHORE_WAIT state; 5122 state.init(); 5123 return state; 5124 } 5125 inline uint32_t &getRawData(const uint32_t index) { 5126 DEBUG_BREAK_IF(index >= 4); 5127 return TheStructure.RawData[index]; 5128 } 5129 inline void setCompareOperation(const COMPARE_OPERATION value) { 5130 TheStructure.Common.CompareOperation = value; 5131 } 5132 inline COMPARE_OPERATION getCompareOperation() const { 5133 return static_cast<COMPARE_OPERATION>(TheStructure.Common.CompareOperation); 5134 } 5135 inline void setWaitMode(const WAIT_MODE value) { 5136 TheStructure.Common.WaitMode = value; 5137 } 5138 inline WAIT_MODE getWaitMode() const { 5139 return static_cast<WAIT_MODE>(TheStructure.Common.WaitMode); 5140 } 5141 inline void setRegisterPollMode(const REGISTER_POLL_MODE value) { 5142 TheStructure.Common.RegisterPollMode = value; 5143 } 5144 inline REGISTER_POLL_MODE getRegisterPollMode() const { 5145 return static_cast<REGISTER_POLL_MODE>(TheStructure.Common.RegisterPollMode); 5146 } 5147 inline void setMemoryType(const MEMORY_TYPE value) { 5148 TheStructure.Common.MemoryType = value; 5149 } 5150 inline MEMORY_TYPE getMemoryType() const { 5151 return static_cast<MEMORY_TYPE>(TheStructure.Common.MemoryType); 5152 } 5153 inline void setSemaphoreDataDword(const uint32_t value) { 5154 TheStructure.Common.SemaphoreDataDword = value; 5155 } 5156 inline uint32_t getSemaphoreDataDword() const { 5157 return (TheStructure.Common.SemaphoreDataDword); 5158 } 5159 typedef enum tagSEMAPHOREADDRESS_GRAPHICSADDRESS { 5160 SEMAPHOREADDRESS_GRAPHICSADDRESS_BIT_SHIFT = 0x2, 5161 SEMAPHOREADDRESS_GRAPHICSADDRESS_ALIGN_SIZE = 0x4, 5162 } SEMAPHOREADDRESS_GRAPHICSADDRESS39_2; 5163 inline void setSemaphoreGraphicsAddress(const uint64_t value) { 5164 TheStructure.Common.SemaphoreAddress_Graphicsaddress = value >> SEMAPHOREADDRESS_GRAPHICSADDRESS_BIT_SHIFT; 5165 } 5166 inline uint64_t getSemaphoreGraphicsAddress() const { 5167 return (TheStructure.Common.SemaphoreAddress_Graphicsaddress << SEMAPHOREADDRESS_GRAPHICSADDRESS_BIT_SHIFT); 5168 } 5169 typedef enum tagSEMAPHOREADDRESS_RESERVED { 5170 SEMAPHOREADDRESS_RESERVED_BIT_SHIFT = 0x2, 5171 SEMAPHOREADDRESS_RESERVED_ALIGN_SIZE = 0x4, 5172 } SEMAPHOREADDRESS_RESERVED; 5173} MI_SEMAPHORE_WAIT; 5174STATIC_ASSERT(16 == sizeof(MI_SEMAPHORE_WAIT)); 5175 5176typedef struct tagMI_STORE_DATA_IMM { 5177 union tagTheStructure { 5178 struct tagCommon { 5179 uint32_t DwordLength : BITFIELD_RANGE(0, 9); 5180 uint32_t Reserved_10 : BITFIELD_RANGE(10, 20); 5181 uint32_t StoreQword : BITFIELD_RANGE(21, 21); 5182 uint32_t UseGlobalGtt : BITFIELD_RANGE(22, 22); 5183 uint32_t MiCommandOpcode : BITFIELD_RANGE(23, 28); 5184 uint32_t CommandType : BITFIELD_RANGE(29, 31); 5185 uint64_t CoreModeEnable : BITFIELD_RANGE(0, 0); 5186 uint64_t Reserved_33 : BITFIELD_RANGE(1, 1); 5187 uint64_t Address : BITFIELD_RANGE(2, 63); 5188 uint32_t DataDword0; 5189 uint32_t DataDword1; 5190 } Common; 5191 uint32_t RawData[5]; 5192 } TheStructure; 5193 typedef enum tagDWORD_LENGTH { 5194 DWORD_LENGTH_STORE_DWORD = 0x2, 5195 DWORD_LENGTH_STORE_QWORD = 0x3, 5196 } DWORD_LENGTH; 5197 typedef enum tagMI_COMMAND_OPCODE { 5198 MI_COMMAND_OPCODE_MI_STORE_DATA_IMM = 0x20, 5199 } MI_COMMAND_OPCODE; 5200 typedef enum tagCOMMAND_TYPE { 5201 COMMAND_TYPE_MI_COMMAND = 0x0, 5202 } COMMAND_TYPE; 5203 inline void init() { 5204 memset(&TheStructure, 0, sizeof(TheStructure)); 5205 TheStructure.Common.DwordLength = DWORD_LENGTH_STORE_DWORD; 5206 TheStructure.Common.MiCommandOpcode = MI_COMMAND_OPCODE_MI_STORE_DATA_IMM; 5207 TheStructure.Common.CommandType = COMMAND_TYPE_MI_COMMAND; 5208 } 5209 static tagMI_STORE_DATA_IMM sInit() { 5210 MI_STORE_DATA_IMM state; 5211 state.init(); 5212 return state; 5213 } 5214 inline uint32_t &getRawData(const uint32_t index) { 5215 DEBUG_BREAK_IF(index >= 5); 5216 return TheStructure.RawData[index]; 5217 } 5218 inline void setDwordLength(const DWORD_LENGTH value) { 5219 TheStructure.Common.DwordLength = value; 5220 } 5221 inline DWORD_LENGTH getDwordLength() const { 5222 return static_cast<DWORD_LENGTH>(TheStructure.Common.DwordLength); 5223 } 5224 inline void setStoreQword(const bool value) { 5225 TheStructure.Common.StoreQword = value; 5226 } 5227 inline bool getStoreQword() const { 5228 return (TheStructure.Common.StoreQword); 5229 } 5230 inline void setUseGlobalGtt(const bool value) { 5231 TheStructure.Common.UseGlobalGtt = value; 5232 } 5233 inline bool getUseGlobalGtt() const { 5234 return (TheStructure.Common.UseGlobalGtt); 5235 } 5236 inline void setCoreModeEnable(const uint64_t value) { 5237 TheStructure.Common.CoreModeEnable = value; 5238 } 5239 inline uint64_t getCoreModeEnable() const { 5240 return (TheStructure.Common.CoreModeEnable); 5241 } 5242 typedef enum tagADDRESS { 5243 ADDRESS_BIT_SHIFT = 0x2, 5244 ADDRESS_ALIGN_SIZE = 0x4, 5245 } ADDRESS; 5246 inline void setAddress(const uint64_t value) { 5247 TheStructure.Common.Address = value >> ADDRESS_BIT_SHIFT; 5248 } 5249 inline uint64_t getAddress() const { 5250 return (TheStructure.Common.Address << ADDRESS_BIT_SHIFT); 5251 } 5252 inline void setDataDword0(const uint32_t value) { 5253 TheStructure.Common.DataDword0 = value; 5254 } 5255 inline uint32_t getDataDword0() const { 5256 return (TheStructure.Common.DataDword0); 5257 } 5258 inline void setDataDword1(const uint32_t value) { 5259 TheStructure.Common.DataDword1 = value; 5260 } 5261 inline uint32_t getDataDword1() const { 5262 return (TheStructure.Common.DataDword1); 5263 } 5264} MI_STORE_DATA_IMM; 5265STATIC_ASSERT(20 == sizeof(MI_STORE_DATA_IMM)); 5266 5267typedef struct tagPWR_CLK_STATE_REGISTER { 5268 typedef enum tagADDRESS { 5269 REG_ADDRESS = 0x20C8 5270 } ADDRESS; 5271 union tagTheStructure { 5272 struct tagCommon { 5273 uint32_t EUmin : BITFIELD_RANGE(0, 3); 5274 uint32_t EUmax : BITFIELD_RANGE(4, 7); 5275 uint32_t SScount : BITFIELD_RANGE(8, 10); 5276 uint32_t SSCountEn : BITFIELD_RANGE(11, 11); 5277 uint32_t SliceCountRequest : BITFIELD_RANGE(12, 17); 5278 uint32_t EnableSliceCountRequest : BITFIELD_RANGE(18, 18); 5279 uint32_t Reserved : BITFIELD_RANGE(19, 30); 5280 uint32_t EnablePwrClockGating : BITFIELD_RANGE(31, 31); 5281 } Common; 5282 uint32_t RawData[1]; 5283 } TheStructure; 5284 inline void init() { 5285 TheStructure.RawData[0] = 0; 5286 TheStructure.Common.EnablePwrClockGating = 1; 5287 TheStructure.Common.EUmin = 8; 5288 TheStructure.Common.EUmax = 8; 5289 } 5290 static tagPWR_CLK_STATE_REGISTER sInit() { 5291 PWR_CLK_STATE_REGISTER state; 5292 state.init(); 5293 return state; 5294 } 5295} PWR_CLK_STATE_REGISTER; 5296STATIC_ASSERT(4 == sizeof(PWR_CLK_STATE_REGISTER)); 5297 5298typedef struct tagASYNC_SLICE_COUNT_SELECT_REGISTER { 5299 typedef enum tagADDRESS { 5300 REG_ADDRESS = 0xA204 5301 } ADDRESS; 5302 union tagTheStructure { 5303 struct tagCommon { 5304 uint32_t AsyncSliceCount : BITFIELD_RANGE(0, 3); 5305 uint32_t AsyncEuCount : BITFIELD_RANGE(4, 7); 5306 uint32_t AsyncSubSliceCount : BITFIELD_RANGE(8, 10); 5307 uint32_t Reserved : BITFIELD_RANGE(11, 31); 5308 } Common; 5309 uint32_t RawData[1]; 5310 } TheStructure; 5311 inline void init() { 5312 TheStructure.RawData[0] = 0; 5313 TheStructure.Common.AsyncSliceCount = 2; 5314 TheStructure.Common.AsyncSubSliceCount = 4; 5315 TheStructure.Common.AsyncEuCount = 8; 5316 } 5317 static tagASYNC_SLICE_COUNT_SELECT_REGISTER sInit() { 5318 ASYNC_SLICE_COUNT_SELECT_REGISTER state; 5319 state.init(); 5320 return state; 5321 } 5322} ASYNC_SLICE_COUNT_SELECT_REGISTER; 5323STATIC_ASSERT(4 == sizeof(ASYNC_SLICE_COUNT_SELECT_REGISTER)); 5324 5325typedef struct tagSAMPLER_BORDER_COLOR_STATE { 5326 union tagTheStructure { 5327 struct tagCommon { 5328 // DWORD 0 5329 float BorderColorRed; 5330 // DWORD 1 5331 float BorderColorGreen; 5332 // DWORD 2 5333 float BorderColorBlue; 5334 // DWORD 3 5335 float BorderColorAlpha; 5336 } Common; 5337 uint32_t RawData[4]; 5338 } TheStructure; 5339 inline void init() { 5340 memset(&TheStructure, 0, sizeof(TheStructure)); 5341 TheStructure.Common.BorderColorRed = 0.0; 5342 TheStructure.Common.BorderColorGreen = 0.0; 5343 TheStructure.Common.BorderColorBlue = 0.0; 5344 TheStructure.Common.BorderColorAlpha = 0.0; 5345 } 5346 static tagSAMPLER_BORDER_COLOR_STATE sInit() { 5347 SAMPLER_BORDER_COLOR_STATE state; 5348 state.init(); 5349 return state; 5350 } 5351 inline uint32_t &getRawData(const uint32_t index) { 5352 UNRECOVERABLE_IF(index >= 4); 5353 return TheStructure.RawData[index]; 5354 } 5355 inline void setBorderColorRed(const float value) { 5356 TheStructure.Common.BorderColorRed = value; 5357 } 5358 inline float getBorderColorRed() const { 5359 return TheStructure.Common.BorderColorRed; 5360 } 5361 inline void setBorderColorGreen(const float value) { 5362 TheStructure.Common.BorderColorGreen = value; 5363 } 5364 inline float getBorderColorGreen() const { 5365 return TheStructure.Common.BorderColorGreen; 5366 } 5367 inline void setBorderColorBlue(const float value) { 5368 TheStructure.Common.BorderColorBlue = value; 5369 } 5370 inline float getBorderColorBlue() const { 5371 return TheStructure.Common.BorderColorBlue; 5372 } 5373 inline void setBorderColorAlpha(const float value) { 5374 TheStructure.Common.BorderColorAlpha = value; 5375 } 5376 inline float getBorderColorAlpha() const { 5377 return TheStructure.Common.BorderColorAlpha; 5378 } 5379} SAMPLER_BORDER_COLOR_STATE; 5380STATIC_ASSERT(16 == sizeof(SAMPLER_BORDER_COLOR_STATE)); 5381 5382#pragma pack() 5383